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* S5P: mmc: Resolved interrupt error during mmc_initChander Kashyap2011-03-271-1/+1
| | | | | | | | | | | | Blocksize was hardcoded to 512 bytes. But the blocksize varies depeding on various mmc subsystem commands (between 8 and 512). This hardcoding was resulting in interrupt error during data transfer. It is now calculated based upon the request sent by mmc subsystem. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARMV7: S5P: Fixed register offset in mmc.hChander Kashyap2011-03-272-4/+6
| | | | | | | | | | | The MMC registers are accessed through struct s5p_mmc member variables. MMC controller "control4" register offset is set to 0x8C as per data sheet. The size of struct s5p_mmc is also corrected. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* S5P: timer: replace bss variable by gdMinkyu Kang2011-03-271-15/+12
| | | | | | | | | | | | Use the global data instead of bss variable, replace as follow. count_value -> removed timestamp -> tbl lastdec -> lastinc Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Albert ARIBAUD <albert.aribaud@free.fr>
* S5P: universal: Enable the pwm driverMinkyu Kang2011-03-271-0/+3
| | | | Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* S5P: goni: Enable the pwm driverMinkyu Kang2011-03-271-0/+3
| | | | Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* S5P: smdkc100: Enable the pwm driverMinkyu Kang2011-03-271-0/+3
| | | | Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* S5P: timer: Use pwm functionsMinkyu Kang2011-03-273-58/+7
| | | | | | Use pwm functions for timer that is PWM timer 4. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: S5P: pwm driver supportDonghwa Lee2011-03-275-0/+259
| | | | | | | | This is common pwm driver of S5P. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SMDK6400: Fixup dram_init for relocation supportseedshope2011-03-271-1/+7
| | | | | Signed-off-by: Zhong Hongbo <bocui107@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SMDK6400: Disable LED function in start.s on the nand bootingseedshope2011-03-271-0/+2
| | | | | | | | | | Since nand boot have some limit for the first 4KB, We only disable the LED function to reduce the code space. At the same time, Fix the compile error for LED function undefined in the compile time of nand_spl. Signed-off-by: Zhong Hongbo <bocui107@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SMDK6400: Add some labels to u-boot.lds to support nand_splseedshope2011-03-271-1/+16
| | | | | | | | In the nand_spl feature of SMDK6400. Add some relocation symbols to nand_spl/board/samsung/smdk6400/u-boot.lds to fix the compile error. Signed-off-by: Zhong Hongbo <bocui107@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SMDK6400: Fix the mutiple link errorseedshope2011-03-271-1/+0
| | | | | | | | | | | | The first, the cpu_init.o have already been link for cmd_link_o_target atfer compile, But, The link script re-link the point file. So the link machine will generate multiple definition error information. The second, Since the first 4kB of nand boot featue code move to nand_spl, So It is not necessary to force the cpu_init.o in non-nand boot. Signed-off-by: Zhong Hongbo <bocui107@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SMDK6400: Fix some label undefined in build errorseedshope2011-03-271-3/+24
| | | | | | | | | | Modify Makefile for cpu_init.c and Start.s use some label,this defined u-boot.lds of arch/arm/cpu/arm1176. But SMDK6400 use the link script board/samsung/smdk6400/u-boot-nand.lds. So add some label form u-boot.lds to u-boot-nand.lds Signed-off-by: Zhong Hongbo <bocui107@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SMDK6400: Fix CONFIG_SYS_INIT_SP_ADDR undefinedseedshope2011-03-271-0/+5
| | | | | | | Fix CONFIG_SYS_INIT_SP_ADDR undefined issue. Signed-off-by: Zhong Hongbo <bocui107@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* arm: fix incorrect monitor protection region in FLASHPo-Yu Chuang2011-03-2731-1/+88
| | | | | | | | | | | Monitor protection region in FLASH did not cover .rel.dyn and .dynsym sections, because it uses __bss_start to compute monitor_flash_len. Use _end instead. Add _end to linker scripts for end of u-boot image Add _end_ofs to all the start.S. Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
* rename _end to __bss_end__Po-Yu Chuang2011-03-27242-263/+263
| | | | | | | Currently, _end is used for end of BSS section. We want _end to mean end of u-boot image, so we rename _end to __bss_end__ first. Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
* strmhz: Make hz unsigned to support greater than 2146 MHz clockEd Swarthout2011-03-222-2/+2
| | | | | | | | | For example, an input of 0x80000000 should print: 2147.484 instead of -2147.-483. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Introduce a new linker flag LDFLAGS_FINALHaiying Wang2011-03-2222-25/+39
| | | | | | | | | | | | | | | commit 8aba9dceebb14144e07d19593111ee3a999c37fc Divides variable of linker flags to LDFLAGS-u-boot and LDFLAGS breaks the usage of --gc-section to build nand_spl. We still need linker option --gc-section for every uboot image, not only the main one. LDFLAGS_FINAL passes the --gc-sections to each uboot image. To get the proper linker flags, we use LDFLAGS and LDFLAGS_FINAL to replace PLATFORM_LDFLAGS in the Makefile of each nand_spl board. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Fix hash table deletion to prevent lost entriesPeter Barada2011-03-221-5/+13
| | | | | | | | | | | | | | Use negative used value to mark deleted entry. Search keeps probing past deleted entries. Adding an entry uses first deleted entry when it hits end of probe chain. Initially found that "ramdiskimage" and "preboot" collide modulus 347, causing "preboot" to be inserted at idx 190, "ramdiskimage" at idx 191. Previous to this fix when "preboot" is deleted, "ramdiskimage" is orphaned. Signed-off-by: Peter Barada <peter.barada@logicpd.com> Tested-by: Wolfgang Denk <wd@denx.de>
* Top config.mk: add include/config.mkJoakim Tjernlund2011-03-211-0/+1
| | | | | | | | Seems to me that the top level config.mk should include the auto generated include/config.mk so that all Makefile's pickup those definitions. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* net: ftmac100: update get_timer() usagesPo-Yu Chuang2011-03-211-3/+3
| | | | | | | | Use get_timer() the same way as drivers/net/ftgmac100.c Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com> Reviewed-by: Macpaul Lin <macpaul@gmail.com> Tested-by: Macpaul Lin <macpaul@gmail.com>
* net: ftmac100: remove unnecessary volatilesPo-Yu Chuang2011-03-211-6/+6
| | | | | | Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com> Reviewed-by: Macpaul Lin <macpaul@gmail.com> Tested-by: Macpaul Lin <macpaul@gmail.com>
* mpc52xx, digsy_mtc_rev5: Fix Linux crash, if no Flash in bank 2Heiko Schocher2011-03-212-2/+7
| | | | | | | | | | | | | | | | If no Flash is connected to cs1, Linux crashes, because reg entries are not correct adapted. Following fix is needed: - swap base addresses in CONFIG_SYS_FLASH_BANKS_LIST, as flash bank 1 is on chipselect 0 and flash bank 2 on chipselect 1 - call fdt_fixup_nor_flash_size() from ft_board_setup() Signed-off-by: Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <hs@denx.de> cc: Werner Pfister <Pfister_Werner@intercontrol.de> cc: Detlev Zundel <dzu@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-ubiWolfgang Denk2011-03-211-72/+65
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| * UBI: Fix error code handling in ubi commandsStefan Roese2011-03-211-72/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some ubi commands returned negative error codes, resulting in the following error message on the prompt: "exit not allowed from main input shell." Negative error codes are not allowed. This patch now changes the UBI code to return positive error codes. Additionally "better" error codes are used, for example "ENOMEM" when no memory is available for the UBI volume creation any more. Also the output of some commands is enhanced: Before: => ubi read 100000 testvol 100000 Volume testvol found at volume id 0 read 1048576 bytes from volume 0 to 100000(buf address) => ubi write 100000 testvol 1000 Volume testvol found at volume id 0 After: => ubi read 100000 testvol 100000 Read 1048576 bytes from volume testvol to 00100000 => ubi write 100000 testvol 1000 4096 bytes written to volume testvol Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk2011-03-216-8/+96
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| * | sh: Add KEEP order to start.o sectionNobuhiro Iwamatsu2011-03-163-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | The start.o section is changed by --gc-section option of ld. Of this using KEEP order, therefore, evade this problem. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add handling of CONFIG_SYS_NO_FLASH for board.cNobuhiro Iwamatsu2011-03-161-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some board of SH does not have flash memoy. This revises it to initialize Flash when CONFIG_SYS_NO_FLASH is not defined. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | net: sh_eth: add support for SH7757's ETHERYoshihiro Shimoda2011-03-162-4/+86
| |/ | | | | | | | | | | | | SH7757 has ETHER and GETHER. This patch supports EHTER only. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | powerpc/85xx: Fix synchronization of timebase on MP bootKumar Gala2011-03-151-0/+9
|/ | | | | | | | | | | There is a small ordering issue in the master core in that we need to make sure the disabling of the timebase in the SoC is visible before we set the value to 0. We can simply just read back the value to synchronizatize the write, before we set TB to 0. Reported-by: Dan Hettena Tested-by: Dan Hettena Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc8[5/6]xx: Ensure POST word does not get resetJohn Schmoller2011-03-132-0/+32
| | | | | | | | | | | | The POST word is stored in a spare register in the PIC on MPC8[5/6]xx processors. When interrupt_init() is called, this register gets reset which resulted in all POST_RAM POSTs not being ran due to the corrupted POST word. To resolve this, store off POST word before the PIC is reset, and restore it after the PIC has been initialized. Signed-off-by: John Schmoller <jschmoller@xes-inc.com> Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Correcting esdhc timeout counter calculationPriyanka Jain2011-03-071-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | - Timeout counter value is set as DTOCV bits in SYSCTL register For counter value set as timeout, Timeout period = (2^(timeout + 13)) SD Clock cycles - As per 4.6.2.2 section of SD Card specification v2.00, host should cofigure timeout period value to minimum 0.25 sec. - Number of SD Clock cycles for 0.25sec should be minimum (SD Clock/sec * 0.25 sec) SD Clock cycles = (mmc->tran_speed * 1/4) SD Clock cycles - Calculating timeout based on (2^(timeout + 13)) >= mmc->tran_speed * 1/4 Taking log2 both the sides and rounding up to next power of 2 => timeout + 13 = log2(mmc->tran_speed/4) + 1 Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Mingkai Hu <Mingkai.Hu@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix pixis_reset altbank mask on MPC8536DSMatthew McClintock2011-03-061-1/+1
| | | | | | | | Currently, pixis_reset altbank does not work properly. This patch uses the correct mask to boot into the alternate bank. Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix plat_mp_up() disabling of BPTR for CoreNet PlatformsEd Swarthout2011-03-051-2/+2
| | | | | | | | Copying directly from ECM/PQ3 is not correct for how CoreNet based platforms handle boot page translation. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/corenet_ds: revise platform dependent parametersYork Sun2011-03-051-4/+4
| | | | | | | | This patch revised clk_adjust and wrlvl_start timings for corenet_ds, based on testing on Virtium VL33B5163F-K9S and Kingston KVR1333D3Q8R9S/4G. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* corenet_ds: pick the middle value for all tested timing parametersYork Sun2011-03-051-40/+18
| | | | | | | | | | | For DDR3 controller, the clk_adjust and wrlvl_start are platform-dependent. The best values should be picked up from the middle of all working combinations. This patch updates the table with confirmed values tested on Hynix dual-rank UDIMMs (HMT125U7BFR8C-H9) at 1300MT/s, 1200MT/s, 1000MT/s, 900MT/s, 800MT/s and Kingston quad-rank RDIMMs (KVR1333D3Q8R9S/4G) at 1300MT/s, 1200MT/s, 1000MT/s. Signed-off-by: York Sun <yorksun@freescale.com>
* powerpc/mpc8xxx: Fix DDR3 timing_cfg_1 and sdram_mode registersYork Sun2011-03-051-6/+14
| | | | | | | | | The write recovery time of both registers should match. Since mode register doesn't support cycles of 9,11,13,15, we should use next higher number for both registers. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_law: Fix LAW printing functionKumar Gala2011-02-221-1/+1
| | | | | | | | | | | | | We had an extra '0x' in the output of the LAWAR header that would cause output like: LAWBAR11: 0x00000000 LAWAR0x11: 0x80f0001d intead of: LAWBAR11: 0x00000000 LAWAR11: 0x80f0001d Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ARM: Update mach-typesSandeep Paulraj2011-02-211-15/+1276
| | | | | | | This commit updates the mach-types based on the latest in linus's head Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm1136 relocation: Fix calculation of board_init_rFabio Estevam2011-02-211-1/+1
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* arm1136: Fix NAND bootFabio Estevam2011-02-211-12/+4
| | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
* arm: get_sp() should always be compiledPo-Yu Chuang2011-02-211-3/+1
| | | | | | | | | | | | get_sp() was incorrectly excluded if none of CONFIG_SETUP_MEMORY_TAGS CONFIG_CMDLINE_TAG CONFIG_INITRD_TAG CONFIG_SERIAL_TAG CONFIG_REVISION_TAG were defined. Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
* Pantheon: Add Board Support for Marvell dkb boardLei Wen2011-02-215-0/+175
| | | | | | | | | | | | | | | | | | | | | | | | DKB is a Development Board for PANTHEON TD/TTC(pxa920/pxa910) with * Processor upto 806Mhz * LPDDR1/2 * x8/x16 SLC/MLC NAND * Footprints for eMMC & MMC x8 card With Peripherals: * Parallel LCD I/F * Audio codecs (88PM8607) * MIPI CSI-2 camera * Marvell 88W8787 802.11n/BT module * Marvell 2G/3G RF * Dual analog mics & speakers, headset jack, LED, ambient * USB2.0 HS host, OTG (mini AB) * GPIO, GPIO expander with DIP switches for easier selection * UART serial over USB, CIR This patch adds basic board support with DRAM and UART functionality Signed-off-by: Lei Wen <leiwen@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* mvmfp: add MFP configuration support for PANTHEONLei Wen2011-02-212-0/+43
| | | | | | | This patch adds the Multiple Function Pin configuration support for Marvell PANTHEON SoCs Signed-off-by: Lei Wen <leiwen@marvell.com>
* serial: add pantheon soc supportLei Wen2011-02-211-0/+2
| | | | Signed-off-by: Lei Wen <leiwen@marvell.com>
* ARM: Add Support for Marvell Pantheon Familiy SoCsLei Wen2011-02-217-0/+641
| | | | | | | | | | | | | Pantheon Family processors are highly integrated SoCs based on Sheeva_88SV331x-v5 PJ1 cpu core. Ref: http://www.marvell.com/products/processors/communications/marvell_pantheon_910_920_pb.pdf SoC versions Supported: 1) PANTHEON920 (TD) 2) PANTHEON910 (TTC) Signed-off-by: Lei Wen <leiwen@marvell.com>
* mv: seperate kirkwood and armada from common settingLei Wen2011-02-215-126/+223
| | | | | | | | | | | | | Since there are lots of difference between kirkwood and armada series, it is better to seperate them but still keep the most common file shared by all marvell platform in the mv-common configure file. This patch move the kirkwood only driver definitoin in mv-common to the <soc_name>/config.h. This patch is tested with compilation for armada100 and guruplug. Signed-off-by: Lei Wen <leiwen@marvell.com>
* ARM: fix write*() I/O accessorsWolfgang Denk2011-02-211-3/+3
| | | | | | | | | | | | | | | | | | | Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb and friends." introduced I/O accessors with memory barriers. Unfortunately the new write*() accessors introduced a bug: The problem is that the argument "v" gets evaluated twice. This breaks code like used here (from "drivers/net/dnet.c"): for (i = 0; i < wrsz; i++) writel(*bufp++, &dnet->regs->TX_DATA_FIFO); Use auxiliary variables to avoid such problems. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.aribaud@free.fr> Cc: Alexander Holler <holler@ahsoftware.de> Cc: Dirk Behme <dirk.behme@googlemail.com>
* arm relocation: Fix calculation of board_init_rAlexander Stein2011-02-211-1/+1
| | | | Signed-off-by: Alexander Stein <alexander.stein@informatik.tu-chemnitz.de>
* arm: Tegra2: Add support for NVIDIA Seaboard boardTom Warren2011-02-214-0/+95
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
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