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| * | rockchip: rk3288: pinctrl: support more pinsSjoerd Simons2016-05-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The rgmii_pins node in rk3288.dtsi configures 15 pins. Increase the size of the cell array to accomedate that, otherwise only the first 10 get configured. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | net: designware: support phy reset device-tree bindingsSjoerd Simons2016-05-272-6/+80
| |/ | | | | | | | | | | | | | | | | Add support for the snps,reset-gpio, snps,reset-active-low (optional) and snps,reset-delays-us device-tree bindings. The combination of these three define how the PHY should be reset to ensure it's in a sane state. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Simon Glass <sjg@chromium.org>
* | ARM: OMAP4+: Fix DPLL programming sequenceLokesh Vutla2016-05-271-3/+5
| | | | | | | | | | | | | | | | | | | | All the output clock parameters of a DPLL needs to be programmed before locking the DPLL. But it is being configured after locking the DPLL which could potentially bypass DPLL. So fixing this sequence. Reported-by: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
* | tools: Add entry for generated tools/bin2header to tools/.gitignoreRobert P. J. Day2016-05-271-0/+1
| | | | | | | | Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* | tools/genboardscfg.py: remove bogus import subprocessMasahiro Yamada2016-05-271-1/+0
| | | | | | | | | | | | | | Since f6c8f38ec601 ("tools/genboardscfg.py: improve performance more with Kconfiglib"), this tool does not use the subprocess module. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | image.h: Tighten up content using handy CONFIG_IS_ENABLED() macro.Robert P. J. Day2016-05-271-57/+12
| | | | | | | | | | | | | | | | | | | | In order for CONFIG_IS_ENABLED(FOO) to work we need to move the changes that CONFIG_FIT_DISABLE_SHA256 makes to be prior to the evaluation by CONFIG_IS_ENABLED(foo) Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> [trini: Move CONFIG_FIT_DISABLE_SHA256 parts to fix build breakage] Signed-off-by: Tom Rini <trini@konsulko.com>
* | arm64: rename __asm_flush_dcache_level to __asm_dcache_levelMasahiro Yamada2016-05-271-6/+6
| | | | | | | | | | | | | | | | | | Since 1e6ad55c0582 ("armv8/cache: Change cache invalidate and flush function"), this routine can be used for both cache flushing and cache invalidation. So, it is better to not include "flush" in this routine name. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | arm64: fix comment "flush & invalidate"Masahiro Yamada2016-05-271-2/+2
| | | | | | | | | | | | We should say "clean & invalidate", or simply "flush". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | arm64: optimize __asm_{flush, invalidate}_dcache_allMasahiro Yamada2016-05-271-8/+2
| | | | | | | | | | | | | | | | | | | | __asm_dcache_all can directly return to the caller of __asm_{flush,invalidate}_dcache_all. We do not have to waste x16 register here. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | board: am335x: Allow to choose serial device dynamicallyLokesh Vutla2016-05-272-0/+15
| | | | | | | | | | | | | | | | Different AM335x based platforms have different serial consoles. As serial console is Kconfig option a separate defconfig has to be created for each platform. So pass the serial device dynamically. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: dts: AM335x-ICEv2: Add minimal dts supportLokesh Vutla2016-05-274-2/+435
| | | | | | | | | | | | | | | | Add minimal dts support for AM335x-ICEv2 board Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
* | config: env: Set AM335x-ICEv2 board specific envLokesh Vutla2016-05-271-0/+9
| | | | | | | | | | | | | | Populate the right dtb file and console for AM335x-ICEv2 board. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: AM335x-ICEv2: Add cpsw supportLokesh Vutla2016-05-272-7/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to enable cpsw on AM335x ICEv2 board, the following needs to be done: 1)There are few on board jumper settings which gives a choice between cpsw and PRUSS, that needs to be properly selected[1]. Even after selecting this, there are few GPIOs which control these muxes that needs to be held high. 2) The clock to PHY is provided by a PLL-based clock synthesizer[2] connected via I2C. This needs to properly programmed and locked for PHY operation. And PHY needs to be reset before before being used, which is also held by a GPIO. 3) RMII mode needs to be selected. [1] http://www.ti.com/lit/zip/tidr336 [2] http://www.ti.com/lit/ds/symlink/cdce913.pdf Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: AM33xx: Add support for Clock SynthesizerLokesh Vutla2016-05-273-0/+149
| | | | | | | | | | | | | | | | | | | | | | | | The CDCE913 and CDCEL913 devices are modular PLL-based, low cost, high performance , programmable clock synthesizers. They generate upto 3 output clocks from a single input frequency. Each output can be programmed for any clock-frequency. Adding support for the same. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: AM335x-ICEv2: Add DDR dataLokesh Vutla2016-05-272-1/+55
| | | | | | | | | | | | | | | | | | AM335x ICEv2 contains a 2Gbit(128Mx16) of DDR3 SDRAM(MT41J128M16JT-125), capable of running at 400MHz. Adding this specific DDR configuration details running at 400MHz. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: AM335x-ICEv2: Add pinmux supportLokesh Vutla2016-05-271-0/+31
| | | | | | | | | | | | | | Add necessary pinmux support for AM335x ICEv2 board. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: AM335x-ICEv2: Add epprom supportLokesh Vutla2016-05-271-0/+5
| | | | | | | | | | | | | | | | | | Similar to other TI's AM335x platforms, AM335x ICEv2 also has an eeprom populated for its unique identification. Adding this info so that AM335x ICEv2 specific initialization can be done. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | configs: am335x_evm: Switch to env on FAT SD by defaultTom Rini2016-05-271-19/+21
| | | | | | | | | | | | | | | | Re-org env sections so that we can fall back to env is in FAT on SD card, for broader board compatibility Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: dts: AM335x-BBG: Add initial supportLokesh Vutla2016-05-274-2/+62
| | | | | | | | | | | | | | Add initial DTS support for AM335x-BBG Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: dts: AM335x-evmsk: Add initial supportLokesh Vutla2016-05-275-2/+762
| | | | | | | | | | | | | | Add initial DTS support for AM335x-evm sk. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: dts: am335x: fix cd-gpios definition as per hardware design and dt ↵Mugunthan V N2016-05-272-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | binding docs As per mmc device tree binding documentation card detect gpio has to be active low signal. When a hardware is designed with active high card detect, gpio polarity has to be changed with cd-inverted dt property. In AM335x the card detect gpio is designed as active low gpio. So correcting the dt card detect gpio definition. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* | ARM: AM335x: Enable FITLokesh Vutla2016-05-273-52/+11
| | | | | | | | | | | | | | Use a single defconfig for all AM335x platforms by enabling FIT Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: dts: am335x-bone: Enable uart and timerLokesh Vutla2016-05-273-4/+6
| | | | | | | | | | | | | | | | Allow am335x-bone.dts to be built and enable uart and timer for all beaglebones. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: am33xx: fit: add support for selecting dtb dynamicallyLokesh Vutla2016-05-271-0/+14
| | | | | | | | | | | | | | | | FIT allows for a multiple dtb in a single image. SPL needs a way to detect the right dtb to be used. Adding support for the same. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: AM43xx: configs: Update usb host boot defconfigLokesh Vutla2016-05-271-0/+14
| | | | | | | | | | | | | | | | Convert usb host boot defconfig to use DM, DT. Also enable FIT support. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: dts: AM437x-IDK Initial SupportLokesh Vutla2016-05-274-2/+425
| | | | | | | | | | | | | | Add initial DTS support for AM437x-IDK evm. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: dts: AM43x-EPOS Initial SupportLokesh Vutla2016-05-276-2/+825
| | | | | | | | | | | | | | Add initial DTS support for AM43-EPOS evm. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: AM43xx: Enable FITLokesh Vutla2016-05-274-114/+15
| | | | | | | | | | | | | | | | Use a single defconfig for all AM43xx platforms by enabling FIT and delete the platform specific defconfigs. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | board: AM43xx: fit: add support for selecting dtb dynamicallyLokesh Vutla2016-05-271-0/+12
| | | | | | | | | | | | | | | | FIT allows for a multiple dtb in a single image. SPL needs a way to detect the right dtb to be used. Adding support for the same. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: DRA7: configs: Remove obsolete configsLokesh Vutla2016-05-273-89/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removing: uart3_defconfig: Now uart3 can be selected using menuconfig, removing separate config for uart mode. Doing uart boot is not straight forward as ROM uses uart3 as default serial console. In order to boot to prompt, concole in both u-boot and kernel needs to be changed. qspiboot_defconfig: The only advantage of enabling QSPI_BOOT is selecting env in QSPI. Eventually env needs to be selected by menuconfig so removing qspiboot_defconfig. qspiboot can be done using dra7xx_evm_defconfig. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: DRA7: Enable FITLokesh Vutla2016-05-274-111/+15
| | | | | | | | | | | | | | | | Use a single defconfig for all DRA7 platforms by enabling FIT and delete the platform specific defconfigs. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | board: dra7: fit: add support for selecting dtb dynamicallyLokesh Vutla2016-05-271-0/+12
| | | | | | | | | | | | | | | | FIT allows for a multiple dtb in a single image. SPL needs a way to detect the right dtb to be used. Adding support for the same. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | Remove unused BOOTFLAG definitionsChris Packham2016-05-272-16/+0
| | | | | | | | | | | | | | | | This follows on from commit d98b052 ("powerpc: Cleanup BOOTFLAG_* references") and commit fc3d297 ("Drop bogus BOOTFLAG_* definitions"). Remove the definitions that have crept in since. Signed-off-by: Chris Packham <judge.packham@gmail.com>
* | spl: Add an option to load a FIT containing U-Boot from UARTLokesh Vutla2016-05-271-14/+84
| | | | | | | | | | | | | | | | This provides a way to load a FIT containing U-Boot and a selection of device tree files from UART. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | spl: fit: Do not print selected dtb during fit loadLokesh Vutla2016-05-271-3/+1
| | | | | | | | | | | | | | No prints should be allowed during UART load. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | spl: Support loading a FIT from NANDLokesh Vutla2016-05-271-5/+32
| | | | | | | | | | | | | | | | | | | | | | Detect a FIT when loading from NAND and handle it using the new FIT SPL support. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [trini: Make sure we continue to use (void *)(unsigned long) for load_addr]. Signed-off-by: Tom Rini <trini@konsulko.com>
* | mtd: nand: am335x: spl: Fix copying of imageLokesh Vutla2016-05-271-1/+14
| | | | | | | | | | | | | | | | | | When offset is not aligned to page address, it is possible that extra offset will be read from nand. Adjust the image such that first byte of the image is at load address after the first page is read. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | spl: Support loading a FIT from SPILokesh Vutla2016-05-271-5/+32
| | | | | | | | | | | | | | | | Detect a FIT when loading from SPI and handle it using the new FIT SPL support. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | spl: Support loading a FIT from FAT FSLokesh Vutla2016-05-271-4/+32
| | | | | | | | | | | | | | | | | | | | Detect a FIT when loading from a FAT File system and handle it using the new FIT SPL support. Tested-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | spl: Allow to load a FIT containing U-Boot from FSLokesh Vutla2016-05-273-14/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | This provides a way to load a FIT containing U-Boot and a selection of device tree files from a File system. Making sure that all the reads and writes are aligned to their respective needs. Tested-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [trini: Make this still apply with Michal's alignment change for 'fit'] Signed-off-by: Tom Rini <trini@konsulko.com>
* | spl: fit: Fix the number of bytes read when reading fdt from fitLokesh Vutla2016-05-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | sectors field is not being updated when reading fdt from fit image. Because of this size_of(u-boot.bin) is being read when reading fdt. Fixing it by updating the sectors field properly. Tested-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | defconfig: ti: Add configs for OMAP5-class secure partsDaniel Allred2016-05-273-0/+145
| | | | | | | | | | | | | | | | | | | | | | Adds new defconfig files for DRA7xx and AM57xx secure devices. These are the same as the non-secure parts, but with the addition of the CONFIG_TI_SECURE_DEVICE option set to 'y'. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Madan Srinivas <madans@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: omap5: add ft_board_setup for dra7xx/am57xxDaniel Allred2016-05-275-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds the board specific ft_board_setup() functions that are called when CONFIG_OF_BOARD_SETUP is defined. These functions will currently just call the ft_cpu_setup() function. Adds CONFIG_OF_BOARD_SETUP to the defconfig files for dra72_evm, dra74_evm, and am57xx_evm. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Madan Srinivas <madans@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: omap5: add hooks for cpu/SoC fdt fixupsDaniel Allred2016-05-272-0/+185
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds an fdt.c file in that defines the ft_cpu_setup() function, which should be called from a board-specific ft_board_setup()). This ft_cpu_setup() will currently do nothing for non-secure (GP) devices but contains pertinent updates for booting on secure (HS) devices. Update the omap5 Makefile to include the fdt.c in the build. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Madan Srinivas <madans@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: omap-common: Add device type to CPU stringDaniel Allred2016-05-273-8/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the CPU string output so that the device type is now included as part of the CPU string that is printed as the SPL or u-boot comes up. This update adds a suffix of the form "-GP" or "-HS" for production devices, so that general purpose (GP) and high security (HS) can be distiguished. Applies to all OMAP5 variants. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Madan Srinivas <madans@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | spl: build: ti: add support for secure boot imagesDaniel Allred2016-05-271-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updates the SPL build so that when CONFIG_TI_SECURE_DEVICE is in use (which it should be when building for secure parts), the TI secure development package is used to create a valid secure boot image. The u-boot SPL build processes is NOT aware of the details of creating the boot image - all of that information is encapsulated in the TI secure development package, which is available from TI. More info can be found in README.ti-secure Right now, two image types are generated, MLO and X-LOADER. The types are important, as certain boot modes implemented by the device's ROM boot loader require one or the other (they are not equivalent). The output filenames are u-boot-spl_HS_MLO and u-boot-spl_HS_X-LOADER. The u-boot-spl_HS_MLO image is also copied to a file named MLO, which is the name that the device ROM bootloader requires for loading from the FAT partition of an SD card (same as on non-secure devices). Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Madan Srinivas <madans@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ti_omap5_common: Update SPL start address on secure partsDaniel Allred2016-05-271-5/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Updated the CONFIG_SPL_TEXT_BASE to support secure parts (moving the start address past secure reserved memory and the size of the security certificate that precedes the boot image on secure devices). Updated the related CONFIG_SPL_MAX_SIZE to properly reflect the internal memory actually available on the various device flavors (Common minimum internal RAM guaranteed for various flavors of DRA7xx/AM57xx is 512KB). Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Madan Srinivas <madans@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | defconfig: Add a config for AM43xx secure partMadan Srinivas2016-05-271-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | Adds a new defconfig file for the AM43xx secure device. This is the same as for the non-secure part, except for: CONFIG_TI_SECURE_DEVICE option set to 'y' CONFIG_ISW_ENTRY_ADDR updated for secure images. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Madan Srinivas <madans@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ti: AM43xx: board: Detect AM43xx HS EVMMadan Srinivas2016-05-274-5/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds code to detect AM43xx HS EVMS - the string in the I2C EEPROM for HS EVMs differs from GP EVMs. Adds code to for evm detection, regardless of whether the evm is for GP or HS parts, and updates board init to use that. Modifies findfdt command to pick up am437x-gp-evm.dtb for the HS EVMs also, as the boards are similar except for some security specific changes around power supply and enclosure protection. Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ti: AM43xx: Use CONFIG options from SOC KconfigMadan Srinivas2016-05-273-12/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updates configs/am43xx_evm.h to use CONFIG options from SOC specific Kconfig file for various calculations. On AM43x devices, the address of SPL entry point depends on the device type, i.e. whether it is secure or non-secure. Further, for non-secure devices, the SPL entry point is different between USB HOST boot mode, other "memory" boot modes (MMC, NAND) and "peripheral" boot modes (UART, USB) To add to the complexity, on secure devices, in addition to the above differences, the SPL entry point can change because of the space occupied by other components (other than u-boot or spl) that go into a secure boot image. To prevent the user from having to modify source files every time any component of the secure image changes, the value of CONFIG_SPL_TEXT_BASE has been set using a Kconfig option that is supplied in the am43xx_*_defconfig files Using the CONFIG options also enables us to do away with some compile time flags that were used to specify CONFIG_SPL_TEXT_BASE for different boot modes. On QSPI devices, the same problem described above occurs w.r.t. the address of the u-boot entry point in flash, when booting secure devices. To handle this, CONFIG_SYS_TEXT_BASE is also setup via a Kconfig option and the defconfig files. Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Daniel Allred <d-allred@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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