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* image: Export fit_check_ramdisk()Simon Glass2013-05-142-7/+5
| | | | | | | | One we split out the FIT code from image.c we will need this function. Export it in the header. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* image: Move timestamp #ifdefs to header fileSimon Glass2013-05-142-29/+29
| | | | | | | | | | | | | | | Rather than repeat the line #if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE) || \ defined(USE_HOSTCC) everywhere, put this in a header file and #define IMAGE_ENABLE_TIMESTAMP to either 1 or 0. Then we can use a plain if() in most code and avoid the #ifdefs. The compiler's dead code elimination ensures that the result is the same. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* libfdt: Add fdt_next_subnode() to permit easy subnode iterationSimon Glass2013-05-142-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Iterating through subnodes with libfdt is a little painful to write as we need something like this: for (depth = 0, count = 0, offset = fdt_next_node(fdt, parent_offset, &depth); (offset >= 0) && (depth > 0); offset = fdt_next_node(fdt, offset, &depth)) { if (depth == 1) { /* code body */ } } Using fdt_next_subnode() we can instead write this, which is shorter and easier to get right: for (offset = fdt_first_subnode(fdt, parent_offset); offset >= 0; offset = fdt_next_subnode(fdt, offset)) { /* code body */ } Also, it doesn't require two levels of indentation for the loop body. Signed-off-by: Simon Glass <sjg@chromium.org> (Cherry-picked from dtc commit 4e76ec79) Acked-by: Gerald Van Baren <vanbaren@cideas.com>
* mkimage: Move ARRAY_SIZE to header fileSimon Glass2013-05-142-1/+2
| | | | | | | | Move this definition from aisimage.c to mkimage.h so that it is available more widely. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* bootstage: Don't build for HOSTCCSimon Glass2013-05-141-2/+3
| | | | | | | | We don't measure boot timing on the host, or with SPL, so use both conditions in the bootstage header. This allows us to avoid using conditional compilation around bootstage_...() calls. (#ifdef) Signed-off-by: Simon Glass <sjg@chromium.org>
* hash: Add a way to calculate a hash for any algortihmSimon Glass2013-05-142-0/+45
| | | | | | | | | | | Rather than needing to call one of many hashing algorithms in U-Boot, provide a function hash_block() which handles this, and can support all available hash algorithms. Once we have md5 supported within hashing, we can use this function in the FIT image code. Signed-off-by: Simon Glass <sjg@chromium.org>
* Add minor updates to README.fdt-controlSimon Glass2013-05-141-1/+8
| | | | | | | A few things have changed since this doc was written, so update it to match the current state of things. Signed-off-by: Simon Glass <sjg@chromium.org>
* env: Fix minor comment typos in cmd_nveditSimon Glass2013-05-141-2/+2
| | | | | | This should say 'environmnent'. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-blackfin into ↵Tom Rini2013-05-1439-479/+1164
|\ | | | | | | powerpc-eldk53-warning-fixes
| * bfin: Move gpio support for bf54x and bf60x into the generic driver folder.Sonic Zhang2013-05-139-184/+479
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gpio spec for bf54x and bf60x differ a lot from the old gpio driver for bf5xx. A lot of machine macros are used to accomodate both code in one gpio driver. This patch split the old gpio driver and move new gpio2 support to the generic gpio driver folder. - To enable gpio2 driver, macro CONFIG_ADI_GPIO2 should be defined in the board's config header file. - The gpio2 driver supports bf54x, bf60x and future ADI processors, while the older gpio driver supports bf50x, bf51x, bf52x, bf53x and bf561. - All blackfin specific gpio function names are replaced by the generic gpio APIs. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: The buf variable in bfin_mac.c is not used and produces warning,Marek Vasut2013-05-131-2/+0
| | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: Add comments for watchdog event initialization.Sonic Zhang2013-05-131-2/+10
| | | | | | | | | | | | | | - Add comments for watchdog event initialization. - Make sure the writting operation to MMRs are finished. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: Move blackfin serial driver out of blackfin arch folder.Sonic Zhang2013-05-1310-9/+9
| | | | | | | | | | | | | | | | - Move blackfin serial driver to the generic driver folder. - Move blackfin serial headers to blackfin arch head folder. - Update the include path to blackfin serial header in start up code. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: Move blackfin watchdog driver out of the blackfin arch folder.Sonic Zhang2013-05-139-16/+40
| | | | | | | | | | | | | | | | | | | | - Enable hw_watchdog_init() in watchdog.h if CONFIG_HW_WATCHDOG is defined. - Move blackfin hw watchdog driver to the generic driver folder. - Call hw_watchdog_init() from blackfin board init code. - Reuse macro CONFIG_WATCHDOG_TIMEOUT_MSECS - Update README.watchdog accordingly Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * bf609: add SPI register base addressScott Jiang2013-05-131-0/+3
| | | | | | | | | | | | | | - BF609 spi driver depend on this. Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: Uart divisor should be set after their values are generated.Sonic Zhang2013-05-131-2/+5
| | | | | | | | Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: Add memory virtual console to blackfin serial driver.Sonic Zhang2013-05-131-1/+59
| | | | | | | | Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: Enable early print via the generic serial API.Sonic Zhang2013-05-133-55/+29
| | | | | | | | | | | | | | | | | | | | | | Remove blackfin specific implementation of the generic serial API when early print macro is defined. In BFIN_BOOT_BYPASS mode, don't call generic serial_puts, because early print in bypass mode is running before code binary is relocated to the link address. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * bfin: discard invalid data and clear RXS in bf5xx spi driverScott Jiang2013-05-131-0/+2
| | | | | | | | | | | | | | | | There may be dirty data in RDBR, so we should discard invalid data. This operation also clears RXS bit in STAT register. Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * bfin: Remove spi dma function in bf5xx.Scott Jiang2013-05-131-102/+1
| | | | | | | | | | | | | | | | | | BF5xx rx dma causes spi flash random read error. Accually spi controller has problems both on tx and rx dma. So remove spi dma support in u-boot. Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: Fit u-boot image size into limited nor flash on blackfin.Sonic Zhang2013-05-133-10/+14
| | | | | | | | | | | | | | | | | | | | - Disable NAND driver on bf537-stamp. - Make MMC_SPI optional. - Disable LCD driver on bf527-ezkit. - Enlarge BF609 nor flash reserved size from 256k to 512k bytes. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
| * blackfin: bf609: add softswitch config commandBob Liu2013-05-137-18/+80
| | | | | | | | | | | | | | Add softswitch_output command for bf609-ezkit to enable softswitches. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: bf609: implement soft switchSonic Zhang2013-05-132-0/+251
| | | | | | | | | | | | | | | | Set up soft switch pins properly in board init code. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Scott Jiang <scott.jiang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
| * blackfin: Correct early serial mess output in BYPASS boot mode.Sonic Zhang2013-05-134-3/+27
| | | | | | | | | | | | | | | | | | | | | | | | The early serial should not be configured again in initcode() for BYPASS boot mode and in start() for the other LDR boot modes. In BYPASS boot mode, the start up code is located in Nor flash address other than the DRAM address defined in link script. The code embedded string can't be addressed by its compile time symbol. Calculate it according to the flash offset. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: Set correct early debug serial baudrate.Sonic Zhang2013-05-136-88/+123
| | | | | | | | | | | | | | | | | | | | Calculate the early uart clock from the system clock registers set by the bootrom other than the predefine uboot clock macros. Split the early baudrate setting function and the normal baudrate setting one. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: run core1 from L1 code sram start address in uboot init code on core 0Sonic Zhang2013-05-135-0/+44
| | | | | | | | | | | | | | | | Define core 1 L1 code sram start address. Add function to enable core 1 for BF609 and BF561. Add config macro to allow customer to run core 1 in uboot init code on core 0. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: add baudrate to bdinfoBob Liu2013-05-131-0/+2
| | | | | | | | | | Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * Blackfin: adjust asm constraints with NMI workaroundMike Frysinger2013-05-131-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer gcc versions will sometimes use a Preg when "r" constraints, but that'll fail if we use an Ireg in the assignment. So force the code to always use a Dreg. This also fixes early boot crashes for older Blackfin parts when compiled with gcc-4.5. This version ends up selecting the same register for the input and output variables which corrupts the output assignment triggering an exception. P2 = 0xffe02008; /* EVT2 */ R0 = RETS; CALL 1f; RTN; 1: P2 = RETS; <-- BAD RETS = R0; [P2] = P2; <-- BAD Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: reduce size of u-boot.ldr in bf548-ezkit default config.Bob Liu2013-05-131-14/+9
| | | | | | | | | | | | | | Enable VIDEO and NAND supports only when the config options is defined. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: limit the max memory dma peripheral transfer size to 4 bytes.Sonic Zhang2013-05-131-3/+6
| | | | | | | | | | | | Othersize, the bf609 memory dma halts after being enabled. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: Change the member's type in dma structures.Sonic Zhang2013-05-131-12/+12
| | | | | | | | Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2013-05-1332-1209/+314
|\ \
| * | x86: Add coreboot timestampsSimon Glass2013-05-131-0/+3
| | | | | | | | | | | | | | | | | | | | | Add selected coreboot timestamps into bootstage to get a unified view of the boot timings. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Support adding coreboot timestanps to bootstageSimon Glass2013-05-132-0/+45
| | | | | | | | | | | | | | | | | | | | | Coreboot provides a lot of useful timing information. Provide a facility to add this to bootstage on start-up. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: config: Enable LZO for coreboot, remove zlib, gzipSimon Glass2013-05-131-0/+4
| | | | | | | | | | | | | | | | | | We don't use zlib and gzip but do use lzo, so enable this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Fix warning in cmd_ximg.c when CONFIG_GZIP is not definedSimon Glass2013-05-131-0/+2
| | | | | | | | | | | | | | | | | | This local variable is not used unless CONFIG_GZIP is defined. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | bootstage: Allow marking a particular line of codeSimon Glass2013-05-132-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | Add a function which allows a (file, function, line number) to be marked in bootstage. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
| * | x86: Enable bootstage for corebootSimon Glass2013-05-131-0/+9
| | | | | | | | | | | | | | | | | | | | | This is a convenient way of finding out where boottime is going. Enable it for coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | Call bootstage_relocate() after malloc is inittedDoug Anderson2013-05-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | In a previous CL we added the bootstage_relocate(), which should be called after malloc is initted. Now we call it on generic board. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | bootstage: Copy bootstage strings post-relocationDoug Anderson2013-05-132-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Any pointers to name strings that were passed to bootstage_mark_name() pre-relocation should be copied post-relocation so that they don't get trashed as the original location of U-Boot is re-used for other purposes. This change introduces a new API call that should be called from board_init_r() after malloc has been initted on any board that uses bootstage. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | bootstage: Add stubs for new bootstage functionsSimon Glass2013-05-131-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some functions don't have a stub for when CONFIG_BOOTSTAGE is not defined. Add one to avoid #ifdefs in the code when this is used in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org>
| * | x86: Re-enable PCAT timer 2 for beepingSimon Glass2013-05-135-68/+11
| | | | | | | | | | | | | | | | | | | | | | | | While we don't want PCAT timers for timing, we want timer 2 so that we can still make a beep. Re-purpose the PCAT driver for this, and enable it in coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Remove ISR timerSimon Glass2013-05-132-119/+0
| | | | | | | | | | | | | | | | | | | | | | | | This is no longer used since we prefer the more accurate TSC timer, so remove the dead code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
| * | x86: Remove old broken timer implementationSimon Glass2013-05-132-21/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tidy up some old broken and unneeded implementations. These are not used by coreboot or anything else now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org> Reviewed-by: Michael Spang <spang@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
| * | x86: Add TSC timerSimon Glass2013-05-136-4/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Rationalise kernel booting logic and bootstageSimon Glass2013-05-133-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'Starting linux' message appears twice in the code, but both call through the same place. Unify these and add calls to bootstage to mark the occasion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Michael Spang <spang@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
| * | x86: Implement panic output for corebootSimon Glass2013-05-132-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | panic_puts() can be called in early boot to display a message. It might help with early debugging. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org>
| * | x86: Declare global_data pointer when it is usedSimon Glass2013-05-135-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | Several files use the global_data pointer without declaring it. This works because the declaration is currently a NOP. But still it is better to fix this so that x86 lines up with other archs. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: Remove legacy board init codeSimon Glass2013-05-137-616/+0
| | | | | | | | | | | | | | | | | | | | | Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
| * | x86: Remove unused portion of link scriptSimon Glass2013-05-131-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | Since we don't have real-mode code now, we can remove this chunk of the link script. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
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