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* Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2014-11-139-3/+71
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| * kconfig: zynq: Add ZYBO boardPeter Crosthwaite2014-11-112-0/+8
| | | | | | | | | | | | | | | | | | Add a defconfig and Kconfigury for the Digilent ZYBO board. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * configs: zynq: Add config support for ZYBOTinghui Wang2014-11-111-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds config support needed for ZYBO target and has been tested on Rev. B ZYBO hardware. Signed-off-by: Tinghui Wang <steven.wang@digilentinc.com> [PC changes: * Dropped boards.cfg change (rebase conflict) * Dropped custom u-boot env * Added DTS * Misc forward-porting changes ] Signed-off-by: Peter Crosthwiate <crosthwaite.peter@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm: dts: zynq: Add digilent ZYBO board dtsPeter Crosthwaite2014-11-112-0/+24
| | | | | | | | | | | | | | | | | | It's a Zynq board similar in design to the currently supported ones. 512MB of RAM and UART1 is used. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynq: Use GPLed files for SPLSoren Brinkmann2014-11-114-3/+8
| | | | | | | | | | | | | | | | | | | | | | The latest Xilinx tools generate ps7_init files that are explicitly available under GPL. Change the makefile to allow drop in of those files for building the SPL. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Reviewed-and-tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | kconfig: arm: move "armv8" define to arch/arm/KconfigMasahiro Yamada2014-11-132-8/+1
| | | | | | | | | | | | | | | | | | | | Commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs) collected the default values of CONFIG_SYS_CPU into arch/arm/Kconfig. This commit moves "armv8" to there for consistency. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Georges Savoundararadj <savoundg@gmail.com>
* | kconfig: arm: select CPU_V7 for some new boardsMasahiro Yamada2014-11-136-25/+3
| | | | | | | | | | | | | | | | | | | | | | | | This commit adds "select CPU_V7" for some new boards that were not covered by commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs). Redundant "SYS_CPU" defines and "string" directives should be removed. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Georges Savoundararadj <savoundg@gmail.com>
* | kbuild: Make scripts executableMasahiro Yamada2014-11-128-0/+0
| | | | | | | | | | | | | | | | | | | | The Makefiles call the respective interpreter explicitly, but this makes it easier to use the scripts manually. (This commit follows commit 06ed5c2bfaca of Linux Kernel) Signed-off-by: Michal Marek <mmarek@suse.cz> Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | powerpc: remove orphaned boards mcc200 and prs200Nikita Kiryanov2014-11-1227-1600/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | mcc200 and prs200 are old and have no maintainer. Remove the boards. This also removes the mcc200 specific 1bpp BMP support from common/lcd.c Cc: Wolfgang Denk <wd@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: York Sun <yorksun@freescale.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2014-11-1113-1/+1042
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| * | arm: socfpga: Add socfpga_spim_enable() to reset_manager.cStefan Roese2014-11-073-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function will be needed by the upcoming Designware master SPI driver. As the SPI master controller is held in reset by the current Preloader implementation. So we need to release the reset for the driver to communicate with the controller. This function is called from arch_early_init_r() if the SPI driver is enabled. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de>
| * | arm: socfpga: Add DW master SPI clock to clock_manager.cStefan Roese2014-11-071-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function will be needed by the upcoming Designware master SPI driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de>
| * | arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates targetStefan Roese2014-11-077-0/+963
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch includes the latest DT sources for socfpga from the current Linux kernel. And enables CONFIG_OF_CONTROL for the new build target "socfpga_socrates" (the EBV SoCrates board) to make use of this new DT support. Until this patch, the only SoCFPGA U-Boot target in mainline is "socfpga_cyclone5". This build target is not (yet) changed to support DT. So nothing changes for this target. Even though the long-term goal should be to move all SoCFPGA targets over to DT. One of the reasons to enable DT support in SoCFPGA is, that I need to support multiple different SPI controllers for this platform. This is the QSPI Cadence controller and the Designware SPI master controller. Both are implemented in the SoCFPGA. And enabling both controllers is only possible by using the new driver model (DM). The DM SPI code only supports DT based probing. So it was easier to move SoCFPGA to DT than to add the (deprecated) platform-data based probing to the DM SPI suport. Note that the image with the dtb embedded is u-boot-dtb.img. This needs to be used now for those DT enabled boards instead of u-boot.img. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Pavel Machek <pavel@denx.de> Cc: Simon Glass <sjg@chromium.org>
| * | socfpga_cyclone5.h: fix kernel console argument in default environmentAnatolij Gustschin2014-11-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With fresh environment the kernel gets wrong console argument and boots without console output. Fix it. Reported-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Marek Vasut <marex@denx.de>
| * | arm: socfpga: Add example config entry for EPCS/EPCQ SPIMarek Vasut2014-10-311-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add example config file entry for the Altera SPI controller. This SPI controller can also, under special conditions, be used to operate the EPCS/EPCQ SPI NOR. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | arm: socfpga: Add I2C support to SoCFPGAStefan Roese2014-10-301-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds I2C support for the SoCFPGA. Using the designware I2C controller driver. It supports all 4 I2C busses on the SoCFPGA. The designware I2C driver has now been converted to the CONFIG_SYS_I2C framework. So lets enable it on SoCFPGA. Tested on SoCrates. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2014-11-1116-78/+186
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| * | | usb_storage: blacklist Enclosure Service DevicesSoeren Moch2014-11-081-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Skip enclosure service devices when probing for usb storage devices. This avoids long timeouts when probing for external usb harddisks which provide "Enclosure Services". Signed-off-by: Soeren Moch <smoch@web.de> -- This is a new version of the patch "usb_storage: skip all unknown devices when probing" http://http://lists.denx.de/pipermail/u-boot/2014-November/194622.html Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com>
| * | | usb: eth: fix MakefileRene Griessl2014-11-071-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | fix obj-y term Signed-off-by: Rene Griessl <rgriessl@cit-ec.uni-bielefeld.de>
| * | | usb: include <asm/cache.h> and <part.h> from include/usb.hMasahiro Yamada2014-11-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The header file include/usb.h references ARCH_DMA_MINALIGH and block_dev_desc_t, thus it must include <asm/cache.h> and <part.h>. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | usb: rmobile: Use ARRAY_SIZE(usb_base_address) instead of ↵Nobuhiro Iwamatsu2014-11-071-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_USB_MAX_CONTROLLER_COUNT Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Marek Vasut <marex@denx.de>
| * | | usb: ehci: fix Interrupt on Doorbell flag of USBCMDMasahiro Yamada2014-11-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | CMD_IAAD (Interrupt on Async Advance Doorbell) is bit 6, not bit 5. While we are here, sort the flags. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | arm: socfpga: Add example UDC configMarek Vasut2014-11-072-1/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add example of an USB UDC configuration with DFU and UMS. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@altera.com> Acked-by: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
| * | | usb: s3c-otg: Allow custom gusbcfgMarek Vasut2014-11-073-7/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow passing in a custom configuration of the gusbcfg register via platform data. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@altera.com> Acked-by: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
| * | | usb: s3c-otg: Split out PHY controlMarek Vasut2014-11-077-62/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@altera.com> Acked-by: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
| * | | usb: s3c-otg: Encapsulate PHY controlMarek Vasut2014-11-061-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Encapsulate the Samsung PHY control and its register accesses into the otg_phy_init() and otg_phy_off() functions. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Stefan Roese <sr@denx.de> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
| * | | usb: s3c-otg: Remove useless includeMarek Vasut2014-11-061-1/+0
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the useless inclusion of arch/arm/gpio.h , which is completely bogus in this driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Stefan Roese <sr@denx.de> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2014-11-1133-94/+321
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| * | | ARM: UniPhier: call pin_init() also in the normal bootMasahiro Yamada2014-11-126-9/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_UNIPHIER_SERIAL has been moved to Kconfig and it is defined in ./.config but not in spl/.config, so pin_init() should be called from the normal image so that UART works correctly. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: consolidate board_postclk_init() functionMasahiro Yamada2014-11-127-50/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit merges arch/arm/cpu/armv7/uniphier/ph1-*/board_postclk_init.c to arch/arm/cpu/armv7/uniphier/board_postclk_init.c Because PH1-Pro4 does not have the BCU block, add __weak to bcu_init(). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: decrease pre-reloc malloc area sizeMasahiro Yamada2014-11-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the current implementation of the boot sequence of UniPhier platform, 32KB temporary RAM is available before relocation. The malloc area and the stack shares the 32KB area. With CONFIG_SYS_MALLOC_F_LEN set to 0x7000 (28KB), only 0x1000 (4KB) is left for the stack. In some use cases, the system hangs up with stack over-flow. Even with driver-model UART enabled, the malloc area of 0x2000 (8KB) should be enough. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: add set_pinsel macro for use in assembly codeMasahiro Yamada2014-11-121-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function sg_set_pinsel is useful for switching I/O pins but it can be only used in C code. This commit adds a simple macro that is available in asm code. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: enable USB featuresMasahiro Yamada2014-11-124-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | FAT-formated USB storage device access is available. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | usb: UniPhier: add UniPhier on-chip EHCI host driver supportMasahiro Yamada2014-11-128-0/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support EHCI host driver used on Panasonic UniPhier platform. Since Device Tree is not supported on UniPhier yet, the base address of USB cores are passed from board files (platdevice.c). TODO for me: Move the base address to device trees. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
| * | | ARM: UniPhier: add MIO register fileMasahiro Yamada2014-11-121-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds register defines of MIO (Media I/O) block of UniPhier platform. This file is necessary to control the reset signals of the USB cores. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | usb: add basic USB configs in KconfigMasahiro Yamada2014-11-122-0/+94
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
| * | | ARM: UniPhier: add EHCI host pin settings for PH1-Pro4Masahiro Yamada2014-11-121-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | These IO pins are necessary for port power control and over current detect. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: move DDR related configuration to KconfigMasahiro Yamada2014-11-1211-25/+27
| | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | ARM: UniPhier: reset on-board devices on start-upMasahiro Yamada2014-11-123-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a support card is attached to the main board, the on-board SMSC9118 LAN controller is available. It must be kept in reset state for a while on start-up. When the board is kicked via a debbuger rather than pushing the hardware reset button, on-board chips are not reset; in this case the reset signals should be asserted by software. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | serial: UniPhier: borrow macros from linux/serial_reg.hMasahiro Yamada2014-11-121-13/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The same bit-field macros are defined in include/linux/serial_reg.h so let's include it and delete duplicated defines. Also, remove unnecessary inclusion of <common.h>. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | Revert "lib: bootm: add missing include"Michal Simek2014-11-111-1/+0
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a MIME GnuPG-signed message. If you see this text, it means that your E-mail or Usenet software does not support MIME signed messages. The Internet standard for MIME PGP messages, RFC 2015, was published in 1996. To open this message correctly you will need to install E-mail or Usenet software that supports modern Internet standards. This reverts commit 1e96220a5687efae2aed45ce56e143336c40d0a7. Remove duplicated vxworks.h header. The same change was done by "ARM: prevent compiler warnings from bootm.c" (sha1: 8d196e52b58d1e50a80c2f5067b201cda521c75c) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | Prepare v2015.01-rc1Tom Rini2014-11-101-3/+3
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2014-11-104-7/+31
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| * | | i2c: rcar_i2c: Fix order of restart and clear statusNobuhiro Iwamatsu2014-11-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of repeated START condition, the restart has to be kicked before clear status (MSR register). If it is kicked after clear status, R-Car I2C may transfer data (TXD register) or receive data (RXD register) instead of transferring slave address (MAR register). Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | | drivers/i2c/fsl_i2c: Change CONFIG_I2C_TIMEOUT to 100msShaveta Leekha2014-11-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some slow I2C devices like Power Monitor(ZM7304) at times do not work well with low timeout value, so I2C bus get stuck during read cycle with this device, changing it to 100ms from 10ms works fine A lot of other i2c drivers like mxc and i2c drivers of BOOTROM also use relax timeouts to give sufficient ticks to work well with slower devices Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
| * | | ppc4xx: Handle i2c stuck on combined xferDirk Eibach2014-11-102-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ppc4xx i2c master gets stuck on errors while repeated start is active. Can be easily reproduced by "i2c md" on an unpopulated i2c address. There is not stop condition given, scl remains pulled low. The only way out seems to be doing a stop manually and then a soft reset. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Reviewed-by: Stefan Roese <sr@denx.de>
| * | | ppc4xx: Fix i2c repeated startDirk Eibach2014-11-101-4/+5
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Debugging some i2c trouble I saw on my scope that repeated start is not working properply. The 4xx even held clock pulled down after transfers. Having a look in the driver I realized that IIC_CNTL_RPST is set on that part of the transfer that should begin with a repeated start. But repeated start is about not sending a stop condition, so IIC_CNTL_RPST has to be set on the last transfer before the repeated start happens. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Reviewed-by: Stefan Roese <sr@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-blackfinTom Rini2014-11-103-1/+4
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| * | | bfin: the max bfin sdh block count is 127Sonic Zhang2014-11-101-0/+1
| | | | | | | | | | | | | | | | Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * | | bfin: make the CPU macro of LDR target more genenricSonic Zhang2014-11-102-1/+3
| |/ / | | | | | | | | | | | | | | | Remove BFIN from the CPU macro in Makefile. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
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