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* | | env_mmc: support env partition setup in runtimeDmitry Lifshitz2014-08-012-12/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add callback with __weak annotation to allow setup of environment partition number in runtime from a board file. Propagate mmc_switch_part() return value into init_mmc_for_env() instead of -1 in case of failure. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* | | env_mmc: add mmc_get_env_addr() prototypeDmitry Lifshitz2014-08-011-0/+6
| | | | | | | | | | | | | | | | | | | | | Add missing mmc_get_env_addr() prototype in environment.h Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* | | MMC: atmel_mci: enable high speed mode supportBo Shen2014-08-011-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | If the MCI IP version >= 0x300, it supports hight speed mode option, this patch enable it. Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* | | MMC: atmel_mci: add configuration register definitionBo Shen2014-08-011-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | Add configuration register definition, this register only exists on MCI IP version >= 0x300. Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* | | MMC: atmel_mci: refactor setting the mode registerBo Shen2014-08-012-14/+46
| | | | | | | | | | | | | | | | | | | | | | | | The mode register is different between MCI IP version. So, according to MCI IP version to set the mode register. Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* | | mmc/dw_mmc: Fix clock divider calculation error for bypass modeChin Liang See2014-08-011-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To fix the clock divider calculation error when the controller clock same as the operating frequency. This is known as bypass mode. In this mode, the divider should be 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Mischa Jonker <mjonker@synopsys.com>
* | | mmc: s3c: Add SD driverMarek Vasut2014-08-013-0/+328
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement SD driver for the S3C24xx family. This implementation is currently only capable of using the PIO transfers, DMA is not supported. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* | | arm: s3c: Unify the S3C24xx SDI structureMarek Vasut2014-08-013-11/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unify the register structure so they can be easily used across all of S3C24xx lineup. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* | | bcm2835_sdhci: Add SDHCI_QUIRK_NO_HISPD_BIT flagLubomir Rintel2014-08-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Seems like the controller doesn't support the flag. None of the hi-speed cards I've tried could be read, while they successfully worked with the quirk enabled. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
* | | ARM: kirkwood: add mvsdio driverDrEagle2014-08-017-0/+669
|/ / | | | | | | | | | | | | | | | | This patch add Marvell kirkwood MVSDIO/MMC driver and enable it for Sheevaplugs and OpenRD boards. Signed-off-by: Gerald Kerma <drEagle@doukki.net> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* | include: remove CONFIG_SPL/CONFIG_TPL definition in config headersMasahiro Yamada2014-07-3056-69/+0
| | | | | | | | | | | | | | | | | | Now CONFIG_SPL and CONFIG_TPL are defined in Kconfig. Remove the redundant definition in config headers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | powerpc: remove redundant CPU definitionMasahiro Yamada2014-07-3011-12/+11
| | | | | | | | | | | | | | | | CONFIG_${CPU} is defined by Kconfig. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Stefan Roese <sr@denx.de>
* | kconfig: delete redundant CONFIG_${ARCH} definitionMasahiro Yamada2014-07-3014-14/+11
| | | | | | | | | | | | | | CONFIG_${ARCH} is defined by Kconfig. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | buildman: adjust for KconfigMasahiro Yamada2014-07-303-4/+14
| | | | | | | | | | | | | | | | | | Use "make <board>_defconfig" instead of "make <board>_config". Invoke tools/genboardscfg.py to generate boards.cfg when it is missing. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | MAKEALL: adjust for KconfigMasahiro Yamada2014-07-301-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Use "make <board>_defconfig" instead of "make <board>_config". - Invoke tools/genboardscfg.py to generate boards.cfg when it is missing. - Show "Building ${BOARD_NAME} board..." message. (Prior to Kconfig, instead, mkconfig script displayed "Configuring for ${BOARD_NAME} board..." but it was removed.) Without this message, we cannot know which board is currently being built. - Do not show "# configuration written to .config". This message is useless and just annoying for MAKEALL. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | kconfig: remove mkconfig and boards.cfgMasahiro Yamada2014-07-303-1412/+1
| | | | | | | | | | | | | | | | | | | | The old configuration script is no longer necessary. Nor is boards.cfg a primary database. We can generate it with the genboardscfg.py tool based on the latest Kconfig, defconfig and MAINTAINERS. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | tools: add genboardscfg.pyMasahiro Yamada2014-07-301-0/+504
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the primary data for each board is in Kconfig, defconfig and MAINTAINERS. It is true boards.cfg is needed for MAKEALL and buildman and might be useful to brouse all the supported boards in a single database. But it would be painful to maintain the boards.cfg in sync. So, this is the solution. Add a tool to generate the equivalent boards.cfg file based on the latest Kconfig, defconfig and MAINTAINERS. We can keep all the functions of MAKEALL and buildman with it. The best thing would be to change MAKEALL and buildman for not depending on boards.cfg in the future, but it would take some time. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Add board MAINTAINERS filesMasahiro Yamada2014-07-30562-0/+4234
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have switched to Kconfig and the boards.cfg file is going to be removed. We have to retrieve the board status and maintainers information from it. The MAINTAINERS format as in Linux Kernel would be nice because we can crib the scripts/get_maintainer.pl script. After some discussion, we chose to put a MAINTAINERS file under each board directory, not the top-level one because we want to collect relevant information for a board into a single place. TODO: Modify get_maintainer.pl to scan multiple MAINTAINERS files. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
* | kconfig: switch to KconfigMasahiro Yamada2014-07-3017-132/+619
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit enables Kconfig. Going forward, we use Kconfig for the board configuration. mkconfig will never be used. Nor will include/config.mk be generated. Kconfig must be adjusted for U-Boot because our situation is a little more complicated than Linux Kernel. We have to generate multiple boot images (Normal, SPL, TPL) from one source tree. Each image needs its own configuration input. Usage: Run "make <board>_defconfig" to do the board configuration. It will create the .config file and additionally spl/.config, tpl/.config if SPL, TPL is enabled, respectively. You can use "make config", "make menuconfig" etc. to create a new .config or modify the existing one. Use "make spl/config", "make spl/menuconfig" etc. for spl/.config and do likewise for tpl/.config file. The generic syntax of configuration targets for SPL, TPL is: <target_image>/<config_command> Here, <target_image> is either 'spl' or 'tpl' <config_command> is 'config', 'menuconfig', 'xconfig', etc. When the configuration is done, run "make". (Or "make <board>_defconfig all" will do the configuration and build in one time.) For futher information of how Kconfig works in U-Boot, please read the comment block of scripts/multiconfig.py. By the way, there is another item worth remarking here: coexistence of Kconfig and board herder files. Prior to Kconfig, we used C headers to define a set of configs. We expect a very long term to migrate from C headers to Kconfig. Two different infractructure must coexist in the interim. In our former configuration scheme, include/autoconf.mk was generated for use in makefiles. It is still generated under include/, spl/include/, tpl/include/ directory for the Normal, SPL, TPL image, respectively. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | include: define CONFIG_SPL and CONFIG_TPL as 1Masahiro Yamada2014-07-3056-69/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are about to switch to Kconfig in the next commit. But there are something to get done beforehand. In Kconfig, include/generated/autoconf.h defines boolean CONFIG macros as 1. CONFIG_SPL and CONFIG_TPL, if defined, must be set to 1. Otherwise, when switching to Kconfig, the build log would be sprinkled with warning messages like this: warning: "CONFIG_SPL" redefined [enabled by default] Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | kconfig: add basic Kconfig filesMasahiro Yamada2014-07-302-0/+131
| | | | | | | | | | | | | | This commit adds more Kconfig files, which were written by hand. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | kconfig: add board Kconfig and defconfig filesMasahiro Yamada2014-07-301764-0/+18075
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | kconfig: import Kconfig files from Linux 3.16-rc7Masahiro Yamada2014-07-3043-0/+24484
| | | | | | | | | | | | | | | | | | | | Import - scripts/kconfig/* - include/linux/kconfig.h from Linux 3.16-rc7. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | boards:trats2: New Trats2 board maintainerŁukasz Majewski2014-07-301-1/+1
| | | | | | | | | | Change-Id: I8e72b942b8816726773d5407ce405d68a1594389 Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
* | boards.cfg : Add maintainers entries for SOCFPGADinh Nguyen2014-07-291-1/+1
| | | | | | | | | | | | | | Add back the maintainers entries for Altera's SOCFPGA platform. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Chin Liang See <clsee@altera.com>
* | cosmetic: boards.cfg: fix some maintainers fieldsMasahiro Yamada2014-07-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a whitespace between the name and the email address. When switching to Kconfig, the first version of MAINTAINERS files will be generated based on the boards.cfg file. So, the maintainers field should be corrected even if it is a really minor fix. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Bo Shen <voice.shen@atmel.com> Acked-by: Simon Glass <sjg@chromium.org>
* | buildman: make sure to invoke GNU MakeMasahiro Yamada2014-07-292-3/+12
| | | | | | | | | | | | | | | | | | | | Since the command name 'make' may not be GNU Make on some platforms such as FreeBSD, buildman should call scripts/show-gnu-make to get the command name for GNU MAKE (and error out if it is not found). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* | MAKEALL: make sure to invoke GNU MakeMasahiro Yamada2014-07-291-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | Since the command name 'make' may not be GNU Make on some platforms such as FreeBSD, MAKEALL should call scripts/show-gnu-make to get the command name for GNU MAKE (and error out if it is not found). The GNU Make should be searched after parsing options because we want to allow "MAKEALL -h" even if GNU Make is missing on the system. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | scripts: add scripts/show-gnu-make to get GNU Make command nameMasahiro Yamada2014-07-291-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot is expected to be built on various platforms. We should keep in mind that the command 'make' is not always GNU Make, while all the makefiles are written for GNU Make. For example, on Linux, people generally do: make <board>_config; make But FreeBSD folks do gmake <board>_config; gmake (The command 'make' on FreeBSD is BSD Make, not GNU Make) It is not a good idea to hard-code the command name 'make' in MAKEALL or buildman. They should call this helper script and get the command name for GNU Make. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-07-29154-1736/+6535
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| * | ARM: HYP/non-sec: remove MIDR check to validate CBARMarc Zyngier2014-07-281-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having a form of whitelist to check if we know of a CPU core and and obtain CBAR is a bit silly. It doesn't scale (how about A12, A17, as well as other I don't know about?), and is actually a property of the SoC, not the core. So either it works and everybody is happy, or it doesn't and the u-boot port to this SoC is providing the real address via a configuration option. The result of the above is that this code doesn't need to exist, is thus forcefully removed. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | ARM: HYP/non-sec/PSCI: emit DT nodesMarc Zyngier2014-07-284-2/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Generate the PSCI node in the device tree. Also add a reserve section for the "secure" code that lives in in normal RAM, so that the kernel knows it'd better not trip on it. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | ARM: convert arch_fixup_memory_node to a generic FDT fixup functionMa Haijun2014-07-284-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some architecture needs extra device tree setup. Instead of adding yet another hook, convert arch_fixup_memory_node to be a generic FDT fixup function. [maz: collapsed 3 patches into one, rewrote commit message] Signed-off-by: Ma Haijun <mahaijuns@gmail.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | ARM: HYP/non-sec: add the option for a second-stage monitorMarc Zyngier2014-07-281-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow the switch to a second stage secure monitor just before switching to non-secure. This allows a resident piece of firmware to be active once the kernel has been entered (the u-boot monitor is dead anyway, its pages being reused). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | ARM: HYP/non-sec: add generic ARMv7 PSCI codeMarc Zyngier2014-07-283-0/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | Implement core support for PSCI. As this is generic code, it doesn't implement anything really useful (all the functions are returning Not Implemented). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | ARM: HYP/non-sec: allow relocation to secure RAMMarc Zyngier2014-07-285-140/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current non-sec switching code suffers from one major issue: it cannot run in secure RAM, as a large part of u-boot still needs to be run while we're switched to non-secure. This patch reworks the whole HYP/non-secure strategy by: - making sure the secure code is the *last* thing u-boot executes before entering the payload - performing an exception return from secure mode directly into the payload - allowing the code to be dynamically relocated to secure RAM before switching to non-secure. This involves quite a bit of horrible code, specially as u-boot relocation is quite primitive. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | ARM: HYP/non-sec: add separate section for secure codeMarc Zyngier2014-07-283-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In anticipation of refactoring the HYP/non-secure code to run from secure RAM, add a new linker section that will contain that code. Nothing is using it just yet. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | ARM: add missing HYP mode constantMarc Zyngier2014-07-282-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to be able to use the various mode constants (far more readable than random hex values), add the missing HYP and A values. Also update arm/lib/interrupts.c to display HYP instead of an unknown value. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | ARM: non-sec: reset CNTVOFF to zeroMarc Zyngier2014-07-281-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before switching to non-secure, make sure that CNTVOFF is set to zero on all CPUs. Otherwise, kernel running in non-secure without HYP enabled (hence using virtual timers) may observe timers that are not synchronized, effectively seeing time going backward... Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | ARM: HYP/non-sec: add a barrier after setting SCR.NS==1Marc Zyngier2014-07-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | A CP15 instruction execution can be reordered, requiring an isb to be sure it is executed in program order. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | ARM: HYP/non-sec: move switch to non-sec to the last boot phaseMarc Zyngier2014-07-281-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having the switch to non-secure in the "prep" phase is causing all kind of troubles, as that stage can be called multiple times. Instead, move the switch to non-secure to the last possible phase, when there is no turning back anymore. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-07-2882-1298/+2038
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| | * | ARM: omap: move board specific NAND configs out from ti_armv7_common.hpekon gupta2014-07-259-8/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves some board specific NAND configs: - FROM: generic config file 'ti_armv7_common.h' - TO: individual board config files using these configs. So that each board can independently set the value as per its design. Following configs are affected in this patch: CONFIG_SYS_NAND_U_BOOT_OFFS: <refer doc/README.nand> CONFIG_CMD_SPL_NAND_OFS: <refer doc/README.falcon> CONFIG_SYS_NAND_SPL_KERNEL_OFFS: <refer doc/README.falcon> CONFIG_CMD_SPL_WRITE_SIZE: <refer doc/README.falcon> This patch also updates documentation for few of above NAND configs. Signed-off-by: Pekon Gupta <pekon@ti.com>
| | * | ARM: omap: clean redundant PISMO_xx macros used in OMAP3pekon gupta2014-07-2521-99/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PISMO_xx macros were used to define 'Platform Independent Storage MOdule' related GPMC configurations. This patch - Replaces these OMAP3 specific macros with generic CONFIG_xx macros as provided by current u-boot infrastructure. - Removes unused redundant macros, which are no longer required after merging of common platform code in following commit commit a0a37183bd75e74608bc78c8d0e2a34454f95a91 ARM: omap: merge GPMC initialization code for all platform +-----------------+-----------------------------------------------------------+ | Macro | Reason for removal | +-----------------+-----------------------------------------------------------+ | PISMO1_NOR_BASE | duplicate of CONFIG_SYS_FLASH_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_NAND_BASE| duplicate of CONFIG_SYS_NAND_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_ONEN_BASE| duplicate of CONFIG_SYS_ONENAND_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_NAND_SIZE| GPMC accesses NAND device via I/O mapped registers so | | | configuring GPMC chip-select for smallest allowable | | | segment (GPMC_SIZE_16M) is enough. | +-----------------+-----------------------------------------------------------+ | PISMO1_ONEN_SIZE| OneNAND uses a fixed GPMC chip-select address-space of | | | 128MB (GPMC_SIZE_128M) | +-----------------+-----------------------------------------------------------+ +-----------------+-----------------------------------------------------------+ | PISMO1_NOR | Unused Macros | | PISMO1_NAND | | | PISMO2_CS0 | | | PISMO2_CS1 | | | PISMO1_ONENAND | | | PISMO2_NAND_CS0 | | | PISMO2_NAND_CS1 | | | PISMO1_NOR_BASE | | | PISMO1_NAND_BASE| | | PISMO2_CS0_BASE | | +-----------------+-----------------------------------------------------------+ Signed-off-by: Pekon Gupta <pekon@ti.com>
| | * | ARM: omap: fix GPMC address-map size for NAND and NOR devicespekon gupta2014-07-252-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes commit a0a37183bd75e74608bc78c8d0e2a34454f95a91 ARM: omap: merge GPMC initialization code for all platform 1) NAND device are not directly memory-mapped to CPU address-space, they are indirectly accessed via following GPMC registers: - GPMC_NAND_COMMAND_x - GPMC_NAND_ADDRESS_x - GPMC_NAND_DATA_x Therefore from CPU's point of view, NAND address-map can be limited to just above register addresses. But GPMC chip-select address-map can be configured in granularity of 16MB only. So this patch uses GPMC_SIZE_16M for all NAND devices. 2) NOR device are directly memory-mapped to CPU address-space, so its address-map size depends on actual addressable region in NOR FLASH device. So this patch uses CONFIG_SYS_FLASH_SIZE to derive GPMC chip-select address-map size configuration. Signed-off-by: Pekon Gupta <pekon@ti.com>
| | * | ARM: OMAP: Fix handling of errata i727Rajendra Nayak2014-07-252-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The errata is applicable on all OMAP4 (4430 and 4460/4470) and OMAP5 ES 1.0 devices. The current revision check erroneously implements this on all DRA7 varients and with DRA722 device (which has only 1 EMIF instance) infact causes an asynchronous abort and ends up masking it in CPSR, only to be uncovered once the kernel switches to userspace. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| | * | board: k2e-evm: add board supportHao Zhang2014-07-258-0/+178
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds Keystone2 k2e_evm evaluation board support. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| | * | ARM: keystone2: spl: add K2E SoC supportKhoronzhuk, Ivan2014-07-251-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Keystone2 K2E SoC has slightly different spl pll settings then K2HK, so correct this. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| | * | keystone2: use CONFIG_SOC_KEYSTONE in common placesKhoronzhuk, Ivan2014-07-252-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_SOC_KEYSTONE in common places instead of defining a lot of "if def .. || if def " for different Keystone2 SoC types. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| | * | ARM: keystone2: add MSMC cache coherency support for K2E SOCHao Zhang2014-07-254-8/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds Keystone2 K2E SOC specific code to support MSMC cache coherency. Also create header file for msmc to hold its API. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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