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* sunxi: power: Drop protection against multiple calls from axp221 axp_init()Hans de Goede2015-10-201-6/+0
| | | | | | | | | The only thing axp221.c's axp_init() does which needs protection against multiple calls is calling pmic_bus_init, and pmic_bus_init() itself is already protected against being called multiple times. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: power: Use pmic_bus functions for axp152 / axp209 driverHans de Goede2015-10-202-38/+26
| | | | | | | | | Use the generic pmic_bus helpers for the axp152 / axp209 drivers, rather then having them define their own register read / write functions. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: power: Change A23/A33 aldo1 default voltage to 3.0VHans de Goede2015-10-207-7/+2
| | | | | | | | | | | On A23 / A33 boards aldo1 is used for VCC-IO and should be 3.0V, make this the default. Note that this does not cause any functional changes since all sun8i board defconfig-s already contained: CONFIG_AXP_ALDO1_VOLT=3000 . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: power: Change A23/A33 VDD-SYS default from 1.2V to 1.1VHans de Goede2015-10-202-3/+3
| | | | | | | | | | | | Change the axp223 dcdc2 / VDD-SYS default from 1.2V to 1.1V, 1.1V is the value recommended by Allwinner and is what most fex files specify. This has been tested on a number of A23/A33 tablets including on an A23 Ippo-q8h-v1.2 PCB tablet which has a fex file which specifies 1.2V (which is where our original 1.2V default comes from). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: power: Unify axp pmic function namesHans de Goede2015-10-2012-148/+106
| | | | | | | | | Stop prefixing the axp functions for setting voltages, etc. with the model number, there ever is only one pmic driver built into u-boot, this allows simplifying the callers. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: power: Make all voltages configurable through KconfigHans de Goede2015-10-2016-99/+185
| | | | | | | | | | | | On boards with axp221/223 pmic-s we already allow configuring most voltages. Make the Kconfig options for these also apply to boards with axp152 / axp209 pmic-s and extend them to configure all voltages. The Kconfig defaults are chosen so that this commit does not introduce any functional changes. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Kconfig-ify CONFIG_AXP152_POWER and _AXP209_POWERHans de Goede2015-10-2052-52/+62
| | | | | | | | | | | | | Kconfig-ify CONFIG_AXP152_POWER and _AXP209_POWER settings, removing them from CONFIG_SYS_EXTRA_OPTIONS. Note that sun5i boards can have either an AXP209 or an AXP152 pmic, the Kconfig default is AXP209, boards with an AXP152 must explicitly select this. Likewise boards without a pmic must explicitly select SUNXI_NO_PMIC in their defconfig. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Remove board defconfig-s for specific Q8 tablet PCB-sHans de Goede2015-10-2014-633/+0
| | | | | | | | | | | | | | | | | | | | We now have generic q8_a?3_defconfig files for Q8 formfactor tablets with an A13 / A23 / A33 SoC, there is no need for these PCB variant specific defconfig-s and they only serve to confuse the user. Note that in case of the forfun_q88db_defconfig and TZX-Q8-713B7_defconfig for A13 based Q8 tablets there is not even a dts file for these in the upstream kernel, which is all the more reason to remove them. The generic q8_a?3_defconfig files have been tested on an Et_q8_v1_6, Ippo_q8h_v1_2_a33_1024x600, Ippo_q8h_v1_2 and TZX-Q8-713B7 tablet, and the forfun_q88db_defconfig is identical to q8_a13_tablet_defconfig. This leaves only the Ippo_q8h_v5 untested with the new generic defconfigs but there is no reason to assume that it will not work. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Switch to using malloc_simple for the splHans de Goede2015-10-203-3/+2
| | | | | | | | | | common/dlmalloc.c is quite big, both in .text and .data usage. E.g. for a Mele_M9 sun6i board build this reduces .text from 0x4214 to 0x3b94 bytes, and .data from 0x54c to 0x144 bytes. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Tom Rini <trini@konsulko.com>
* sunxi: Enable CONFIG_SPL_STACK_RHans de Goede2015-10-203-0/+13
| | | | | | | | | | | | Select CONFIG_SPL_STACK_R for sunxi boards, this gives us much more room on the stack once we've the DRAM running. Besides being a good change to have on itself, this also paves the way for switching to using malloc_simple in the SPL which cuts of close to 4KiB of the SPL size. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* malloc_simple: Add support for switching to DRAM heapHans de Goede2015-10-202-0/+22
| | | | | | | | | | | | | | | | | malloc_simple uses a part of the stack as heap, initially it uses SYS_MALLOC_F_LEN bytes which typically is quite small as the initial stacks sits in SRAM and we do not have that much SRAM to work with. When DRAM becomes available we may switch the stack from SRAM to DRAM to give use more room. This commit adds support for also switching to a new bigger malloc_simple heap located in the new stack. Note that this requires spl_init to be called before spl_relocate_stack_gd which in practice means that spl_init must be called from board_init_f. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* malloc_simple: Add Kconfig option for using only malloc_simple in the SPLHans de Goede2015-10-205-4/+14
| | | | | | | | | | | | | | | | | common/dlmalloc.c is quite big, both in .text and .data usage, therefor on some boards the SPL is build to use only malloc_simple.c and not the dlmalloc.c code. This is done in various include/configs/foo.h with the following construct: #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE #endif This commit introduces a SPL_MALLOC_SIMPLE Kconfig bool which allows selecting this functionality through Kconfig instead. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* spl: spl_relocate_stack_gd: Do not unnecessarily clear bssHans de Goede2015-10-201-3/+0
| | | | | | | | | spl_relocate_stack_gd only gets called from arch/arm/lib/crt0.S which clears the bss directly after calling it, so there is no need to clear it from spl_relocate_stack_gd. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Prepare v2015.10Tom Rini2015-10-191-1/+1
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* powerpc: Drop old non-generic-board codeSimon Glass2015-10-191-986/+0
| | | | | | This code is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* sbc8641d: enable and test CONFIG_SYS_GENERIC_BOARDPaul Gortmaker2015-10-191-0/+2
| | | | Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* sbc8641d: increase monitor size from 256k to 384kPaul Gortmaker2015-10-192-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Between v2015.07-rc1 and v2015.07-rc2 this board started silent boot failure. A bisect led to commit 6eed3786c68c8a49d ("net: Move the CMD_NET config to defconfigs"). This commit looks harmless in itself, but it did implicitly add a feature to the image which led to this: u-boot$git describe 6eed3786c68c8a49d v2015.07-rc1-412-g6eed3786c68c ^^^ u-boot$ls -l ../41*/u-boot.bin -rwxrwxr-x 1 paul paul 261476 Oct 16 16:47 ../411/u-boot.bin -rwxrwxr-x 1 paul paul 266392 Oct 16 16:43 ../412/u-boot.bin u-boot$bc bc 1.06.95 Copyright 1991-1994, 1997, 1998, 2000, 2004, 2006 Free Software Foundation, Inc. This is free software with ABSOLUTELY NO WARRANTY. For details type `warranty'. 256*1024 262144 i.e. we finally broke through the 256k monitor size. Jump it up to 384k and fix the hard coded value used in the env offset at the same time. We were probably flirting with the 256k size issue without knowing it when testing on different baselines in earlier commits, but since this is all board specific, a rebase or reorder to put this commit 1st is of little value. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* sbc8641d: add basic flash setup instructions to README filePaul Gortmaker2015-10-191-0/+21
| | | | | | | ...so that I don't have to go work them out from scratch again by peering at the manual. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* sbc8641d: set proper environment sector size.Paul Gortmaker2015-10-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | When debugging an env fail due to too small a malloc pool, it was noted that the env write was 256k. But the device sector size is 1/2 that, as can be seen from "fli" output: Bank # 1: CFI conformant flash (16 x 16) Size: 16 MB in 131 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x1888 Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 2 ms, buffer size: 64 bytes Sector Start Addresses: FF000000 E RO FF020000 E RO FF040000 E RO FF060000 E RO FF080000 E RO FF0A0000 E RO FF0C0000 E RO FF0E0000 E RO FF100000 E RO FF120000 E RO [...] FFF00000 RO FFF20000 RO FFF40000 RO FFF60000 RO FFF80000 RO FFFA0000 RO FFFC0000 RO FFFE0000 E RO FFFE8000 RO FFFF0000 E RO FFFF8000 RO => The desired env sector is FFF40000->FFF60000, or 0x20000 in length, just after the 256k u-boot image which starts @ FFF00000. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* sbc8641d: increase malloc pool size to a sane defaultPaul Gortmaker2015-10-191-1/+1
| | | | | | | | | | | | Currently the board fails to save its env, since the env size is much smaller than the sector size, and the malloc fails for the pad buffer, giving the user visible symptom of: Unable to save the rest of sector (253952) Allow for 1M malloc pool, the same as used on the sbc8548 board. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* sbc8641d: enable command line editingPaul Gortmaker2015-10-191-0/+1
| | | | | | It is just too painful to use interactively without it. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* image-fit: Fix signature checkingAndrej Rosano2015-10-191-1/+3
| | | | | | | On signature verification failures fit_image_verify() should exit with error. Signed-off-by: Andrej Rosano <andrej@inversepath.com>
* igep00x0: Use BCH8 ECCLadislav Michl2015-10-191-5/+13
| | | | | | | | Used NAND chips requires at least 4-bit error correction, so use BCH8 as it is what kernel uses. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Acked-by: Javier Martinez Canillas <javier@osg.samsung.com>
* vexpress64: Juno: Add initialisation code for Juno R1 PCIe host bridge.Liviu Dudau2015-10-194-1/+206
| | | | | | | | | | | | | Juno R1 has an XpressRICH3 PCIe host bridge that needs to be initialised in order for the Linux kernel to be able to enumerate the bus. Add support code here that enables the host bridge, trains the links and sets up the Address Translation Tables. Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> [trini: Always declare vexpress64_pcie_init and continue handling logic inside the function] Signed-off-by: Tom Rini <trini@konsulko.com>
* vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.Liviu Dudau2015-10-192-1/+11
| | | | | | | | | | Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel. Declare a secondary memory bank and set the sizes correctly. Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
* dfu: dfu_sf: Take the start address into accountFabio Estevam2015-10-191-2/+10
| | | | | | | | | | | | | | | | | | | | The dfu_alt_info_spl variable allows passing a starting point for the binary to be flashed in the SPI NOR. For example, if we have 'dfu_alt_info_spl=spl raw 0x400', this means that we want to flash the binary starting at address 0x400. In order to do so we need to erase the entire sector and write to the the subsequent SPI NOR sectors taking such start address into account for the address calculations. Tested by succesfully writing SPL binary into 0x400 offset and the u-boot.img at offset 64 kiB of a SPL NOR. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Use lldiv for the math] Signed-off-by: Tom Rini <trini@konsulko.com>
* dfu: dfu_sf: Use the erase sector size for erase operationsFabio Estevam2015-10-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI NOR flashes need to erase the entire sector size and we cannot pass any arbitrary length for the erase operation. To illustrate the problem: Copying data from PC to DFU device Download [=========================] 100% 478208 bytes Download done. state(7) = dfuMANIFEST, status(0) = No error condition is present state(10) = dfuERROR, status(14) = Something went wrong, but the device does not know what it was Done! In this case, the binary has 478208 bytes and the M25P32 SPI NOR has an erase sector of 64kB. 478208 = 7 entire sectors of 64kiB + 19456 bytes. Erasing the first seven 64 kB sectors works fine, but when trying to erase the remainding 19456 causes problem and the board hangs. Fix the issue by always erasing with the erase sector size. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
* doc/README.scrapyard: Add more entriesTom Rini2015-10-191-0/+71
| | | | | | | - Add deletions from August 30 2015. - A few from Sept 12, one from Oct 2nd. Signed-off-by: Tom Rini <trini@konsulko.com>
* Revert "arm: Remove inetspace_v2_cmc board"Tom Rini2015-10-191-0/+8
| | | | | | | | | Upon further review when populating README.scrapyard, inetspace_v2_cmc is a variant on netspace_v2 and not just an orphan config. This reverts commit 653600a715db49859c06ba5dfb858c15c4108d54. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2015-10-193-2/+8
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| * ARM: rpi: add another revision of Raspberry Pi A+Lubomir Rintel2015-10-192-0/+6
| | | | | | | | | | | | | | | | Seen this one in the wild. Is labelled "Raspberry Pi Model A+ V1.1, (C) Raspberry Pi 2014". A standard A+ board, much like the one with version 0x12, didn't notice any differencies. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
| * ARM: dockstar: move start of environment areaEric Cooper2015-10-191-2/+2
| | | | | | | | | | | | | | | | | | The default dockstar configuration for U-Boot currently causes it to overrun the environment area, so that a "saveenv" command bricks the device. This patch moves the environment to a higher address to avoid that. Signed-off-by: Eric Cooper <ecc@cmu.edu>
* | Revert "arm: Remove d2net_v2 defconfig file"Tom Rini2015-10-192-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Upon further review when populating README.scrapyard, d2net_v2 is a variant on net2big_v2 and not just an orphan config. To help in the future also add this to board/LaCie/net2big_v2/MAINTAINERS which needed a little consolidation anyhow. This reverts commit 1363740e7948a8e4bee8d5adcdf0f63f7782879d. Cc: Simon Guinot <simon.guinot@sequanux.org> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* | doc/README.scrapyard: Populate recent removalsTom Rini2015-10-191-9/+9
| | | | | | | | | | | | Add in the commit IDs / dates for boards removed on Sept 2nd. Signed-off-by: Tom Rini <trini@konsulko.com>
* | ARM: k2e/l: Apply WA for selecting PA clock sourceLokesh Vutla2015-10-173-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On keystone2 Lamarr and Edison platforms, the PA clocksource mux in PLL REG1, can be changed only after enabling its clock domain. So selecting the output of PASS PLL as input to PA only after enabling the clockdomain. This is as per the debug done by "Vitaly Andrianov <vitalya@ti.com>" and based on the previous work done by "Hao Zhang <hzhang@ti.com>" Fixes: d634a0775bcf ("ARM: keystone2: Cleanup PLL init code") Reported-by: Vitaly Andrianov <vitalya@ti.com> Tested-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | arch/powerpc/config.mk: Pass -fno-ira-hoist-pressure when possibleTom Rini2015-10-171-1/+2
|/ | | | | | | | | There are various toolchain issues that cause us to produce invalid binaries with certain gcc 4.8.x and 4.9.x versions when we don't pass this flag in. Tested-by: Joakim Tjernlund <joakim.tjernlund@transmode.se> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-10-163-0/+17
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| * arm: dts: socfpga: add "u-boot,dm-pre-reloc" to socfpga_cyclone5_socdk dtsDinh Nguyen2015-10-171-0/+3
| | | | | | | | | | | | | | We need "u-boot,dm-pre-reloc" in the socfpga_cyclone5_socdk.dts file in order for the SPL to use SD/MMC. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: enable data/inst prefetch and shared override in the L2Dinh Nguyen2015-10-172-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the L2 AUX CTRL settings for the SoCFPGA. Enabling D and I prefetch bits helps improve SDRAM performance on the platform. Also, we need to enable bit 22 of the L2. By not having bit 22 set in the PL310 Auxiliary Control register (shared attribute override enable) has the side effect of transforming Normal Shared Non-cacheable reads into Cacheable no-allocate reads. Coherent DMA buffers in Linux always have a Cacheable alias via the kernel linear mapping and the processor can speculatively load cache lines into the PL310 controller. With bit 22 cleared, Non-cacheable reads would unexpectedly hit such cache lines leading to buffer corruption. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* | vf610twr: Fix typo in DRAM initAnthony Felice2015-10-161-1/+1
| | | | | | | | | | | | | | | | | | This commit fixes a typo in vf610twr DRAM init that was causing a hang in U-Boot for the Vybrid Tower. This typo was introduced in commit 3f353cecc (vf610: refactor DDRMC code). Signed-off-by: Anthony Felice <tony.felice@timesys.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini2015-10-162-24/+42
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| * | exynos: more debug and cleanup in do_sdhci_init()Tobias Jakobi2015-10-131-9/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add more debug printfs in do_sdhci_init() for calls that can potentially fail. Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: be more verbose in process_nodes()Tobias Jakobi2015-10-131-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | In case sdhci_get_config() or do_sdhci_init() fail, show the error code that was returned. Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: Fix passing of errors in exynos_mmc_init()Tobias Jakobi2015-10-131-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | exynos_mmc_init() always returns zero, so for the caller it looks like it never fails. Correct this by returning the error code of process_nodes(). For process_nodes() do something similar and return early when do_sdhci_init() fails. v2: Only fail in process_nodes() if we fail on all available nodes. Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | exynos: Properly zero initialize host in s5p_sdhci_init()Tobias Jakobi2015-10-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This makes sure that setting the host_caps in s5p_sdhci_core_init() doesn't operate on potentially uninitialized memory. Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | odroid: Add boot script (boot.scr) supportGuillaume GARDET2015-10-131-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add boot script (boot.scr) support. If no boot script are found, it boots as usual. Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Tested-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | odroid: replace 'fatload' with 'load' to be able to use EXT* partitionsGuillaume GARDET2015-10-131-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace 'fatload' command by 'load', to be able to use EXT* partitions while keeping FAT partition compatibility. Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Tested-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | arm: mmu: Add missing volatile for reading SCTLR registerAlison Wang2015-10-161-1/+1
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | Add 'volatile' qualifier to the asm statement in get_cr() so that the statement is not optimized out by the compiler. (http://comments.gmane.org/gmane.linux.linaro.toolchain/5163) Without the 'volatile', get_cr() returns a wrong value which prevents enabling the MMU and later causes a PCIE VA access failure. Signed-off-by: Alison Wang <alison.wang@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2015-10-156-27/+55
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| * | armv8/gic: Fix GIC v2 initializationThierry Reding2015-10-151-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize all GICD_IGROUPRn registers and set up GICC_CTLR to enable interrupts to the primary CPU. This fixes issues seen after booting a Linux kernel from U-Boot. Suggested-by: Marc Zyngier <marc.zyngier@arm.com> Suggested-by: Mark Rutland <mark.rutland@arm.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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