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-rw-r--r--spl/Makefile25
1 files changed, 4 insertions, 21 deletions
diff --git a/spl/Makefile b/spl/Makefile
index bf7271d2be..cbd3d27849 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -190,29 +190,12 @@ GEN_UBOOT = \
$(obj)$(SPL_BIN): depend $(START) $(LIBS) $(obj)u-boot-spl.lds
$(GEN_UBOOT)
-# Tentative step for Kbuild-style makefiles coexist with conventional U-Boot style makefiles
-# U-Boot conventional sub makefiles always include some other makefiles.
-# So, the build system searches a line beginning with "include" before entering into the sub makefile
-# in order to distinguish which style it is.
-# If the Makefile include a "include" line, we assume it is an U-Boot style makefile.
-# Otherwise, it is treated as a Kbuild-style makefile.
-select_makefile = \
- if grep -q "^include" $1/Makefile; then \
- $(MAKE) -C $1; \
- else \
- $(MAKE) -C $1 -f $(TOPDIR)/scripts/Makefile.build; \
- mv $(dir $@)built-in.o $@; \
- fi
-
-# We do not need to build $(START) explicitly.
-# It is built while we are at $(CPUDIR)/lib$(CPU).o build.
-$(START): depend
- if grep -q "^include" $(SRCTREE)$(dir $(subst $(SPLTREE),,$@))Makefile; then \
- $(MAKE) -C $(SRCTREE)/$(START_PATH) $@; \
- fi
+$(START):
+ @:
$(LIBS): depend
- +$(call select_makefile, $(SRCTREE)$(dir $(subst $(SPLTREE),,$@)))
+ $(MAKE) $(build) $(SRCTREE)$(dir $(subst $(SPLTREE),,$@))
+ mv $(dir $@)built-in.o $@
$(obj)u-boot-spl.lds: $(LDSCRIPT) depend
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(obj). -ansi -D__ASSEMBLY__ -P - < $< > $@
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