diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/atmel_lcd.h | 9 | ||||
| -rw-r--r-- | include/configs/bcm23550_w1d.h | 148 | ||||
| -rw-r--r-- | include/configs/bfin_adi_common.h | 5 | ||||
| -rw-r--r-- | include/configs/cobra5272.h | 4 | ||||
| -rw-r--r-- | include/configs/ls2080a_common.h | 11 | ||||
| -rw-r--r-- | include/configs/ls2080a_simu.h | 7 | ||||
| -rw-r--r-- | include/configs/ls2080aqds.h | 43 | ||||
| -rw-r--r-- | include/configs/mx6_common.h | 3 | ||||
| -rw-r--r-- | include/configs/mx7_common.h | 3 | ||||
| -rw-r--r-- | include/configs/omap3_cairo.h | 2 | ||||
| -rw-r--r-- | include/configs/s32v234evb.h | 260 | ||||
| -rw-r--r-- | include/configs/siemens-am33x-common.h | 2 | ||||
| -rw-r--r-- | include/configs/snapper9g45.h | 155 | ||||
| -rw-r--r-- | include/configs/stm32f429-discovery.h | 2 | ||||
| -rw-r--r-- | include/configs/sunxi-common.h | 5 | ||||
| -rw-r--r-- | include/configs/tam3517-common.h | 16 | ||||
| -rw-r--r-- | include/configs/ti_armv7_keystone2.h | 1 | ||||
| -rw-r--r-- | include/configs/ti_omap5_common.h | 2 | ||||
| -rw-r--r-- | include/dt-bindings/clock/at91.h | 23 | ||||
| -rw-r--r-- | include/dt-bindings/dma/at91.h | 52 | ||||
| -rw-r--r-- | include/dt-bindings/pinctrl/at91.h | 40 | ||||
| -rw-r--r-- | include/i2c.h | 3 | ||||
| -rw-r--r-- | include/linux/compat.h | 2 | ||||
| -rw-r--r-- | include/splash.h | 2 |
24 files changed, 767 insertions, 33 deletions
diff --git a/include/atmel_lcd.h b/include/atmel_lcd.h index 6993128b1b..8a2f46f6c7 100644 --- a/include/atmel_lcd.h +++ b/include/atmel_lcd.h @@ -10,6 +10,15 @@ #ifndef _ATMEL_LCD_H_ #define _ATMEL_LCD_H_ +/** + * struct atmel_lcd_platdata - platform data for Atmel LCDs with driver model + * + * @timing_index: Index of LCD timing to use in device tree node + */ +struct atmel_lcd_platdata { + int timing_index; +}; + typedef struct vidinfo { ushort vl_col; /* Number of columns (i.e. 640) */ ushort vl_row; /* Number of rows (i.e. 480) */ diff --git a/include/configs/bcm23550_w1d.h b/include/configs/bcm23550_w1d.h new file mode 100644 index 0000000000..bd3c7116d5 --- /dev/null +++ b/include/configs/bcm23550_w1d.h @@ -0,0 +1,148 @@ +/* + * Copyright 2013 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __BCM23550_W1D_H +#define __BCM23550_W1D_H + +#include <linux/sizes.h> +#include <asm/arch/sysmap.h> + +/* CPU, chip, mach, etc */ +#define CONFIG_KONA +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_KONA_RESET_S + +/* + * Memory configuration + */ +#define CONFIG_SYS_TEXT_BASE 0x9f000000 + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CONFIG_NR_DRAM_BANKS 1 + +#define CONFIG_SYS_MALLOC_LEN SZ_4M /* see armv7/start.S. */ +#define CONFIG_STACKSIZE SZ_256K + +/* GPIO Driver */ +#define CONFIG_KONA_GPIO + +/* MMC/SD Driver */ +#define CONFIG_SDHCI +#define CONFIG_MMC_SDMA +#define CONFIG_KONA_SDHCI +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC + +#define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR +#define CONFIG_SYS_SDIO_BASE1 SDIO2_BASE_ADDR +#define CONFIG_SYS_SDIO_BASE2 SDIO3_BASE_ADDR +#define CONFIG_SYS_SDIO_BASE3 SDIO4_BASE_ADDR +#define CONFIG_SYS_SDIO0_MAX_CLK 48000000 +#define CONFIG_SYS_SDIO1_MAX_CLK 48000000 +#define CONFIG_SYS_SDIO2_MAX_CLK 48000000 +#define CONFIG_SYS_SDIO3_MAX_CLK 48000000 +#define CONFIG_SYS_SDIO0 "sdio1" +#define CONFIG_SYS_SDIO1 "sdio2" +#define CONFIG_SYS_SDIO2 "sdio3" +#define CONFIG_SYS_SDIO3 "sdio4" + +/* I2C Driver */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_KONA +#define CONFIG_SYS_SPD_BUS_NUM 3 /* Start with PMU bus */ +#define CONFIG_SYS_MAX_I2C_BUS 4 +#define CONFIG_SYS_I2C_BASE0 BSC1_BASE_ADDR +#define CONFIG_SYS_I2C_BASE1 BSC2_BASE_ADDR +#define CONFIG_SYS_I2C_BASE2 BSC3_BASE_ADDR +#define CONFIG_SYS_I2C_BASE3 PMU_BSC_BASE_ADDR + +/* Timer Driver */ +#define CONFIG_SYS_TIMER_RATE 32000 +#define CONFIG_SYS_TIMER_COUNTER (TIMER_BASE_ADDR + 4) /* STCLO offset */ + +/* Init functions */ +#define CONFIG_MISC_INIT_R /* board's misc_init_r function */ + +/* Some commands use this as the default load address */ +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + +/* No mtest functions as recommended */ + +/* + * This is the initial SP which is used only briefly for relocating the u-boot + * image to the top of SDRAM. After relocation u-boot moves the stack to the + * proper place. + */ +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE + +/* Serial Info */ +#define CONFIG_SYS_NS16550_SERIAL +/* Post pad 3 bytes after each reg addr */ +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK 13000000 +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550_COM1 0x3e000000 + +#define CONFIG_BAUDRATE 115200 + +/* must fit into GPT:u-boot-env partition */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_OFFSET (0x00011a00 * 512) +#define CONFIG_ENV_SIZE (8 * 512) + +#define CONFIG_SYS_NO_FLASH /* Not using NAND/NOR unmanaged flash */ + +/* console configuration */ +#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) /* Printbuffer size */ +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +/* + * One partition type must be defined for part.c + * This is necessary for the fatls command to work on an SD card + * for example. + */ +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +/* version string, parser, etc */ +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP + +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC + +/* Initial upstream - boot to cmd prompt only */ +#define CONFIG_BOOTCOMMAND "" + +/* Commands */ +#define CONFIG_FAT_WRITE + +/* Fastboot and USB OTG */ +#define CONFIG_USB_FUNCTION_FASTBOOT +#define CONFIG_CMD_FASTBOOT +#define CONFIG_FASTBOOT_FLASH +#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 +#define CONFIG_SYS_CACHELINE_SIZE 64 +#define CONFIG_FASTBOOT_BUF_SIZE 0x1d000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE +#undef CONFIG_USB_GADGET_VBUS_DRAW +#define CONFIG_USB_GADGET_VBUS_DRAW 0 +#define CONFIG_USB_GADGET_DWC2_PHY_8_BIT +#define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY +#define CONFIG_USBID_ADDR 0x34052c46 + +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_SYS_L2CACHE_OFF + +#endif /* __BCM23550_W1D_H */ diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h index 13076072e4..502ddad96b 100644 --- a/include/configs/bfin_adi_common.h +++ b/include/configs/bfin_adi_common.h @@ -97,11 +97,6 @@ /* * Env Settings */ -#ifndef CONFIG_BOOTDELAY -# if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) -# else -# endif -#endif #ifndef CONFIG_BOOTCOMMAND # define CONFIG_BOOTCOMMAND "run ramboot" #endif diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 4396698b7f..0e8d4ac38b 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -149,10 +149,6 @@ /*AUTOBOOT settings - booting images automatically by u-boot after power on*/ -seconds u-boot will wait before starting defined (auto-)boot command, setting -to -1 disables delay, setting to 0 will too prevent access to u-boot command -interface: u-boot then has to reflashed */ - /* The following settings will be contained in the environment block ; if you want to use a neutral environment all those settings can be manually set in u-boot: 'set' command */ diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 2bf524f69a..ebe1415421 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -29,11 +29,13 @@ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ /* Link Definitions */ +#ifndef CONFIG_QSPI_BOOT #ifdef CONFIG_SPL #define CONFIG_SYS_TEXT_BASE 0x80400000 #else #define CONFIG_SYS_TEXT_BASE 0x30100000 #endif +#endif #ifdef CONFIG_EMU #define CONFIG_SYS_NO_FLASH @@ -138,13 +140,6 @@ #define CONFIG_SYS_FLASH1_BASE_PHYS 0xC0000000 #define CONFIG_SYS_FLASH1_BASE_PHYS_EARLY 0x8000000 -#ifndef CONFIG_SYS_NO_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#define CONFIG_SYS_FLASH_QUIET_TEST -#endif - #ifndef __ASSEMBLY__ unsigned long long get_qixis_addr(void); #endif @@ -289,7 +284,7 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MONITOR_LEN (640 * 1024) #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/ls2080a_simu.h b/include/configs/ls2080a_simu.h index 7563aafbc6..7f245b5fad 100644 --- a/include/configs/ls2080a_simu.h +++ b/include/configs/ls2080a_simu.h @@ -30,6 +30,13 @@ #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) +#ifndef CONFIG_SYS_NO_FLASH +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_SYS_FLASH_QUIET_TEST +#endif + /* * NOR Flash Timing Params */ diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index b44066c407..df1455bef3 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -17,6 +17,16 @@ unsigned long get_board_ddr_clk(void); #endif #define CONFIG_SYS_FSL_CLK + +#ifdef CONFIG_FSL_QSPI +#define CONFIG_SYS_NO_FLASH +#undef CONFIG_CMD_IMLS +#define CONFIG_QIXIS_I2C_ACCESS +#define CONFIG_SYS_I2C_EARLY_INIT +#define CONFIG_SYS_I2C_IFDR_DIV 0x7e +#endif + +#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 #define CONFIG_SYS_CLK_FREQ get_board_sys_clk() #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() #define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4) @@ -162,11 +172,13 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_LBMAP_DFLTBANK 0x00 #define QIXIS_LBMAP_ALTBANK 0x04 #define QIXIS_LBMAP_NAND 0x09 +#define QIXIS_LBMAP_QSPI 0x0f #define QIXIS_RST_CTL_RESET 0x31 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 #define QIXIS_RCW_SRC_NAND 0x107 +#define QIXIS_RCW_SRC_QSPI 0x62 #define QIXIS_RST_FORCE_MEM 0x01 #define CONFIG_SYS_CSPR3_EXT (0x0) @@ -227,7 +239,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 * 1024) -#define CONFIG_SYS_NAND_U_BOOT_SIZE (512 * 1024) +#define CONFIG_SYS_NAND_U_BOOT_SIZE (640 * 1024) #else #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY @@ -257,11 +269,19 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 +#if defined(CONFIG_QSPI_BOOT) +#define CONFIG_SYS_TEXT_BASE 0x20010000 +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ +#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ +#define CONFIG_ENV_SECT_SIZE 0x10000 +#else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000) #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x2000 #endif +#endif /* Debug Server firmware */ #define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR @@ -279,8 +299,27 @@ unsigned long get_board_ddr_clk(void); #define I2C_MUX_CH_DEFAULT 0x8 /* SPI */ -#ifdef CONFIG_FSL_DSPI +#if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI) #define CONFIG_SPI_FLASH + +#ifdef CONFIG_FSL_DSPI +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_EON +#endif + +#ifdef CONFIG_FSL_QSPI +#define CONFIG_SPI_FLASH_SPANSION +#define FSL_QSPI_FLASH_SIZE (1 << 26) /* 64MB */ +#define FSL_QSPI_FLASH_NUM 4 +#endif +/* + * Verify QSPI when boot from NAND, QIXIS brdcfg9 need configure. + * If boot from on-board NAND, ISO1 = 1, ISO2 = 0, IBOOT = 0 + * If boot from IFCCard NAND, ISO1 = 0, ISO2 = 0, IBOOT = 1 + */ +#define FSL_QIXIS_BRDCFG9_QSPI 0x1 + #endif /* diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 27f38f497e..fb49322f3b 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -59,9 +59,6 @@ #endif #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#ifndef CONFIG_BOOTDELAY -#endif - /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 5e5656d480..fbc6de6283 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -34,9 +34,6 @@ #define CONFIG_LOADADDR 0x80800000 #define CONFIG_SYS_TEXT_BASE 0x87800000 -#ifndef CONFIG_BOOTDELAY -#endif - /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 diff --git a/include/configs/omap3_cairo.h b/include/configs/omap3_cairo.h index 96c3c4b958..82e0d5000c 100644 --- a/include/configs/omap3_cairo.h +++ b/include/configs/omap3_cairo.h @@ -73,8 +73,6 @@ #define CONFIG_NAND_OMAP_GPMC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ /* devices */ -/* override default CONFIG_BOOTDELAY */ - #define CONFIG_EXTRA_ENV_SETTINGS \ "machid=ffffffff\0" \ "fdt_high=0x87000000\0" \ diff --git a/include/configs/s32v234evb.h b/include/configs/s32v234evb.h new file mode 100644 index 0000000000..9723bab77e --- /dev/null +++ b/include/configs/s32v234evb.h @@ -0,0 +1,260 @@ +/* + * (C) Copyright 2015-2016 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Configuration settings for the Freescale S32V234 EVB board. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#ifndef CONFIG_SPL_BUILD +#include <config_distro_defaults.h> +#endif + +#include <asm/arch/imx-regs.h> + +#define CONFIG_S32V234 +#define CONFIG_DM + +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +/* Config GIC */ +#define CONFIG_GICV2 +#define GICD_BASE 0x7D001000 +#define GICC_BASE 0x7D002000 + +#define CONFIG_REMAKE_ELF +#undef CONFIG_RUN_FROM_IRAM_ONLY + +#define CONFIG_RUN_FROM_DDR1 +#undef CONFIG_RUN_FROM_DDR0 + +/* Run by default from DDR1 */ +#ifdef CONFIG_RUN_FROM_DDR0 +#define DDR_BASE_ADDR 0x80000000 +#else +#define DDR_BASE_ADDR 0xC0000000 +#endif + +#define CONFIG_MACH_TYPE 4146 + +#define CONFIG_SKIP_LOWLEVEL_INIT + +/* Config CACHE */ +#define CONFIG_CMD_CACHE + +#define CONFIG_SYS_FULL_VA + +/* Enable passing of ATAGs */ +#define CONFIG_CMDLINE_TAG + +/* SMP Spin Table Definitions */ +#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY (1000000000) /* 1000MHz */ +#define CONFIG_SYS_FSL_ERRATUM_A008585 + +/* Size of malloc() pool */ +#ifdef CONFIG_RUN_FROM_IRAM_ONLY +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1 * 1024 * 1024) +#else +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) +#endif +#define CONFIG_BOARD_EARLY_INIT_F + +#define CONFIG_DM_SERIAL +#define CONFIG_FSL_LINFLEXUART +#define LINFLEXUART_BASE LINFLEXD0_BASE_ADDR + +#define CONFIG_DEBUG_UART_LINFLEXUART +#define CONFIG_DEBUG_UART_BASE LINFLEXUART_BASE + +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_SYS_UART_PORT (1) +#define CONFIG_BAUDRATE 115200 + +#undef CONFIG_CMD_IMLS + +#define CONFIG_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC_BASE_ADDR +#define CONFIG_SYS_FSL_ESDHC_NUM 1 + +#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 + +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +/* #define CONFIG_CMD_EXT2 EXT2 Support */ +#define CONFIG_CMD_FAT /* FAT support */ +#define CONFIG_DOS_PARTITION + +#if 0 + +/* Ethernet config */ +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_FEC_MXC_PHYADDR 0 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#endif + +#if 0 /* Disable until the I2C driver will be updated */ + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_HARD_I2C +#define CONFIG_I2C_MXC +#define CONFIG_SYS_I2C_BASE I2C0_BASE_ADDR +#define CONFIG_SYS_I2C_SPEED 100000 +#endif + +#if 0 /* Disable until the FLASH will be implemented */ +#define CONFIG_SYS_USE_NAND +#endif + +#ifdef CONFIG_SYS_USE_NAND +/* Nand Flash Configs */ +#define CONFIG_CMD_NAND +#define CONFIG_JFFS2_NAND +#define MTD_NAND_FSL_NFC_SWECC 1 +#define CONFIG_NAND_FSL_NFC +#define CONFIG_SYS_NAND_BASE 0x400E0000 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE +#define CONFIG_SYS_NAND_SELECT_DEVICE +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ +#endif + +#define CONFIG_CMD_DHCP + +#define CONFIG_LOADADDR 0xC307FFC0 +#define CONFIG_BOOTARGS "console=ttyLF0 root=/dev/ram rw" + +#define CONFIG_CMD_ENV +#define CONFIG_EXTRA_ENV_SETTINGS \ + "boot_scripts=boot.scr.uimg boot.scr\0" \ + "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ + "console=ttyLF0,115200\0" \ + "fdt_file=s32v234-evb.dtb\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "fdt_addr_r=0xC2000000\0" \ + "kernel_addr_r=0xC307FFC0\0" \ + "ramdisk_addr_r=0xC4000000\0" \ + "ramdisk=rootfs.uimg\0"\ + "ip_dyn=yes\0" \ + "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ + "update_sd_firmware_filename=u-boot.imx\0" \ + "update_sd_firmware=" \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "if mmc dev ${mmcdev}; then " \ + "if ${get_cmd} ${update_sd_firmware_filename}; then " \ + "setexpr fw_sz ${filesize} / 0x200; " \ + "setexpr fw_sz ${fw_sz} + 1; " \ + "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ + "fi; " \ + "fi\0" \ + "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \ + "jtagboot=echo Booting using jtag...; " \ + "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ + "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \ + "run loaduimage; run loadramdisk; run loadfdt;"\ + "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ + "boot_net_usb_start=true\0" \ + BOOTENV + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 0) \ + func(DHCP, dhcp, na) + +#define CONFIG_BOOTCOMMAND \ + "run distro_bootcmd" + +#include <config_distro_bootcmd.h> + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT "=> " +#undef CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_CMDLINE_EDITING + +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_MEMTEST_START (DDR_BASE_ADDR) +#define CONFIG_SYS_MEMTEST_END (DDR_BASE_ADDR + 0x7C00000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_SYS_TEXT_BASE 0x3E800000 /* SDRAM */ + +#ifdef CONFIG_RUN_FROM_IRAM_ONLY +#define CONFIG_SYS_MALLOC_BASE (DDR_BASE_ADDR) +#endif + +/* + * Stack sizes + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ + +#if 0 +/* Configure PXE */ +#define CONFIG_CMD_PXE +#define CONFIG_BOOTP_PXE +#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 +#endif + +/* Physical memory map */ +/* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM (DDR_BASE_ADDR) +#define PHYS_SDRAM_SIZE (256 * 1024 * 1024) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_IS_IN_MMC + +#define CONFIG_ENV_OFFSET (12 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 + + +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +#endif diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 5969541de6..eab665c286 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -102,8 +102,10 @@ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ /* NS16550 Configuration */ +#ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) +#endif #define CONFIG_SYS_NS16550_CLK (48000000) #define CONFIG_SYS_NS16550_COM1 0x44e09000 #define CONFIG_SYS_NS16550_COM4 0x481a6000 diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h new file mode 100644 index 0000000000..ddfbcec980 --- /dev/null +++ b/include/configs/snapper9g45.h @@ -0,0 +1,155 @@ +/* + * Bluewater Systems Snapper 9G45 module + * + * (C) Copyright 2011 Bluewater Systems + * Author: Andre Renaud <andre@bluewatersys.com> + * Author: Ryan Mallon <ryan@bluewatersys.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* SoC type is defined in boards.cfg */ +#include <asm/hardware.h> +#include <linux/sizes.h> + +#define CONFIG_SYS_TEXT_BASE 0x73f00000 + +/* ARM asynchronous clock */ +#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 + +/* CPU */ +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 +#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */ +#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM + 0x1000 - \ + GENERATED_GBL_DATA_SIZE) + +/* Mem test settings */ +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024)) + +/* NAND Flash */ +#define CONFIG_NAND_ATMEL +#define CONFIG_ATMEL_NAND_HWECC +#define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC +#define CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 +#define CONFIG_SYS_NAND_DBW_8 +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */ +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */ +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 + +/* Ethernet */ +#define CONFIG_MACB +#define CONFIG_RMII +#define CONFIG_NET_RETRY_COUNT 20 +#define CONFIG_RESET_PHY_R +#define CONFIG_AT91_WANTS_COMMON_PHY +#define CONFIG_TFTP_PORT +#define CONFIG_TFTP_TSIZE + +/* USB */ +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_ATMEL +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 +#define CONFIG_DOS_PARTITION +#define CONFIG_USB_STORAGE +#define CONFIG_PARTITION_UUIDS + +/* MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_GENERIC_ATMEL_MCI + +/* LCD */ +#define CONFIG_ATMEL_LCD +#define CONFIG_CONSOLE_MUX +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_GURNARD_SPLASH + +#define CONFIG_ATMEL_SPI + +/* GPIOs and IO expander */ +#define CONFIG_ATMEL_LEGACY +#define CONFIG_AT91_GPIO +#define CONFIG_AT91_GPIO_PULLUP 1 + +/* UARTs/Serial console */ +#define CONFIG_ATMEL_USART +#define CONFIG_BAUDRATE 115200 + +/* Boot options */ +#define CONFIG_SYS_LOAD_ADDR 0x23000000 +#define CONFIG_ZERO_BOOTDELAY_CHECK + +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* Environment settings */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET (512 << 10) +#define CONFIG_ENV_SIZE (256 << 10) +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "ethaddr=00:00:00:00:00:00\0" \ + "serial=0\0" \ + "stdout=serial_atmel\0" \ + "stderr=serial_atmel\0" \ + "stdin=serial_atmel\0" \ + "bootlimit=3\0" \ + "loadaddr=0x71000000\0" \ + "board_rev=2\0" \ + "bootfile=/tftpboot/uImage\0" \ + "bootargs_def=console=ttyS0,115200 panic=5 quiet lpj=997376\0" \ + "nfsroot=/export/root\0" \ + "boot_working=setenv bootargs $bootargs_def; nboot $loadaddr 0 0x20c0000 && bootm\0" \ + "boot_safe=setenv bootargs $bootargs_def; nboot $loadaddr 0 0xc0000 && bootm\0" \ + "boot_tftp=setenv bootargs $bootargs_def ip=any nfsroot=$nfsroot; setenv autoload y && bootp && bootm\0" \ + "boot_usb=setenv bootargs $bootargs_def; usb start && usb storage && fatload usb 0:1 $loadaddr dds-xm200.bin && bootm\0" \ + "boot_mmc=setenv bootargs $bootargs_def; mmc rescan && fatload mmc 0:1 $loadaddr dds-xm200.bin && bootm\0" \ + "bootcmd=run boot_mmc ; run boot_usb ; run boot_working ; run boot_safe\0" \ + "altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0" + +/* Console settings */ +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_HUSH_PARSER + +/* U-Boot memory settings */ +#define CONFIG_SYS_MALLOC_LEN (1 << 20) + +/* Command line configuration */ +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_FAT +#define CONFIG_CMD_USB +#define CONFIG_CMD_MII +#define CONFIG_CMD_MMC +#define CONFIG_CMD_NAND +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_PART + +#endif /* __CONFIG_H */ diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index 8bbe580ebf..f05c1aacaf 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -82,8 +82,6 @@ "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \ "bootm 0x08044000 - 0x08042000\0" -#define CONFIG_AUTOBOOT - /* * Command line configuration. */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index b33cfb86f8..94275a7183 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -100,7 +100,7 @@ * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. */ #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */ +#define CONFIG_SYS_INIT_RAM_SIZE 0xA000 /* 40 KiB */ #else #define CONFIG_SYS_INIT_RAM_ADDR 0x0 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ @@ -213,8 +213,7 @@ #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) -/* FIXME: 40 KiB instead of 32 KiB ? */ -#define LOW_LEVEL_SRAM_STACK 0x00018000 +#define LOW_LEVEL_SRAM_STACK 0x0001A000 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #else /* end of 32 KiB in sram */ diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index efdc70622f..73ff416aed 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -207,6 +207,8 @@ #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_FAT_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_GPIO_SUPPORT @@ -219,12 +221,26 @@ #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" + +/* FAT */ +#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" +#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" + +/* RAW SD card / eMMC */ +#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ + /* NAND boot config */ #define CONFIG_SYS_NAND_BUSWIDTH_16BIT #define CONFIG_SYS_NAND_PAGE_COUNT 64 diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 707106ffab..2ee26c4036 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -245,7 +245,6 @@ "tftp_root=/\0" \ "nfs_root=/export\0" \ "mem_lpae=1\0" \ - "mem_reserve=512M\0" \ "addr_ubi=0x82000000\0" \ "addr_secdb_key=0xc000000\0" \ "name_kern=zImage\0" \ diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 5c5a12d493..2e4c8e9646 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -104,6 +104,8 @@ "setenv fdtfile dra72-evm.dtb; fi;" \ "if test $board_name = beagle_x15; then " \ "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ + "if test $board_name = am572x_idk; then " \ + "setenv fdtfile am572x-idk.dtb; fi;" \ "if test $board_name = am57xx_evm; then " \ "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ "if test $fdtfile = undefined; then " \ diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h new file mode 100644 index 0000000000..ab3ee241d1 --- /dev/null +++ b/include/dt-bindings/clock/at91.h @@ -0,0 +1,23 @@ +/* + * This header provides constants for AT91 pmc status. + * + * The constants defined in this header are being used in dts. + * + * Licensed under GPLv2 or later. + */ + +#ifndef _DT_BINDINGS_CLK_AT91_H +#define _DT_BINDINGS_CLK_AT91_H + +#define AT91_PMC_MOSCS 0 /* MOSCS Flag */ +#define AT91_PMC_LOCKA 1 /* PLLA Lock */ +#define AT91_PMC_LOCKB 2 /* PLLB Lock */ +#define AT91_PMC_MCKRDY 3 /* Master Clock */ +#define AT91_PMC_LOCKU 6 /* UPLL Lock */ +#define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */ +#define AT91_PMC_MOSCSELS 16 /* Main Oscillator Selection */ +#define AT91_PMC_MOSCRCS 17 /* Main On-Chip RC */ +#define AT91_PMC_CFDEV 18 /* Clock Failure Detector Event */ +#define AT91_PMC_GCKRDY 24 /* Generated Clocks */ + +#endif diff --git a/include/dt-bindings/dma/at91.h b/include/dt-bindings/dma/at91.h new file mode 100644 index 0000000000..ab6cbba454 --- /dev/null +++ b/include/dt-bindings/dma/at91.h @@ -0,0 +1,52 @@ +/* + * This header provides macros for at91 dma bindings. + * + * Copyright (C) 2013 Ludovic Desroches <ludovic.desroches@atmel.com> + * + * GPLv2 only + */ + +#ifndef __DT_BINDINGS_AT91_DMA_H__ +#define __DT_BINDINGS_AT91_DMA_H__ + +/* ---------- HDMAC ---------- */ + +/* + * Source and/or destination peripheral ID + */ +#define AT91_DMA_CFG_PER_ID_MASK (0xff) +#define AT91_DMA_CFG_PER_ID(id) (id & AT91_DMA_CFG_PER_ID_MASK) + +/* + * FIFO configuration: it defines when a request is serviced. + */ +#define AT91_DMA_CFG_FIFOCFG_OFFSET (8) +#define AT91_DMA_CFG_FIFOCFG_MASK (0xf << AT91_DMA_CFG_FIFOCFG_OFFSET) +#define AT91_DMA_CFG_FIFOCFG_HALF (0x0 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* half FIFO (default behavior) */ +#define AT91_DMA_CFG_FIFOCFG_ALAP (0x1 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* largest defined AHB burst */ +#define AT91_DMA_CFG_FIFOCFG_ASAP (0x2 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* single AHB access */ + + +/* ---------- XDMAC ---------- */ +#define AT91_XDMAC_DT_MEM_IF_MASK (0x1) +#define AT91_XDMAC_DT_MEM_IF_OFFSET (13) +#define AT91_XDMAC_DT_MEM_IF(mem_if) (((mem_if) & AT91_XDMAC_DT_MEM_IF_MASK) \ + << AT91_XDMAC_DT_MEM_IF_OFFSET) +#define AT91_XDMAC_DT_GET_MEM_IF(cfg) (((cfg) >> AT91_XDMAC_DT_MEM_IF_OFFSET) \ + & AT91_XDMAC_DT_MEM_IF_MASK) + +#define AT91_XDMAC_DT_PER_IF_MASK (0x1) +#define AT91_XDMAC_DT_PER_IF_OFFSET (14) +#define AT91_XDMAC_DT_PER_IF(per_if) (((per_if) & AT91_XDMAC_DT_PER_IF_MASK) \ + << AT91_XDMAC_DT_PER_IF_OFFSET) +#define AT91_XDMAC_DT_GET_PER_IF(cfg) (((cfg) >> AT91_XDMAC_DT_PER_IF_OFFSET) \ + & AT91_XDMAC_DT_PER_IF_MASK) + +#define AT91_XDMAC_DT_PERID_MASK (0x7f) +#define AT91_XDMAC_DT_PERID_OFFSET (24) +#define AT91_XDMAC_DT_PERID(perid) (((perid) & AT91_XDMAC_DT_PERID_MASK) \ + << AT91_XDMAC_DT_PERID_OFFSET) +#define AT91_XDMAC_DT_GET_PERID(cfg) (((cfg) >> AT91_XDMAC_DT_PERID_OFFSET) \ + & AT91_XDMAC_DT_PERID_MASK) + +#endif /* __DT_BINDINGS_AT91_DMA_H__ */ diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h new file mode 100644 index 0000000000..bbca3d0389 --- /dev/null +++ b/include/dt-bindings/pinctrl/at91.h @@ -0,0 +1,40 @@ +/* + * This header provides constants for most at91 pinctrl bindings. + * + * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * GPLv2 only + */ + +#ifndef __DT_BINDINGS_AT91_PINCTRL_H__ +#define __DT_BINDINGS_AT91_PINCTRL_H__ + +#define AT91_PINCTRL_NONE (0 << 0) +#define AT91_PINCTRL_PULL_UP (1 << 0) +#define AT91_PINCTRL_MULTI_DRIVE (1 << 1) +#define AT91_PINCTRL_DEGLITCH (1 << 2) +#define AT91_PINCTRL_PULL_DOWN (1 << 3) +#define AT91_PINCTRL_DIS_SCHMIT (1 << 4) +#define AT91_PINCTRL_DEBOUNCE (1 << 16) +#define AT91_PINCTRL_DEBOUNCE_VAL(x) (x << 17) + +#define AT91_PINCTRL_PULL_UP_DEGLITCH (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DEGLITCH) + +#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT (0x0 << 5) +#define AT91_PINCTRL_DRIVE_STRENGTH_LOW (0x1 << 5) +#define AT91_PINCTRL_DRIVE_STRENGTH_MED (0x2 << 5) +#define AT91_PINCTRL_DRIVE_STRENGTH_HI (0x3 << 5) + +#define AT91_PIOA 0 +#define AT91_PIOB 1 +#define AT91_PIOC 2 +#define AT91_PIOD 3 +#define AT91_PIOE 4 + +#define AT91_PERIPH_GPIO 0 +#define AT91_PERIPH_A 1 +#define AT91_PERIPH_B 2 +#define AT91_PERIPH_C 3 +#define AT91_PERIPH_D 4 + +#endif /* __DT_BINDINGS_AT91_PINCTRL_H__ */ diff --git a/include/i2c.h b/include/i2c.h index 1f5ae4538a..d500445aaf 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -701,6 +701,9 @@ extern struct i2c_bus_hose i2c_bus[]; * Initialization, must be called once on start up, may be called * repeatedly to change the speed and slave addresses. */ +#ifdef CONFIG_SYS_I2C_EARLY_INIT +void i2c_early_init_f(void); +#endif void i2c_init(int speed, int slaveaddr); void i2c_init_board(void); #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT diff --git a/include/linux/compat.h b/include/linux/compat.h index e561ee311a..7236b8d0c3 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -25,6 +25,8 @@ extern struct p_current *current; printf(fmt, ##args) #define dev_err(dev, fmt, args...) \ printf(fmt, ##args) +#define dev_warn(dev, fmt, args...) \ + printf(fmt, ##args) #define printk printf #define printk_once printf diff --git a/include/splash.h b/include/splash.h index f0755ca695..25df1cf5ad 100644 --- a/include/splash.h +++ b/include/splash.h @@ -43,6 +43,8 @@ struct splash_location { enum splash_flags flags; u32 offset; /* offset from start of storage */ char *devpart; /* Use the load command dev:part conventions */ + char *mtdpart; /* MTD partition for ubi part */ + char *ubivol; /* UBI volume-name for ubifsmount */ }; int splash_source_load(struct splash_location *locations, uint size); |
