diff options
Diffstat (limited to 'include/configs')
163 files changed, 2727 insertions, 1361 deletions
diff --git a/include/configs/SX1.h b/include/configs/SX1.h index ea09368993..93d031ca85 100644 --- a/include/configs/SX1.h +++ b/include/configs/SX1.h @@ -35,8 +35,6 @@ /* input clock of PLL */ #define CONFIG_SYS_CLK_FREQ 12000000 /* the SX1 has 12MHz input clock */ -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ @@ -140,17 +138,6 @@ #define CONFIG_SYS_HZ 1000 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index 6ad4a6befe..06adc947b0 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -49,8 +49,6 @@ /* input clock of PLL (VCMA9 has 12MHz input clock) */ #define CONFIG_SYS_CLK_FREQ 12000000 -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -191,16 +189,6 @@ #define CONFIG_IDENT_STRING "\n(c) 2003 - 2011 by MPL AG Switzerland, " \ "MEV-10080-001 " VERSION_TAG -/* - * Stack sizes - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */ -#endif - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */ diff --git a/include/configs/a320evb.h b/include/configs/a320evb.h index a2b347a828..5a8d01009a 100644 --- a/include/configs/a320evb.h +++ b/include/configs/a320evb.h @@ -39,8 +39,6 @@ /* * CPU and Board Configuration Options */ -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - #undef CONFIG_SKIP_LOWLEVEL_INIT /* @@ -105,17 +103,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */ -#endif - -/* * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) diff --git a/include/configs/actux1.h b/include/configs/actux1.h index bdd2239d8e..de29eb9ef2 100644 --- a/include/configs/actux1.h +++ b/include/configs/actux1.h @@ -105,12 +105,6 @@ 115200, 230400 } #define CONFIG_SERIAL_RTS_ACTIVE 1 -/* - * Stack sizes - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ - /* Expansion bus settings */ #define CONFIG_SYS_EXP_CS0 0xbd113842 diff --git a/include/configs/actux2.h b/include/configs/actux2.h index c55571c128..d2cc26c2a2 100644 --- a/include/configs/actux2.h +++ b/include/configs/actux2.h @@ -98,12 +98,6 @@ 115200, 230400 } #define CONFIG_SERIAL_RTS_ACTIVE 1 -/* - * Stack sizes - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ - /* Expansion bus settings */ #define CONFIG_SYS_EXP_CS0 0xbd113042 diff --git a/include/configs/actux3.h b/include/configs/actux3.h index 78ee2b598f..7165db09b0 100644 --- a/include/configs/actux3.h +++ b/include/configs/actux3.h @@ -96,13 +96,6 @@ 115200, 230400 } #define CONFIG_SERIAL_RTS_ACTIVE 1 -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ - /* Expansion bus settings */ #define CONFIG_SYS_EXP_CS0 0xbd113442 diff --git a/include/configs/actux4.h b/include/configs/actux4.h index c1105df595..c34dca2c2d 100644 --- a/include/configs/actux4.h +++ b/include/configs/actux4.h @@ -103,12 +103,6 @@ 115200, 230400 } #define CONFIG_SERIAL_RTS_ACTIVE 1 -/* - * Stack sizes - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ - /* Expansion bus settings */ #define CONFIG_SYS_EXP_CS0 0xbd113003 diff --git a/include/configs/adp-ag101.h b/include/configs/adp-ag101.h index 6bf0addcb5..b6e3844699 100644 --- a/include/configs/adp-ag101.h +++ b/include/configs/adp-ag101.h @@ -145,13 +145,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - -/* * Size of malloc() pool */ /* 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough */ diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index 747d061001..ef55e35564 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -145,13 +145,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - -/* * Size of malloc() pool */ /* 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough */ diff --git a/include/configs/adp-ag102.h b/include/configs/adp-ag102.h index 35f88cc39d..eea44db356 100644 --- a/include/configs/adp-ag102.h +++ b/include/configs/adp-ag102.h @@ -219,13 +219,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - -/* * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index 6715cb4b11..041ca219da 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -170,9 +170,4 @@ */ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) -#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ - -#ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported -#endif #endif diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index d0fbc88214..a3752bca67 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -17,32 +17,84 @@ #define __CONFIG_AM335X_EVM_H #define CONFIG_AM33XX -#define CONFIG_CMD_MEMORY /* for mtest */ -#undef CONFIG_GZIP -#undef CONFIG_ZLIB -#undef CONFIG_SYS_HUSH_PARSER -#undef CONFIG_CMD_NET #include <asm/arch/cpu.h> #include <asm/arch/hardware.h> -#define CONFIG_ENV_SIZE 0x400 -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 * 1024)) +#define CONFIG_DMA_COHERENT +#define CONFIG_DMA_COHERENT_SIZE (1 << 20) + +#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ +#define CONFIG_SYS_MALLOC_LEN (1024 << 10) +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ #define CONFIG_SYS_PROMPT "U-Boot# " #define CONFIG_SYS_NO_FLASH #define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */ #define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM +#define CONFIG_OF_LIBFDT +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +/* commands to include */ +#include <config_cmd_default.h> + #define CONFIG_CMD_ASKENV #define CONFIG_VERSION_VARIABLE /* set to negative value for no autoboot */ #define CONFIG_BOOTDELAY 3 -#define CONFIG_SYS_AUTOLOAD "no" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_EXTRA_ENV_SETTINGS \ - "verify=yes\0" \ - "ramdisk_file=ramdisk.gz\0" \ + "loadaddr=0x80200000\0" \ + "fdtaddr=0x80F80000\0" \ + "rdaddr=0x81000000\0" \ + "bootfile=/boot/uImage\0" \ + "console=ttyO0,115200n8\0" \ + "optargs=\0" \ + "mmcdev=0\0" \ + "mmcroot=/dev/mmcblk0p2 rw\0" \ + "mmcrootfstype=ext4 rootwait\0" \ + "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ + "ramrootfstype=ext2\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "bootenv=uEnv.txt\0" \ + "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ + "importbootenv=echo Importing environment from mmc ...; " \ + "env import -t $loadaddr $filesize\0" \ + "ramargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${ramroot} " \ + "rootfstype=${ramrootfstype}\0" \ + "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ + "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ + "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "bootm ${loadaddr}\0" \ + "ramboot=echo Booting from ramdisk ...; " \ + "run ramargs; " \ + "bootm ${loadaddr}\0" \ + +#define CONFIG_BOOTCOMMAND \ + "if mmc rescan ${mmcdev}; then " \ + "echo SD/MMC found on device ${mmcdev};" \ + "if run loadbootenv; then " \ + "echo Loaded environment from ${bootenv};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run loaduimage; then " \ + "run mmcboot;" \ + "fi;" \ + "fi;" \ /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ @@ -82,14 +134,21 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 +#define CONFIG_SPI +#define CONFIG_OMAP3_SPI +#define CONFIG_MTD_DEVICE +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_SPEED (24000000) + /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ -#define PHYS_DRAM_1_SIZE 0x10000000 /*(0x80000000 / 8) 256 MB */ #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ +#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ GENERATED_GBL_DATA_SIZE) /* Platform/Board specific defs */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ @@ -109,7 +168,15 @@ #define CONFIG_HARD_I2C #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_I2C_MULTI_BUS #define CONFIG_DRIVER_OMAP24XX_I2C +#define CONFIG_CMD_EEPROM +#define CONFIG_ENV_EEPROM_IS_ON_I2C +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_I2C_MULTI_EEPROMS + +#define CONFIG_OMAP_GPIO #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \ @@ -128,7 +195,7 @@ #define CONFIG_SPL #define CONFIG_SPL_TEXT_BASE 0x402F0400 #define CONFIG_SPL_MAX_SIZE (46 * 1024) -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK +#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ @@ -145,6 +212,7 @@ #define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_YMODEM_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" @@ -165,7 +233,21 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #endif -/* Unsupported features */ -#undef CONFIG_USE_IRQ +#define CONFIG_CMD_NET +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING +#define CONFIG_DRIVER_TI_CPSW +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI +#define CONFIG_PHY_GIGE +#define CONFIG_PHYLIB +#define CONFIG_PHY_SMSC #endif /* ! __CONFIG_AM335X_EVM_H */ diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index 54ab3ebd3f..f24b44d5e8 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -47,7 +47,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ @@ -256,13 +255,6 @@ #define CONFIG_SYS_HZ 1000 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index ed0a601df2..95f8d78854 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -47,7 +47,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ @@ -253,13 +252,6 @@ #define CONFIG_SYS_HZ 1000 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ diff --git a/include/configs/apollon.h b/include/configs/apollon.h index aebca71ec3..b8ca8a849f 100644 --- a/include/configs/apollon.h +++ b/include/configs/apollon.h @@ -66,7 +66,6 @@ /* the OMAP2420 H4 has 12MHz, 13MHz, or 19.2Mhz crystal input */ #define CONFIG_SYS_CLK_FREQ V_SCLK -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ @@ -207,13 +206,6 @@ #define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE SZ_128K /* regular stack */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* CS1 may or may not be populated */ diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h new file mode 100644 index 0000000000..af0b714e11 --- /dev/null +++ b/include/configs/apx4devkit.h @@ -0,0 +1,236 @@ +/* + * Copyright (C) 2012 Bluegiga Technologies Oy + * + * Authors: + * Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com> + * Lauri Hintsala <lauri.hintsala@bluegiga.com> + * + * Based on m28evk.h: + * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> + * on behalf of DENX Software Engineering GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* SoC configurations */ +#define CONFIG_MX28 /* i.MX28 SoC */ +#define CONFIG_MXS_GPIO /* GPIO control */ +#define CONFIG_SYS_HZ 1000 /* Ticks per second */ + +#define MACH_TYPE_APX4DEVKIT 3712 +#define CONFIG_MACH_TYPE MACH_TYPE_APX4DEVKIT + +#include <asm/arch/regs-base.h> + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_ARCH_CPU_INIT +#define CONFIG_ARCH_MISC_INIT + +/* SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_NO_CPU_SUPPORT_CODE +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT + +/* U-Boot Commands */ +#include <config_cmd_default.h> +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DOS_PARTITION + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_MMC +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NET +#define CONFIG_CMD_NFS +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVEENV +#define CONFIG_CMD_USB + +/* Memory configurations */ +#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ +#define PHYS_SDRAM_1 0x40000000 /* Base address */ +#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ +#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ +#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ +#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +/* Point initial SP in SRAM so SPL can use it too. */ +#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 +#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* + * We need to sacrifice first 4 bytes of RAM here to avoid triggering some + * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot + * binary. In case there was more of this mess, 0x100 bytes are skipped. + */ +#define CONFIG_SYS_TEXT_BASE 0x40000100 + +#define CONFIG_ENV_OVERWRITE + +/* U-Boot general configurations */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) + /* Print buffer size */ +#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + /* Boot argument buffer size */ +#define CONFIG_VERSION_VARIABLE /* U-Boot version */ +#define CONFIG_AUTO_COMPLETE /* Command auto complete */ +#define CONFIG_CMDLINE_EDITING /* Command history etc. */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_OF_LIBFDT +#define CONFIG_ENV_IS_IN_NAND + +/* Serial Driver */ +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_CLOCK 24000000 +#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } +#define CONFIG_CONS_INDEX 0 +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* DMA */ +#define CONFIG_APBH_DMA + +/* MMC Driver */ +#ifdef CONFIG_ENV_IS_IN_MMC +#define CONFIG_ENV_OFFSET (256 * 1024) +#define CONFIG_ENV_SIZE (16 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#endif + +#ifdef CONFIG_CMD_MMC +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC_BOUNCE_BUFFER +#define CONFIG_MXS_MMC +#endif + +/* NAND Driver */ +#ifdef CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SECT_SIZE (128 * 1024) +#define CONFIG_ENV_SIZE (128 * 1024) +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE +#define CONFIG_ENV_RANGE (384 * 1024) +#define CONFIG_ENV_OFFSET 0x120000 +#define CONFIG_ENV_OFFSET_REDUND \ + (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) +#endif + +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_MXS +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x60000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE + +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define MTDIDS_DEFAULT "nand0=gpmi-nand" +#define MTDPARTS_DEFAULT \ + "mtdparts=gpmi-nand:128k(bootstrap),1024k(boot),768k(env),-(root)" +#else +#define MTDPARTS_DEFAULT "" +#endif + +/* Ethernet on SOC (FEC) */ +#ifdef CONFIG_CMD_NET +#define CONFIG_NET_MULTI +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC +#define CONFIG_FEC_MXC_PHYADDR 0 +#define IMX_FEC_BASE MXS_ENET0_BASE +#define CONFIG_MII +#define CONFIG_DISCOVER_PHY +#define CONFIG_FEC_XCV_TYPE RMII +#endif + +/* USB */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MXS +#define CONFIG_EHCI_MXS_PORT 1 +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#endif + +/* I2C */ +#ifdef CONFIG_CMD_I2C +#define CONFIG_I2C_MXS +#define CONFIG_HARD_I2C +#define CONFIG_SYS_I2C_SPEED 400000 +#endif + +/* RTC */ +#if defined(CONFIG_CMD_DATE) +#define CONFIG_RTC_PCF8563 +#define CONFIG_SYS_I2C_RTC_ADDR 0x51 +#endif + +/* Boot Linux */ +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTDELAY 1 +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_BOOTCOMMAND "run bootcmd_nand" +#define CONFIG_LOADADDR 0x41000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SERIAL_TAG +#define CONFIG_REVISION_TAG + +/* Extra Environments */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "verify=no\0" \ + "bootcmd=run bootcmd_nand\0" \ + "kernelargs=console=tty0 console=ttyAMA0,115200 consoleblank=0\0" \ + "bootargs_nand=" \ + "setenv bootargs ${kernelargs} ubi.mtd=3,2048 " \ + "root=ubi0:rootfs rootfstype=ubifs ${mtdparts} rw\0" \ + "bootcmd_nand=" \ + "run bootargs_nand && ubi part root 2048 && " \ + "ubifsmount rootfs && ubifsload 41000000 boot/uImage && " \ + "bootm 41000000\0" \ + "bootargs_mmc=" \ + "setenv bootargs ${kernelargs} " \ + "root=/dev/mmcblk0p2 rootwait ${mtdparts} rw\0" \ + "bootcmd_mmc=" \ + "run bootargs_mmc && mmc rescan && " \ + "ext2load mmc 0:2 41000000 boot/uImage && bootm 41000000\0" \ +"" + +#endif /* __CONFIG_H */ diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index 2abcaffeef..bf20065afd 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -224,7 +224,4 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_STACKSIZE SZ_32K /* regular stack */ -#define CONFIG_STACKSIZE_IRQ SZ_4K /* Unsure if to big or to small*/ -#define CONFIG_STACKSIZE_FIQ SZ_4K /* Unsure if to big or to small*/ #endif /* __AT91RM9200EK_CONFIG_H__ */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index ef25fa5e0c..f921fac64d 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -55,7 +55,6 @@ /* Misc CPU related */ #define CONFIG_ARCH_CPU_INIT -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -237,10 +236,4 @@ */ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) -#define CONFIG_STACKSIZE (32*1024) /* regular stack */ - -#ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported -#endif - #endif diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 014437b5e0..1e1fbe56d7 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -40,9 +40,6 @@ #include <asm/hardware.h> -#define CONFIG_ARCH_CPU_INIT -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -239,10 +236,4 @@ */ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) -#define CONFIG_STACKSIZE (32*1024) /* regular stack */ - -#ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported -#endif - #endif diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 4309f71f16..9421b5373c 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -47,7 +47,6 @@ #define CONFIG_AT91SAM9263EK 1 /* It's an AT91SAM9263EK Board */ #define CONFIG_ARCH_CPU_INIT -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 @@ -165,7 +164,7 @@ "update=" \ "protect off ${monitor_base} +${filesize};" \ "erase ${monitor_base} +${filesize};" \ - "cp.b ${load_addr} ${monitor_base} ${filesize};" \ + "cp.b ${fileaddr} ${monitor_base} ${filesize};" \ "protect on ${monitor_base} +${filesize}\0" #ifndef CONFIG_SKIP_LOWLEVEL_INIT @@ -353,8 +352,4 @@ */ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) -#define CONFIG_STACKSIZE (32*1024) /* regular stack */ - -#undef CONFIG_USE_IRQ - #endif diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 1d5fc8f73e..4ca280a7ff 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -39,8 +39,6 @@ #define CONFIG_AT91SAM9M10G45EK #define CONFIG_AT91FAMILY -#define CONFIG_ARCH_CPU_INIT -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS @@ -179,10 +177,4 @@ */ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) -#define CONFIG_STACKSIZE (32*1024) /* regular stack */ - -#ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported -#endif - #endif diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index c5952e9319..8178b32a84 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -41,7 +41,6 @@ #define CONFIG_ARCH_CPU_INIT #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_BOARD_EARLY_INIT_F -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 @@ -189,8 +188,4 @@ */ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) -#define CONFIG_STACKSIZE (32*1024) /* regular stack */ - -#undef CONFIG_USE_IRQ - #endif diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h new file mode 100644 index 0000000000..1ceb31a0f4 --- /dev/null +++ b/include/configs/at91sam9x5ek.h @@ -0,0 +1,200 @@ +/* + * Copyright (C) 2012 Atmel Corporation + * + * Configuation settings for the AT91SAM9X5EK board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H__ +#define __CONFIG_H__ + +#include <asm/hardware.h> + +/* ARM asynchronous clock */ +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 +#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_AT91SAM9X5EK +#define CONFIG_AT91FAMILY + +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_DISPLAY_CPUINFO + +/* general purpose I/O */ +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ +#define CONFIG_AT91_GPIO + +/* serial console */ +#define CONFIG_ATMEL_USART +#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CONFIG_USART_ID ATMEL_ID_SYS + +/* LCD */ +#define CONFIG_LCD +#define LCD_BPP LCD_COLOR16 +#define LCD_OUTPUT_BPP 24 +#define CONFIG_LCD_LOGO +#undef LCD_TEST_PATTERN +#define CONFIG_LCD_INFO +#define CONFIG_LCD_INFO_BELOW_LOGO +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_ATMEL_HLCD +#define CONFIG_ATMEL_LCD_RGB565 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV + +#define CONFIG_BOOTDELAY 3 + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NAND +#define CONFIG_CMD_SF + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ + +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) + +/* DataFlash */ +#ifdef CONFIG_CMD_SF +#define CONFIG_ATMEL_SPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_ATMEL +#define CONFIG_SF_DEFAULT_SPEED 30000000 +#endif + +/* no NOR flash */ +#define CONFIG_SYS_NO_FLASH + +/* NAND flash */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_DBW_8 1 +/* our ALE is AD21 */ +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +/* our CLE is AD22 */ +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 + +/* PMECC & PMERRLOC */ +#define CONFIG_ATMEL_NAND_HWECC 1 +#define CONFIG_ATMEL_NAND_HW_PMECC 1 +#define CONFIG_PMECC_CAP 2 +#define CONFIG_PMECC_SECTOR_SIZE 512 +#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000 + +#define CONFIG_MTD_DEVICE +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#endif + +/* Ethernet */ +#define CONFIG_MACB +#define CONFIG_RMII +#define CONFIG_NET_RETRY_COUNT 20 +#define CONFIG_MACB_SEARCH_PHY + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END 0x26e00000 + +#ifdef CONFIG_SYS_USE_NANDFLASH +/* bootstrap + u-boot + env + linux in nandflash */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET 0xc0000 +#define CONFIG_ENV_OFFSET_REDUND 0x100000 +#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ +#define CONFIG_BOOTCOMMAND "nand read " \ + "0x22000000 0x200000 0x300000; " \ + "bootm 0x22000000" +#else +#ifdef CONFIG_SYS_USE_SPIFLASH +/* bootstrap + u-boot + env + linux in spi flash */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x5000 +#define CONFIG_ENV_SIZE 0x3000 +#define CONFIG_ENV_SECT_SIZE 0x1000 +#define CONFIG_ENV_SPI_MAX_HZ 30000000 +#define CONFIG_BOOTCOMMAND "sf probe 0; " \ + "sf read 0x22000000 0x100000 0x300000; " \ + "bootm 0x22000000" +#endif +#endif + +#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \ + "mtdparts=atmel_nand:" \ + "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ + "root=/dev/mtdblock1 rw " \ + "rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs" + +#define CONFIG_BAUDRATE 115200 + +#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \ + + 16) +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_HUSH_PARSER + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) + +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif diff --git a/include/configs/balloon3.h b/include/configs/balloon3.h index 97fdc2c9c6..756f40956b 100644 --- a/include/configs/balloon3.h +++ b/include/configs/balloon3.h @@ -102,15 +102,6 @@ #define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */ /* - * Stack sizes - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/* * DRAM Map */ #define CONFIG_NR_DRAM_BANKS 3 /* 2 banks of DRAM */ diff --git a/include/configs/ca9x4_ct_vxp.h b/include/configs/ca9x4_ct_vxp.h index 14b81460b7..312fd947be 100644 --- a/include/configs/ca9x4_ct_vxp.h +++ b/include/configs/ca9x4_ct_vxp.h @@ -105,13 +105,6 @@ #define LINUX_BOOT_PARAM_ADDR 0x60000200 #define CONFIG_BOOTDELAY 2 -/* Stack sizes are set up in start.S using the settings below */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */ -#endif - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 0x60000000 /* SDRAM Bank #1 */ diff --git a/include/configs/calimain.h b/include/configs/calimain.h index e31e40b9fe..5c2b35d584 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -161,7 +161,6 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (16 << 20)) #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256*1024) /* regular stack */ /* * Serial Driver info @@ -352,6 +351,7 @@ #define CONFIG_SYS_INIT_SP_ADDR (0x8001ff00) #define CONFIG_BOOTCOUNT_LIMIT +#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ #define CONFIG_SYS_BOOTCOUNT_ADDR DAVINCI_RTC_BASE #ifndef __ASSEMBLY__ diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index 771ac9c3b1..91ab812840 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -146,7 +146,6 @@ #define CONFIG_MX_CYCLIC /* U-Boot general configuration */ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_PROMPT "cam_enc_4xx> " /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ @@ -191,7 +190,6 @@ #define CONFIG_TIMESTAMP /* U-Boot memory configuration */ -#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */ #define CONFIG_SYS_MEMTEST_START 0x80000000 /* physical address */ #define CONFIG_SYS_MEMTEST_END 0x81000000 /* test 16MB RAM */ diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h index 408e91832b..d2fd72a4a5 100644 --- a/include/configs/cm4008.h +++ b/include/configs/cm4008.h @@ -31,8 +31,6 @@ #define CONFIG_KS8695 1 /* it is a KS8695 CPU */ #define CONFIG_CM4008 1 /* it is an OpenGear CM4008 boad */ -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 @@ -96,17 +94,6 @@ #define CONFIG_SYS_HZ (1000) /* 1ms resolution ticks */ /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h index d85a6001a2..0e7a217433 100644 --- a/include/configs/cm41xx.h +++ b/include/configs/cm41xx.h @@ -31,8 +31,6 @@ #define CONFIG_KS8695 1 /* it is a KS8695 CPU */ #define CONFIG_CM41xx 1 /* it is an OpenGear CM41xx boad */ -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 @@ -96,17 +94,6 @@ #define CONFIG_SYS_HZ (1000) /* 1ms resolution ticks */ /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index ee4bce5d34..46c556ddc8 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -37,6 +37,7 @@ */ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP34XX /* which is a 34XX */ +#define CONFIG_OMAP_GPIO #define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */ #define CONFIG_SYS_TEXT_BASE 0x80008000 @@ -56,7 +57,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_OF_LIBFDT 1 @@ -278,13 +278,6 @@ #define CONFIG_SYS_HZ 1000 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */ diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 1f02f3feef..ae84344e47 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -117,17 +117,6 @@ #define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */ /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */ -#endif - -/* * DRAM Map */ #define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */ diff --git a/include/configs/cpu9260.h b/include/configs/cpu9260.h index a877066c4b..d65415a62c 100644 --- a/include/configs/cpu9260.h +++ b/include/configs/cpu9260.h @@ -51,7 +51,6 @@ #define CONFIG_AT91FAMILY #define CONFIG_ARCH_CPU_INIT -#undef CONFIG_USE_IRQ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_BOARD_EARLY_INIT_F @@ -511,10 +510,4 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_STACKSIZE (32 * 1024) - -#if defined(CONFIG_USE_IRQ) -#error CONFIG_USE_IRQ not supported -#endif - #endif diff --git a/include/configs/cpuat91.h b/include/configs/cpuat91.h index dc676dffdb..15d56c346d 100644 --- a/include/configs/cpuat91.h +++ b/include/configs/cpuat91.h @@ -46,7 +46,6 @@ #define CONFIG_ARM920T #define CONFIG_AT91RM9200 #define CONFIG_CPUAT91 -#undef CONFIG_USE_IRQ #define USE_920T_MMU #include <asm/hardware.h> /* needed for port definitions */ @@ -211,15 +210,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_STACKSIZE (32 * 1024) -#define CONFIG_STACKSIZE_IRQ (4 * 1024) -#define CONFIG_STACKSIZE_FIQ (4 * 1024) - - -#if defined(CONFIG_USE_IRQ) -#error CONFIG_USE_IRQ not supported -#endif - #define CONFIG_DEVICE_NULLDEV #define CONFIG_SILENT_CONSOLE diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h index 51dc6643d9..f7ac256a0f 100644 --- a/include/configs/da830evm.h +++ b/include/configs/da830evm.h @@ -53,7 +53,6 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ (32 << 20)) #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256*1024) /* regular stack */ /* * Serial Driver info @@ -157,7 +156,6 @@ /* * U-Boot general configuration */ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #undef CONFIG_MISC_INIT_R #undef CONFIG_BOOTDELAY #define CONFIG_BOOTFILE "uImage" /* Boot file name */ diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index e6adb1fe51..09a9660929 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -27,7 +27,10 @@ * Board */ #define CONFIG_DRIVER_TI_EMAC +/* check if direct NOR boot config is used */ +#ifndef CONFIG_DIRECT_NOR_BOOT #define CONFIG_USE_SPIFLASH +#endif /* @@ -43,10 +46,19 @@ #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) #define CONFIG_SYS_HZ 1000 -#define CONFIG_SYS_TEXT_BASE 0xc1080000 #define CONFIG_SYS_DA850_PLL_INIT #define CONFIG_SYS_DA850_DDR_INIT +#ifdef CONFIG_DIRECT_NOR_BOOT +#define CONFIG_ARCH_CPU_INIT +#define CONFIG_DA8XX_GPIO +#define CONFIG_SYS_TEXT_BASE 0x60000000 +#define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11) +#define CONFIG_DA850_LOWLEVEL +#else +#define CONFIG_SYS_TEXT_BASE 0xc1080000 +#endif + /* * Memory Info */ @@ -62,7 +74,6 @@ #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256*1024) /* regular stack */ #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ @@ -154,6 +165,16 @@ #define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#ifdef CONFIG_USE_SPIFLASH +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 +#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000 +#endif + /* * I2C Configuration */ @@ -182,6 +203,32 @@ #define CONFIG_SYS_ALE_MASK 0x8 #undef CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x28000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000 +#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST +#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \ + CONFIG_SYS_NAND_U_BOOT_SIZE - \ + CONFIG_SYS_MALLOC_LEN - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_NAND_ECCPOS { \ + 24, 25, 26, 27, 28, \ + 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \ + 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \ + 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \ + 59, 60, 61, 62, 63 } +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 10 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_NAND_LOAD #endif /* @@ -311,13 +358,28 @@ #undef CONFIG_CMD_ENV #endif +/* SD/MMC configuration */ +#ifndef CONFIG_USE_NOR +#define CONFIG_MMC +#define CONFIG_DAVINCI_MMC_SD1 +#define CONFIG_GENERIC_MMC +#define CONFIG_DAVINCI_MMC +#endif + +/* + * Enable MMC commands only when + * MMC support is present + */ +#ifdef CONFIG_MMC +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_MMC +#endif + +#ifndef CONFIG_DIRECT_NOR_BOOT /* defines for SPL */ #define CONFIG_SPL -#define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT -#define CONFIG_SPL_SPI_LOAD -#define CONFIG_SPL_SPI_BUS 0 -#define CONFIG_SPL_SPI_CS 0 #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT @@ -325,11 +387,25 @@ #define CONFIG_SPL_STACK 0x8001ff00 #define CONFIG_SPL_TEXT_BASE 0x80000000 #define CONFIG_SPL_MAX_SIZE 32768 -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 -#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000 +#endif + +/* Load U-Boot Image From MMC */ +#ifdef CONFIG_SPL_MMC_LOAD +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_FAT_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SYS_MMC_U_BOOT_OFFS 0x75 +#define CONFIG_SYS_MMC_U_BOOT_SIZE 0x30000 +#undef CONFIG_SPL_SPI_LOAD +#endif /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 + +#ifdef CONFIG_DIRECT_NOR_BOOT +#define CONFIG_SYS_INIT_SP_ADDR 0x8001ff00 +#else #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ GENERATED_GBL_DATA_SIZE) +#endif /* CONFIG_DIRECT_NOR_BOOT */ #endif /* __CONFIG_H */ diff --git a/include/configs/davinci_dm355evm.h b/include/configs/davinci_dm355evm.h index a30d24c29b..de795a2ae2 100644 --- a/include/configs/davinci_dm355evm.h +++ b/include/configs/davinci_dm355evm.h @@ -131,7 +131,6 @@ #define CONFIG_MX_CYCLIC /* U-Boot general configuration */ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_PROMPT "DM355 EVM # " /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ @@ -170,7 +169,6 @@ #define CONFIG_NET_RETRY_COUNT 10 /* U-Boot memory configuration */ -#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */ #define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */ #define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */ diff --git a/include/configs/davinci_dm355leopard.h b/include/configs/davinci_dm355leopard.h index 1cd3d2eae7..88e6673837 100644 --- a/include/configs/davinci_dm355leopard.h +++ b/include/configs/davinci_dm355leopard.h @@ -99,7 +99,6 @@ #define CONFIG_MX_CYCLIC /* U-Boot general configuration */ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_PROMPT "DM355 LEOPARD # " #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ @@ -130,7 +129,6 @@ #define CONFIG_NET_RETRY_COUNT 10 /* U-Boot memory configuration */ -#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */ #define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */ #define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */ diff --git a/include/configs/davinci_dm365evm.h b/include/configs/davinci_dm365evm.h index bcf10ca55e..6a331aa9f5 100644 --- a/include/configs/davinci_dm365evm.h +++ b/include/configs/davinci_dm365evm.h @@ -165,7 +165,6 @@ #define CONFIG_MX_CYCLIC /* U-Boot general configuration */ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_PROMPT "DM36x EVM # " /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ @@ -202,7 +201,6 @@ #define CONFIG_TIMESTAMP /* U-Boot memory configuration */ -#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */ #define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */ #define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */ diff --git a/include/configs/davinci_dm6467evm.h b/include/configs/davinci_dm6467evm.h index 6734ea3190..366c77f010 100644 --- a/include/configs/davinci_dm6467evm.h +++ b/include/configs/davinci_dm6467evm.h @@ -54,7 +54,6 @@ extern unsigned int davinci_arm_clk_get(void); #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE (256 << 20) /* DDR size 256MB */ @@ -108,7 +107,6 @@ extern unsigned int davinci_arm_clk_get(void); #endif /* U-Boot general configuration */ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_PROMPT "DM6467 EVM > " /* Monitor Command Prompt */ diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index e4443ec89e..ab9cedd077 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -74,7 +74,6 @@ #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */ #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256*1024) /* regular stack */ #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE 0x10000000 /* DDR size 256MB */ @@ -157,7 +156,6 @@ /*==============================*/ /* U-Boot general configuration */ /*==============================*/ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #define CONFIG_MISC_INIT_R #undef CONFIG_BOOTDELAY #define CONFIG_BOOTFILE "uImage" /* Boot file name */ diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h index 93df4ffe3c..8eb7af921c 100644 --- a/include/configs/davinci_schmoogie.h +++ b/include/configs/davinci_schmoogie.h @@ -44,7 +44,6 @@ #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */ #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256*1024) /* regular stack */ #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ #define DDR_4BANKS /* 4-bank DDR2 (128MB) */ @@ -101,7 +100,6 @@ /*==============================*/ /* U-Boot general configuration */ /*==============================*/ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #define CONFIG_MISC_INIT_R #undef CONFIG_BOOTDELAY #define CONFIG_BOOTFILE "uImage" /* Boot file name */ diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 23b0ba7003..958b19ad30 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -44,7 +44,6 @@ #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */ #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256*1024) /* regular stack */ #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ #define DDR_4BANKS /* 4-bank DDR2 (128MB) */ @@ -88,7 +87,6 @@ #define CONFIG_SYS_I2C_PCA9543_ADDR_LEN 0 /* Single register. */ #define CONFIG_SYS_I2C_PCA9543_ENABLE_CH0 0x01 /* Enable channel 0. */ /* U-Boot general configuration */ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #define CONFIG_MISC_INIT_R #define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds. */ #define CONFIG_BOOTFILE "uImage" /* Boot file name */ diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index 36a8c0668a..3d8d392e87 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -76,7 +76,6 @@ #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */ #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256*1024) /* regular stack */ #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ #define DDR_4BANKS /* 4-bank DDR2 (128MB) */ @@ -147,7 +146,6 @@ /*==============================*/ /* U-Boot general configuration */ /*==============================*/ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #define CONFIG_MISC_INIT_R #undef CONFIG_BOOTDELAY #define CONFIG_BOOTFILE "uImage" /* Boot file name */ diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 9f15ffb0fd..18d7374ba9 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -41,7 +41,6 @@ * Memory configurations */ #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_STACKSIZE SZ_32K #define CONFIG_SYS_MALLOC_LEN SZ_1M #define CONFIG_SYS_GBL_DATA_SIZE 128 #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 037a5bb326..de75dafc97 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -36,6 +36,8 @@ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ #define CONFIG_OMAP3_DEVKIT8000 1 /* working with DevKit8000 */ #define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000 +#define CONFIG_OMAP_GPIO + /* * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM * 64 bytes before this address should be set aside for u-boot.img's @@ -57,7 +59,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ @@ -274,9 +275,6 @@ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ #define CONFIG_SYS_HZ 1000 -/* The stack sizes are set up in start.S using the settings below */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 @@ -313,6 +311,7 @@ #define CONFIG_SPL_I2C_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_MMC_SUPPORT diff --git a/include/configs/dig297.h b/include/configs/dig297.h index 4845d5198a..dda758269a 100644 --- a/include/configs/dig297.h +++ b/include/configs/dig297.h @@ -45,6 +45,7 @@ */ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP34XX /* which is a 34XX */ +#define CONFIG_OMAP_GPIO #define CONFIG_SYS_TEXT_BASE 0x80008000 @@ -63,7 +64,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ @@ -259,17 +259,6 @@ #define CONFIG_SYS_HZ 1000 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ -#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ -#endif - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ diff --git a/include/configs/dvlhost.h b/include/configs/dvlhost.h index 4eda91e7f4..a2af1e37fe 100644 --- a/include/configs/dvlhost.h +++ b/include/configs/dvlhost.h @@ -104,13 +104,6 @@ 115200, 230400 } #define CONFIG_SERIAL_RTS_ACTIVE 1 -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ - /* Expansion bus settings */ #define CONFIG_SYS_EXP_CS0 0xbd113442 diff --git a/include/configs/ea20.h b/include/configs/ea20.h index a9caa814d5..337d504923 100644 --- a/include/configs/ea20.h +++ b/include/configs/ea20.h @@ -65,7 +65,6 @@ #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256*1024) /* regular stack */ /* * Serial Driver info diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index 4d8be2b01e..d4104de5f2 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -61,8 +61,6 @@ #define CONFIG_SYS_PBSIZE \ (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_STACKSIZE (32*1024) /* regular stack */ - /* * ARM asynchronous clock */ diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 6a67aa572c..f0fb48828a 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -228,7 +228,6 @@ #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_STACKSIZE 0x00100000 #define CONFIG_SYS_LOAD_ADDR 0x00800000 #define CONFIG_SYS_MEMTEST_START 0x00400000 #define CONFIG_SYS_MEMTEST_END 0x007fffff diff --git a/include/configs/enbw_cmc.h b/include/configs/enbw_cmc.h index 3fc07e672a..e2e0d5c2d0 100644 --- a/include/configs/enbw_cmc.h +++ b/include/configs/enbw_cmc.h @@ -71,7 +71,6 @@ #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256*1024) /* regular stack */ /* * Serial Driver info @@ -458,6 +457,7 @@ #define CONFIG_BOOTCOUNT_LIMIT #define CONFIG_SYS_BOOTCOUNT_ADDR DAVINCI_RTC_BASE +#define CONFIG_SYS_BOOTCOUNT_BE #define CONFIG_SYS_NAND_U_BOOT_DST 0xc0080000 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x60004000 diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index f89e9ead92..14a0f02c5e 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -48,13 +48,12 @@ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ #define CONFIG_SYS_HZ 1000 -#undef CONFIG_USE_IRQ /* Running w/o interrupts */ /* 32kB internal SRAM */ #define CONFIG_SRAM_BASE 0x00300000 /*AT91SAM9XE_SRAM_BASE */ #define CONFIG_SRAM_SIZE (32 << 10) -#define CONFIG_STACKSIZE (CONFIG_SRAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SRAM_BASE + CONFIG_STACKSIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) /* 128MB SDRAM in 1 bank */ #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/flea3.h b/include/configs/flea3.h index 46939d4356..4350518939 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -146,14 +146,6 @@ #define CONFIG_SYS_HZ 1000 - -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - /* * Physical Memory Map */ diff --git a/include/configs/harmony.h b/include/configs/harmony.h index df5265a5a0..d0555c1630 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -25,24 +25,24 @@ #define __CONFIG_H #include <asm/sizes.h> -#include "tegra2-common.h" +#include "tegra20-common.h" /* Enable fdt support for Harmony. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-harmony +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-harmony #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE /* High-level configuration options */ -#define V_PROMPT "Tegra2 (Harmony) # " -#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Harmony" +#define V_PROMPT "Tegra20 (Harmony) # " +#define CONFIG_TEGRA20_BOARD_STRING "NVIDIA Harmony" /* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTD +#define CONFIG_TEGRA20_ENABLE_UARTD /* UARTD: keyboard satellite board UART, default */ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -#ifdef CONFIG_TEGRA2_ENABLE_UARTA +#ifdef CONFIG_TEGRA20_ENABLE_UARTA /* UARTA: debug board UART */ #define CONFIG_SYS_NS16550_COM2 NV_PA_APB_UARTA_BASE #endif @@ -80,6 +80,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP -#include "tegra2-common-post.h" +#include "tegra20-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h index c6e9ce5576..73ab4c8375 100644 --- a/include/configs/hawkboard.h +++ b/include/configs/hawkboard.h @@ -43,6 +43,7 @@ #define CONFIG_SYS_HZ 1000 #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_AIS_CONFIG_FILE "board/$(BOARDDIR)/hawkboard-ais-nand.cfg" #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ DAVINCI_SYSCFG_SUSPSRC_EMAC | \ @@ -86,7 +87,6 @@ #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024) #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256*1024) /* regular stack */ /* * Serial Driver info @@ -136,7 +136,7 @@ #define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) #define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000 #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \ @@ -157,6 +157,16 @@ #endif /* CONFIG_SYS_USE_NAND */ +/* USB Configs */ +#define CONFIG_SYS_USB_OHCI_CPU_INIT +#define CONFIG_USB_OHCI_NEW +#define CONFIG_USB_OHCI_DA8XX +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x01E25000 +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "hawkboard" + /* * U-Boot general configuration */ @@ -199,6 +209,8 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES #define CONFIG_CMD_MEMORY +#define CONFIG_CMD_USB +#define CONFIG_CMD_EXT2 #ifdef CONFIG_CMD_BDI #define CONFIG_CLOCKS diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 791f3f5468..62cc08cebd 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -41,6 +41,8 @@ #define CONFIG_BAUDRATE 38400 #define CONFIG_BOOTCOUNT_LIMIT +#define CONFIG_SYS_BOOTCOUNT_SINGLEWORD +#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ #define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c #define CONFIG_MISC_INIT_R @@ -93,17 +95,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x800000 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h index 88e2e3a1d5..5468a1a210 100644 --- a/include/configs/igep00x0.h +++ b/include/configs/igep00x0.h @@ -30,6 +30,7 @@ */ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ +#define CONFIG_OMAP_GPIO #define CONFIG_SDRC /* The chip has SDRC controller */ @@ -105,7 +106,12 @@ #define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_I2C /* I2C serial bus support */ #define CONFIG_CMD_MMC /* MMC support */ +#ifdef CONFIG_BOOT_ONENAND #define CONFIG_CMD_ONENAND /* ONENAND support */ +#endif +#ifdef CONFIG_BOOT_NAND +#define CONFIG_CMD_NAND +#endif #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING @@ -135,14 +141,14 @@ "usbtty=cdc_acm\0" \ "loadaddr=0x82000000\0" \ "usbtty=cdc_acm\0" \ - "console=ttyS2,115200n8\0" \ + "console=ttyO2,115200n8\0" \ "mpurate=auto\0" \ "vram=12M\0" \ "dvimode=1024x768MR-16@60\0" \ "defaultdisplay=dvi\0" \ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ - "mmcrootfstype=ext3 rootwait\0" \ + "mmcrootfstype=ext4 rootwait\0" \ "nandroot=/dev/mtdblock4 rw\0" \ "nandrootfstype=jffs2\0" \ "mmcargs=setenv bootargs console=${console} " \ @@ -225,13 +231,6 @@ #define CONFIG_SYS_HZ 1000 /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/* * Physical Memory Map * */ @@ -244,6 +243,7 @@ * FLASH and environment organization */ +#ifdef CONFIG_BOOT_ONENAND #define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */ #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP @@ -253,6 +253,19 @@ #define CONFIG_ENV_IS_IN_ONENAND 1 #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ #define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET +#endif + +#ifdef CONFIG_BOOT_NAND +#define PISMO1_NAND_SIZE GPMC_SIZE_128M /* Configure the PISMO */ +#define CONFIG_NAND_OMAP_GPMC +#define CONFIG_SYS_NAND_BASE NAND_BASE +#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 +#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ +#define CONFIG_ENV_ADDR NAND_ENV_OFFSET +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#endif /* * Size of malloc() pool @@ -268,6 +281,11 @@ #define CONFIG_SMC911X_BASE 0x2C000000 #endif /* (CONFIG_CMD_NET) */ +/* + * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader + * and older u-boot.bin with the new U-Boot SPL. + */ +#define CONFIG_SYS_TEXT_BASE 0x80008000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 @@ -275,4 +293,64 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) +/* SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_TEXT_BASE 0x40200800 +#define CONFIG_SPL_MAX_SIZE (54 * 1024) +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK + +/* move malloc and bss high to prevent clashing with the main image */ +#define CONFIG_SYS_SPL_MALLOC_START 0x87000000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 +#define CONFIG_SPL_BSS_START_ADDR 0x87080000 /* end of minimum RAM */ +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ + +/* MMC boot config */ +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ +#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_FAT_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT + +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" + +#ifdef CONFIG_BOOT_ONENAND +#define CONFIG_SPL_ONENAND_SUPPORT + +/* OneNAND boot config */ +#define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000 +#define CONFIG_SYS_ONENAND_PAGE_SIZE 2048 +#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000 +#define CONFIG_SPL_ONENAND_LOAD_SIZE \ + (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR) + +#endif + +#ifdef CONFIG_BOOT_NAND +#define CONFIG_SPL_NAND_SUPPORT + +/* NAND boot config */ +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ + 10, 11, 12, 13} +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 3 +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +#endif + #endif /* __IGEP00X0_H */ diff --git a/include/configs/ima3-mx53.h b/include/configs/ima3-mx53.h index 17fa4a13d3..567061aee3 100644 --- a/include/configs/ima3-mx53.h +++ b/include/configs/ima3-mx53.h @@ -133,9 +133,6 @@ #define CONFIG_SYS_HZ 1000 #define CONFIG_CMDLINE_EDITING -/* Stack sizes */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_BASE_ADDR diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 7d2876b9c5..a2853a7ef9 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -94,7 +94,6 @@ #define CONFIG_SYS_MEMTEST_START 0xA0000000 #define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256 * 1024) /* regular stack */ #define PHYS_SDRAM_1 0xA0000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ @@ -162,6 +161,11 @@ #define CONFIG_DOS_PARTITION /* + * GPIO + */ +#define CONFIG_MXC_GPIO + +/* * MTD partitions */ #define CONFIG_CMD_MTDPARTS diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h index a340e97f00..8cca478578 100644 --- a/include/configs/imx31_litekit.h +++ b/include/configs/imx31_litekit.h @@ -139,13 +139,6 @@ #define CONFIG_CMDLINE_EDITING 1 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h index a412cf61ee..b21621ca9e 100644 --- a/include/configs/imx31_phycore.h +++ b/include/configs/imx31_phycore.h @@ -143,13 +143,6 @@ #define CONFIG_CMDLINE_EDITING /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - -/* * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index 2252d93833..2770c82b59 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -102,17 +102,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index ca2d92d79f..d5043df6f0 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -113,17 +113,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ diff --git a/include/configs/jadecpu.h b/include/configs/jadecpu.h index 2badadbc3b..7b9d36d5df 100644 --- a/include/configs/jadecpu.h +++ b/include/configs/jadecpu.h @@ -32,7 +32,6 @@ #define CONFIG_SYS_TEXT_BASE 0x10000000 #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_USE_ARCH_MEMCPY #define CONFIG_USE_ARCH_MEMSET @@ -204,8 +203,6 @@ #define CONFIG_SYS_MALLOC_LEN (10 << 20) #define CONFIG_SYS_MEM_TOP_HIDE (4 << 20) -#define CONFIG_STACKSIZE (32*1024) /* regular stack */ - /* * Clock reset generator init */ @@ -292,8 +289,4 @@ #define CONFIG_SYS_DDR2_INIT_DRIC1_10 0x0005 #define CONFIG_SYS_DDR2_INIT_DRIC2_10 0x0002 -#ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/jornada.h b/include/configs/jornada.h index 84ad2d874c..d499abe4af 100644 --- a/include/configs/jornada.h +++ b/include/configs/jornada.h @@ -33,7 +33,6 @@ /* we will never enable dcache, because we have to setup MMU first */ #define CONFIG_SYS_DCACHE_OFF -#undef CONFIG_USE_IRQ /* Console setting */ @@ -88,12 +87,6 @@ #define CONFIG_SYS_CPUSPEED 0x0a /* core clock 206MHz */ #define CONFIG_SYS_BAUDRATE_TABLE { 19200, 38400, 57600, 115200 } -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_FLASH_CFI_WIDTH FLASH_CFI_32BIT diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index 3aa5ca152c..27b77d3dab 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -158,7 +158,6 @@ #define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ #define CONFIG_NR_DRAM_BANKS 4 -#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ /* @@ -307,6 +306,8 @@ int get_scl(void); #define CONFIG_KM_RESERVED_PRAM 0x801000 /* address for the bootcount (taken from end of RAM) */ #define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM) +/* Use generic bootcount RAM driver */ +#define CONFIG_BOOTCOUNT_RAM /* enable POST tests */ #define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS) diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h index 4b9b290826..0a1d1e09a6 100644 --- a/include/configs/lubbock.h +++ b/include/configs/lubbock.h @@ -44,7 +44,6 @@ #define CONFIG_BOARD_LATE_INIT #define CONFIG_DOS_PARTITION #define CONFIG_SYS_TEXT_BASE 0x0 -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ /* we will never enable dcache, because we have to setup MMU first */ #define CONFIG_SYS_DCACHE_OFF @@ -136,17 +135,6 @@ #endif /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/* * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */ diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 3ee538a441..d0f2b481d5 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -20,8 +20,6 @@ #ifndef __M28EVK_CONFIG_H__ #define __M28EVK_CONFIG_H__ -#include <asm/arch/regs-base.h> - /* * SoC configurations */ @@ -36,9 +34,9 @@ #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK +#include <asm/arch/regs-base.h> + #define CONFIG_SYS_NO_FLASH -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_ARCH_MISC_INIT @@ -47,8 +45,8 @@ */ #define CONFIG_SPL #define CONFIG_SPL_NO_CPU_SUPPORT_CODE -#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mx28" -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds" +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_GPIO_SUPPORT @@ -85,7 +83,6 @@ #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ -#define CONFIG_STACKSIZE (128 * 1024) /* 128 KB stack */ #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ @@ -246,6 +243,7 @@ #ifdef CONFIG_CMD_SPI #define CONFIG_HARD_SPI #define CONFIG_MXS_SPI +#define CONFIG_MXS_SPI_DMA_ENABLE #define CONFIG_SPI_HALF_DUPLEX #define CONFIG_DEFAULT_SPI_BUS 2 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 @@ -256,11 +254,11 @@ #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SF_DEFAULT_CS 2 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 -#define CONFIG_SF_DEFAULT_SPEED 24000000 +#define CONFIG_SF_DEFAULT_SPEED 40000000 #define CONFIG_ENV_SPI_CS 0 #define CONFIG_ENV_SPI_BUS 2 -#define CONFIG_ENV_SPI_MAX_HZ 24000000 +#define CONFIG_ENV_SPI_MAX_HZ 40000000 #define CONFIG_ENV_SPI_MODE SPI_MODE_0 #endif #endif diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 970c882d3c..733022e785 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -27,9 +27,11 @@ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP34XX /* which is a 34XX */ #define CONFIG_OMAP3_MCX /* working with mcx */ +#define CONFIG_OMAP_GPIO #define MACH_TYPE_MCX 3656 #define CONFIG_MACH_TYPE MACH_TYPE_MCX +#define CONFIG_BOARD_LATE_INIT #define CONFIG_SYS_CACHELINE_SIZE 64 @@ -140,6 +142,7 @@ #define CONFIG_MTD_PARTITIONS #define CONFIG_MTD_DEVICE #define CONFIG_CMD_MTDPARTS +#define CONFIG_CMD_GPIO #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ @@ -183,38 +186,95 @@ #define CONFIG_BOOTFILE "uImage" +#define xstr(s) str(s) +#define str(s) #s + +/* Setup MTD for NAND on the SOM */ +#define MTDIDS_DEFAULT "nand0=omap2-nand.0" +#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \ + "1m(u-boot),256k(env1)," \ + "256k(env2),6m(kernel),6m(k_recovery)," \ + "8m(fs_recovery),-(common_data)" + +#define CONFIG_HOSTNAME mcx #define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x82000000\0" \ - "console=ttyO2,115200n8\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "root=/dev/mmcblk0p2 rw " \ - "rootfstype=ext3 rootwait\0" \ - "nandargs=setenv bootargs console=${console} " \ - "root=/dev/mtdblock4 rw " \ - "rootfstype=jffs2\0" \ - "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source ${loadaddr}\0" \ - "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "nandboot=echo Booting from nand ...; " \ - "run nandargs; " \ - "nand read ${loadaddr} 280000 400000; " \ - "bootm ${loadaddr}\0" \ + "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \ + "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \ + "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ + "addfb=setenv bootargs ${bootargs} vram=6M " \ + "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \ + "addip_sta=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:" \ + "${netmask}:${hostname}:eth0:off\0" \ + "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ + "addip=if test -n ${ipdyn};then run addip_dyn;" \ + "else run addip_sta;fi\0" \ + "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ + "addtty=setenv bootargs ${bootargs} " \ + "console=${consoledev},${baudrate}\0" \ + "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ + "baudrate=115200\0" \ + "consoledev=ttyO2\0" \ + "hostname=" xstr(CONFIG_HOSTNAME) "\0" \ + "loadaddr=0x82000000\0" \ + "load=tftp ${loadaddr} ${u-boot}\0" \ + "load_k=tftp ${loadaddr} ${bootfile}\0" \ + "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ + "loadmlo=tftp ${loadaddr} ${mlo}\0" \ + "mlo=" xstr(CONFIG_HOSTNAME) "/MLO\0" \ + "mmcargs=root=/dev/mmcblk0p2 rw " \ + "rootfstype=ext3 rootwait\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "run addip addtty addmtd addfb addeth addmisc;" \ + "run loaduimage; " \ + "bootm ${loadaddr}\0" \ + "net_nfs=run load_k; " \ + "run nfsargs; " \ + "run addip addtty addmtd addfb addeth addmisc;" \ + "bootm ${loadaddr}\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.img\0" \ + "uboot_addr=0x80000\0" \ + "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ + "nand write ${loadaddr} ${uboot_addr} 80000\0" \ + "updatemlo=nandecc hw;nand erase 0 20000;" \ + "nand write ${loadaddr} 0 20000\0" \ + "upd=if run load;then echo Updating u-boot;if run update;" \ + "then echo U-Boot updated;" \ + "else echo Error updating u-boot !;" \ + "echo Board without bootloader !!;" \ + "fi;" \ + "else echo U-Boot not downloaded..exiting;fi\0" \ + "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source ${loadaddr}\0" \ + "nandargs=setenv bootargs ubi.mtd=7 " \ + "root=ubi0:rootfs rootfstype=ubifs\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "ubi part nand0,4;" \ + "ubi readvol ${loadaddr} kernel;" \ + "run addip addtty addmtd addfb addeth addmisc;" \ + "bootm ${loadaddr}\0" \ + "swupdate_args=setenv bootargs ubi.mtd=6 root=ubi0:fs_recovery "\ + "rootfstype=ubifs quiet loglevel=1 " \ + "consoleblank=0 ${swupdate_misc}\0" \ + "swupdate=echo Running Sw-Update...;" \ + "if printenv mtdparts;then echo Starting SwUpdate...; " \ + "else mtdparts default;fi; " \ + "ubi part nand0,5;" \ + "ubi readvol 0x82000000 kernel_recovery;" \ + "run swupdate_args; " \ + "setenv bootargs ${bootargs} " \ + "${mtdparts} " \ + "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \ + "omapdss.def_disp=lcd;" \ + "bootm ${loadaddr}\0" #define CONFIG_BOOTCOMMAND \ - "if mmc init; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "else run nandboot; " \ - "fi; " \ - "fi; " \ - "else run nandboot; fi" + "run nandboot" #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING @@ -227,7 +287,7 @@ #define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ #define CONFIG_SYS_PROMPT V_PROMPT -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) @@ -253,13 +313,6 @@ #define CONFIG_SYS_HZ 1000 /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/* * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ @@ -279,18 +332,15 @@ #define CONFIG_NAND_OMAP_GPMC #define GPMC_NAND_ECC_LP_x16_LAYOUT #define CONFIG_ENV_IS_IN_NAND -#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ +#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ +/* Redundant Environment */ #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET - -/* - * CFI FLASH driver setup - */ -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + 2 * CONFIG_SYS_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* Flash banks JFFS2 should use */ #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ diff --git a/include/configs/medcom.h b/include/configs/medcom.h index c84db03e76..bce03a49fa 100644 --- a/include/configs/medcom.h +++ b/include/configs/medcom.h @@ -26,20 +26,20 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include "tegra2-common.h" +#include "tegra20-common.h" /* Enable fdt support for Medcom. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-medcom +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-medcom #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE /* High-level configuration options */ -#define V_PROMPT "Tegra2 (Medcom) # " -#define CONFIG_TEGRA2_BOARD_STRING "Avionic Design Medcom" +#define V_PROMPT "Tegra20 (Medcom) # " +#define CONFIG_TEGRA20_BOARD_STRING "Avionic Design Medcom" /* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTD /* UARTD: debug UART */ +#define CONFIG_TEGRA20_ENABLE_UARTD /* UARTD: debug UART */ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE #define CONFIG_BOARD_EARLY_INIT_F @@ -78,6 +78,6 @@ "ext2load mmc 0 0x17000000 /boot/uImage;" \ "bootm" -#include "tegra2-common-post.h" +#include "tegra20-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 1e897e23e0..31f2a8cf13 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -68,7 +68,6 @@ #define CONFIG_REVISION_TAG #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_MISC_INIT_R /* Call misc_init_r */ -#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */ #define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */ #define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */ @@ -221,10 +220,4 @@ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ 128*1024, 0x1000) -#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ - -#ifdef CONFIG_USE_IRQ -# error CONFIG_USE_IRQ not supported -#endif - #endif diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 27b489902b..7086d1d0e8 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -105,7 +105,6 @@ #define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ #define CONFIG_BOARD_EARLY_INIT_F /* call board_init_f for early inits */ #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ -#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ diff --git a/include/configs/mx1ads.h b/include/configs/mx1ads.h index 665e33d868..3ede042ade 100644 --- a/include/configs/mx1ads.h +++ b/include/configs/mx1ads.h @@ -35,7 +35,6 @@ #define CONFIG_ARM920T 1 /* This is an ARM920T Core */ #define CONFIG_IMX 1 /* It's a Motorola MC9328 SoC */ #define CONFIG_MX1ADS 1 /* on a Motorola MX1ADS Board */ -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ /* * Select serial console configuration @@ -133,17 +132,6 @@ #define CONFIG_SYS_CPUSPEED 0x141 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- * Physical Memory Map */ diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index efca287539..359a308305 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -49,9 +49,6 @@ #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE/2) #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE) -/* Stack sizes */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - /* Serial Info */ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index a4a22fc8a5..4e1e6bc0a8 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -19,20 +19,19 @@ #ifndef __MX28EVK_CONFIG_H__ #define __MX28EVK_CONFIG_H__ -#include <asm/arch/regs-base.h> - /* * SoC configurations */ #define CONFIG_MX28 /* i.MX28 SoC */ + #define CONFIG_MXS_GPIO /* GPIO control */ #define CONFIG_SYS_HZ 1000 /* Ticks per second */ #define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK +#include <asm/arch/regs-base.h> + #define CONFIG_SYS_NO_FLASH -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_ARCH_MISC_INIT @@ -41,8 +40,8 @@ */ #define CONFIG_SPL #define CONFIG_SPL_NO_CPU_SUPPORT_CODE -#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mx28" -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds" +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_GPIO_SUPPORT @@ -76,7 +75,6 @@ #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ -#define CONFIG_STACKSIZE (128 * 1024) /* 128 KB stack */ #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ @@ -216,7 +214,6 @@ #define CONFIG_SF_DEFAULT_SPEED 24000000 /* (redundant) environemnt in SPI flash */ -#undef CONFIG_ENV_IS_IN_SPI_FLASH #ifdef CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_SYS_REDUNDAND_ENVIRONMENT #define CONFIG_ENV_SIZE 0x1000 /* 4KB */ diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index cc720e8083..081fbf6905 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -155,13 +155,6 @@ #define CONFIG_CMDLINE_EDITING 1 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 7634de72cb..17d3143eba 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -151,13 +151,6 @@ #define CONFIG_CMDLINE_EDITING /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 6eb5da5d84..9bc6bd4470 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -160,14 +160,6 @@ #define CONFIG_SYS_HZ 1000 - -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - /* * Physical Memory Map */ diff --git a/include/configs/efikamx.h b/include/configs/mx51_efikamx.h index 143b0f01f4..439b5f3fe2 100644 --- a/include/configs/efikamx.h +++ b/include/configs/mx51_efikamx.h @@ -246,13 +246,6 @@ #define CONFIG_CMDLINE_EDITING /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index e975f549bd..ba4a4a623c 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -128,6 +128,8 @@ #define CONFIG_VIDEO_IPUV3 #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_BMP_16BPP @@ -216,13 +218,6 @@ #define CONFIG_CMDLINE_EDITING /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h index b486253533..6ab4cde489 100644 --- a/include/configs/mx53ard.h +++ b/include/configs/mx53ard.h @@ -153,9 +153,6 @@ #define CONFIG_SYS_HZ 1000 #define CONFIG_CMDLINE_EDITING -/* Stack sizes */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index d6aa46d7b9..b46855f7e4 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -88,6 +88,9 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DATE +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE + /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 @@ -164,9 +167,6 @@ #define CONFIG_SYS_HZ 1000 #define CONFIG_CMDLINE_EDITING -/* Stack sizes */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_BASE_ADDR diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 597c4e45dd..8cbaf08e0e 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -175,9 +175,6 @@ #define CONFIG_SYS_HZ 1000 #define CONFIG_CMDLINE_EDITING -/* Stack sizes */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR @@ -221,6 +218,8 @@ #define CONFIG_VIDEO_IPUV3 #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_BMP_16BPP diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h index 1982184c86..f54d328be0 100644 --- a/include/configs/mx53smd.h +++ b/include/configs/mx53smd.h @@ -152,9 +152,6 @@ #define CONFIG_SYS_HZ 1000 #define CONFIG_CMDLINE_EDITING -/* Stack sizes */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index a9c1b1545e..6c1789527c 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -140,7 +140,6 @@ #define CONFIG_SYS_HZ 1000 #define CONFIG_CMDLINE_EDITING -#define CONFIG_STACKSIZE (128 * 1024) /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 0d376ba5cf..72d0154d24 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -31,6 +31,7 @@ #define CONFIG_MACH_TYPE 3769 #include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS @@ -53,7 +54,7 @@ #define CONFIG_SPI_FLASH_SST #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_CS (0|(GPIO_NUMBER(3, 19)<<8)) +#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8)) #define CONFIG_SF_DEFAULT_SPEED 25000000 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) #endif @@ -117,6 +118,9 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE + /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 @@ -194,7 +198,6 @@ #define CONFIG_SYS_HZ 1000 #define CONFIG_CMDLINE_EDITING -#define CONFIG_STACKSIZE (128 * 1024) /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/nhk8815.h b/include/configs/nhk8815.h index 37a66aba13..d438efdae6 100644 --- a/include/configs/nhk8815.h +++ b/include/configs/nhk8815.h @@ -85,12 +85,6 @@ #define CONFIG_SYS_TEXT_BASE 0x00000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + (1<<20)) -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -# define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */ -# define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */ -#endif - #define CONFIG_SYS_MEMTEST_START 0x00000000 #define CONFIG_SYS_MEMTEST_END 0x0FFFFFFF #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256 * 1024) diff --git a/include/configs/ns9750dev.h b/include/configs/ns9750dev.h index f465a5606b..3f49c6f0b1 100644 --- a/include/configs/ns9750dev.h +++ b/include/configs/ns9750dev.h @@ -42,7 +42,6 @@ #define AHB_CLK_FREQ (CONFIG_SYS_CLK_FREQ/4) #define BBUS_CLK_FREQ (CONFIG_SYS_CLK_FREQ/8) -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ /*@TODO #define CONFIG_STATUS_LED*/ #define CONFIG_USE_IRQ @@ -126,10 +125,7 @@ /*----------------------------------------------------------------------- * Stack sizes - * - * The stack sizes are set up in start.S using the settings below */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ #ifdef CONFIG_USE_IRQ #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ diff --git a/include/configs/o2d.h b/include/configs/o2d.h new file mode 100644 index 0000000000..c0b75eb392 --- /dev/null +++ b/include/configs/o2d.h @@ -0,0 +1,80 @@ +/* + * (C) Copyright 2012 + * DENX Software Engineering, Anatolij Gustschin <agust@denx.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFC000000 boot low boot high (standard configuration) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfc000000 /* Standard: boot low */ +#endif + +/* Board specific flash config */ +#define CONFIG_SYS_FLASH_BASE 0xfc000000 +#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* maximum 64MB */ +/* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 + +/* + * Include common defines for all ifm boards + */ +#include "o2dnt-common.h" + +/* additional commands */ +#define CONFIG_CMD_ITEST + +/* + * GPIO configuration: + * CS1 SDRAM activate + no CAN + no PCI + */ +#define CONFIG_SYS_GPS_PORT_CONFIG 0x8000A004 + +/* Other board specific configs */ +#define CONFIG_SYS_BOOTCS_CFG 0x00057d01 +#define CONFIG_SYS_RESET_ADDRESS 0xfc000000 + +#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x07f00000 /* 1 - 127 MB in DRAM */ + +#define CONFIG_BOARD_NAME "o2d" +#define CONFIG_BOARD_BOOTCMD "run dhcp_boot" +#define CONFIG_BOARD_MEM_LIMIT xstr(126) +#define BOARD_POST_CRC32_END xstr(0x01000000) + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_IFM_DEFAULT_ENV_SETTINGS \ + CONFIG_IFM_DEFAULT_ENV_OLD \ + CONFIG_IFM_DEFAULT_ENV_NEW \ + "linbot=fc060000\0" \ + "lintop=fc15ffff\0" \ + "rambot=fc160000\0" \ + "ramtop=fc55ffff\0" \ + "jffbot=fc560000\0" \ + "jfftop=fcffffff\0" \ + "ubobot=" xstr(CONFIG_SYS_FLASH_BASE) "\0" \ + "ubotop=fc03ffff\0" \ + "kernel_addr=0xfc060000\0" \ + "ramdisk_addr=0xfc160000\0" \ + "progCram=tftp ${fileaddr} ${cramfsname};" \ + "erase ${rambot} ${ramtop};" \ + "cp.b ${fileaddr} ${rambot} ${filesize}\0" \ + "flash_for_configs=22396\0" \ + "flash_mtd=run mtd_args addip addmem;" \ + "bootm ${kernel_addr}\0" \ + "mtd_args=setenv bootargs root=/dev/mtdblock3 " \ + "rw rootfstype=cramfs\0" \ + "master=mw f0000b00 0x8005A006;mw f0000b0c ${IOpin};" \ + "mw f0000b04 ${IOpin};mw f0000b10 0x20\0" \ + "dhcp_boot=run dhcpcmd;run flash_mtd\0" \ + "hostname=IFM_SENSOR\0" \ + "netretry=once\0" \ + "autoload=no\0" \ + "sensorType=O2D222AG\0" diff --git a/include/configs/o2d300.h b/include/configs/o2d300.h new file mode 100644 index 0000000000..c74e622b8c --- /dev/null +++ b/include/configs/o2d300.h @@ -0,0 +1,84 @@ +/* + * (C) Copyright 2012 + * DENX Software Engineering, Anatolij Gustschin <agust@denx.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFC000000 boot low boot high (standard configuration) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfc000000 /* Standard: boot low */ +#endif + +/* Board specific flash config */ +#define CONFIG_SYS_FLASH_BASE 0xfc000000 +#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* maximum 64MB */ +/* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 + +/* + * Include common defines for all ifm boards + */ +#include "o2dnt-common.h" + +/* + * GPIO configuration: + * CS1 SDRAM activate + no CAN + no PCI + */ +#define CONFIG_SYS_GPS_PORT_CONFIG 0x8000A004 + +/* Other board specific configs */ +#define CONFIG_SYS_BOOTCS_CFG 0x00057d01 +#define CONFIG_SYS_RESET_ADDRESS 0xfc000000 + +#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x07f00000 /* 1 - 127 MB in DRAM */ + +/* Use redundant environment */ +#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) + +#define CONFIG_BOARD_NAME "o2d300" +#define CONFIG_BOARD_BOOTCMD "run dhcp_boot" +#define CONFIG_BOARD_MEM_LIMIT xstr(126) +#define BOARD_POST_CRC32_END xstr(0x02000000) + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_IFM_DEFAULT_ENV_SETTINGS \ + CONFIG_IFM_DEFAULT_ENV_OLD \ + CONFIG_IFM_DEFAULT_ENV_NEW \ + "autoload=no\0" \ + "dhcp_boot=run dhcpcmd;run flash_mtd\0" \ + "flash_mtd=run mtd_args addip addmem;" \ + "bootm ${kernel_addr}\0" \ + "mtd_args=setenv bootargs root=/dev/mtdblock4 " \ + "rw rootfstype=cramfs\0" \ + "linbot=fc080000\0" \ + "lintop=fc17ffff\0" \ + "rambot=fc180000\0" \ + "ramtop=fc57ffff\0" \ + "jffbot=fc580000\0" \ + "jfftop=fd39ffff\0" \ + "ubobot=" xstr(CONFIG_SYS_FLASH_BASE) "\0" \ + "ubotop=fc03ffff\0" \ + "halname="CONFIG_BOARD_NAME"/"CONFIG_BOARD_NAME"_halcon\0" \ + "halbot=fd3a0000\0" \ + "haltop=fdf9ffff\0" \ + "progHal=tftp 200000 ${halname};erase ${halbot} ${haltop};" \ + "cp.b ${fileaddr} ${halbot} ${filesize}\0" \ + "kernel_addr=0xfc060000\0" \ + "ramdisk_addr=0xfc160000\0" \ + "master=mw f0000b00 0x8005A006;mw f0000b0c ${IOpin};" \ + "mw f0000b04 ${IOpin};mw f0000b10 0x20\0" \ + "netretry=once\0" \ + "protcmd=protect on ${linbot} ${lintop};" \ + "protect on ${rambot} ${ramtop}\0" \ + "o2derror=def_env\0" \ + "sensorType=O2D300AA\0" diff --git a/include/configs/o2dnt-common.h b/include/configs/o2dnt-common.h new file mode 100644 index 0000000000..ca89066d21 --- /dev/null +++ b/include/configs/o2dnt-common.h @@ -0,0 +1,379 @@ +/* + * Common configuration options for ifm camera boards + * + * (C) Copyright 2005 + * Sebastien Cazaux, ifm electronic gmbh + * + * (C) Copyright 2012 + * DENX Software Engineering, Anatolij Gustschin <agust@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __O2D_CONFIG_H +#define __O2D_CONFIG_H + +/* + * High Level Configuration Options + */ +#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ +#define CONFIG_MPC5200 + +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* running at 33.000000MHz */ + +#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ +#if defined(CONFIG_CMD_KGDB) +/* log base 2 of the above value */ +#define CONFIG_SYS_CACHELINE_SHIFT 5 +#endif + +/* +#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \ + CONFIG_SYS_POST_I2C) +*/ + +#ifdef CONFIG_POST +/* preserve space for the post_word at end of on-chip SRAM */ +#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4) +#endif + +/* + * Serial console configuration + */ +#define CONFIG_PSC_CONSOLE 5 /* console is on PSC5 */ +#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ +#define CONFIG_SYS_BAUDRATE_TABLE \ + { 9600, 19200, 38400, 57600, 115200, 230400 } + +/* + * PCI Mapping: + * 0x40000000 - 0x4fffffff - PCI Memory + * 0x50000000 - 0x50ffffff - PCI IO Space + */ +#undef CONFIG_PCI +#define CONFIG_PCI_PNP 1 + +#define CONFIG_PCI_MEM_BUS 0x40000000 +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS +#define CONFIG_PCI_MEM_SIZE 0x10000000 + +#define CONFIG_PCI_IO_BUS 0x50000000 +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS +#define CONFIG_PCI_IO_SIZE 0x01000000 + +#define CONFIG_SYS_XLB_PIPELINING 1 + +/* Partitions */ +#define CONFIG_MAC_PARTITION +#define CONFIG_DOS_PARTITION +#define CONFIG_ISO_PARTITION + +#define CONFIG_TIMESTAMP /* Print image info with timestamp */ + +#define CONFIG_SYS_ALT_MEMTEST /* Much more complex memory test */ + +/* + * Supported commands + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#ifdef CONFIG_PCI +#define CONFIG_CMD_PCI +#endif +#ifdef CONFIG_POST +#define CONFIG_CMD_DIAG +#endif + +#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) || (CONFIG_SYS_TEXT_BASE == 0xFF000000) +/* Boot low with 16 or 32 MB Flash */ +#define CONFIG_SYS_LOWBOOT 1 +#elif (CONFIG_SYS_TEXT_BASE != 0x00100000) +#error "CONFIG_SYS_TEXT_BASE value is invalid" +#endif + +/* + * Autobooting + * Be selective on what keys can delay or stop the autoboot process + * To stop use: "++++++++++" + */ +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \ + "press password to stop\n", bootdelay +#define CONFIG_AUTOBOOT_STOP_STR "++++++++++" +#undef CONFIG_AUTOBOOT_DELAY_STR +#define DEBUG_BOOTKEYS 0 + +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ + +#define CONFIG_PREBOOT "run master" + +#undef CONFIG_BOOTARGS + +#define xstr(s) str(s) +#define str(s) #s + +#if !defined(CONFIG_CONSOLE_DEV) +#define CONFIG_CONSOLE_DEV "ttyPSC1" +#endif + +/* + * Default environment for booting old and new kernel versions + */ +#define CONFIG_IFM_DEFAULT_ENV_OLD \ + "flash_self_old=run ramargs addip addmem;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "flash_nfs_old=run nfsargs addip addmem;" \ + "bootm ${kernel_addr}\0" \ + "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \ + "run nfsargs addip addmem;" \ + "bootm ${kernel_addr_r}\0" + +#define CONFIG_IFM_DEFAULT_ENV_NEW \ + "fdt_addr_r=900000\0" \ + "fdt_file="CONFIG_BOARD_NAME"/"CONFIG_BOARD_NAME".dtb\0" \ + "flash_self=run ramargs addip addtty addmisc;" \ + "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ + "flash_nfs=run nfsargs addip addtty addmisc;" \ + "bootm ${kernel_addr} - ${fdt_addr}\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ + "tftp ${fdt_addr_r} ${fdt_file}; " \ + "run nfsargs addip addtty addmisc;" \ + "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ + +#define CONFIG_IFM_DEFAULT_ENV_SETTINGS \ + "IOpin=0x64\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "addmem=setenv bootargs ${bootargs} ${memlimit}\0" \ + "addmisc=sete bootargs ${bootargs} ${miscargs}\0" \ + "addtty=sete bootargs ${bootargs} console=" \ + CONFIG_CONSOLE_DEV ",${baudrate}\0" \ + "bootfile="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0" \ + "kernel_addr_r=600000\0" \ + "initrd_high=0x03e00000\0" \ + "memlimit=mem="CONFIG_BOARD_MEM_LIMIT"M\0" \ + "memtest=mtest 0x00100000 "xstr(CONFIG_SYS_MEMTEST_END)" 0 1\0" \ + "netdev=eth0\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "linuxname="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0"\ + "progLinux=tftp 200000 ${linuxname};erase ${linbot} ${lintop};" \ + "cp.b ${fileaddr} ${linbot} ${filesize}\0" \ + "ramname="CONFIG_BOARD_NAME"/uRamdisk_"CONFIG_BOARD_NAME"_act\0"\ + "progRam=tftp 200000 ${ramname};erase ${rambot} ${ramtop};" \ + "cp.b ${fileaddr} ${rambot} ${filesize}\0" \ + "jffname="CONFIG_BOARD_NAME"/uJFFS2_"CONFIG_BOARD_NAME"_act\0" \ + "progJff=tftp 200000 ${jffname};erase ${jffbot} ${jfftop};" \ + "cp.b ${fileaddr} ${jffbot} ${filesize}\0" \ + "rootpath=/opt/eldk/ppc_6xx\0" \ + "uboname=" CONFIG_BOARD_NAME \ + "/u-boot.bin_" CONFIG_BOARD_NAME "_act\0" \ + "progubo=tftp 200000 ${uboname};" \ + "protect off ${ubobot} ${ubotop};" \ + "erase ${ubobot} ${ubotop};" \ + "cp.b ${fileaddr} ${ubobot} ${filesize}\0" \ + "unlock=yes\0" \ + "post=echo !!! "CONFIG_BOARD_NAME" POWER ON SELF TEST !!!;" \ + "setenv bootdelay 1;" \ + "crc32 "xstr(CONFIG_SYS_TEXT_BASE)" " \ + BOARD_POST_CRC32_END";" \ + "setenv bootcmd "CONFIG_BOARD_BOOTCMD";saveenv;reset\0" + +#define CONFIG_BOOTCOMMAND "run post" + +/* + * IPB Bus clocking configuration. + */ +#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ + +#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) +/* + * PCI Bus clocking configuration + * + * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if + * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock + * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz. + */ +#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */ +#endif + +/* + * I2C configuration + */ +#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ +#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 or #2 */ +#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ +#define CONFIG_SYS_I2C_SLAVE 0x7F + +/* + * EEPROM configuration: + * + * O2DNT board is equiped with Ramtron FRAM device FM24CL16 + * 16 Kib Ferroelectric Nonvolatile serial RAM memory + * organized as 2048 x 8 bits and addressable as eight I2C devices + * 0x50 ... 0x57 each 256 bytes in size + * + */ +#define CONFIG_SYS_I2C_FRAM +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +/* + * There is no write delay with FRAM, write operations are performed at bus + * speed. Thus, no status polling or write delay is needed. + */ + +/* + * Flash configuration + */ +#define CONFIG_SYS_FLASH_CFI 1 +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_FLASH_16BIT +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_SYS_FLASH_CFI_AMD_RESET +#define CONFIG_SYS_FLASH_EMPTY_INFO + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Erase Timeout (in ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Write Timeout (in ms) */ +/* Timeout for Flash Clear Lock Bits (in ms) */ +#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 +/* "Real" (hardware) sectors protection */ +#define CONFIG_SYS_FLASH_PROTECTION + +/* + * Environment settings + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_OVERWRITE 1 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000) + +/* + * Memory map + */ +#define CONFIG_SYS_MBAR 0xF0000000 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_DEFAULT_MBAR 0x80000000 + +/* Use SRAM until RAM will be available */ +#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM +#ifdef CONFIG_POST +/* preserve space for the post_word at end of on-chip SRAM */ +#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE +#else +/* End of used area in DPRAM */ +#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE +#endif + +/* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ + CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* 192 kB for Monitor */ +#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* 128 kB for malloc() */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial map for Linux */ + +#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) +#define CONFIG_SYS_RAMBOOT 1 +#endif + +/* + * Ethernet configuration + */ +#define CONFIG_MPC5xxx_FEC +#define CONFIG_MPC5xxx_FEC_MII100 +#define CONFIG_PHY_ADDR 0x00 +#define CONFIG_RESET_PHY_R + +/* + * GPIO configuration + */ +#define CONFIG_SYS_GPIO_DATADIR 0x00000064 /* PSC1_2, PSC2_1,2 output */ +#define CONFIG_SYS_GPIO_OPENDRAIN 0x00000000 /* No open drain */ +#define CONFIG_SYS_GPIO_DATAVALUE 0x00000000 /* PSC1_1 to 1, rest to 0 */ +#define CONFIG_SYS_GPIO_ENABLE 0x00000064 /* PSC1_2, PSC2_1,2 enable */ + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_HUSH_PARSER + +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 16 +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +/* default load address */ +#define CONFIG_SYS_LOAD_ADDR 0x100000 + +/* decrementer freq: 1 ms ticks */ +#define CONFIG_SYS_HZ 1000 + +/* + * Various low-level settings + */ +#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI +#define CONFIG_SYS_HID0_FINAL HID0_ICE + +#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE +#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE + +#define CONFIG_BOARD_EARLY_INIT_R + +#define CONFIG_SYS_CS_BURST 0x00000000 +#define CONFIG_SYS_CS_DEADCYCLE 0x33333333 + +/* + * DT support + */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 + +#define OF_CPU "PowerPC,5200@0" +#define OF_SOC "soc5200@f0000000" +#define OF_TBCLK (bd->bi_busfreq / 4) + +#endif /* __O2D_CONFIG_H */ diff --git a/include/configs/o2dnt.h b/include/configs/o2dnt.h deleted file mode 100644 index 22eb0047f5..0000000000 --- a/include/configs/o2dnt.h +++ /dev/null @@ -1,297 +0,0 @@ -/* - * (C) Copyright 2005 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 -#define CONFIG_O2DNT 1 /* ... on O2DNT board */ - -#define CONFIG_SYS_TEXT_BASE 0xFF000000 /* boot low for 16 MiB boards */ - -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ - -#define CONFIG_HIGH_BATS 1 /* High BATs supported */ - -/* - * Serial console configuration - */ -#define CONFIG_PSC_CONSOLE 5 /* console is on PSC5 */ -#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } - -/* - * PCI Mapping: - * 0x40000000 - 0x4fffffff - PCI Memory - * 0x50000000 - 0x50ffffff - PCI IO Space - */ -#define CONFIG_PCI 1 -#define CONFIG_PCI_PNP 1 -/* #define CONFIG_PCI_SCAN_SHOW 1 */ -#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1 - -#define CONFIG_PCI_MEM_BUS 0x40000000 -#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS -#define CONFIG_PCI_MEM_SIZE 0x10000000 - -#define CONFIG_PCI_IO_BUS 0x50000000 -#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS -#define CONFIG_PCI_IO_SIZE 0x01000000 - -#define CONFIG_SYS_XLB_PIPELINING 1 - -#define CONFIG_EEPRO100 -#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ -#define CONFIG_NS8382X 1 - -/* Partitions */ -#define CONFIG_MAC_PARTITION -#define CONFIG_DOS_PARTITION -#define CONFIG_ISO_PARTITION - -#define CONFIG_TIMESTAMP /* Print image info with timestamp */ - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_FAT -#define CONFIG_CMD_I2C -#define CONFIG_CMD_NFS -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#define CONFIG_CMD_PCI - - -#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ -# define CONFIG_SYS_LOWBOOT 1 -#else -# error "CONFIG_SYS_TEXT_BASE must be 0xFF000000" -#endif - -/* - * Autobooting - */ -#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ - -#define CONFIG_PREBOOT "echo;" \ - "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ - "echo" - -#undef CONFIG_BOOTARGS - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "addip=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off panic=1\0" \ - "flash_nfs=run nfsargs addip;" \ - "bootm ${kernel_addr}\0" \ - "flash_self=run ramargs addip;" \ - "bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ - "rootpath=/opt/eldk/ppc_82xx\0" \ - "bootfile=/tftpboot/MPC5200/uImage\0" \ - "" - -#define CONFIG_BOOTCOMMAND "run flash_self" - -/* - * IPB Bus clocking configuration. - */ -#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ - -#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) -/* - * PCI Bus clocking configuration - * - * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if - * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock - * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz. - */ -#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */ -#endif - -/* - * I2C configuration - */ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 or #2 */ - -#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ -#define CONFIG_SYS_I2C_SLAVE 0x7F - -/* - * EEPROM configuration: - * - * O2DNT board is equiped with Ramtron FRAM device FM24CL16 - * 16 Kib Ferroelectric Nonvolatile serial RAM memory - * organized as 2048 x 8 bits and addressable as eight I2C devices - * 0x50 ... 0x57 each 256 bytes in size - * - */ -#define CONFIG_SYS_I2C_FRAM -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 -/* - * There is no write delay with FRAM, write operations are performed at bus - * speed. Thus, no status polling or write delay is needed. - */ -/*#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70*/ - - -/* - * Flash configuration - */ -#define CONFIG_SYS_FLASH_BASE 0xFF000000 -#define CONFIG_SYS_FLASH_SIZE 0x01000000 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000) - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */ - -#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ -#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ -#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ - -/* - * Environment settings - */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x20000 -#define CONFIG_ENV_SECT_SIZE 0x20000 -#define CONFIG_ENV_OVERWRITE 1 - -/* - * Memory map - */ -#define CONFIG_SYS_MBAR 0xF0000000 -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_DEFAULT_MBAR 0x80000000 - -/* Use SRAM until RAM will be available */ -#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM -#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */ - - -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ -#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - -/* - * Ethernet configuration - */ -#define CONFIG_MPC5xxx_FEC 1 -#define CONFIG_MPC5xxx_FEC_MII100 -/* - * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb - */ -/* #define CONFIG_MPC5xxx_FEC_MII10 */ -#define CONFIG_PHY_ADDR 0x00 - -/* - * GPIO configuration - */ -/*#define CONFIG_SYS_GPS_PORT_CONFIG 0x10002004 */ -#define CONFIG_SYS_GPS_PORT_CONFIG 0x00002006 /* no CAN */ - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ - -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ - -#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ -#if defined(CONFIG_CMD_KGDB) -# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ -#endif - -/* - * Various low-level settings - */ -#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI -#define CONFIG_SYS_HID0_FINAL HID0_ICE - -#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE - -#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 -/* - * For 66 MHz PCI clock additional Wait State is needed for CS0 (flash). - */ -#define CONFIG_SYS_BOOTCS_CFG 0x00057801 /* for pci_clk = 66 MHz */ -#else -#define CONFIG_SYS_BOOTCS_CFG 0x00047801 /* for pci_clk = 33 MHz */ -#endif - -#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE - -#define CONFIG_SYS_CS_BURST 0x00000000 -#define CONFIG_SYS_CS_DEADCYCLE 0x33333333 - -#define CONFIG_SYS_RESET_ADDRESS 0xff000000 - -#endif /* __CONFIG_H */ diff --git a/include/configs/o2dnt2.h b/include/configs/o2dnt2.h new file mode 100644 index 0000000000..c766acf2f6 --- /dev/null +++ b/include/configs/o2dnt2.h @@ -0,0 +1,72 @@ +/* + * (C) Copyright 2012 + * DENX Software Engineering, Anatolij Gustschin <agust@denx.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFC000000 boot low boot high (standard configuration) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfc000000 /* Standard: boot low */ +#endif + +/* Board specific flash config */ +#define CONFIG_SYS_FLASH_BASE 0xfc000000 +#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* maximum 64MB */ +/* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 + +/* + * Include common defines for all ifm boards + */ +#include "o2dnt-common.h" + +/* additional commands */ +#define CONFIG_CMD_ITEST + +/* + * GPIO configuration: + * CS1 SDRAM activate + no CAN + no PCI + */ +#define CONFIG_SYS_GPS_PORT_CONFIG 0x8000A004 + +/* Other board specific configs */ +#define CONFIG_SYS_BOOTCS_CFG 0x00057d01 +#define CONFIG_SYS_RESET_ADDRESS 0xfc000000 + +#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x07f00000 /* 1 - 127 MB in DRAM */ + +#define CONFIG_BOARD_NAME "o2dnt2" +#define CONFIG_BOARD_BOOTCMD "run flash_self" +#define CONFIG_BOARD_MEM_LIMIT xstr(126) +#define BOARD_POST_CRC32_END xstr(0x01000000) + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_IFM_DEFAULT_ENV_SETTINGS \ + CONFIG_IFM_DEFAULT_ENV_OLD \ + CONFIG_IFM_DEFAULT_ENV_NEW \ + "linbot=fc060000\0" \ + "lintop=fc15ffff\0" \ + "rambot=fc160000\0" \ + "ramtop=fc55ffff\0" \ + "jffbot=fc560000\0" \ + "jfftop=fce5ffff\0" \ + "ubobot=" xstr(CONFIG_SYS_FLASH_BASE) "\0" \ + "ubotop=fc03ffff\0" \ + "calname="CONFIG_BOARD_NAME"/uCal_"CONFIG_BOARD_NAME"_act\0" \ + "calbot=fce60000\0" \ + "caltop=fcffffff\0" \ + "progCal=tftp 200000 ${calname};erase ${calbot} ${caltop};" \ + "cp.b ${fileaddr} ${calbot} ${filesize}\0" \ + "kernel_addr=0xfc060000\0" \ + "ramdisk_addr=0xfc160000\0" \ + "master=mw f0000b00 0x8005A006;mw f0000b0c ${IOpin};" \ + "mw f0000b04 ${IOpin};mw f0000b10 0x20\0" diff --git a/include/configs/o2i.h b/include/configs/o2i.h new file mode 100644 index 0000000000..7594786790 --- /dev/null +++ b/include/configs/o2i.h @@ -0,0 +1,69 @@ +/* + * (C) Copyright 2012 + * DENX Software Engineering, Anatolij Gustschin <agust@denx.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFF000000 boot low boot high (standard configuration) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xff000000 /* Standard: boot low */ +#endif + +/* Board specific flash config */ +#define CONFIG_SYS_FLASH_BASE 0xff000000 +#define CONFIG_SYS_FLASH_SIZE 0x01000000 /* maximum 16MB */ +/* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_SECT 128 + +/* + * Include common defines for all ifm boards + */ +#include "o2dnt-common.h" + +/* GPIO configuration */ +#define CONFIG_SYS_GPS_PORT_CONFIG 0x00002006 /* no CAN */ + +/* Other board specific configs */ +#define CONFIG_SYS_BOOTCS_CFG 0x00087801 +#define CONFIG_SYS_RESET_ADDRESS 0xff000000 + +#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x03f00000 /* 1 - 63 MB in DRAM */ + +#define CONFIG_BOARD_NAME "o2i" +#define CONFIG_BOARD_BOOTCMD "run dhcp_boot" +#define CONFIG_BOARD_MEM_LIMIT xstr(62) +#define BOARD_POST_CRC32_END xstr(0x01000000) + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_IFM_DEFAULT_ENV_SETTINGS \ + CONFIG_IFM_DEFAULT_ENV_OLD \ + CONFIG_IFM_DEFAULT_ENV_NEW \ + "linbot=ff060000\0" \ + "lintop=ff15ffff\0" \ + "rambot=ff160000\0" \ + "ramtop=ff55ffff\0" \ + "jffbot=ff560000\0" \ + "jfftop=ffebffff\0" \ + "kernel_addr=0xff060000\0" \ + "ramdisk_addr=0xff160000\0" \ + "ubobot=" xstr(CONFIG_SYS_FLASH_BASE) "\0" \ + "ubotop=ff03ffff\0" \ + "autoload=no\0" \ + "dhcp_boot=run dhcpcmd; run flash_mtd\0" \ + "hostname=IFM_SENSOR\0" \ + "flash_mtd=run mtd_args addip addmem;bootm ${kernel_addr}\0" \ + "mtd_args=setenv bootargs root=/dev/mtdblock3 " \ + "rw rootfstype=cramfs\0" \ + "sensorType=O2I100AA\0" \ + "netretry=once\0" \ + "master=mw f0000b00 0x00052006;mw f0000b0c ${IOpin};" \ + "mw f0000b04 ${IOpin};mw f0000b10 0x20\0" diff --git a/include/configs/o2mnt.h b/include/configs/o2mnt.h new file mode 100644 index 0000000000..0c319b1c54 --- /dev/null +++ b/include/configs/o2mnt.h @@ -0,0 +1,77 @@ +/* + * (C) Copyright 2012 + * DENX Software Engineering, Anatolij Gustschin <agust@denx.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFF000000 boot low boot high (standard configuration) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xff000000 /* Standard: boot low */ +#endif + +/* Board specific flash config */ +#define CONFIG_SYS_FLASH_BASE 0xff000000 +#define CONFIG_SYS_FLASH_SIZE 0x01000000 /* maximum 16MB */ +/* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_SECT 128 + +/* + * Include common defines for all ifm boards + */ +#include "o2dnt-common.h" + +/* GPIO configuration */ +#define CONFIG_SYS_GPS_PORT_CONFIG 0x00002004 /* no CAN */ + +/* Other board specific configs */ +#define CONFIG_NETCONSOLE + +#define CONFIG_SYS_BOOTCS_CFG 0x00087801 +#define CONFIG_SYS_RESET_ADDRESS 0xff000000 + +#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x03f00000 /* 1 - 63 MB in DRAM */ + +#define CONFIG_BOARD_NAME "o2mnt" +#define CONFIG_BOARD_BOOTCMD "${newcmd}" +#define CONFIG_BOARD_MEM_LIMIT xstr(62) +#define BOARD_POST_CRC32_END xstr(0x01000000) + +#ifndef CONFIG_IFM_SENSOR_TYPE +#define CONFIG_IFM_SENSOR_TYPE "O2M110" +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_IFM_DEFAULT_ENV_SETTINGS \ + CONFIG_IFM_DEFAULT_ENV_OLD \ + CONFIG_IFM_DEFAULT_ENV_NEW \ + "linbot=ff060000\0" \ + "lintop=ff25ffff\0" \ + "rambot=ff260000\0" \ + "ramtop=ffc5ffff\0" \ + "jffbot=ffc60000\0" \ + "jfftop=ffffffff\0" \ + "ubobot=" xstr(CONFIG_SYS_FLASH_BASE) "\0" \ + "ubotop=ff03ffff\0" \ + "kernel_addr=0xff060000\0" \ + "ramdisk_addr=0xff260000\0" \ + "newcmd=run scrprot;run flash_ext2\0" \ + "scrprot=protect on ${linbot} ${lintop};protect on ${rambot} " \ + "${ramtop}\0" \ + "flash_ext2=run ext2args addip addmem;bootm ${kernel_addr}\0" \ + "ext2args=setenv bootargs root=/dev/mtdblock3 ro " \ + "rootfstype=ext2\0" \ + "pwm=mw f0000674 0x10006;mw f0000678 0x30000;" \ + "mw f0000678 0x30001;mw f0000670 0x3\0" \ + "master=mw f0000b00 0x00052006;mw f0000b0c $(IOpin);" \ + "mw f0000b04 $(IOpin);mw f0000b10 0x24;run pwm\0" \ + "sensortyp="CONFIG_IFM_SENSOR_TYPE"\0" \ + "srelease=0.00\0" diff --git a/include/configs/o3dnt.h b/include/configs/o3dnt.h new file mode 100644 index 0000000000..180d78ee83 --- /dev/null +++ b/include/configs/o3dnt.h @@ -0,0 +1,73 @@ +/* + * (C) Copyright 2012 + * DENX Software Engineering, Anatolij Gustschin <agust@denx.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +/* + * Valid values for CONFIG_SYS_TEXT_BASE are: + * 0xFC000000 boot low boot high (standard configuration) + * 0x00100000 boot from RAM (for testing only) + */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xfc000000 /* Standard: boot low */ +#endif + +/* Board specific flash config */ +#define CONFIG_SYS_FLASH_BASE 0xfc000000 +#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* maximum 64MB */ +/* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 + +/* + * Include common defines for all ifm boards + */ +#include "o2dnt-common.h" + +/* Additional commands */ +#define CONFIG_CMD_BSP +#define CONFIG_CMD_REGINFO + +/* + * GPIO configuration: + * no CAN + no PCI + */ +#define CONFIG_SYS_GPS_PORT_CONFIG 0x0000A000 + +/* Other board specific configs */ +#define CONFIG_SYS_BOOTCS_CFG 0x00057d01 +#define CONFIG_SYS_RESET_ADDRESS 0xfc000000 + +#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x03f00000 /* 1 - 63 MB in DRAM */ + +#define CONFIG_BOARD_NAME "o3dnt" +#define CONFIG_BOARD_BOOTCMD "run flash_self" +#define CONFIG_BOARD_MEM_LIMIT xstr(62) +#define BOARD_POST_CRC32_END xstr(0x01000000) + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_IFM_DEFAULT_ENV_SETTINGS \ + CONFIG_IFM_DEFAULT_ENV_OLD \ + CONFIG_IFM_DEFAULT_ENV_NEW \ + "linbot=fc060000\0" \ + "lintop=fc15ffff\0" \ + "rambot=fc160000\0" \ + "ramtop=fc55ffff\0" \ + "jffbot=fc560000\0" \ + "jfftop=fce5ffff\0" \ + "ubobot=" xstr(CONFIG_SYS_FLASH_BASE) "\0" \ + "ubotop=fc03ffff\0" \ + "calname="CONFIG_BOARD_NAME"/uCal_"CONFIG_BOARD_NAME"_act\0" \ + "calbot=fce60000\0" \ + "caltop=fcffffff\0" \ + "progCal=tftp 200000 ${calname};erase ${calbot} ${caltop};" \ + "cp.b ${fileaddr} ${calbot} ${filesize}\0" \ + "kernel_addr=0xfc060000\0" \ + "ramdisk_addr=0xfc160000\0" \ + "master=mw f0000b00 0x0005A006;mw f0000b0c ${IOpin};" \ + "mw f0000b04 ${IOpin};mw f0000b10 0x20\0" diff --git a/include/configs/omap1510inn.h b/include/configs/omap1510inn.h index f591a86ab5..7a7fa227c0 100644 --- a/include/configs/omap1510inn.h +++ b/include/configs/omap1510inn.h @@ -38,8 +38,6 @@ /* input clock of PLL */ #define CONFIG_SYS_CLK_FREQ 12000000 /* the OMAP1510 Innovator has 12MHz input clock */ -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ @@ -137,17 +135,6 @@ #define CONFIG_SYS_HZ 1000 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index 13762ccaf1..1abf2590ef 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -61,7 +61,6 @@ /* the OMAP2420 H4 has 12MHz, 13MHz, or 19.2Mhz crystal input */ #define CONFIG_SYS_CLK_FREQ V_SCLK -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ @@ -193,17 +192,6 @@ #define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE SZ_128K /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 657780edcf..782a4c5988 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -34,6 +34,7 @@ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ #define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */ +#define CONFIG_OMAP_GPIO #define CONFIG_SDRC /* The chip has SDRC controller */ @@ -50,7 +51,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_OF_LIBFDT 1 @@ -224,7 +224,7 @@ "bootfile=uImage.beagle\0" \ "console=ttyO2,115200n8\0" \ "mpurate=auto\0" \ - "buddy=none "\ + "buddy=none\0" \ "optargs=\0" \ "camera=none\0" \ "vram=12M\0" \ @@ -344,13 +344,6 @@ #define CONFIG_SYS_HZ 1000 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ @@ -420,6 +413,7 @@ #define CONFIG_SPL_FAT_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_OMAP3_ID_NAND #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" diff --git a/include/configs/omap3_evm_common.h b/include/configs/omap3_evm_common.h index 20192a90a7..d9578f47b0 100644 --- a/include/configs/omap3_evm_common.h +++ b/include/configs/omap3_evm_common.h @@ -22,14 +22,13 @@ */ #define CONFIG_OMAP /* This is TI OMAP core */ #define CONFIG_OMAP34XX /* belonging to 34XX family */ +#define CONFIG_OMAP_GPIO #define CONFIG_SDRC /* The chip has SDRC controller */ #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */ #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */ -#undef CONFIG_USE_IRQ /* no support for IRQs */ - /* * Clock related definitions */ @@ -52,12 +51,6 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) /* - * Stack sizes - * These values are used in start.S - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/* * Physical Memory Map * Note 1: CS1 may or may not be populated * Note 2: SDRAM size is expected to be at least 32MB diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 2e1e6b901d..b975a6c9a4 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -33,8 +33,7 @@ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP34XX /* which is a 34XX */ #define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */ - -#undef CONFIG_USE_IRQ /* no support for IRQs */ +#define CONFIG_OMAP_GPIO #define CONFIG_SYS_TEXT_BASE 0x80400000 @@ -286,13 +285,6 @@ #define CONFIG_SYS_HZ 1000 /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/* * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ diff --git a/include/configs/omap3_mvblx.h b/include/configs/omap3_mvblx.h index 6a1304681a..67af314652 100644 --- a/include/configs/omap3_mvblx.h +++ b/include/configs/omap3_mvblx.h @@ -39,6 +39,7 @@ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ #define CONFIG_MVBLX 1 /* working with mvBlueLYNX-X */ #define CONFIG_MACH_TYPE MACH_TYPE_MVBLX +#define CONFIG_OMAP_GPIO #define CONFIG_SDRC /* The chip has SDRC controller */ @@ -55,7 +56,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_OF_LIBFDT 1 @@ -247,13 +247,6 @@ #define CONFIG_SYS_HZ 1000 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index d29b3266c0..dd4b2c0e88 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -25,6 +25,7 @@ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP34XX /* which is a 34XX */ #define CONFIG_OMAP3_OVERO /* working with overo */ +#define CONFIG_OMAP_GPIO #define CONFIG_SDRC /* The chip has SDRC controller */ @@ -41,7 +42,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ @@ -231,13 +231,6 @@ #define CONFIG_SYS_HZ 1000 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ @@ -325,6 +318,7 @@ #define CONFIG_SPL_FAT_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 604b53d3cb..8a8a5d1cc0 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -29,6 +29,7 @@ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ #define CONFIG_OMAP3_PANDORA 1 /* working with pandora */ +#define CONFIG_OMAP_GPIO #define CONFIG_SDRC /* The chip has SDRC controller */ @@ -45,7 +46,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ @@ -217,13 +217,6 @@ #define CONFIG_SYS_HZ 1000 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ diff --git a/include/configs/omap3_sdp3430.h b/include/configs/omap3_sdp3430.h index 1d8b0abf3d..2a890c9c7e 100644 --- a/include/configs/omap3_sdp3430.h +++ b/include/configs/omap3_sdp3430.h @@ -61,7 +61,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ @@ -293,13 +292,6 @@ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ #define CONFIG_SYS_HZ 1000 -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* Regular stack */ - #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index 0f72ebe8eb..891e6f4363 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -51,7 +51,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ @@ -249,13 +248,6 @@ #define CONFIG_SYS_HZ 1000 /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h index b60ece3c53..4447dff00d 100644 --- a/include/configs/omap3_zoom2.h +++ b/include/configs/omap3_zoom2.h @@ -36,6 +36,7 @@ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP34XX 1 /* which is a 34XX */ #define CONFIG_OMAP3_ZOOM2 1 /* working with Zoom II */ +#define CONFIG_OMAP_GPIO #define CONFIG_SDRC /* The chip has SDRC controller */ @@ -52,7 +53,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ @@ -218,13 +218,6 @@ #define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using these settings - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index 2192c2b899..ee0c4b9d9b 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -35,6 +35,7 @@ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP44XX 1 /* which is a 44XX */ #define CONFIG_OMAP4430 1 /* which is in a 4430 */ +#define CONFIG_OMAP_GPIO /* Get CPU defs */ #include <asm/arch/cpu.h> @@ -48,7 +49,6 @@ #define V_OSCK 38400000 /* Clock output from T2 */ #define V_SCLK V_OSCK -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_OF_LIBFDT 1 @@ -206,17 +206,6 @@ #define CONFIG_SYS_HZ 1000 /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* Regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */ -#endif - -/* * SDRAM Memory Map * Even though we use two CS all the memory * is mapped to one contiguous block @@ -224,10 +213,7 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4030D800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ +#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ GENERATED_GBL_DATA_SIZE) #ifndef CONFIG_SYS_L2CACHE_OFF @@ -248,7 +234,7 @@ #define CONFIG_SPL #define CONFIG_SPL_TEXT_BASE 0x40304350 #define CONFIG_SPL_MAX_SIZE (38 * 1024) -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK +#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR /* * 64 bytes before this address should be set aside for u-boot.img's @@ -278,6 +264,7 @@ #define CONFIG_SPL_FAT_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SYS_THUMB_BUILD diff --git a/include/configs/omap5912osk.h b/include/configs/omap5912osk.h index 639d4a377e..40ca9bb98d 100644 --- a/include/configs/omap5912osk.h +++ b/include/configs/omap5912osk.h @@ -42,8 +42,6 @@ /* the OMAP5912 OSK has 12MHz input clock */ #define CONFIG_SYS_CLK_FREQ 12000000 -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 /* Required for ramdisk support */ @@ -139,17 +137,6 @@ #define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ diff --git a/include/configs/omap5_evm.h b/include/configs/omap5_evm.h index c5874bbf67..4f0a6c1358 100644 --- a/include/configs/omap5_evm.h +++ b/include/configs/omap5_evm.h @@ -38,6 +38,7 @@ #define CONFIG_OMAP54XX /* which is a 54XX */ #define CONFIG_OMAP5430 /* which is in a 5430 */ #define CONFIG_5430EVM /* working with EVM */ +#define CONFIG_OMAP_GPIO /* Get CPU defs */ #include <asm/arch/cpu.h> @@ -51,7 +52,6 @@ #define V_OSCK 19200000 /* Clock output from T2 */ #define V_SCLK V_OSCK -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_OF_LIBFDT @@ -209,17 +209,6 @@ #define CONFIG_SYS_HZ 1000 /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* Regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */ -#endif - -/* * SDRAM Memory Map * Even though we use two CS all the memory * is mapped to one contiguous block @@ -227,10 +216,7 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4030D800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ +#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS @@ -245,7 +231,7 @@ #define CONFIG_SPL #define CONFIG_SPL_TEXT_BASE 0x40300350 #define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */ -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK +#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ diff --git a/include/configs/omap730p2.h b/include/configs/omap730p2.h index f1cadb25fa..f24b765ee8 100644 --- a/include/configs/omap730p2.h +++ b/include/configs/omap730p2.h @@ -47,8 +47,6 @@ #define CONFIG_SYS_CLK_FREQ 13000000 -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 @@ -148,18 +146,6 @@ #define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ - -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- * Physical Memory Map */ diff --git a/include/configs/origen.h b/include/configs/origen.h index 172bf1472b..1ab983493e 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -116,9 +116,6 @@ #define CONFIG_SYS_HZ 1000 -/* Stack sizes */ -#define CONFIG_STACKSIZE (256 << 10) /* 256KB */ - /* ORIGEN has 4 bank of DRAM */ #define CONFIG_NR_DRAM_BANKS 4 #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ @@ -136,11 +133,6 @@ #undef CONFIG_CMD_IMLS #define CONFIG_IDENT_STRING " for ORIGEN" -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - #define CONFIG_CLK_1000_400_200 /* MIU (Memory Interleaving Unit) */ diff --git a/include/configs/otc570.h b/include/configs/otc570.h index 7abc42a4f5..fe4f3c0fa3 100644 --- a/include/configs/otc570.h +++ b/include/configs/otc570.h @@ -67,7 +67,6 @@ #define CONFIG_REVISION_TAG #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_MISC_INIT_R /* Call misc_init_r */ -#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */ #define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */ #define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */ @@ -274,10 +273,4 @@ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ 128*1024, 0x1000) -#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ - -#ifdef CONFIG_USE_IRQ -# error CONFIG_USE_IRQ not supported -#endif - #endif diff --git a/include/configs/palmld.h b/include/configs/palmld.h index 70b794db0f..835121ed3b 100644 --- a/include/configs/palmld.h +++ b/include/configs/palmld.h @@ -130,15 +130,6 @@ #define CONFIG_SYS_CPUSPEED 0x210 /* 416MHz ; N=2,L=16 */ /* - * Stack sizes - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/* * DRAM Map */ #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ diff --git a/include/configs/palmtc.h b/include/configs/palmtc.h index 7cf2c63bd8..bc88354c4a 100644 --- a/include/configs/palmtc.h +++ b/include/configs/palmtc.h @@ -131,15 +131,6 @@ #define CONFIG_SYS_CPUSPEED 0x161 /* 400MHz;L=1 M=3 T=1 */ /* - * Stack sizes - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/* * DRAM Map */ #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 0dd1e83a50..0eb9f3b604 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -18,20 +18,20 @@ #define __CONFIG_H #include <asm/sizes.h> -#include "tegra2-common.h" +#include "tegra20-common.h" /* Enable fdt support for Paz00. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-paz00 +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-paz00 #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE /* High-level configuration options */ -#define V_PROMPT "Tegra2 (Paz00) MOD # " -#define CONFIG_TEGRA2_BOARD_STRING "Compal Paz00" +#define V_PROMPT "Tegra20 (Paz00) MOD # " +#define CONFIG_TEGRA20_BOARD_STRING "Compal Paz00" /* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTA +#define CONFIG_TEGRA20_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define CONFIG_MACH_TYPE MACH_TYPE_PAZ00 @@ -68,6 +68,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP -#include "tegra2-common-post.h" +#include "tegra20-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h index 19b80d18e2..1e073177ed 100644 --- a/include/configs/pdnb3.h +++ b/include/configs/pdnb3.h @@ -118,17 +118,6 @@ #define CONFIG_IXP425_TIMER_CLK 66666666 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - /*************************************************************** * Platform/Board specific defines start here. ***************************************************************/ diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 9870590bd6..42291d4e28 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -26,20 +26,20 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include "tegra2-common.h" +#include "tegra20-common.h" /* Enable fdt support for Plutux. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-plutux +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-plutux #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE /* High-level configuration options */ -#define V_PROMPT "Tegra2 (Plutux) # " -#define CONFIG_TEGRA2_BOARD_STRING "Avionic Design Plutux" +#define V_PROMPT "Tegra20 (Plutux) # " +#define CONFIG_TEGRA20_BOARD_STRING "Avionic Design Plutux" /* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTD /* UARTD: debug UART */ +#define CONFIG_TEGRA20_ENABLE_UARTD /* UARTD: debug UART */ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE #define CONFIG_BOARD_EARLY_INIT_F @@ -78,6 +78,6 @@ "ext2load mmc 0 0x17000000 /boot/uImage;" \ "bootm" -#include "tegra2-common-post.h" +#include "tegra20-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index cdb3593c4f..ecc72b72d4 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -49,7 +49,6 @@ #define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261" #define CONFIG_PM9261 1 /* on a Ronetix PM9261 Board */ #define CONFIG_ARCH_CPU_INIT -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_SYS_TEXT_BASE 0 #define MACH_TYPE_PM9261 1187 @@ -380,10 +379,4 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ - -#ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported -#endif - #endif diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index d202d0ad26..b60a9ade15 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -49,7 +49,6 @@ #define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9263" #define CONFIG_PM9263 1 /* on a Ronetix PM9263 Board */ #define CONFIG_ARCH_CPU_INIT -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_SYS_TEXT_BASE 0 #define MACH_TYPE_PM9263 1475 @@ -412,10 +411,4 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ - -#ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported -#endif - #endif diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index c766330bb2..460933f79d 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -188,10 +188,4 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_STACKSIZE (32*1024) /* regular stack */ - -#ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported -#endif - #endif diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index f143ed003c..ce9e7d115d 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -66,8 +66,6 @@ #define CONFIG_DOS_PARTITION 1 #define CONFIG_BOARD_LATE_INIT -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - /* we will never enable dcache, because we have to setup MMU first */ #define CONFIG_SYS_DCACHE_OFF @@ -252,17 +250,6 @@ #endif /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/* * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ diff --git a/include/configs/qong.h b/include/configs/qong.h index e824e17edd..485e1b1f04 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -212,12 +212,6 @@ #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ #define CONFIG_MISC_INIT_R -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ /*----------------------------------------------------------------------- * Physical Memory Map diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h new file mode 100644 index 0000000000..cf62e45e8b --- /dev/null +++ b/include/configs/rpi_b.h @@ -0,0 +1,104 @@ +/* + * (C) Copyright 2012 Stephen Warren + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/sizes.h> + +/* Architecture, CPU, etc.*/ +#define CONFIG_ARM1176 +#define CONFIG_BCM2835 +#define CONFIG_ARCH_CPU_INIT +/* + * 2835 is a SKU in a series for which the 2708 is the first or primary SoC, + * so 2708 has historically been used rather than a dedicated 2835 ID. + */ +#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708 + +/* Timer */ +#define CONFIG_SYS_HZ 1000000 + +/* Memory layout */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_TEXT_BASE 0x00008000 +#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE +/* + * The board really has 256M. However, the VC (VideoCore co-processor) shares + * the RAM, and uses a configurable portion at the top. We tell U-Boot that a + * smaller amount of RAM is present in order to avoid stomping on the area + * the VC uses. + */ +#define CONFIG_SYS_SDRAM_SIZE SZ_128M +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_SDRAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_MALLOC_LEN SZ_4M +#define CONFIG_SYS_MEMTEST_START 0x00100000 +#define CONFIG_SYS_MEMTEST_END 0x00200000 + +/* Flash */ +#define CONFIG_SYS_NO_FLASH + +/* Devices */ +/* GPIO */ +#define CONFIG_BCM2835_GPIO + +/* Console UART */ +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_CLOCK 3000000 +#define CONFIG_PL01x_PORTS { (void *)0x20201000 } +#define CONFIG_CONS_INDEX 0 +#define CONFIG_BAUDRATE 115200 + +/* Console configuration */ +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* Environment */ +#define CONFIG_ENV_SIZE SZ_16K +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_SYS_LOAD_ADDR 0x1000000 + +/* Shell */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_MAXARGS 8 +#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING +#define CONFIG_COMMAND_HISTORY +#define CONFIG_AUTO_COMPLETE + +/* Commands */ +#include <config_cmd_default.h> +#define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_GPIO +/* Some things don't make sense on this HW or yet */ +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_SAVEENV + +/* Device tree support for bootm/bootz */ +#define CONFIG_OF_LIBFDT +/* ATAGs support for bootm/bootz */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG + +#endif diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 16be76457c..36f1a5700f 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -189,9 +189,6 @@ #define CONFIG_SYS_HZ 1000 -/* Stack sizes */ -#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ - /* Goni has 3 banks of DRAM, but swap the bank */ #define CONFIG_NR_DRAM_BANKS 3 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 721301f954..7727624c67 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -214,9 +214,6 @@ #define CONFIG_SYS_HZ 1000 -/* Stack sizes */ -#define CONFIG_STACKSIZE (256 << 10) /* regular stack 256KB */ - /* Universal has 2 banks of DRAM */ #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */ diff --git a/include/configs/sbc35_a9g20.h b/include/configs/sbc35_a9g20.h index 316e3fb925..4a1d25276e 100644 --- a/include/configs/sbc35_a9g20.h +++ b/include/configs/sbc35_a9g20.h @@ -45,7 +45,6 @@ #define CONFIG_SYS_HZ 1000 #define CONFIG_ARCH_CPU_INIT -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS @@ -182,10 +181,5 @@ * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) -#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ - -#ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported -#endif #endif diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h new file mode 100644 index 0000000000..0ebdfb8217 --- /dev/null +++ b/include/configs/sc_sps_1.h @@ -0,0 +1,208 @@ +/* + * SchulerControl GmbH, SC_SPS_1 module config + * + * Copyright (C) 2012 Marek Vasut <marex@denx.de> + * on behalf of DENX Software Engineering GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __SC_SPS_1_H__ +#define __SC_SPS_1_H__ + +/* + * SoC configurations + */ +#define CONFIG_MX28 /* i.MX28 SoC */ +#define CONFIG_MXS_GPIO /* GPIO control */ +#define CONFIG_SYS_HZ 1000 /* Ticks per second */ + +/* + * Define SC_SPS_1 machine type by hand until it lands in mach-types + */ +#define MACH_TYPE_SC_SPS_1 4172 + +#define CONFIG_MACH_TYPE MACH_TYPE_SC_SPS_1 + +#include <asm/arch/regs-base.h> + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_ARCH_CPU_INIT +#define CONFIG_ARCH_MISC_INIT + +#define CONFIG_ENV_IS_IN_MMC + +#define CONFIG_OF_LIBFDT + +/* + * SPL + */ +#define CONFIG_SPL +#define CONFIG_SPL_NO_CPU_SUPPORT_CODE +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT + +/* + * U-Boot Commands + */ +#include <config_cmd_default.h> +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DOS_PARTITION + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_GPIO +#define CONFIG_CMD_MII +#define CONFIG_CMD_MMC +#define CONFIG_CMD_NET +#define CONFIG_CMD_NFS +#define CONFIG_CMD_PING +#define CONFIG_CMD_SETEXPR +#define CONFIG_CMD_USB + +/* + * Memory configurations + */ +#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ +#define PHYS_SDRAM_1 0x40000000 /* Base address */ +#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ +#define CONFIG_STACKSIZE 0x00010000 /* 128 KB stack */ +#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ +#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ +#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +/* Point initial SP in SRAM so SPL can use it too. */ +#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 +#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) +/* + * We need to sacrifice first 4 bytes of RAM here to avoid triggering some + * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot + * binary. In case there was more of this mess, 0x100 bytes are skipped. + */ +#define CONFIG_SYS_TEXT_BASE 0x40000100 + +/* + * U-Boot general configurations + */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) + /* Print buffer size */ +#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + /* Boot argument buffer size */ +#define CONFIG_VERSION_VARIABLE /* U-BOOT version */ +#define CONFIG_AUTO_COMPLETE /* Command auto complete */ +#define CONFIG_CMDLINE_EDITING /* Command history etc */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +/* + * Serial Driver + */ +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_CLOCK 24000000 +#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } +#define CONFIG_CONS_INDEX 0 +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* + * MMC Driver + */ +#ifdef CONFIG_CMD_MMC +#define CONFIG_APBH_DMA +#define CONFIG_MMC +#define CONFIG_MMC_BOUNCE_BUFFER +#define CONFIG_GENERIC_MMC +#define CONFIG_MXS_MMC +#endif +#define CONFIG_ENV_SIZE (16 * 1024) +#ifdef CONFIG_ENV_IS_IN_MMC +#define CONFIG_ENV_OFFSET (256 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#else +#define CONFIG_ENV_IS_NOWHERE +#endif + +/* + * Ethernet on SOC (FEC) + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_ETHPRIME "FEC0" +#define CONFIG_FEC_MXC +#define CONFIG_FEC_MXC_MULTI +#define CONFIG_MII +#define CONFIG_DISCOVER_PHY +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_PHYLIB +#define CONFIG_PHY_SMSC +#endif + +/* + * USB + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MXS +#define CONFIG_EHCI_MXS_PORT 0 +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#endif + +/* + * Boot Linux + */ +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_BOOTARGS "console=ttyAMA0,115200" +#define CONFIG_BOOTCOMMAND "bootm " +#define CONFIG_LOADADDR 0x42000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* + * Extra Environments + */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "update_sd_firmware_filename=u-boot.sd\0" \ + "update_sd_firmware=" /* Update the SD firmware partition */ \ + "if mmc rescan ; then " \ + "if tftp ${update_sd_firmware_filename} ; then " \ + "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \ + "setexpr fw_sz ${fw_sz} + 1 ; " \ + "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \ + "fi ; " \ + "fi\0" + +#endif /* __SC_SPS_1_H__ */ diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h index 1494a2ecc4..2336a8d4ec 100644 --- a/include/configs/scb9328.h +++ b/include/configs/scb9328.h @@ -27,7 +27,6 @@ #define CONFIG_ARM920T 1 /* this is an ARM920T CPU */ #define CONFIG_IMX 1 /* in a Motorola MC9328MXL Chip */ #define CONFIG_SCB9328 1 /* on a scb9328tronix board */ -#undef CONFIG_USE_IRQ /* don't need use IRQ/FIQ */ #define CONFIG_IMX_SERIAL #define CONFIG_IMX_SERIAL1 @@ -100,13 +99,6 @@ */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128<<10) ) -#define CONFIG_STACKSIZE (120<<10) /* stack size */ - -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4<<10) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4<<10) /* FIQ stack */ -#endif - /* SDRAM Setup Values 0x910a8300 Precharge Command CAS 3 0x910a8200 Precharge Command CAS 2 diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index f661583fed..afc4a855bf 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -27,26 +27,26 @@ #include <asm/sizes.h> /* LP0 suspend / resume */ -#define CONFIG_TEGRA2_LP0 +#define CONFIG_TEGRA20_LP0 #define CONFIG_AES #define CONFIG_TEGRA_PMU #define CONFIG_TPS6586X_POWER #define CONFIG_TEGRA_CLOCK_SCALING -#include "tegra2-common.h" +#include "tegra20-common.h" /* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-seaboard +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-seaboard #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE /* High-level configuration options */ -#define V_PROMPT "Tegra2 (SeaBoard) # " -#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Seaboard" +#define V_PROMPT "Tegra20 (SeaBoard) # " +#define CONFIG_TEGRA20_BOARD_STRING "NVIDIA Seaboard" /* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTD +#define CONFIG_TEGRA20_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */ @@ -95,14 +95,14 @@ #define CONFIG_CMD_DHCP /* Enable keyboard */ -#define CONFIG_TEGRA2_KEYBOARD +#define CONFIG_TEGRA20_KEYBOARD #define CONFIG_KEYBOARD -#undef TEGRA2_DEVICE_SETTINGS -#define TEGRA2_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \ +#undef TEGRA20_DEVICE_SETTINGS +#define TEGRA20_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \ "stdout=serial\0" \ "stderr=serial\0" -#include "tegra2-common-post.h" +#include "tegra20-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h index 8792c857c8..1c0978da8a 100644 --- a/include/configs/smdk2410.h +++ b/include/configs/smdk2410.h @@ -45,8 +45,6 @@ /* input clock of PLL (the SMDK2410 has 12MHz input clock) */ #define CONFIG_SYS_CLK_FREQ 12000000 -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -149,17 +147,6 @@ #define CONFIG_LZMA /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index eb1466c52b..47369aa939 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -69,7 +69,7 @@ /* select serial console configuration */ #define CONFIG_SERIAL_MULTI -#define CONFIG_SERIAL1 /* use SERIAL 1 */ +#define CONFIG_SERIAL3 /* use SERIAL 3 */ #define CONFIG_BAUDRATE 115200 #define EXYNOS5_DEFAULT_UART_OFFSET 0x010000 @@ -112,6 +112,11 @@ #define CONFIG_SPL #define COPY_BL2_FNPTR_ADDR 0x02020030 +/* specific .lds file */ +#define CONFIG_SPL_LDSCRIPT "board/samsung/smdk5250/smdk5250-uboot-spl.lds" +#define CONFIG_SPL_TEXT_BASE 0x02023400 +#define CONFIG_SPL_MAX_SIZE (14 * 1024) + #define CONFIG_BOOTCOMMAND "mmc read 40007000 451 2000; bootm 40007000" /* Miscellaneous configurable options */ @@ -133,9 +138,6 @@ #define CONFIG_RD_LVL -/* Stack sizes */ -#define CONFIG_STACKSIZE (256 << 10) /* 256KB */ - #define CONFIG_NR_DRAM_BANKS 8 #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 04caeef968..d4dc8ef82d 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -141,13 +141,6 @@ #define CONFIG_SYS_HZ 1000 -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE 0x40000 /* regular stack 256KB */ - /********************************** Support Clock Settings ********************************** diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index fd9f96d462..22de3448e3 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -182,13 +182,6 @@ #define CONFIG_SYS_HZ 1000 -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ - /* SMDKC100 has 1 banks of DRAM, we use only one in U-Boot */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 41d7780a0e..602337f4da 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -115,9 +115,6 @@ #define CONFIG_SYS_HZ 1000 -/* Stack sizes */ -#define CONFIG_STACKSIZE (256 << 10) /* 256KB */ - /* SMDKV310 has 4 bank of DRAM */ #define CONFIG_NR_DRAM_BANKS 4 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ @@ -135,11 +132,6 @@ #undef CONFIG_CMD_IMLS #define CONFIG_IDENT_STRING " for SMDKC210/V310" -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - #define CONFIG_CLK_1000_400_200 /* MIU (Memory Interleaving Unit) */ diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 8af3c02f34..218ca546bb 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -40,7 +40,6 @@ /* CPU */ #define CONFIG_ARCH_CPU_INIT -#undef CONFIG_USE_IRQ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS @@ -162,7 +161,6 @@ /* U-Boot memory settings */ #define CONFIG_SYS_MALLOC_LEN (1 << 20) -#define CONFIG_STACKSIZE (256 << 10) /* Command line configuration */ #include <config_cmd_default.h> diff --git a/include/configs/snowball.h b/include/configs/snowball.h new file mode 100644 index 0000000000..30f4a4eb55 --- /dev/null +++ b/include/configs/snowball.h @@ -0,0 +1,266 @@ +/* + * Copyright (C) ST-Ericsson SA 2009 + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * #define DEBUG 1 + */ + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SNOWBALL +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_ARCH_CPU_INIT +#define CONFIG_BOARD_LATE_INIT + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_U8500 +#define CONFIG_L2_OFF + +#define CONFIG_SYS_MEMTEST_START 0x00000000 +#define CONFIG_SYS_MEMTEST_END 0x1FFFFFFF +#define CONFIG_SYS_HZ 1000 /* must be 1000 */ + +/*----------------------------------------------------------------------- + * Size of environment and malloc() pool + */ +/* + * If you use U-Boot as crash kernel, make sure that it does not overwrite + * information saved by kexec during panic. Kexec expects the start + * address of the executable 32K above "crashkernel" address. + */ +/* + * Size of malloc() pool + */ +#define CONFIG_ENV_SIZE (8*1024) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024) + +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */ + +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_CMD_ENV +#define CONFIG_CMD_SAVEENV +#define CONFIG_ENV_OFFSET 0x0118000 +#define CONFIG_SYS_MMC_ENV_DEV 0 /* SLOT2: eMMC */ + +/* + * PL011 Configuration + */ +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_SERIAL_RLCR +#define CONFIG_PL011_SERIAL_FLUSH_ON_INIT + +/* + * U8500 UART registers base for 3 serial devices + */ +#define CFG_UART0_BASE 0x80120000 +#define CFG_UART1_BASE 0x80121000 +#define CFG_UART2_BASE 0x80007000 +#define CFG_SERIAL0 CFG_UART0_BASE +#define CFG_SERIAL1 CFG_UART1_BASE +#define CFG_SERIAL2 CFG_UART2_BASE +#define CONFIG_PL011_CLOCK 38400000 +#define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1, \ + (void *)CFG_SERIAL2 } +#define CONFIG_CONS_INDEX 2 +#define CONFIG_BAUDRATE 115200 + +/* + * Devices and file systems + */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_DOS_PARTITION + +/* + * Commands + */ +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_BOOTD +#define CONFIG_CMD_BDI +#define CONFIG_CMD_IMI +#define CONFIG_CMD_MISC +#define CONFIG_CMD_RUN +#define CONFIG_CMD_ECHO +#define CONFIG_CMD_CONSOLE +#define CONFIG_CMD_LOADS +#define CONFIG_CMD_LOADB +#define CONFIG_CMD_MMC +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_SOURCE + +#ifndef CONFIG_BOOTDELAY +#define CONFIG_BOOTDELAY 1 +#endif +#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ + +#undef CONFIG_BOOTARGS +#define CONFIG_BOOTCOMMAND \ +"mmc dev 1; " \ + "if run loadbootscript; " \ + "then run bootscript; " \ + "else " \ + "if run mmcload; " \ + "then run mmcboot; " \ + "else " \ + "mmc dev 0; " \ + "if run emmcloadbootscript; " \ + "then run bootscript; " \ + "else " \ + "if run emmcload; " \ + "then run emmcboot; " \ + "else " \ + "echo No media to boot from; " \ + "fi; " \ + "fi; " \ + "fi; " \ + "fi; " + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "verify=n\0" \ + "loadaddr=0x00100000\0" \ + "console=ttyAMA2,115200n8\0" \ + "loadbootscript=fatload mmc 1:1 ${loadaddr} boot.scr\0" \ + "emmcloadbootscript=fatload mmc 0:2 ${loadaddr} boot.scr\0" \ + "bootscript=echo Running bootscript " \ + "from mmc ...; source ${loadaddr}\0" \ + "memargs256=mem=96M@0 mem_modem=32M@96M mem=32M@128M " \ + "hwmem=22M@160M pmem_hwb=42M@182M mem_mali=32@224M\0" \ + "memargs512=mem=96M@0 mem_modem=32M@96M hwmem=32M@128M " \ + "mem=64M@160M mem_mali=32M@224M " \ + "pmem_hwb=128M@256M mem=128M@384M\0" \ + "memargs1024=mem=128M@0 mali.mali_mem=32M@128M " \ + "hwmem=168M@M160M mem=48M@328M " \ + "mem_issw=1M@383M mem=640M@384M\0" \ + "memargs=setenv bootargs ${bootargs} ${memargs1024}\0" \ + "emmcload=fatload mmc 0:2 ${loadaddr} uImage\0" \ + "mmcload=fatload mmc 1:1 ${loadaddr} uImage\0" \ + "commonargs=setenv bootargs console=${console} " \ + "vmalloc=300M\0" \ + "emmcargs=setenv bootargs ${bootargs} " \ + "root=/dev/mmcblk0p3 " \ + "rootwait\0" \ + "addcons=setenv bootargs ${bootargs} " \ + "console=${console}\0" \ + "emmcboot=echo Booting from eMMC ...; " \ + "run commonargs emmcargs memargs; " \ + "bootm ${loadaddr}\0" \ + "mmcargs=setenv bootargs ${bootargs} " \ + "root=/dev/mmcblk1p2 " \ + "rootwait earlyprintk\0" \ + "mmcboot=echo Booting from external MMC ...; " \ + "run commonargs mmcargs memargs; " \ + "bootm ${loadaddr}\0" \ + "fdt_high=0x2BC00000\0" \ + "stdout=serial,usbtty\0" \ + "stdin=serial,usbtty\0" \ + "stderr=serial,usbtty\0" + +/*----------------------------------------------------------------------- + * Miscellaneous configurable options + */ + +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "U8500 $ " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ + + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */ + +#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ +#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 + +#define CONFIG_SYS_HUSH_PARSER 1 +#define CONFIG_CMDLINE_EDITING + +#define CONFIG_SETUP_MEMORY_TAGS 2 +#define CONFIG_INITRD_TAG 1 +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ + +/* + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 0x00000000 /* DDR-SDRAM Bank #1 */ + +/* + * additions for new relocation code + */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_MAX_RAM_SIZE 0x40000000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x100000 +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET + +/* landing address before relocation */ +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0x0 +#endif + +/* + * MMC related configs + */ +#define CONFIG_ARM_PL180_MMCI +#define MMC_BLOCK_SIZE 512 +#define CFG_EMMC_BASE 0x80114000 +#define CFG_MMC_BASE 0x80126000 + +/* + * FLASH and environment organization + */ +#define CONFIG_SYS_NO_FLASH + +/* + * base register values for U8500 + */ +#define CFG_PRCMU_BASE 0x80157000 /* Power, reset and clock */ + + +/* + * U8500 GPIO register base for 9 banks + */ +#define CONFIG_DB8500_GPIO +#define CFG_GPIO_0_BASE 0x8012E000 +#define CFG_GPIO_1_BASE 0x8012E080 +#define CFG_GPIO_2_BASE 0x8000E000 +#define CFG_GPIO_3_BASE 0x8000E080 +#define CFG_GPIO_4_BASE 0x8000E100 +#define CFG_GPIO_5_BASE 0x8000E180 +#define CFG_GPIO_6_BASE 0x8011E000 +#define CFG_GPIO_7_BASE 0x8011E080 +#define CFG_GPIO_8_BASE 0xA03FE000 + +#define CFG_FSMC_BASE 0x80000000 /* FSMC Controller */ + +#endif /* __CONFIG_H */ diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index a6d1cfbcb0..192cda1438 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -233,14 +233,6 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO -/* Stack sizes */ -#define CONFIG_STACKSIZE (128*1024) - -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) -#define CONFIG_STACKSIZE_FIQ (4*1024) -#endif - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x00000000 diff --git a/include/configs/stamp9g20.h b/include/configs/stamp9g20.h new file mode 100644 index 0000000000..a2a0156a65 --- /dev/null +++ b/include/configs/stamp9g20.h @@ -0,0 +1,266 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian@popies.net> + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2010 + * Achim Ehrlich <aehrlich@taskit.de> + * taskit GmbH <www.taskit.de> + * + * (C) Copyright 2012 + * Markus Hubig <mhubig@imko.de> + * IMKO GmbH <www.imko.de> + * + * Configuation settings for the stamp9g20 CPU module. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * SoC must be defined first, before hardware.h is included. + * In this case SoC is defined in boards.cfg. + */ +#include <asm/hardware.h> + +/* + * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot + * program. Since the linker has to swallow that define, we must use a pure + * hex number here! + */ +#define CONFIG_SYS_TEXT_BASE 0x23f00000 + +/* ARM asynchronous clock */ +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */ +#define CONFIG_SYS_HZ 1000 /* 1ms resolution */ + +/* misc settings */ +#define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */ +#define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */ +#define CONFIG_INITRD_TAG /* pass initrd param to kernel */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ +#define CONFIG_BOARD_EARLY_INIT_f /* call board_early_init_f() */ +#define CONFIG_DISPLAY_CPUINFO /* display CPU Info at startup */ + +/* setting board specific options */ +#ifdef CONFIG_PORTUXG20 +# define CONFIG_MACH_TYPE MACH_TYPE_PORTUXG20 +# define CONFIG_MACB +#else +# define CONFIG_MACH_TYPE MACH_TYPE_STAMP9G20 +#endif + +/* + * SDRAM: 1 bank, 64 MB, base address 0x20000000 + * Already initialized before u-boot gets started. + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CONFIG_SYS_SDRAM_SIZE (64 << 20) + +/* + * Perform a SDRAM Memtest from the start of SDRAM + * till the beginning of the U-Boot position in RAM. + */ +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN \ + ROUND(3 * CONFIG_ENV_SIZE + (128 << 10), 0x1000) + +/* + * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, + * leaving the correct space for initial global data structure above that + * address while providing maximum stack area below. + */ +#define CONFIG_SYS_INIT_SP_ADDR \ + (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) + +/* NAND flash settings */ +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 +#define CONFIG_SYS_NAND_DBW_8 +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 + +/* general purpose I/O */ +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ +#define CONFIG_AT91_GPIO /* enable the GPIO features */ +#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ + +/* serial console */ +#define CONFIG_ATMEL_USART +#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CONFIG_USART_ID ATMEL_ID_SYS +#define CONFIG_BAUDRATE 115200 + +/* LED configuration */ +#define CONFIG_STATUS_LED +#define CONFIG_BOARD_SPECIFIC_LED + +/* The LED PINs */ +#define CONFIG_RED_LED AT91_PIN_PC5 +#define CONFIG_GREEN_LED AT91_PIN_PC4 +#define CONFIG_YELLOW_LED AT91_PIN_PC10 + +#define STATUS_LED_RED 0 +#define STATUS_LED_GREEN 1 +#define STATUS_LED_YELLOW 2 + +/* Red LED */ +#define STATUS_LED_BIT STATUS_LED_RED +#define STATUS_LED_STATE STATUS_LED_OFF +#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) + +/* Green LED */ +#define STATUS_LED_BIT1 STATUS_LED_GREEN +#define STATUS_LED_STATE1 STATUS_LED_ON +#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) + +/* Yellow LED */ +#define STATUS_LED_BIT2 STATUS_LED_YELLOW +#define STATUS_LED_STATE2 STATUS_LED_OFF +#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2) + +/* Boot status LED */ +#define STATUS_LED_BOOT STATUS_LED_GREEN + +/* + * Ethernet configuration + * + * PortuxG20 has always ethernet but for Stamp9G20 you + * can enable it here if your baseboard features ethernet. + */ + +/* #define CONFIG_MACB */ + +#ifdef CONFIG_MACB +# define CONFIG_RMII /* use reduced MII inteface */ +# define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */ + +/* BOOTP and DHCP options */ +# define CONFIG_BOOTP_BOOTFILESIZE +# define CONFIG_BOOTP_BOOTPATH +# define CONFIG_BOOTP_GATEWAY +# define CONFIG_BOOTP_HOSTNAME +# define CONFIG_NFSBOOTCOMMAND \ + "setenv autoload yes; setenv autoboot yes; " \ + "setenv bootargs ${basicargs} ${mtdparts} " \ + "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \ + "dhcp" +#endif /* CONFIG_MACB */ + +/* Enable the watchdog */ +#define CONFIG_AT91SAM9_WATCHDOG +#define CONFIG_HW_WATCHDOG + +/* USB configuration */ +#define CONFIG_USB_ATMEL +#define CONFIG_USB_OHCI_NEW +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_SYS_USB_OHCI_CPU_INIT +#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 + +/* General Boot Parameter */ +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTCOMMAND "run flashboot" +#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING + +/* + * RAM Memory address where to put the + * Linux Kernel befor starting. + */ +#define CONFIG_SYS_LOAD_ADDR 0x22000000 + +/* + * The NAND Flash partitions: + * ========================================== + * 0x0000000-0x001ffff -> 128k, bootstrap + * 0x0020000-0x005ffff -> 256k, u-boot + * 0x0060000-0x007ffff -> 128k, env1 + * 0x0080000-0x009ffff -> 128k, env2 (backup) + * 0x0100000-0x06fffff -> 6M, kernel + * 0x0700000-0x8000000 -> 121M, RootFS + */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET ((128 + 256) << 10) +#define CONFIG_ENV_OFFSET_REDUND ((128 + 256 + 128) << 10) +#define CONFIG_ENV_SIZE (128 << 10) + +/* + * Predefined environment variables. + * Usefull to define some easy to use boot commands. + */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + \ + "basicargs=console=ttyS0,115200\0" \ + \ + "mtdparts=mtdparts=atmel_nand:128k(bootstrap)ro," \ + "256k(uboot)ro,128k(env1)ro," \ + "128k(env2)ro,6M(linux),-(root)rw\0" \ + \ + "flashboot=setenv bootargs ${basicargs} ${mtdparts} " \ + "root=/dev/mtdblock5 rootfstype=jffs2; " \ + "nand read 0x22000000 0x100000 0x600000; " \ + "bootm 22000000\0" \ + \ + "sdboot=setenv bootargs ${basicargs} ${mtdparts} " \ + "root=/dev/mmcblk0p1 rootwait; " \ + "nand read 0x22000000 0x100000 0x600000; " \ + "bootm 22000000" + +/* Command line & features configuration */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS + +#define CONFIG_CMD_NAND +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_CMD_LED + +#ifdef CONFIG_MACB +# define CONFIG_CMD_PING +# define CONFIG_CMD_DHCP +#else +# undef CONFIG_CMD_BOOTD +# undef CONFIG_CMD_NET +# undef CONFIG_CMD_NFS +#endif /* CONFIG_MACB */ + +#endif /* __CONFIG_H */ diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 777f77cfc0..375265d475 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -27,6 +27,7 @@ */ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP34XX /* which is a 34XX */ +#define CONFIG_OMAP_GPIO #define CONFIG_SYS_TEXT_BASE 0x80008000 @@ -47,7 +48,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ @@ -183,12 +183,6 @@ #define CONFIG_SYS_HZ 1000 /* - * Stack sizes - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - -/* * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ @@ -251,6 +245,7 @@ #define CONFIG_SPL_I2C_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" diff --git a/include/configs/tec.h b/include/configs/tec.h index 3d0a78825b..9b3f88dff8 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -26,21 +26,21 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include "tegra2-common.h" +#include "tegra20-common.h" /* Enable fdt support for TEC. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-tec +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-tec #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE /* High-level configuration options */ -#define V_PROMPT "Tegra2 (TEC) # " -#define CONFIG_TEGRA2_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier" +#define V_PROMPT "Tegra20 (TEC) # " +#define CONFIG_TEGRA20_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier" #define CONFIG_SYS_BOARD_ODMDATA 0x2b0d8011 /* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTD /* UARTD: debug UART */ +#define CONFIG_TEGRA20_ENABLE_UARTD /* UARTD: debug UART */ #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE #define CONFIG_BOARD_EARLY_INIT_F @@ -79,4 +79,6 @@ "ext2load mmc 0 0x17000000 /boot/uImage;" \ "bootm" +#include "tegra20-common-post.h" + #endif /* __CONFIG_H */ diff --git a/include/configs/tegra2-common-post.h b/include/configs/tegra20-common-post.h index c21fc28dfe..42f270f7bc 100644 --- a/include/configs/tegra2-common-post.h +++ b/include/configs/tegra20-common-post.h @@ -21,8 +21,8 @@ * MA 02111-1307 USA */ -#ifndef __TEGRA2_COMMON_POST_H -#define __TEGRA2_COMMON_POST_H +#ifndef __TEGRA20_COMMON_POST_H +#define __TEGRA20_COMMON_POST_H #ifdef CONFIG_BOOTCOMMAND @@ -141,9 +141,74 @@ #endif #define CONFIG_EXTRA_ENV_SETTINGS \ - TEGRA2_DEVICE_SETTINGS \ + TEGRA20_DEVICE_SETTINGS \ "fdt_load=0x01000000\0" \ "fdt_high=01100000\0" \ BOOTCMDS_COMMON -#endif /* __TEGRA2_COMMON_POST_H */ +/* overrides for SPL build here */ +#ifdef CONFIG_SPL_BUILD + +/* remove devicetree support */ +#ifdef CONFIG_OF_CONTROL +#undef CONFIG_OF_CONTROL +#endif + +/* remove SERIAL_MULTI */ +#ifdef CONFIG_SERIAL_MULTI +#undef CONFIG_SERIAL_MULTI +#endif + +/* remove I2C support */ +#ifdef CONFIG_TEGRA_I2C +#undef CONFIG_TEGRA_I2C +#endif +#ifdef CONFIG_CMD_I2C +#undef CONFIG_CMD_I2C +#endif + +/* remove MMC support */ +#ifdef CONFIG_MMC +#undef CONFIG_MMC +#endif +#ifdef CONFIG_GENERIC_MMC +#undef CONFIG_GENERIC_MMC +#endif +#ifdef CONFIG_TEGRA20_MMC +#undef CONFIG_TEGRA20_MMC +#endif +#ifdef CONFIG_CMD_MMC +#undef CONFIG_CMD_MMC +#endif + +/* remove partitions/filesystems */ +#ifdef CONFIG_DOS_PARTITION +#undef CONFIG_DOS_PARTITION +#endif +#ifdef CONFIG_EFI_PARTITION +#undef CONFIG_EFI_PARTITION +#endif +#ifdef CONFIG_CMD_EXT2 +#undef CONFIG_CMD_EXT2 +#endif +#ifdef CONFIG_CMD_FAT +#undef CONFIG_CMD_FAT +#endif + +/* remove USB */ +#ifdef CONFIG_USB_EHCI +#undef CONFIG_USB_EHCI +#endif +#ifdef CONFIG_USB_EHCI_TEGRA +#undef CONFIG_USB_EHCI_TEGRA +#endif +#ifdef CONFIG_USB_STORAGE +#undef CONFIG_USB_STORAGE +#endif +#ifdef CONFIG_CMD_USB +#undef CONFIG_CMD_USB +#endif + +#endif /* CONFIG_SPL_BUILD */ + +#endif /* __TEGRA20_COMMON_POST_H */ diff --git a/include/configs/tegra2-common.h b/include/configs/tegra20-common.h index 680776270b..4c02f20543 100644 --- a/include/configs/tegra2-common.h +++ b/include/configs/tegra20-common.h @@ -21,8 +21,8 @@ * MA 02111-1307 USA */ -#ifndef __TEGRA2_COMMON_H -#define __TEGRA2_COMMON_H +#ifndef __TEGRA20_COMMON_H +#define __TEGRA20_COMMON_H #include <asm/sizes.h> /* @@ -37,15 +37,13 @@ * High Level Configuration Options */ #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ -#define CONFIG_TEGRA2 /* in a NVidia Tegra2 core */ -#define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */ +#define CONFIG_TEGRA20 /* in a NVidia Tegra20 core */ +#define CONFIG_TEGRA /* which is a Tegra generic machine */ #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ #define CONFIG_SYS_CACHELINE_SIZE 32 -#define CONFIG_ARCH_CPU_INIT /* Fire up the A9 core */ - -#include <asm/arch/tegra2.h> /* get chip and board defs */ +#include <asm/arch/tegra20.h> /* get chip and board defs */ /* * Display CPU and Board information @@ -53,12 +51,10 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_SKIP_LOWLEVEL_INIT - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_OF_LIBFDT /* enable passing of devicetree */ -#ifdef CONFIG_TEGRA2_LP0 +#ifdef CONFIG_TEGRA20_LP0 #define TEGRA_LP0_ADDR 0x1C406000 #define TEGRA_LP0_SIZE 0x2000 #define TEGRA_LP0_VEC \ @@ -112,7 +108,7 @@ #define CONFIG_EHCI_IS_TDI #define CONFIG_EHCI_DCACHE -/* Total I2C ports on Tegra2 */ +/* Total I2C ports on Tegra20 */ #define TEGRA_I2C_NUM_CONTROLLERS 4 /* include default commands */ @@ -136,7 +132,7 @@ /* Environment information, boards can override if required */ #define CONFIG_CONSOLE_MUX #define CONFIG_SYS_CONSOLE_IS_IN_ENV -#define TEGRA2_DEVICE_SETTINGS "stdin=serial\0" \ +#define TEGRA20_DEVICE_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" @@ -161,28 +157,22 @@ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) -#define CONFIG_SYS_MEMTEST_START (TEGRA2_SDRC_CS0 + 0x600000) +#define CONFIG_SYS_MEMTEST_START (TEGRA20_SDRC_CS0 + 0x600000) #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) #define CONFIG_SYS_LOAD_ADDR (0xA00800) /* default */ #define CONFIG_SYS_HZ 1000 -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ #define CONFIG_STACKBASE 0x2800000 /* 40MB */ -#define CONFIG_STACKSIZE 0x20000 /* 128K regular stack*/ /*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM_1 TEGRA2_SDRC_CS0 +#define PHYS_SDRAM_1 TEGRA20_SDRC_CS0 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_TEXT_BASE 0x00108000 +#define CONFIG_SYS_TEXT_BASE 0x0010c000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE @@ -195,4 +185,20 @@ #define CONFIG_CMD_GPIO #define CONFIG_CMD_ENTERRCM #define CONFIG_CMD_BOOTZ -#endif /* __TEGRA2_COMMON_H */ + +/* Defines for SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_TEXT_BASE 0x00108000 +#define CONFIG_SPL_MAX_SIZE 0x00004000 +#define CONFIG_SYS_SPL_MALLOC_START 0x00090000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 +#define CONFIG_SPL_STACK 0x000ffffc + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/tegra20/u-boot-spl.lds" + +#endif /* __TEGRA20_COMMON_H */ diff --git a/include/configs/tnetv107x_evm.h b/include/configs/tnetv107x_evm.h index 2272ad27c2..23cab88ded 100644 --- a/include/configs/tnetv107x_evm.h +++ b/include/configs/tnetv107x_evm.h @@ -55,7 +55,6 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024) #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_STACKSIZE (256*1024) #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 diff --git a/include/configs/tny_a9260.h b/include/configs/tny_a9260.h index def5306012..bc04a00945 100644 --- a/include/configs/tny_a9260.h +++ b/include/configs/tny_a9260.h @@ -59,7 +59,6 @@ #define CONFIG_SYS_HZ 1000 #define CONFIG_ARCH_CPU_INIT -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -166,10 +165,4 @@ */ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) -#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ - -#ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported -#endif - #endif diff --git a/include/configs/top9000.h b/include/configs/top9000.h index 1a5f680682..7cc65773b4 100644 --- a/include/configs/top9000.h +++ b/include/configs/top9000.h @@ -71,7 +71,6 @@ /* Misc CPU related */ #define CONFIG_ARCH_CPU_INIT -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -303,9 +302,5 @@ extern void read_factory_r(void); /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN \ ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) -#define CONFIG_STACKSIZE (32*1024) -#ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported -#endif #endif diff --git a/include/configs/trats.h b/include/configs/trats.h index d2dfc9ff22..8a0deea434 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -42,8 +42,10 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -/* Keep L2 Cache Disabled */ -#define CONFIG_SYS_L2CACHE_OFF +#ifndef CONFIG_SYS_L2CACHE_OFF +#define CONFIG_SYS_L2_PL310 +#define CONFIG_SYS_PL310_BASE 0x10502000 +#endif #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_TEXT_BASE 0x63300000 @@ -144,6 +146,7 @@ "meminfo=crashkernel=32M@0x50000000\0" \ "nfsroot=/nfsroot/arm\0" \ "bootblock=" CONFIG_BOOTBLOCK "\0" \ + "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ "mmcdev=0\0" \ "mmcbootpart=2\0" \ "mmcrootpart=3\0" \ @@ -165,9 +168,6 @@ #define CONFIG_SYS_HZ 1000 -/* Stack sizes */ -#define CONFIG_STACKSIZE (256 << 10) /* regular stack 256KB */ - /* TRATS has 2 banks of DRAM */ #define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */ diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 56336ae199..63c98dc723 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -58,7 +58,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#undef CONFIG_USE_IRQ /* no support for IRQs */ #define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ @@ -245,9 +244,6 @@ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ #define CONFIG_SYS_HZ 1000 -/* The stack sizes are set up in start.S using the settings below */ -#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index 34be8a98a1..b3c524981f 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -25,21 +25,21 @@ #define __CONFIG_H #include <asm/sizes.h> -#include "tegra2-common.h" +#include "tegra20-common.h" /* Enable fdt support for TrimSlice. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-trimslice +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-trimslice #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE /* High-level configuration options */ -#define V_PROMPT "Tegra2 (TrimSlice) # " -#define CONFIG_TEGRA2_BOARD_STRING "Compulab Trimslice" +#define V_PROMPT "Tegra20 (TrimSlice) # " +#define CONFIG_TEGRA20_BOARD_STRING "Compulab Trimslice" /* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTA -#define CONFIG_TEGRA2_UARTA_GPU +#define CONFIG_TEGRA20_ENABLE_UARTA +#define CONFIG_TEGRA20_UARTA_GPU #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define CONFIG_MACH_TYPE MACH_TYPE_TRIMSLICE @@ -94,6 +94,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP -#include "tegra2-common-post.h" +#include "tegra20-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h index b4ec8f0c3c..151059a939 100644 --- a/include/configs/trizepsiv.h +++ b/include/configs/trizepsiv.h @@ -46,8 +46,6 @@ #define CONFIG_BOARD_LATE_INIT #define CONFIG_SYS_TEXT_BASE 0x0 -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - /* we will never enable dcache, because we have to setup MMU first */ #define CONFIG_SYS_DCACHE_OFF @@ -178,17 +176,6 @@ #endif /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/* * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */ diff --git a/include/configs/tt01.h b/include/configs/tt01.h index 2b2e7fd8cd..cc68a42e86 100644 --- a/include/configs/tt01.h +++ b/include/configs/tt01.h @@ -86,9 +86,6 @@ /* default load address, 1MB up the road */ #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1+0x100000) -/* The stack sizes are set up in start.S using the settings below */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - /* Size of malloc() pool, make sure possible frame buffer fits */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 10*1024*1024) diff --git a/include/configs/tx25.h b/include/configs/tx25.h index 6821528971..c8a49bba14 100644 --- a/include/configs/tx25.h +++ b/include/configs/tx25.h @@ -84,7 +84,6 @@ /* 8MB DRAM test */ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000) -#define CONFIG_STACKSIZE (256 * 1024) /* regular stack */ /* * Serial Info diff --git a/include/configs/u8500_href.h b/include/configs/u8500_href.h index b26efec570..1bb612826e 100644 --- a/include/configs/u8500_href.h +++ b/include/configs/u8500_href.h @@ -178,16 +178,6 @@ #define CONFIG_SYS_I2C_GPIOE_ADDR 0x42 /* GPIO expander chip addr */ #define CONFIG_TC35892_GPIO -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ - -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif /* * Physical Memory Map diff --git a/include/configs/vct.h b/include/configs/vct.h index 0a5ce6459c..b4b0949522 100644 --- a/include/configs/vct.h +++ b/include/configs/vct.h @@ -47,7 +47,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) -#define CONFIG_STACKSIZE (256 << 10) #define CONFIG_SYS_MALLOC_LEN (1 << 20) #define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10) #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/ventana.h b/include/configs/ventana.h index 5e4d53861c..25ec2ebfec 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -25,20 +25,20 @@ #define __CONFIG_H #include <asm/sizes.h> -#include "tegra2-common.h" +#include "tegra20-common.h" /* Enable fdt support for Ventana. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-ventana +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-ventana #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE /* High-level configuration options */ -#define V_PROMPT "Tegra2 (Ventana) # " -#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Ventana" +#define V_PROMPT "Tegra20 (Ventana) # " +#define CONFIG_TEGRA20_BOARD_STRING "NVIDIA Ventana" /* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTD +#define CONFIG_TEGRA20_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE #define CONFIG_MACH_TYPE MACH_TYPE_VENTANA @@ -75,6 +75,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP -#include "tegra2-common-post.h" +#include "tegra20-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/versatile.h b/include/configs/versatile.h index ff23a92d91..38f5302e71 100644 --- a/include/configs/versatile.h +++ b/include/configs/versatile.h @@ -145,17 +145,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ /*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ diff --git a/include/configs/vision2.h b/include/configs/vision2.h index ed004a659c..fba897c1ea 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -177,11 +177,6 @@ #define CONFIG_SYS_HUSH_PARSER /* - * Stack sizes - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - -/* * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 @@ -214,6 +209,8 @@ #define CONFIG_VIDEO_IPUV3 #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_CMD_BMP diff --git a/include/configs/vl_ma2sc.h b/include/configs/vl_ma2sc.h index 24f89c98e4..e2cf4f005e 100644 --- a/include/configs/vl_ma2sc.h +++ b/include/configs/vl_ma2sc.h @@ -29,7 +29,6 @@ /*--------------------------------------------------------------------------*/ -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_ARM926EJS /* This is an ARM926EJS Core */ #define CONFIG_AT91FAMILY #define CONFIG_AT91SAM9263 /* It's an Atmel AT91SAM9263 SoC*/ @@ -379,8 +378,6 @@ ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ -#define CONFIG_STACKSIZE (32*1024) /* regular stack */ - #ifndef CONFIG_RAMLOAD #define CONFIG_BOOTCOMMAND "run nfsboot" #endif @@ -454,10 +451,4 @@ "erase 10060000 1007FFFF;reset\0" \ " " -/*--------------------------------------------------------------------------*/ - -#ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported -#endif - #endif diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index 01f0b6ce5e..424a902456 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -165,14 +165,6 @@ #define CONFIG_SYS_HZ 1000 /* Timer @ 3250000 Hz */ #define CONFIG_SYS_CPUSPEED 0x190 /* 312MHz */ -/* - * Stack sizes - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif /* * DRAM Map diff --git a/include/configs/whistler.h b/include/configs/whistler.h index f2952d5f45..b747d0e2b2 100644 --- a/include/configs/whistler.h +++ b/include/configs/whistler.h @@ -25,21 +25,21 @@ #define __CONFIG_H #include <asm/sizes.h> -#include "tegra2-common.h" +#include "tegra20-common.h" /* Enable fdt support for Whistler. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra2-whistler +#define CONFIG_DEFAULT_DEVICE_TREE tegra20-whistler #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE /* High-level configuration options */ -#define V_PROMPT "Tegra2 (Whistler) # " -#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Whistler" +#define V_PROMPT "Tegra20 (Whistler) # " +#define CONFIG_TEGRA20_BOARD_STRING "NVIDIA Whistler" /* Board-specific serial config */ #define CONFIG_SERIAL_MULTI -#define CONFIG_TEGRA2_ENABLE_UARTA -#define CONFIG_TEGRA2_UARTA_UAA_UAB +#define CONFIG_TEGRA20_ENABLE_UARTA +#define CONFIG_TEGRA20_UARTA_UAA_UAB #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define CONFIG_MACH_TYPE MACH_TYPE_WHISTLER @@ -89,6 +89,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP -#include "tegra2-common-post.h" +#include "tegra20-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h index 0ed3bf4a8a..e399e95019 100644 --- a/include/configs/xaeniax.h +++ b/include/configs/xaeniax.h @@ -44,12 +44,8 @@ #define CONFIG_XAENIAX 1 /* on a xaeniax board */ #define CONFIG_SYS_TEXT_BASE 0x0 - #define CONFIG_BOARD_LATE_INIT - -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - /* we will never enable dcache, because we have to setup MMU first */ #define CONFIG_SYS_DCACHE_OFF @@ -182,17 +178,6 @@ #define CONFIG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */ /* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/* * SMSC91C111 Network Card */ #define CONFIG_SMC91111 1 diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 8e6377019b..8b7e05b9e5 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -30,7 +30,6 @@ #define CONFIG_SYS_TEXT_BASE 0x0 #undef CONFIG_BOARD_LATE_INIT -#undef CONFIG_USE_IRQ #undef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_PREBOOT @@ -154,15 +153,6 @@ unsigned char zipitz2_spi_read(void); #define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */ /* - * Stack sizes - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/* * SRAM Map */ #define PHYS_SRAM 0x5c000000 /* SRAM Bank #1 */ diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index c9f737d429..072945ad4a 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -171,6 +171,5 @@ * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (0x400000 - 0x8000) -#define CONFIG_STACKSIZE (32*1024) /* regular stack */ #endif /* __CONFIG_H */ |
