diff options
Diffstat (limited to 'include/configs/xupv2p.h')
| -rw-r--r-- | include/configs/xupv2p.h | 112 |
1 files changed, 56 insertions, 56 deletions
diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 0e33714657..6a9270306d 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -35,17 +35,17 @@ #define CONFIG_XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR #define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE -#define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } +#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } #else #ifdef XILINX_UART16550_BASEADDR -#define CFG_NS16550 -#define CFG_NS16550_SERIAL -#define CFG_NS16550_REG_SIZE 4 +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 4 #define CONFIG_CONS_INDEX 1 -#define CFG_NS16550_COM1 XILINX_UART16550_BASEADDR -#define CFG_NS16550_CLK XILINX_UART16550_CLOCK_HZ +#define CONFIG_SYS_NS16550_COM1 XILINX_UART16550_BASEADDR +#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ #define CONFIG_BAUDRATE 115200 -#define CFG_BAUDRATE_TABLE { 9600, 115200 } +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 } #endif #endif @@ -53,46 +53,46 @@ * setting reset address * * TEXT_BASE is set to place, where the U-BOOT run in RAM, but - * if you want to store U-BOOT in flash, set CFG_RESET_ADDRESS + * if you want to store U-BOOT in flash, set CONFIG_SYS_RESET_ADDRESS * to FLASH memory and after loading bitstream jump to FLASH. * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze - * jump to CFG_RESET_ADDRESS where is the original U-BOOT code. + * jump to CONFIG_SYS_RESET_ADDRESS where is the original U-BOOT code. */ -/* #define CFG_RESET_ADDRESS 0x36000000 */ +/* #define CONFIG_SYS_RESET_ADDRESS 0x36000000 */ /* ethernet */ #ifdef XILINX_EMAC_BASEADDR #define CONFIG_XILINX_EMAC 1 -#define CFG_ENET +#define CONFIG_SYS_ENET #else #ifdef XILINX_EMACLITE_BASEADDR #define CONFIG_XILINX_EMACLITE 1 -#define CFG_ENET +#define CONFIG_SYS_ENET #endif #endif #undef ET_DEBUG /* gpio */ #ifdef XILINX_GPIO_BASEADDR -#define CFG_GPIO_0 1 -#define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR +#define CONFIG_SYS_GPIO_0 1 +#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR #endif /* interrupt controller */ #ifdef XILINX_INTC_BASEADDR -#define CFG_INTC_0 1 -#define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR -#define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS +#define CONFIG_SYS_INTC_0 1 +#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR +#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS #endif /* timer */ #ifdef XILINX_TIMER_BASEADDR #if (XILINX_TIMER_IRQ != -1) -#define CFG_TIMER_0 1 -#define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR -#define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ +#define CONFIG_SYS_TIMER_0 1 +#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR +#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ #define FREQUENCE XILINX_CLOCK_FREQ -#define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) +#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) #endif #else #ifdef XILINX_CLOCK_FREQ @@ -104,14 +104,14 @@ /* * memory layout - Example * TEXT_BASE = 0x3600_0000; - * CFG_SRAM_BASE = 0x3000_0000; - * CFG_SRAM_SIZE = 0x1000_0000; + * CONFIG_SYS_SRAM_BASE = 0x3000_0000; + * CONFIG_SYS_SRAM_SIZE = 0x1000_0000; * - * CFG_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000 - * CFG_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000 - * CFG_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000 + * CONFIG_SYS_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000 + * CONFIG_SYS_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000 + * CONFIG_SYS_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000 * - * 0x3000_0000 CFG_SDRAM_BASE + * 0x3000_0000 CONFIG_SYS_SDRAM_BASE * FREE * 0x3600_0000 TEXT_BASE * U-BOOT code @@ -119,40 +119,40 @@ * FREE * * STACK - * 0x3FF7_F000 CFG_MALLOC_BASE + * 0x3FF7_F000 CONFIG_SYS_MALLOC_BASE * MALLOC_AREA 256kB Alloc - * 0x3FFB_F000 CFG_MONITOR_BASE + * 0x3FFB_F000 CONFIG_SYS_MONITOR_BASE * MONITOR_CODE 256kB Env - * 0x3FFF_F000 CFG_GBL_DATA_OFFSET + * 0x3FFF_F000 CONFIG_SYS_GBL_DATA_OFFSET * GLOBAL_DATA 4kB bd, gd - * 0x4000_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE + * 0x4000_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE */ /* ddr sdram - main memory */ -#define CFG_SDRAM_BASE XILINX_RAM_START -#define CFG_SDRAM_SIZE XILINX_RAM_SIZE -#define CFG_MEMTEST_START CFG_SDRAM_BASE -#define CFG_MEMTEST_END (CFG_SDRAM_BASE + 0x1000) +#define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START +#define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) /* global pointer */ -#define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ -#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* start of global data */ +#define CONFIG_SYS_GBL_DATA_SIZE 0x1000 /* size of global data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) /* start of global data */ /* monitor code */ #define SIZE 0x40000 -#define CFG_MONITOR_LEN SIZE -#define CFG_MONITOR_BASE (CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN) -#define CFG_MONITOR_END (CFG_MONITOR_BASE + CFG_MONITOR_LEN) -#define CFG_MALLOC_LEN SIZE -#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) +#define CONFIG_SYS_MONITOR_LEN SIZE +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_MALLOC_LEN SIZE +#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) /* stack */ -#define CFG_INIT_SP_OFFSET CFG_MALLOC_BASE +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE -#define CFG_NO_FLASH 1 +#define CONFIG_SYS_NO_FLASH 1 #define CONFIG_ENV_IS_NOWHERE 1 #define CONFIG_ENV_SIZE 0x1000 -#define CONFIG_ENV_ADDR (CFG_MONITOR_BASE - CONFIG_ENV_SIZE) +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) /* * BOOTP options @@ -175,7 +175,7 @@ #define CONFIG_CMD_CACHE #define CONFIG_CMD_IRQ -#ifndef CFG_ENET +#ifndef CONFIG_SYS_ENET #undef CONFIG_CMD_NET #else #define CONFIG_CMD_PING @@ -187,12 +187,12 @@ #endif /* Miscellaneous configurable options */ -#define CFG_PROMPT "U-Boot-mONStR> " -#define CFG_CBSIZE 512 /* size of console buffer */ -#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* print buffer size */ -#define CFG_MAXARGS 15 /* max number of command args */ -#define CFG_LONGHELP -#define CFG_LOAD_ADDR 0x12000000 /* default load address */ +#define CONFIG_SYS_PROMPT "U-Boot-mONStR> " +#define CONFIG_SYS_CBSIZE 512 /* size of console buffer */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ +#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" @@ -204,8 +204,8 @@ #define CONFIG_ETHADDR 00:E0:0C:00:00:FD /* architecture dependent code */ -#define CFG_USR_EXCEP /* user exception */ -#define CFG_HZ 1000 +#define CONFIG_SYS_USR_EXCEP /* user exception */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_PREBOOT "echo U-BOOT by mONStR;" \ "base 0;" \ @@ -216,8 +216,8 @@ #define CONFIG_SYSTEMACE /* #define DEBUG_SYSTEMACE */ #define SYSTEMACE_CONFIG_FPGA -#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR -#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH +#define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR +#define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH #define CONFIG_DOS_PARTITION #endif |
