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-rw-r--r--include/asm-ppc/immap_512x.h10
-rw-r--r--include/asm-ppc/mpc512x.h3
-rw-r--r--include/asm-ppc/ppc4xx-sdram.h7
-rw-r--r--include/asm-ppc/processor.h6
4 files changed, 20 insertions, 6 deletions
diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h
index 79cdd80298..bdc6ff2845 100644
--- a/include/asm-ppc/immap_512x.h
+++ b/include/asm-ppc/immap_512x.h
@@ -347,6 +347,16 @@ typedef struct ddr512x {
#define MDDRC_REFRESH_ZERO_MASK 0x0000FFFF
/*
+ * DDR Memory Controller Configuration settings
+ */
+typedef struct ddr512x_config {
+ u32 ddr_sys_config; /* System Configuration Register */
+ u32 ddr_time_config0; /* Timing Configuration Register */
+ u32 ddr_time_config1; /* Timing Configuration Register */
+ u32 ddr_time_config2; /* Timing Configuration Register */
+} ddr512x_config_t;
+
+/*
* DMA/Messaging Unit
*/
typedef struct dma512x {
diff --git a/include/asm-ppc/mpc512x.h b/include/asm-ppc/mpc512x.h
index 8ef0d9ca6d..960e229294 100644
--- a/include/asm-ppc/mpc512x.h
+++ b/include/asm-ppc/mpc512x.h
@@ -50,7 +50,8 @@ static inline void sync_law(volatile void *addr)
/*
* Prototypes
*/
-extern long int fixed_sdram(u32 *mddrc_config, u32 *dram_init_seq, int seq_sz);
+extern long int fixed_sdram(ddr512x_config_t *mddrc_config,
+ u32 *dram_init_seq, int seq_sz);
extern int mpc5121_diu_init(void);
extern void ide_set_reset(int idereset);
diff --git a/include/asm-ppc/ppc4xx-sdram.h b/include/asm-ppc/ppc4xx-sdram.h
index b6182d4f21..92be514b40 100644
--- a/include/asm-ppc/ppc4xx-sdram.h
+++ b/include/asm-ppc/ppc4xx-sdram.h
@@ -117,6 +117,7 @@
#define SDRAM_MCSTS_MRSC 0x80000000
#define SDRAM_MCSTS_SRMS 0x40000000
#define SDRAM_MCSTS_CIS 0x20000000
+#define SDRAM_MCSTS_IDLE_NOT 0x00000000 /* Mem contr not idle */
/*
* SDRAM Refresh Timer Register
@@ -416,8 +417,7 @@
#define SDRAM_SDTR3 0x87 /* DDR SDRAM timing 3 */
#define SDRAM_MMODE 0x88 /* memory mode */
#define SDRAM_MEMODE 0x89 /* memory extended mode */
-#define SDRAM_ECCCR 0x98 /* ECC error status */
-#define SDRAM_ECCES SDRAM_ECCCR
+#define SDRAM_ECCES 0x98 /* ECC error status */
#define SDRAM_CID 0xA4 /* core ID */
#ifndef CONFIG_405EX
#define SDRAM_RID 0xA8 /* revision ID */
@@ -1397,7 +1397,6 @@
/*
* Prototypes
*/
-void inline blank_string(int size);
inline void ppc4xx_ibm_ddr2_register_dump(void);
u32 mfdcr_any(u32);
void mtdcr_any(u32, u32);
@@ -1405,6 +1404,8 @@ u32 ddr_wrdtr(u32);
u32 ddr_clktr(u32);
void spd_ddr_init_hang(void);
u32 DQS_autocalibration(void);
+phys_size_t sdram_memsize(void);
+void dcbz_area(u32 start_address, u32 num_bytes);
#endif /* __ASSEMBLY__ */
#endif /* _PPC4xx_SDRAM_H_ */
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index d009957d8b..f61778f864 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -863,14 +863,16 @@
#define PVR_405EP_RA 0x51210950
#define PVR_405GPR_RB 0x50910951
#define PVR_405EZ_RA 0x41511460
-#define PVR_405EXR1_RA 0x12911473 /* 405EXr rev A/B with Security */
#define PVR_405EXR2_RA 0x12911471 /* 405EXr rev A/B without Security */
#define PVR_405EX1_RA 0x12911477 /* 405EX rev A/B with Security */
-#define PVR_405EX2_RA 0x12911475 /* 405EX rev A/B without Security */
#define PVR_405EXR1_RC 0x1291147B /* 405EXr rev C with Security */
#define PVR_405EXR2_RC 0x12911479 /* 405EXr rev C without Security */
#define PVR_405EX1_RC 0x1291147F /* 405EX rev C with Security */
#define PVR_405EX2_RC 0x1291147D /* 405EX rev C without Security */
+#define PVR_405EXR1_RD 0x12911472 /* 405EXr rev D with Security */
+#define PVR_405EXR2_RD 0x12911470 /* 405EXr rev D without Security */
+#define PVR_405EX1_RD 0x12911475 /* 405EX rev D with Security */
+#define PVR_405EX2_RD 0x12911473 /* 405EX rev D without Security */
#define PVR_440GP_RB 0x40120440
#define PVR_440GP_RC 0x40120481
#define PVR_440EP_RA 0x42221850
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