diff options
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/Makefile | 9 | ||||
| -rw-r--r-- | drivers/spi/exynos_spi.c | 513 | ||||
| -rw-r--r-- | drivers/spi/fdt_spi.c | 186 | ||||
| -rw-r--r-- | drivers/spi/sandbox_spi.c | 200 | ||||
| -rw-r--r-- | drivers/spi/soft_spi.c | 227 | ||||
| -rw-r--r-- | drivers/spi/soft_spi_legacy.c | 176 | ||||
| -rw-r--r-- | drivers/spi/spi-emul-uclass.c | 15 | ||||
| -rw-r--r-- | drivers/spi/spi-uclass.c | 390 | ||||
| -rw-r--r-- | drivers/spi/tegra114_spi.c | 254 | ||||
| -rw-r--r-- | drivers/spi/tegra20_sflash.c | 238 | ||||
| -rw-r--r-- | drivers/spi/tegra20_slink.c | 235 | ||||
| -rw-r--r-- | drivers/spi/tegra_spi.h | 12 |
12 files changed, 1383 insertions, 1072 deletions
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index f02c35a52c..eabbf27d4d 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -6,7 +6,14 @@ # # There are many options which enable SPI, so make this library available +ifdef CONFIG_DM_SPI +obj-y += spi-uclass.o +obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o +obj-$(CONFIG_SOFT_SPI) += soft_spi.o +else obj-y += spi.o +obj-$(CONFIG_SOFT_SPI) += soft_spi_legacy.o +endif obj-$(CONFIG_EP93XX_SPI) += ep93xx_spi.o obj-$(CONFIG_ALTERA_SPI) += altera_spi.o @@ -30,11 +37,9 @@ obj-$(CONFIG_MXS_SPI) += mxs_spi.o obj-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o -obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SH_SPI) += sh_spi.o obj-$(CONFIG_SH_QSPI) += sh_qspi.o obj-$(CONFIG_FSL_ESPI) += fsl_espi.o -obj-$(CONFIG_FDT_SPI) += fdt_spi.o obj-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o obj-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o obj-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c index 2969184ee8..f078973531 100644 --- a/drivers/spi/exynos_spi.c +++ b/drivers/spi/exynos_spi.c @@ -6,6 +6,8 @@ */ #include <common.h> +#include <dm.h> +#include <errno.h> #include <malloc.h> #include <spi.h> #include <fdtdec.h> @@ -19,176 +21,35 @@ DECLARE_GLOBAL_DATA_PTR; -/* Information about each SPI controller */ -struct spi_bus { +struct exynos_spi_platdata { enum periph_id periph_id; s32 frequency; /* Default clock frequency, -1 for none */ struct exynos_spi *regs; - int inited; /* 1 if this bus is ready for use */ - int node; uint deactivate_delay_us; /* Delay to wait after deactivate */ }; -/* A list of spi buses that we know about */ -static struct spi_bus spi_bus[EXYNOS5_SPI_NUM_CONTROLLERS]; -static unsigned int bus_count; - -struct exynos_spi_slave { - struct spi_slave slave; +struct exynos_spi_priv { struct exynos_spi *regs; unsigned int freq; /* Default frequency */ unsigned int mode; enum periph_id periph_id; /* Peripheral ID for this device */ unsigned int fifo_size; int skip_preamble; - struct spi_bus *bus; /* Pointer to our SPI bus info */ ulong last_transaction_us; /* Time of last transaction end */ }; -static struct spi_bus *spi_get_bus(unsigned dev_index) -{ - if (dev_index < bus_count) - return &spi_bus[dev_index]; - debug("%s: invalid bus %d", __func__, dev_index); - - return NULL; -} - -static inline struct exynos_spi_slave *to_exynos_spi(struct spi_slave *slave) -{ - return container_of(slave, struct exynos_spi_slave, slave); -} - -/** - * Setup the driver private data - * - * @param bus ID of the bus that the slave is attached to - * @param cs ID of the chip select connected to the slave - * @param max_hz Required spi frequency - * @param mode Required spi mode (clk polarity, clk phase and - * master or slave) - * @return new device or NULL - */ -struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct exynos_spi_slave *spi_slave; - struct spi_bus *bus; - - if (!spi_cs_is_valid(busnum, cs)) { - debug("%s: Invalid bus/chip select %d, %d\n", __func__, - busnum, cs); - return NULL; - } - - spi_slave = spi_alloc_slave(struct exynos_spi_slave, busnum, cs); - if (!spi_slave) { - debug("%s: Could not allocate spi_slave\n", __func__); - return NULL; - } - - bus = &spi_bus[busnum]; - spi_slave->bus = bus; - spi_slave->regs = bus->regs; - spi_slave->mode = mode; - spi_slave->periph_id = bus->periph_id; - if (bus->periph_id == PERIPH_ID_SPI1 || - bus->periph_id == PERIPH_ID_SPI2) - spi_slave->fifo_size = 64; - else - spi_slave->fifo_size = 256; - - spi_slave->skip_preamble = 0; - spi_slave->last_transaction_us = timer_get_us(); - - spi_slave->freq = bus->frequency; - if (max_hz) - spi_slave->freq = min(max_hz, spi_slave->freq); - - return &spi_slave->slave; -} - -/** - * Free spi controller - * - * @param slave Pointer to spi_slave to which controller has to - * communicate with - */ -void spi_free_slave(struct spi_slave *slave) -{ - struct exynos_spi_slave *spi_slave = to_exynos_spi(slave); - - free(spi_slave); -} - /** * Flush spi tx, rx fifos and reset the SPI controller * - * @param slave Pointer to spi_slave to which controller has to - * communicate with + * @param regs Pointer to SPI registers */ -static void spi_flush_fifo(struct spi_slave *slave) +static void spi_flush_fifo(struct exynos_spi *regs) { - struct exynos_spi_slave *spi_slave = to_exynos_spi(slave); - struct exynos_spi *regs = spi_slave->regs; - clrsetbits_le32(®s->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST); clrbits_le32(®s->ch_cfg, SPI_CH_RST); setbits_le32(®s->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON); } -/** - * Initialize the spi base registers, set the required clock frequency and - * initialize the gpios - * - * @param slave Pointer to spi_slave to which controller has to - * communicate with - * @return zero on success else a negative value - */ -int spi_claim_bus(struct spi_slave *slave) -{ - struct exynos_spi_slave *spi_slave = to_exynos_spi(slave); - struct exynos_spi *regs = spi_slave->regs; - u32 reg = 0; - int ret; - - ret = set_spi_clk(spi_slave->periph_id, - spi_slave->freq); - if (ret < 0) { - debug("%s: Failed to setup spi clock\n", __func__); - return ret; - } - - exynos_pinmux_config(spi_slave->periph_id, PINMUX_FLAG_NONE); - - spi_flush_fifo(slave); - - reg = readl(®s->ch_cfg); - reg &= ~(SPI_CH_CPHA_B | SPI_CH_CPOL_L); - - if (spi_slave->mode & SPI_CPHA) - reg |= SPI_CH_CPHA_B; - - if (spi_slave->mode & SPI_CPOL) - reg |= SPI_CH_CPOL_L; - - writel(reg, ®s->ch_cfg); - writel(SPI_FB_DELAY_180, ®s->fb_clk); - - return 0; -} - -/** - * Reset the spi H/W and flush the tx and rx fifos - * - * @param slave Pointer to spi_slave to which controller has to - * communicate with - */ -void spi_release_bus(struct spi_slave *slave) -{ - spi_flush_fifo(slave); -} - static void spi_get_fifo_levels(struct exynos_spi *regs, int *rx_lvl, int *tx_lvl) { @@ -208,6 +69,8 @@ static void spi_get_fifo_levels(struct exynos_spi *regs, */ static void spi_request_bytes(struct exynos_spi *regs, int count, int step) { + debug("%s: regs=%p, count=%d, step=%d\n", __func__, regs, count, step); + /* For word address we need to swap bytes */ if (step == 4) { setbits_le32(®s->mode_cfg, @@ -230,10 +93,10 @@ static void spi_request_bytes(struct exynos_spi *regs, int count, int step) writel(count | SPI_PACKET_CNT_EN, ®s->pkt_cnt); } -static int spi_rx_tx(struct exynos_spi_slave *spi_slave, int todo, +static int spi_rx_tx(struct exynos_spi_priv *priv, int todo, void **dinp, void const **doutp, unsigned long flags) { - struct exynos_spi *regs = spi_slave->regs; + struct exynos_spi *regs = priv->regs; uchar *rxp = *dinp; const uchar *txp = *doutp; int rx_lvl, tx_lvl; @@ -245,8 +108,8 @@ static int spi_rx_tx(struct exynos_spi_slave *spi_slave, int todo, out_bytes = in_bytes = todo; - stopping = spi_slave->skip_preamble && (flags & SPI_XFER_END) && - !(spi_slave->mode & SPI_SLAVE); + stopping = priv->skip_preamble && (flags & SPI_XFER_END) && + !(priv->mode & SPI_SLAVE); /* * Try to transfer words if we can. This helps read performance at @@ -254,7 +117,7 @@ static int spi_rx_tx(struct exynos_spi_slave *spi_slave, int todo, */ step = 1; if (!((todo | (uintptr_t)rxp | (uintptr_t)txp) & 3) && - !spi_slave->skip_preamble) + !priv->skip_preamble) step = 4; /* @@ -279,7 +142,7 @@ static int spi_rx_tx(struct exynos_spi_slave *spi_slave, int todo, * Don't completely fill the txfifo, since we don't want our * rxfifo to overflow, and it may already contain data. */ - while (tx_lvl < spi_slave->fifo_size/2 && out_bytes) { + while (tx_lvl < priv->fifo_size/2 && out_bytes) { if (!txp) temp = -1; else if (step == 4) @@ -295,9 +158,9 @@ static int spi_rx_tx(struct exynos_spi_slave *spi_slave, int todo, if (rx_lvl >= step) { while (rx_lvl >= step) { temp = readl(®s->rx_data); - if (spi_slave->skip_preamble) { + if (priv->skip_preamble) { if (temp == SPI_PREAMBLE_END_BYTE) { - spi_slave->skip_preamble = 0; + priv->skip_preamble = 0; stopping = 0; } } else { @@ -326,7 +189,7 @@ static int spi_rx_tx(struct exynos_spi_slave *spi_slave, int todo, txp = NULL; spi_request_bytes(regs, toread, step); } - if (spi_slave->skip_preamble && get_timer(start) > 100) { + if (priv->skip_preamble && get_timer(start) > 100) { printf("SPI timeout: in_bytes=%d, out_bytes=%d, ", in_bytes, out_bytes); return -1; @@ -340,94 +203,29 @@ static int spi_rx_tx(struct exynos_spi_slave *spi_slave, int todo, } /** - * Transfer and receive data - * - * @param slave Pointer to spi_slave to which controller has to - * communicate with - * @param bitlen No of bits to tranfer or receive - * @param dout Pointer to transfer buffer - * @param din Pointer to receive buffer - * @param flags Flags for transfer begin and end - * @return zero on success else a negative value - */ -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - struct exynos_spi_slave *spi_slave = to_exynos_spi(slave); - int upto, todo; - int bytelen; - int ret = 0; - - /* spi core configured to do 8 bit transfers */ - if (bitlen % 8) { - debug("Non byte aligned SPI transfer.\n"); - return -1; - } - - /* Start the transaction, if necessary. */ - if ((flags & SPI_XFER_BEGIN)) - spi_cs_activate(slave); - - /* - * Exynos SPI limits each transfer to 65535 transfers. To keep - * things simple, allow a maximum of 65532 bytes. We could allow - * more in word mode, but the performance difference is small. - */ - bytelen = bitlen / 8; - for (upto = 0; !ret && upto < bytelen; upto += todo) { - todo = min(bytelen - upto, (1 << 16) - 4); - ret = spi_rx_tx(spi_slave, todo, &din, &dout, flags); - if (ret) - break; - } - - /* Stop the transaction, if necessary. */ - if ((flags & SPI_XFER_END) && !(spi_slave->mode & SPI_SLAVE)) { - spi_cs_deactivate(slave); - if (spi_slave->skip_preamble) { - assert(!spi_slave->skip_preamble); - debug("Failed to complete premable transaction\n"); - ret = -1; - } - } - - return ret; -} - -/** - * Validates the bus and chip select numbers - * - * @param bus ID of the bus that the slave is attached to - * @param cs ID of the chip select connected to the slave - * @return one on success else zero - */ -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - return spi_get_bus(bus) && cs == 0; -} - -/** * Activate the CS by driving it LOW * * @param slave Pointer to spi_slave to which controller has to * communicate with */ -void spi_cs_activate(struct spi_slave *slave) +static void spi_cs_activate(struct udevice *dev) { - struct exynos_spi_slave *spi_slave = to_exynos_spi(slave); + struct udevice *bus = dev->parent; + struct exynos_spi_platdata *pdata = dev_get_platdata(bus); + struct exynos_spi_priv *priv = dev_get_priv(bus); /* If it's too soon to do another transaction, wait */ - if (spi_slave->bus->deactivate_delay_us && - spi_slave->last_transaction_us) { + if (pdata->deactivate_delay_us && + priv->last_transaction_us) { ulong delay_us; /* The delay completed so far */ - delay_us = timer_get_us() - spi_slave->last_transaction_us; - if (delay_us < spi_slave->bus->deactivate_delay_us) - udelay(spi_slave->bus->deactivate_delay_us - delay_us); + delay_us = timer_get_us() - priv->last_transaction_us; + if (delay_us < pdata->deactivate_delay_us) + udelay(pdata->deactivate_delay_us - delay_us); } - clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT); - debug("Activate CS, bus %d\n", spi_slave->slave.bus); - spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE; + clrbits_le32(&priv->regs->cs_reg, SPI_SLAVE_SIG_INACT); + debug("Activate CS, bus '%s'\n", bus->name); + priv->skip_preamble = priv->mode & SPI_PREAMBLE; } /** @@ -436,148 +234,197 @@ void spi_cs_activate(struct spi_slave *slave) * @param slave Pointer to spi_slave to which controller has to * communicate with */ -void spi_cs_deactivate(struct spi_slave *slave) +static void spi_cs_deactivate(struct udevice *dev) { - struct exynos_spi_slave *spi_slave = to_exynos_spi(slave); + struct udevice *bus = dev->parent; + struct exynos_spi_platdata *pdata = dev_get_platdata(bus); + struct exynos_spi_priv *priv = dev_get_priv(bus); - setbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT); + setbits_le32(&priv->regs->cs_reg, SPI_SLAVE_SIG_INACT); /* Remember time of this transaction so we can honour the bus delay */ - if (spi_slave->bus->deactivate_delay_us) - spi_slave->last_transaction_us = timer_get_us(); + if (pdata->deactivate_delay_us) + priv->last_transaction_us = timer_get_us(); - debug("Deactivate CS, bus %d\n", spi_slave->slave.bus); + debug("Deactivate CS, bus '%s'\n", bus->name); } -static inline struct exynos_spi *get_spi_base(int dev_index) +static int exynos_spi_ofdata_to_platdata(struct udevice *bus) { - if (dev_index < 3) - return (struct exynos_spi *)samsung_get_base_spi() + dev_index; - else - return (struct exynos_spi *)samsung_get_base_spi_isp() + - (dev_index - 3); -} + struct exynos_spi_platdata *plat = bus->platdata; + const void *blob = gd->fdt_blob; + int node = bus->of_offset; -/* - * Read the SPI config from the device tree node. - * - * @param blob FDT blob to read from - * @param node Node offset to read from - * @param bus SPI bus structure to fill with information - * @return 0 if ok, or -FDT_ERR_NOTFOUND if something was missing - */ -#ifdef CONFIG_OF_CONTROL -static int spi_get_config(const void *blob, int node, struct spi_bus *bus) -{ - bus->node = node; - bus->regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, "reg"); - bus->periph_id = pinmux_decode_periph_id(blob, node); + plat->regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, "reg"); + plat->periph_id = pinmux_decode_periph_id(blob, node); - if (bus->periph_id == PERIPH_ID_NONE) { + if (plat->periph_id == PERIPH_ID_NONE) { debug("%s: Invalid peripheral ID %d\n", __func__, - bus->periph_id); + plat->periph_id); return -FDT_ERR_NOTFOUND; } /* Use 500KHz as a suitable default */ - bus->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", + plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", 500000); - bus->deactivate_delay_us = fdtdec_get_int(blob, node, + plat->deactivate_delay_us = fdtdec_get_int(blob, node, "spi-deactivate-delay", 0); + debug("%s: regs=%p, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", + __func__, plat->regs, plat->periph_id, plat->frequency, + plat->deactivate_delay_us); return 0; } -/* - * Process a list of nodes, adding them to our list of SPI ports. - * - * @param blob fdt blob - * @param node_list list of nodes to process (any <=0 are ignored) - * @param count number of nodes to process - * @param is_dvc 1 if these are DVC ports, 0 if standard I2C - * @return 0 if ok, -1 on error - */ -static int process_nodes(const void *blob, int node_list[], int count) +static int exynos_spi_probe(struct udevice *bus) { - int i; + struct exynos_spi_platdata *plat = dev_get_platdata(bus); + struct exynos_spi_priv *priv = dev_get_priv(bus); - /* build the i2c_controllers[] for each controller */ - for (i = 0; i < count; i++) { - int node = node_list[i]; - struct spi_bus *bus; + priv->regs = plat->regs; + if (plat->periph_id == PERIPH_ID_SPI1 || + plat->periph_id == PERIPH_ID_SPI2) + priv->fifo_size = 64; + else + priv->fifo_size = 256; - if (node <= 0) - continue; + priv->skip_preamble = 0; + priv->last_transaction_us = timer_get_us(); + priv->freq = plat->frequency; + priv->periph_id = plat->periph_id; - bus = &spi_bus[i]; - if (spi_get_config(blob, node, bus)) { - printf("exynos spi_init: failed to decode bus %d\n", - i); - return -1; - } + return 0; +} - debug("spi: controller bus %d at %p, periph_id %d\n", - i, bus->regs, bus->periph_id); - bus->inited = 1; - bus_count++; - } +static int exynos_spi_claim_bus(struct udevice *bus) +{ + struct exynos_spi_priv *priv = dev_get_priv(bus); + + exynos_pinmux_config(priv->periph_id, PINMUX_FLAG_NONE); + spi_flush_fifo(priv->regs); + + writel(SPI_FB_DELAY_180, &priv->regs->fb_clk); return 0; } -#endif -/** - * Set up a new SPI slave for an fdt node - * - * @param blob Device tree blob - * @param node SPI peripheral node to use - * @return 0 if ok, -1 on error - */ -struct spi_slave *spi_setup_slave_fdt(const void *blob, int slave_node, - int spi_node) +static int exynos_spi_release_bus(struct udevice *bus) { - struct spi_bus *bus; - unsigned int i; + struct exynos_spi_priv *priv = dev_get_priv(bus); + + spi_flush_fifo(priv->regs); + + return 0; +} + +static int exynos_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct udevice *bus = dev->parent; + struct exynos_spi_priv *priv = dev_get_priv(bus); + int upto, todo; + int bytelen; + int ret = 0; + + /* spi core configured to do 8 bit transfers */ + if (bitlen % 8) { + debug("Non byte aligned SPI transfer.\n"); + return -1; + } + + /* Start the transaction, if necessary. */ + if ((flags & SPI_XFER_BEGIN)) + spi_cs_activate(dev); + + /* + * Exynos SPI limits each transfer to 65535 transfers. To keep + * things simple, allow a maximum of 65532 bytes. We could allow + * more in word mode, but the performance difference is small. + */ + bytelen = bitlen / 8; + for (upto = 0; !ret && upto < bytelen; upto += todo) { + todo = min(bytelen - upto, (1 << 16) - 4); + ret = spi_rx_tx(priv, todo, &din, &dout, flags); + if (ret) + break; + } - for (i = 0, bus = spi_bus; i < bus_count; i++, bus++) { - if (bus->node == spi_node) - return spi_base_setup_slave_fdt(blob, i, slave_node); + /* Stop the transaction, if necessary. */ + if ((flags & SPI_XFER_END) && !(priv->mode & SPI_SLAVE)) { + spi_cs_deactivate(dev); + if (priv->skip_preamble) { + assert(!priv->skip_preamble); + debug("Failed to complete premable transaction\n"); + ret = -1; + } } - debug("%s: Failed to find bus node %d\n", __func__, spi_node); - return NULL; + return ret; } -/* Sadly there is no error return from this function */ -void spi_init(void) +static int exynos_spi_set_speed(struct udevice *bus, uint speed) { - int count; + struct exynos_spi_platdata *plat = bus->platdata; + struct exynos_spi_priv *priv = dev_get_priv(bus); + int ret; -#ifdef CONFIG_OF_CONTROL - int node_list[EXYNOS5_SPI_NUM_CONTROLLERS]; - const void *blob = gd->fdt_blob; + if (speed > plat->frequency) + speed = plat->frequency; + ret = set_spi_clk(priv->periph_id, speed); + if (ret) + return ret; + priv->freq = speed; + debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); + + return 0; +} - count = fdtdec_find_aliases_for_id(blob, "spi", - COMPAT_SAMSUNG_EXYNOS_SPI, node_list, - EXYNOS5_SPI_NUM_CONTROLLERS); - if (process_nodes(blob, node_list, count)) - return; +static int exynos_spi_set_mode(struct udevice *bus, uint mode) +{ + struct exynos_spi_priv *priv = dev_get_priv(bus); + uint32_t reg; -#else - struct spi_bus *bus; + reg = readl(&priv->regs->ch_cfg); + reg &= ~(SPI_CH_CPHA_B | SPI_CH_CPOL_L); - for (count = 0; count < EXYNOS5_SPI_NUM_CONTROLLERS; count++) { - bus = &spi_bus[count]; - bus->regs = get_spi_base(count); - bus->periph_id = PERIPH_ID_SPI0 + count; + if (mode & SPI_CPHA) + reg |= SPI_CH_CPHA_B; - /* Although Exynos5 supports upto 50Mhz speed, - * we are setting it to 10Mhz for safe side - */ - bus->frequency = 10000000; - bus->inited = 1; - bus->node = 0; - bus_count = EXYNOS5_SPI_NUM_CONTROLLERS; - } -#endif + if (mode & SPI_CPOL) + reg |= SPI_CH_CPOL_L; + + writel(reg, &priv->regs->ch_cfg); + priv->mode = mode; + debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); + + return 0; } + +static const struct dm_spi_ops exynos_spi_ops = { + .claim_bus = exynos_spi_claim_bus, + .release_bus = exynos_spi_release_bus, + .xfer = exynos_spi_xfer, + .set_speed = exynos_spi_set_speed, + .set_mode = exynos_spi_set_mode, + /* + * cs_info is not needed, since we require all chip selects to be + * in the device tree explicitly + */ +}; + +static const struct udevice_id exynos_spi_ids[] = { + { .compatible = "samsung,exynos-spi" }, + { } +}; + +U_BOOT_DRIVER(exynos_spi) = { + .name = "exynos_spi", + .id = UCLASS_SPI, + .of_match = exynos_spi_ids, + .ops = &exynos_spi_ops, + .ofdata_to_platdata = exynos_spi_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct exynos_spi_platdata), + .priv_auto_alloc_size = sizeof(struct exynos_spi_priv), + .per_child_auto_alloc_size = sizeof(struct spi_slave), + .probe = exynos_spi_probe, +}; diff --git a/drivers/spi/fdt_spi.c b/drivers/spi/fdt_spi.c deleted file mode 100644 index 58f139a54e..0000000000 --- a/drivers/spi/fdt_spi.c +++ /dev/null @@ -1,186 +0,0 @@ -/* - * Common fdt based SPI driver front end - * - * Copyright (c) 2013 NVIDIA Corporation - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <malloc.h> -#include <asm/io.h> -#include <asm/gpio.h> -#include <asm/arch/clock.h> -#include <asm/arch-tegra/clk_rst.h> -#include <asm/arch-tegra20/tegra20_sflash.h> -#include <asm/arch-tegra20/tegra20_slink.h> -#include <asm/arch-tegra114/tegra114_spi.h> -#include <spi.h> -#include <fdtdec.h> - -DECLARE_GLOBAL_DATA_PTR; - -struct fdt_spi_driver { - int compat; - int max_ctrls; - int (*init)(int *node_list, int count); - int (*claim_bus)(struct spi_slave *slave); - int (*release_bus)(struct spi_slave *slave); - int (*cs_is_valid)(unsigned int bus, unsigned int cs); - struct spi_slave *(*setup_slave)(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode); - void (*free_slave)(struct spi_slave *slave); - void (*cs_activate)(struct spi_slave *slave); - void (*cs_deactivate)(struct spi_slave *slave); - int (*xfer)(struct spi_slave *slave, unsigned int bitlen, - const void *data_out, void *data_in, unsigned long flags); -}; - -static struct fdt_spi_driver fdt_spi_drivers[] = { -#ifdef CONFIG_TEGRA20_SFLASH - { - .compat = COMPAT_NVIDIA_TEGRA20_SFLASH, - .max_ctrls = 1, - .init = tegra20_spi_init, - .claim_bus = tegra20_spi_claim_bus, - .cs_is_valid = tegra20_spi_cs_is_valid, - .setup_slave = tegra20_spi_setup_slave, - .free_slave = tegra20_spi_free_slave, - .cs_activate = tegra20_spi_cs_activate, - .cs_deactivate = tegra20_spi_cs_deactivate, - .xfer = tegra20_spi_xfer, - }, -#endif -#ifdef CONFIG_TEGRA20_SLINK - { - .compat = COMPAT_NVIDIA_TEGRA20_SLINK, - .max_ctrls = CONFIG_TEGRA_SLINK_CTRLS, - .init = tegra30_spi_init, - .claim_bus = tegra30_spi_claim_bus, - .cs_is_valid = tegra30_spi_cs_is_valid, - .setup_slave = tegra30_spi_setup_slave, - .free_slave = tegra30_spi_free_slave, - .cs_activate = tegra30_spi_cs_activate, - .cs_deactivate = tegra30_spi_cs_deactivate, - .xfer = tegra30_spi_xfer, - }, -#endif -#ifdef CONFIG_TEGRA114_SPI - { - .compat = COMPAT_NVIDIA_TEGRA114_SPI, - .max_ctrls = CONFIG_TEGRA114_SPI_CTRLS, - .init = tegra114_spi_init, - .claim_bus = tegra114_spi_claim_bus, - .cs_is_valid = tegra114_spi_cs_is_valid, - .setup_slave = tegra114_spi_setup_slave, - .free_slave = tegra114_spi_free_slave, - .cs_activate = tegra114_spi_cs_activate, - .cs_deactivate = tegra114_spi_cs_deactivate, - .xfer = tegra114_spi_xfer, - }, -#endif -}; - -static struct fdt_spi_driver *driver; - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - if (!driver) - return 0; - else if (!driver->cs_is_valid) - return 1; - else - return driver->cs_is_valid(bus, cs); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - if (!driver || !driver->setup_slave) - return NULL; - - return driver->setup_slave(bus, cs, max_hz, mode); -} - -void spi_free_slave(struct spi_slave *slave) -{ - if (driver && driver->free_slave) - return driver->free_slave(slave); -} - -static int spi_init_driver(struct fdt_spi_driver *driver) -{ - int count; - int node_list[driver->max_ctrls]; - - count = fdtdec_find_aliases_for_id(gd->fdt_blob, "spi", - driver->compat, - node_list, - driver->max_ctrls); - return driver->init(node_list, count); -} - -void spi_init(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(fdt_spi_drivers); i++) { - driver = &fdt_spi_drivers[i]; - if (!spi_init_driver(driver)) - break; - } - if (i == ARRAY_SIZE(fdt_spi_drivers)) - driver = NULL; -} - -int spi_claim_bus(struct spi_slave *slave) -{ - if (!driver) - return 1; - if (!driver->claim_bus) - return 0; - - return driver->claim_bus(slave); -} - -void spi_release_bus(struct spi_slave *slave) -{ - if (driver && driver->release_bus) - driver->release_bus(slave); -} - -void spi_cs_activate(struct spi_slave *slave) -{ - if (driver && driver->cs_activate) - driver->cs_activate(slave); -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - if (driver && driver->cs_deactivate) - driver->cs_deactivate(slave); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *data_out, void *data_in, unsigned long flags) -{ - if (!driver || !driver->xfer) - return -1; - - return driver->xfer(slave, bitlen, data_out, data_in, flags); -} diff --git a/drivers/spi/sandbox_spi.c b/drivers/spi/sandbox_spi.c index 12e9bdad38..e717424db8 100644 --- a/drivers/spi/sandbox_spi.c +++ b/drivers/spi/sandbox_spi.c @@ -9,26 +9,23 @@ */ #include <common.h> +#include <dm.h> #include <malloc.h> #include <spi.h> +#include <spi_flash.h> #include <os.h> #include <asm/errno.h> #include <asm/spi.h> #include <asm/state.h> +#include <dm/device-internal.h> + +DECLARE_GLOBAL_DATA_PTR; #ifndef CONFIG_SPI_IDLE_VAL # define CONFIG_SPI_IDLE_VAL 0xFF #endif -struct sandbox_spi_slave { - struct spi_slave slave; - const struct sandbox_spi_emu_ops *ops; - void *priv; -}; - -#define to_sandbox_spi_slave(s) container_of(s, struct sandbox_spi_slave, slave) - const char *sandbox_spi_parse_spec(const char *arg, unsigned long *bus, unsigned long *cs) { @@ -45,120 +42,52 @@ const char *sandbox_spi_parse_spec(const char *arg, unsigned long *bus, return endp + 1; } -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - return bus < CONFIG_SANDBOX_SPI_MAX_BUS && - cs < CONFIG_SANDBOX_SPI_MAX_CS; -} - -void spi_cs_activate(struct spi_slave *slave) -{ - struct sandbox_spi_slave *sss = to_sandbox_spi_slave(slave); - - debug("sandbox_spi: activating CS\n"); - if (sss->ops->cs_activate) - sss->ops->cs_activate(sss->priv); -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - struct sandbox_spi_slave *sss = to_sandbox_spi_slave(slave); - - debug("sandbox_spi: deactivating CS\n"); - if (sss->ops->cs_deactivate) - sss->ops->cs_deactivate(sss->priv); -} - -void spi_init(void) -{ -} - -void spi_set_speed(struct spi_slave *slave, uint hz) +__weak int sandbox_spi_get_emul(struct sandbox_state *state, + struct udevice *bus, struct udevice *slave, + struct udevice **emulp) { + return -ENOENT; } -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) +static int sandbox_spi_xfer(struct udevice *slave, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) { - struct sandbox_spi_slave *sss; + struct udevice *bus = slave->parent; struct sandbox_state *state = state_get_current(); - const char *spec; - - if (!spi_cs_is_valid(bus, cs)) { - debug("sandbox_spi: Invalid SPI bus/cs\n"); - return NULL; - } - - sss = spi_alloc_slave(struct sandbox_spi_slave, bus, cs); - if (!sss) { - debug("sandbox_spi: Out of memory\n"); - return NULL; - } - - spec = state->spi[bus][cs].spec; - sss->ops = state->spi[bus][cs].ops; - if (!spec || !sss->ops || sss->ops->setup(&sss->priv, spec)) { - free(sss); - printf("sandbox_spi: unable to locate a slave client\n"); - return NULL; - } - - return &sss->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct sandbox_spi_slave *sss = to_sandbox_spi_slave(slave); - - debug("sandbox_spi: releasing slave\n"); - - if (sss->ops->free) - sss->ops->free(sss->priv); - - free(sss); -} - -static int spi_bus_claim_cnt[CONFIG_SANDBOX_SPI_MAX_BUS]; - -int spi_claim_bus(struct spi_slave *slave) -{ - if (spi_bus_claim_cnt[slave->bus]++) { - printf("sandbox_spi: error: bus already claimed: %d!\n", - spi_bus_claim_cnt[slave->bus]); - } - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - if (--spi_bus_claim_cnt[slave->bus]) { - printf("sandbox_spi: error: bus freed too often: %d!\n", - spi_bus_claim_cnt[slave->bus]); - } -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - struct sandbox_spi_slave *sss = to_sandbox_spi_slave(slave); + struct dm_spi_emul_ops *ops; + struct udevice *emul; uint bytes = bitlen / 8, i; - int ret = 0; + int ret; u8 *tx = (void *)dout, *rx = din; + uint busnum, cs; if (bitlen == 0) - goto done; + return 0; /* we can only do 8 bit transfers */ if (bitlen % 8) { printf("sandbox_spi: xfer: invalid bitlen size %u; needs to be 8bit\n", bitlen); - flags |= SPI_XFER_END; - goto done; + return -EINVAL; } - if (flags & SPI_XFER_BEGIN) - spi_cs_activate(slave); + busnum = bus->seq; + cs = spi_chip_select(slave); + if (busnum >= CONFIG_SANDBOX_SPI_MAX_BUS || + cs >= CONFIG_SANDBOX_SPI_MAX_CS) { + printf("%s: busnum=%u, cs=%u: out of range\n", __func__, + busnum, cs); + return -ENOENT; + } + ret = sandbox_spi_get_emul(state, bus, slave, &emul); + if (ret) { + printf("%s: busnum=%u, cs=%u: no emulation available (err=%d)\n", + __func__, busnum, cs, ret); + return -ENOENT; + } + ret = device_probe(emul); + if (ret) + return ret; /* make sure rx/tx buffers are full so clients can assume */ if (!tx) { @@ -178,12 +107,8 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, } } - debug("sandbox_spi: xfer: bytes = %u\n tx:", bytes); - for (i = 0; i < bytes; ++i) - debug(" %u:%02x", i, tx[i]); - debug("\n"); - - ret = sss->ops->xfer(sss->priv, tx, rx, bytes); + ops = spi_emul_get_ops(emul); + ret = ops->xfer(emul, bitlen, dout, din, flags); debug("sandbox_spi: xfer: got back %i (that's %s)\n rx:", ret, ret ? "bad" : "good"); @@ -196,22 +121,45 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, if (rx != din) free(rx); - done: - if (flags & SPI_XFER_END) - spi_cs_deactivate(slave); - return ret; } -/** - * Set up a new SPI slave for an fdt node - * - * @param blob Device tree blob - * @param node SPI peripheral node to use - * @return 0 if ok, -1 on error - */ -struct spi_slave *spi_setup_slave_fdt(const void *blob, int slave_node, - int spi_node) +static int sandbox_spi_set_speed(struct udevice *bus, uint speed) +{ + return 0; +} + +static int sandbox_spi_set_mode(struct udevice *bus, uint mode) +{ + return 0; +} + +static int sandbox_cs_info(struct udevice *bus, uint cs, + struct spi_cs_info *info) { - return NULL; + /* Always allow activity on CS 0 */ + if (cs >= 1) + return -ENODEV; + + return 0; } + +static const struct dm_spi_ops sandbox_spi_ops = { + .xfer = sandbox_spi_xfer, + .set_speed = sandbox_spi_set_speed, + .set_mode = sandbox_spi_set_mode, + .cs_info = sandbox_cs_info, +}; + +static const struct udevice_id sandbox_spi_ids[] = { + { .compatible = "sandbox,spi" }, + { } +}; + +U_BOOT_DRIVER(spi_sandbox) = { + .name = "spi_sandbox", + .id = UCLASS_SPI, + .of_match = sandbox_spi_ids, + .per_child_auto_alloc_size = sizeof(struct spi_slave), + .ops = &sandbox_spi_ops, +}; diff --git a/drivers/spi/soft_spi.c b/drivers/spi/soft_spi.c index c969be31eb..558803618a 100644 --- a/drivers/spi/soft_spi.c +++ b/drivers/spi/soft_spi.c @@ -1,4 +1,6 @@ /* + * Copyright (c) 2014 Google, Inc + * * (C) Copyright 2002 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. * @@ -9,94 +11,81 @@ */ #include <common.h> -#include <spi.h> - +#include <dm.h> +#include <errno.h> +#include <fdtdec.h> #include <malloc.h> +#include <spi.h> +#include <asm/gpio.h> -/*----------------------------------------------------------------------- - * Definitions - */ +DECLARE_GLOBAL_DATA_PTR; -#ifdef DEBUG_SPI -#define PRINTD(fmt,args...) printf (fmt ,##args) -#else -#define PRINTD(fmt,args...) -#endif +struct soft_spi_platdata { + struct fdt_gpio_state cs; + struct fdt_gpio_state sclk; + struct fdt_gpio_state mosi; + struct fdt_gpio_state miso; + int spi_delay_us; +}; -struct soft_spi_slave { - struct spi_slave slave; +struct soft_spi_priv { unsigned int mode; }; -static inline struct soft_spi_slave *to_soft_spi(struct spi_slave *slave) +static int soft_spi_scl(struct udevice *dev, int bit) { - return container_of(slave, struct soft_spi_slave, slave); -} + struct soft_spi_platdata *plat = dev->platdata; + struct soft_spi_priv *priv = dev_get_priv(dev); -/*=====================================================================*/ -/* Public Functions */ -/*=====================================================================*/ + gpio_set_value(plat->sclk.gpio, priv->mode & SPI_CPOL ? bit : !bit); -/*----------------------------------------------------------------------- - * Initialization - */ -void spi_init (void) -{ -#ifdef SPI_INIT - volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; - - SPI_INIT; -#endif + return 0; } -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) +static int soft_spi_sda(struct udevice *dev, int bit) { - struct soft_spi_slave *ss; + struct soft_spi_platdata *plat = dev->platdata; - if (!spi_cs_is_valid(bus, cs)) - return NULL; + gpio_set_value(plat->mosi.gpio, bit); - ss = spi_alloc_slave(struct soft_spi_slave, bus, cs); - if (!ss) - return NULL; + return 0; +} - ss->mode = mode; +static int soft_spi_cs_activate(struct udevice *dev) +{ + struct soft_spi_platdata *plat = dev->platdata; + struct soft_spi_priv *priv = dev_get_priv(dev); - /* TODO: Use max_hz to limit the SCK rate */ + gpio_set_value(plat->cs.gpio, !(priv->mode & SPI_CS_HIGH)); + gpio_set_value(plat->sclk.gpio, priv->mode & SPI_CPOL); + gpio_set_value(plat->cs.gpio, priv->mode & SPI_CS_HIGH); - return &ss->slave; + return 0; } -void spi_free_slave(struct spi_slave *slave) +static int soft_spi_cs_deactivate(struct udevice *dev) { - struct soft_spi_slave *ss = to_soft_spi(slave); + struct soft_spi_platdata *plat = dev->platdata; + struct soft_spi_priv *priv = dev_get_priv(dev); - free(ss); + gpio_set_value(plat->cs.gpio, !(priv->mode & SPI_CS_HIGH)); + + return 0; } -int spi_claim_bus(struct spi_slave *slave) +static int soft_spi_claim_bus(struct udevice *dev) { -#ifdef CONFIG_SYS_IMMR - volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; -#endif - struct soft_spi_slave *ss = to_soft_spi(slave); - /* * Make sure the SPI clock is in idle state as defined for * this slave. */ - if (ss->mode & SPI_CPOL) - SPI_SCL(1); - else - SPI_SCL(0); - - return 0; + return soft_spi_scl(dev, 0); } -void spi_release_bus(struct spi_slave *slave) +static int soft_spi_release_bus(struct udevice *dev) { /* Nothing to do */ + return 0; } /*----------------------------------------------------------------------- @@ -111,28 +100,27 @@ void spi_release_bus(struct spi_slave *slave) * input data overwrites the output data (since both are buffered by * temporary variables, this is OK). */ -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) +static int soft_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) { -#ifdef CONFIG_SYS_IMMR - volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; -#endif - struct soft_spi_slave *ss = to_soft_spi(slave); + struct soft_spi_priv *priv = dev_get_priv(dev); + struct soft_spi_platdata *plat = dev->platdata; uchar tmpdin = 0; uchar tmpdout = 0; const u8 *txd = dout; u8 *rxd = din; - int cpol = ss->mode & SPI_CPOL; - int cpha = ss->mode & SPI_CPHA; + int cpol = priv->mode & SPI_CPOL; + int cpha = priv->mode & SPI_CPHA; unsigned int j; - PRINTD("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", - slave->bus, slave->cs, *(uint *)txd, *(uint *)rxd, bitlen); + debug("spi_xfer: slave %s:%s dout %08X din %08X bitlen %u\n", + dev->parent->name, dev->name, *(uint *)txd, *(uint *)rxd, + bitlen); if (flags & SPI_XFER_BEGIN) - spi_cs_activate(slave); + soft_spi_cs_activate(dev); - for(j = 0; j < bitlen; j++) { + for (j = 0; j < bitlen; j++) { /* * Check if it is time to work on a new byte. */ @@ -141,7 +129,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, tmpdout = *txd++; else tmpdout = 0; - if(j != 0) { + if (j != 0) { if (rxd) *rxd++ = tmpdin; } @@ -149,19 +137,19 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, } if (!cpha) - SPI_SCL(!cpol); - SPI_SDA(tmpdout & 0x80); - SPI_DELAY; + soft_spi_scl(dev, !cpol); + soft_spi_sda(dev, tmpdout & 0x80); + udelay(plat->spi_delay_us); if (cpha) - SPI_SCL(!cpol); + soft_spi_scl(dev, !cpol); else - SPI_SCL(cpol); + soft_spi_scl(dev, cpol); tmpdin <<= 1; - tmpdin |= SPI_READ; + tmpdin |= gpio_get_value(plat->miso.gpio); tmpdout <<= 1; - SPI_DELAY; + udelay(plat->spi_delay_us); if (cpha) - SPI_SCL(cpol); + soft_spi_scl(dev, cpol); } /* * If the number of bits isn't a multiple of 8, shift the last @@ -175,7 +163,90 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, } if (flags & SPI_XFER_END) - spi_cs_deactivate(slave); + soft_spi_cs_deactivate(dev); - return(0); + return 0; } + +static int soft_spi_set_speed(struct udevice *dev, unsigned int speed) +{ + /* Accept any speed */ + return 0; +} + +static int soft_spi_set_mode(struct udevice *dev, unsigned int mode) +{ + struct soft_spi_priv *priv = dev_get_priv(dev); + + priv->mode = mode; + + return 0; +} + +static int soft_spi_child_pre_probe(struct udevice *dev) +{ + struct spi_slave *slave = dev_get_parentdata(dev); + + slave->dev = dev; + return spi_ofdata_to_platdata(gd->fdt_blob, dev->of_offset, slave); +} + +static const struct dm_spi_ops soft_spi_ops = { + .claim_bus = soft_spi_claim_bus, + .release_bus = soft_spi_release_bus, + .xfer = soft_spi_xfer, + .set_speed = soft_spi_set_speed, + .set_mode = soft_spi_set_mode, +}; + +static int soft_spi_ofdata_to_platdata(struct udevice *dev) +{ + struct soft_spi_platdata *plat = dev->platdata; + const void *blob = gd->fdt_blob; + int node = dev->of_offset; + + if (fdtdec_decode_gpio(blob, node, "cs-gpio", &plat->cs) || + fdtdec_decode_gpio(blob, node, "sclk-gpio", &plat->sclk) || + fdtdec_decode_gpio(blob, node, "mosi-gpio", &plat->mosi) || + fdtdec_decode_gpio(blob, node, "miso-gpio", &plat->miso)) + return -EINVAL; + plat->spi_delay_us = fdtdec_get_int(blob, node, "spi-delay-us", 0); + + return 0; +} + +static int soft_spi_probe(struct udevice *dev) +{ + struct spi_slave *slave = dev_get_parentdata(dev); + struct soft_spi_platdata *plat = dev->platdata; + + gpio_request(plat->cs.gpio, "soft_spi_cs"); + gpio_request(plat->sclk.gpio, "soft_spi_sclk"); + gpio_request(plat->mosi.gpio, "soft_spi_mosi"); + gpio_request(plat->miso.gpio, "soft_spi_miso"); + + gpio_direction_output(plat->sclk.gpio, slave->mode & SPI_CPOL); + gpio_direction_output(plat->mosi.gpio, 1); + gpio_direction_input(plat->miso.gpio); + gpio_direction_output(plat->cs.gpio, !(slave->mode & SPI_CS_HIGH)); + + return 0; +} + +static const struct udevice_id soft_spi_ids[] = { + { .compatible = "u-boot,soft-spi" }, + { } +}; + +U_BOOT_DRIVER(soft_spi) = { + .name = "soft_spi", + .id = UCLASS_SPI, + .of_match = soft_spi_ids, + .ops = &soft_spi_ops, + .ofdata_to_platdata = soft_spi_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct soft_spi_platdata), + .priv_auto_alloc_size = sizeof(struct soft_spi_priv), + .per_child_auto_alloc_size = sizeof(struct spi_slave), + .probe = soft_spi_probe, + .child_pre_probe = soft_spi_child_pre_probe, +}; diff --git a/drivers/spi/soft_spi_legacy.c b/drivers/spi/soft_spi_legacy.c new file mode 100644 index 0000000000..941daa730b --- /dev/null +++ b/drivers/spi/soft_spi_legacy.c @@ -0,0 +1,176 @@ +/* + * (C) Copyright 2002 + * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. + * + * Influenced by code from: + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <spi.h> + +#include <malloc.h> + +/*----------------------------------------------------------------------- + * Definitions + */ + +#ifdef DEBUG_SPI +#define PRINTD(fmt,args...) printf (fmt ,##args) +#else +#define PRINTD(fmt,args...) +#endif + +struct soft_spi_slave { + struct spi_slave slave; + unsigned int mode; +}; + +static inline struct soft_spi_slave *to_soft_spi(struct spi_slave *slave) +{ + return container_of(slave, struct soft_spi_slave, slave); +} + +/*=====================================================================*/ +/* Public Functions */ +/*=====================================================================*/ + +/*----------------------------------------------------------------------- + * Initialization + */ +void spi_init (void) +{ +} + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct soft_spi_slave *ss; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + ss = spi_alloc_slave(struct soft_spi_slave, bus, cs); + if (!ss) + return NULL; + + ss->mode = mode; + + /* TODO: Use max_hz to limit the SCK rate */ + + return &ss->slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + struct soft_spi_slave *ss = to_soft_spi(slave); + + free(ss); +} + +int spi_claim_bus(struct spi_slave *slave) +{ +#ifdef CONFIG_SYS_IMMR + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; +#endif + struct soft_spi_slave *ss = to_soft_spi(slave); + + /* + * Make sure the SPI clock is in idle state as defined for + * this slave. + */ + if (ss->mode & SPI_CPOL) + SPI_SCL(1); + else + SPI_SCL(0); + + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + /* Nothing to do */ +} + +/*----------------------------------------------------------------------- + * SPI transfer + * + * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks + * "bitlen" bits in the SPI MISO port. That's just the way SPI works. + * + * The source of the outgoing bits is the "dout" parameter and the + * destination of the input bits is the "din" parameter. Note that "dout" + * and "din" can point to the same memory location, in which case the + * input data overwrites the output data (since both are buffered by + * temporary variables, this is OK). + */ +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ +#ifdef CONFIG_SYS_IMMR + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; +#endif + struct soft_spi_slave *ss = to_soft_spi(slave); + uchar tmpdin = 0; + uchar tmpdout = 0; + const u8 *txd = dout; + u8 *rxd = din; + int cpol = ss->mode & SPI_CPOL; + int cpha = ss->mode & SPI_CPHA; + unsigned int j; + + PRINTD("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", + slave->bus, slave->cs, *(uint *)txd, *(uint *)rxd, bitlen); + + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(slave); + + for(j = 0; j < bitlen; j++) { + /* + * Check if it is time to work on a new byte. + */ + if ((j % 8) == 0) { + if (txd) + tmpdout = *txd++; + else + tmpdout = 0; + if(j != 0) { + if (rxd) + *rxd++ = tmpdin; + } + tmpdin = 0; + } + + if (!cpha) + SPI_SCL(!cpol); + SPI_SDA(tmpdout & 0x80); + SPI_DELAY; + if (cpha) + SPI_SCL(!cpol); + else + SPI_SCL(cpol); + tmpdin <<= 1; + tmpdin |= SPI_READ; + tmpdout <<= 1; + SPI_DELAY; + if (cpha) + SPI_SCL(cpol); + } + /* + * If the number of bits isn't a multiple of 8, shift the last + * bits over to left-justify them. Then store the last byte + * read in. + */ + if (rxd) { + if ((bitlen % 8) != 0) + tmpdin <<= 8 - (bitlen % 8); + *rxd++ = tmpdin; + } + + if (flags & SPI_XFER_END) + spi_cs_deactivate(slave); + + return(0); +} diff --git a/drivers/spi/spi-emul-uclass.c b/drivers/spi/spi-emul-uclass.c new file mode 100644 index 0000000000..b436a0e99f --- /dev/null +++ b/drivers/spi/spi-emul-uclass.c @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <spi.h> +#include <spi_flash.h> + +UCLASS_DRIVER(spi_emul) = { + .id = UCLASS_SPI_EMUL, + .name = "spi_emul", +}; diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c new file mode 100644 index 0000000000..13c6b77d73 --- /dev/null +++ b/drivers/spi/spi-uclass.c @@ -0,0 +1,390 @@ +/* + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h> +#include <malloc.h> +#include <spi.h> +#include <dm/device-internal.h> +#include <dm/uclass-internal.h> +#include <dm/root.h> +#include <dm/lists.h> +#include <dm/util.h> + +DECLARE_GLOBAL_DATA_PTR; + +static int spi_set_speed_mode(struct udevice *bus, int speed, int mode) +{ + struct dm_spi_ops *ops; + int ret; + + ops = spi_get_ops(bus); + if (ops->set_speed) + ret = ops->set_speed(bus, speed); + else + ret = -EINVAL; + if (ret) { + printf("Cannot set speed (err=%d)\n", ret); + return ret; + } + + if (ops->set_mode) + ret = ops->set_mode(bus, mode); + else + ret = -EINVAL; + if (ret) { + printf("Cannot set mode (err=%d)\n", ret); + return ret; + } + + return 0; +} + +int spi_claim_bus(struct spi_slave *slave) +{ + struct udevice *dev = slave->dev; + struct udevice *bus = dev->parent; + struct dm_spi_ops *ops = spi_get_ops(bus); + struct dm_spi_bus *spi = bus->uclass_priv; + int speed; + int ret; + + speed = slave->max_hz; + if (spi->max_hz) { + if (speed) + speed = min(speed, spi->max_hz); + else + speed = spi->max_hz; + } + if (!speed) + speed = 100000; + ret = spi_set_speed_mode(bus, speed, slave->mode); + if (ret) + return ret; + + return ops->claim_bus ? ops->claim_bus(bus) : 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + struct udevice *dev = slave->dev; + struct udevice *bus = dev->parent; + struct dm_spi_ops *ops = spi_get_ops(bus); + + if (ops->release_bus) + ops->release_bus(bus); +} + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct udevice *dev = slave->dev; + struct udevice *bus = dev->parent; + + if (bus->uclass->uc_drv->id != UCLASS_SPI) + return -EOPNOTSUPP; + + return spi_get_ops(bus)->xfer(dev, bitlen, dout, din, flags); +} + +int spi_post_bind(struct udevice *dev) +{ + /* Scan the bus for devices */ + return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false); +} + +int spi_post_probe(struct udevice *dev) +{ + struct dm_spi_bus *spi = dev->uclass_priv; + + spi->max_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "spi-max-frequency", 0); + + return 0; +} + +int spi_chip_select(struct udevice *dev) +{ + struct spi_slave *slave = dev_get_parentdata(dev); + + return slave ? slave->cs : -ENOENT; +} + +/** + * spi_find_chip_select() - Find the slave attached to chip select + * + * @bus: SPI bus to search + * @cs: Chip select to look for + * @devp: Returns the slave device if found + * @return 0 if found, -ENODEV on error + */ +static int spi_find_chip_select(struct udevice *bus, int cs, + struct udevice **devp) +{ + struct udevice *dev; + + for (device_find_first_child(bus, &dev); dev; + device_find_next_child(&dev)) { + struct spi_slave store; + struct spi_slave *slave = dev_get_parentdata(dev); + + if (!slave) { + slave = &store; + spi_ofdata_to_platdata(gd->fdt_blob, dev->of_offset, + slave); + } + debug("%s: slave=%p, cs=%d\n", __func__, slave, + slave ? slave->cs : -1); + if (slave && slave->cs == cs) { + *devp = dev; + return 0; + } + } + + return -ENODEV; +} + +int spi_cs_is_valid(unsigned int busnum, unsigned int cs) +{ + struct spi_cs_info info; + struct udevice *bus; + int ret; + + ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, false, &bus); + if (ret) { + debug("%s: No bus %d\n", __func__, busnum); + return ret; + } + + return spi_cs_info(bus, cs, &info); +} + +int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info) +{ + struct spi_cs_info local_info; + struct dm_spi_ops *ops; + int ret; + + if (!info) + info = &local_info; + + /* If there is a device attached, return it */ + info->dev = NULL; + ret = spi_find_chip_select(bus, cs, &info->dev); + if (!ret) + return 0; + + /* + * Otherwise ask the driver. For the moment we don't have CS info. + * When we do we could provide the driver with a helper function + * to figure out what chip selects are valid, or just handle the + * request. + */ + ops = spi_get_ops(bus); + if (ops->cs_info) + return ops->cs_info(bus, cs, info); + + /* + * We could assume there is at least one valid chip select, but best + * to be sure and return an error in this case. The driver didn't + * care enough to tell us. + */ + return -ENODEV; +} + +int spi_bind_device(struct udevice *bus, int cs, const char *drv_name, + const char *dev_name, struct udevice **devp) +{ + struct driver *drv; + int ret; + + drv = lists_driver_lookup_name(drv_name); + if (!drv) { + printf("Cannot find driver '%s'\n", drv_name); + return -ENOENT; + } + ret = device_bind(bus, drv, dev_name, NULL, -1, devp); + if (ret) { + printf("Cannot create device named '%s' (err=%d)\n", + dev_name, ret); + return ret; + } + + return 0; +} + +int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp, + struct udevice **devp) +{ + struct udevice *bus, *dev; + int ret; + + ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, false, &bus); + if (ret) { + debug("%s: No bus %d\n", __func__, busnum); + return ret; + } + ret = spi_find_chip_select(bus, cs, &dev); + if (ret) { + debug("%s: No cs %d\n", __func__, cs); + return ret; + } + *busp = bus; + *devp = dev; + + return ret; +} + +int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode, + const char *drv_name, const char *dev_name, + struct udevice **busp, struct spi_slave **devp) +{ + struct udevice *bus, *dev; + struct spi_slave *slave; + bool created = false; + int ret; + + ret = uclass_get_device_by_seq(UCLASS_SPI, busnum, &bus); + if (ret) { + printf("Invalid bus %d (err=%d)\n", busnum, ret); + return ret; + } + ret = spi_find_chip_select(bus, cs, &dev); + + /* + * If there is no such device, create one automatically. This means + * that we don't need a device tree node or platform data for the + * SPI flash chip - we will bind to the correct driver. + */ + if (ret == -ENODEV && drv_name) { + debug("%s: Binding new device '%s', busnum=%d, cs=%d, driver=%s\n", + __func__, dev_name, busnum, cs, drv_name); + ret = spi_bind_device(bus, cs, drv_name, dev_name, &dev); + if (ret) + return ret; + created = true; + } else if (ret) { + printf("Invalid chip select %d:%d (err=%d)\n", busnum, cs, + ret); + return ret; + } + + if (!device_active(dev)) { + slave = (struct spi_slave *)calloc(1, + sizeof(struct spi_slave)); + if (!slave) { + ret = -ENOMEM; + goto err; + } + + ret = spi_ofdata_to_platdata(gd->fdt_blob, dev->of_offset, + slave); + if (ret) + goto err; + slave->cs = cs; + slave->dev = dev; + ret = device_probe_child(dev, slave); + free(slave); + if (ret) + goto err; + } + + ret = spi_set_speed_mode(bus, speed, mode); + if (ret) + goto err; + + *busp = bus; + *devp = dev_get_parentdata(dev); + debug("%s: bus=%p, slave=%p\n", __func__, bus, *devp); + + return 0; + +err: + if (created) { + device_remove(dev); + device_unbind(dev); + } + + return ret; +} + +/* Compatibility function - to be removed */ +struct spi_slave *spi_setup_slave_fdt(const void *blob, int node, + int bus_node) +{ + struct udevice *bus, *dev; + int ret; + + ret = uclass_get_device_by_of_offset(UCLASS_SPI, bus_node, &bus); + if (ret) + return NULL; + ret = device_get_child_by_of_offset(bus, node, &dev); + if (ret) + return NULL; + return dev_get_parentdata(dev); +} + +/* Compatibility function - to be removed */ +struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs, + unsigned int speed, unsigned int mode) +{ + struct spi_slave *slave; + struct udevice *dev; + int ret; + + ret = spi_get_bus_and_cs(busnum, cs, speed, mode, NULL, 0, &dev, + &slave); + if (ret) + return NULL; + + return slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + device_remove(slave->dev); + slave->dev = NULL; +} + +int spi_ofdata_to_platdata(const void *blob, int node, + struct spi_slave *spi) +{ + int mode = 0; + + spi->cs = fdtdec_get_int(blob, node, "reg", -1); + spi->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", 0); + if (fdtdec_get_bool(blob, node, "spi-cpol")) + mode |= SPI_CPOL; + if (fdtdec_get_bool(blob, node, "spi-cpha")) + mode |= SPI_CPHA; + if (fdtdec_get_bool(blob, node, "spi-cs-high")) + mode |= SPI_CS_HIGH; + if (fdtdec_get_bool(blob, node, "spi-half-duplex")) + mode |= SPI_PREAMBLE; + spi->mode = mode; + + return 0; +} + +UCLASS_DRIVER(spi) = { + .id = UCLASS_SPI, + .name = "spi", + .post_bind = spi_post_bind, + .post_probe = spi_post_probe, + .per_device_auto_alloc_size = sizeof(struct dm_spi_bus), +}; + +UCLASS_DRIVER(spi_generic) = { + .id = UCLASS_SPI_GENERIC, + .name = "spi_generic", +}; + +U_BOOT_DRIVER(spi_generic_drv) = { + .name = "spi_generic_drv", + .id = UCLASS_SPI_GENERIC, +}; diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c index 810fa4718c..2d97625fba 100644 --- a/drivers/spi/tegra114_spi.c +++ b/drivers/spi/tegra114_spi.c @@ -22,14 +22,13 @@ */ #include <common.h> -#include <malloc.h> +#include <dm.h> #include <asm/io.h> -#include <asm/gpio.h> #include <asm/arch/clock.h> #include <asm/arch-tegra/clk_rst.h> -#include <asm/arch-tegra114/tegra114_spi.h> #include <spi.h> #include <fdtdec.h> +#include "tegra_spi.h" DECLARE_GLOBAL_DATA_PTR; @@ -104,130 +103,63 @@ struct spi_regs { u32 spare_ctl; /* 18c:SPI_SPARE_CTRL register */ }; -struct tegra_spi_ctrl { +struct tegra114_spi_priv { struct spi_regs *regs; unsigned int freq; unsigned int mode; int periph_id; int valid; + int last_transaction_us; }; -struct tegra_spi_slave { - struct spi_slave slave; - struct tegra_spi_ctrl *ctrl; -}; - -static struct tegra_spi_ctrl spi_ctrls[CONFIG_TEGRA114_SPI_CTRLS]; - -static inline struct tegra_spi_slave *to_tegra_spi(struct spi_slave *slave) +static int tegra114_spi_ofdata_to_platdata(struct udevice *bus) { - return container_of(slave, struct tegra_spi_slave, slave); -} + struct tegra_spi_platdata *plat = bus->platdata; + const void *blob = gd->fdt_blob; + int node = bus->of_offset; -int tegra114_spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - if (bus >= CONFIG_TEGRA114_SPI_CTRLS || cs > 3 || !spi_ctrls[bus].valid) - return 0; - else - return 1; -} + plat->base = fdtdec_get_addr(blob, node, "reg"); + plat->periph_id = clock_decode_periph_id(blob, node); -struct spi_slave *tegra114_spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct tegra_spi_slave *spi; - - debug("%s: bus: %u, cs: %u, max_hz: %u, mode: %u\n", __func__, - bus, cs, max_hz, mode); - - if (!spi_cs_is_valid(bus, cs)) { - printf("SPI error: unsupported bus %d / chip select %d\n", - bus, cs); - return NULL; - } - - if (max_hz > TEGRA_SPI_MAX_FREQ) { - printf("SPI error: unsupported frequency %d Hz. Max frequency" - " is %d Hz\n", max_hz, TEGRA_SPI_MAX_FREQ); - return NULL; + if (plat->periph_id == PERIPH_ID_NONE) { + debug("%s: could not decode periph id %d\n", __func__, + plat->periph_id); + return -FDT_ERR_NOTFOUND; } - spi = spi_alloc_slave(struct tegra_spi_slave, bus, cs); - if (!spi) { - printf("SPI error: malloc of SPI structure failed\n"); - return NULL; - } - spi->ctrl = &spi_ctrls[bus]; - if (!spi->ctrl) { - printf("SPI error: could not find controller for bus %d\n", - bus); - return NULL; - } + /* Use 500KHz as a suitable default */ + plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", + 500000); + plat->deactivate_delay_us = fdtdec_get_int(blob, node, + "spi-deactivate-delay", 0); + debug("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", + __func__, plat->base, plat->periph_id, plat->frequency, + plat->deactivate_delay_us); - if (max_hz < spi->ctrl->freq) { - debug("%s: limiting frequency from %u to %u\n", __func__, - spi->ctrl->freq, max_hz); - spi->ctrl->freq = max_hz; - } - spi->ctrl->mode = mode; - - return &spi->slave; -} - -void tegra114_spi_free_slave(struct spi_slave *slave) -{ - struct tegra_spi_slave *spi = to_tegra_spi(slave); - - free(spi); + return 0; } -int tegra114_spi_init(int *node_list, int count) +static int tegra114_spi_probe(struct udevice *bus) { - struct tegra_spi_ctrl *ctrl; - int i; - int node = 0; - int found = 0; - - for (i = 0; i < count; i++) { - ctrl = &spi_ctrls[i]; - node = node_list[i]; - - ctrl->regs = (struct spi_regs *)fdtdec_get_addr(gd->fdt_blob, - node, "reg"); - if ((fdt_addr_t)ctrl->regs == FDT_ADDR_T_NONE) { - debug("%s: no spi register found\n", __func__); - continue; - } - ctrl->freq = fdtdec_get_int(gd->fdt_blob, node, - "spi-max-frequency", 0); - if (!ctrl->freq) { - debug("%s: no spi max frequency found\n", __func__); - continue; - } + struct tegra_spi_platdata *plat = dev_get_platdata(bus); + struct tegra114_spi_priv *priv = dev_get_priv(bus); - ctrl->periph_id = clock_decode_periph_id(gd->fdt_blob, node); - if (ctrl->periph_id == PERIPH_ID_NONE) { - debug("%s: could not decode periph id\n", __func__); - continue; - } - ctrl->valid = 1; - found = 1; + priv->regs = (struct spi_regs *)plat->base; - debug("%s: found controller at %p, freq = %u, periph_id = %d\n", - __func__, ctrl->regs, ctrl->freq, ctrl->periph_id); - } + priv->last_transaction_us = timer_get_us(); + priv->freq = plat->frequency; + priv->periph_id = plat->periph_id; - return !found; + return 0; } -int tegra114_spi_claim_bus(struct spi_slave *slave) +static int tegra114_spi_claim_bus(struct udevice *bus) { - struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct spi_regs *regs = spi->ctrl->regs; + struct tegra114_spi_priv *priv = dev_get_priv(bus); + struct spi_regs *regs = priv->regs; /* Change SPI clock to correct frequency, PLLP_OUT0 source */ - clock_start_periph_pll(spi->ctrl->periph_id, CLOCK_ID_PERIPH, - spi->ctrl->freq); + clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, priv->freq); /* Clear stale status here */ setbits_le32(®s->fifo_status, @@ -244,33 +176,64 @@ int tegra114_spi_claim_bus(struct spi_slave *slave) /* Set master mode and sw controlled CS */ setbits_le32(®s->command1, SPI_CMD1_M_S | SPI_CMD1_CS_SW_HW | - (spi->ctrl->mode << SPI_CMD1_MODE_SHIFT)); + (priv->mode << SPI_CMD1_MODE_SHIFT)); debug("%s: COMMAND1 = %08x\n", __func__, readl(®s->command1)); return 0; } -void tegra114_spi_cs_activate(struct spi_slave *slave) +/** + * Activate the CS by driving it LOW + * + * @param slave Pointer to spi_slave to which controller has to + * communicate with + */ +static void spi_cs_activate(struct udevice *dev) { - struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct spi_regs *regs = spi->ctrl->regs; + struct udevice *bus = dev->parent; + struct tegra_spi_platdata *pdata = dev_get_platdata(bus); + struct tegra114_spi_priv *priv = dev_get_priv(bus); + + /* If it's too soon to do another transaction, wait */ + if (pdata->deactivate_delay_us && + priv->last_transaction_us) { + ulong delay_us; /* The delay completed so far */ + delay_us = timer_get_us() - priv->last_transaction_us; + if (delay_us < pdata->deactivate_delay_us) + udelay(pdata->deactivate_delay_us - delay_us); + } - clrbits_le32(®s->command1, SPI_CMD1_CS_SW_VAL); + clrbits_le32(&priv->regs->command1, SPI_CMD1_CS_SW_VAL); } -void tegra114_spi_cs_deactivate(struct spi_slave *slave) +/** + * Deactivate the CS by driving it HIGH + * + * @param slave Pointer to spi_slave to which controller has to + * communicate with + */ +static void spi_cs_deactivate(struct udevice *dev) { - struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct spi_regs *regs = spi->ctrl->regs; + struct udevice *bus = dev->parent; + struct tegra_spi_platdata *pdata = dev_get_platdata(bus); + struct tegra114_spi_priv *priv = dev_get_priv(bus); + + setbits_le32(&priv->regs->command1, SPI_CMD1_CS_SW_VAL); - setbits_le32(®s->command1, SPI_CMD1_CS_SW_VAL); + /* Remember time of this transaction so we can honour the bus delay */ + if (pdata->deactivate_delay_us) + priv->last_transaction_us = timer_get_us(); + + debug("Deactivate CS, bus '%s'\n", bus->name); } -int tegra114_spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *data_out, void *data_in, unsigned long flags) +static int tegra114_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *data_out, void *data_in, + unsigned long flags) { - struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct spi_regs *regs = spi->ctrl->regs; + struct udevice *bus = dev->parent; + struct tegra114_spi_priv *priv = dev_get_priv(bus); + struct spi_regs *regs = priv->regs; u32 reg, tmpdout, tmpdin = 0; const u8 *dout = data_out; u8 *din = data_in; @@ -278,7 +241,7 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int bitlen, int ret; debug("%s: slave %u:%u dout %p din %p bitlen %u\n", - __func__, slave->bus, slave->cs, dout, din, bitlen); + __func__, bus->seq, spi_chip_select(dev), dout, din, bitlen); if (bitlen % 8) return -1; num_bytes = bitlen / 8; @@ -291,13 +254,13 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int bitlen, clrsetbits_le32(®s->command1, SPI_CMD1_CS_SW_VAL, SPI_CMD1_RX_EN | SPI_CMD1_TX_EN | SPI_CMD1_LSBY_FE | - (slave->cs << SPI_CMD1_CS_SEL_SHIFT)); + (spi_chip_select(dev) << SPI_CMD1_CS_SEL_SHIFT)); /* set xfer size to 1 block (32 bits) */ writel(0, ®s->dma_blk); if (flags & SPI_XFER_BEGIN) - spi_cs_activate(slave); + spi_cs_activate(dev); /* handle data in 32-bit chunks */ while (num_bytes > 0) { @@ -383,7 +346,7 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int bitlen, } if (flags & SPI_XFER_END) - spi_cs_deactivate(slave); + spi_cs_deactivate(dev); debug("%s: transfer ended. Value=%08x, fifo_status = %08x\n", __func__, tmpdin, readl(®s->fifo_status)); @@ -394,5 +357,56 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int bitlen, return -1; } + return ret; +} + +static int tegra114_spi_set_speed(struct udevice *bus, uint speed) +{ + struct tegra_spi_platdata *plat = bus->platdata; + struct tegra114_spi_priv *priv = dev_get_priv(bus); + + if (speed > plat->frequency) + speed = plat->frequency; + priv->freq = speed; + debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); + return 0; } + +static int tegra114_spi_set_mode(struct udevice *bus, uint mode) +{ + struct tegra114_spi_priv *priv = dev_get_priv(bus); + + priv->mode = mode; + debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); + + return 0; +} + +static const struct dm_spi_ops tegra114_spi_ops = { + .claim_bus = tegra114_spi_claim_bus, + .xfer = tegra114_spi_xfer, + .set_speed = tegra114_spi_set_speed, + .set_mode = tegra114_spi_set_mode, + /* + * cs_info is not needed, since we require all chip selects to be + * in the device tree explicitly + */ +}; + +static const struct udevice_id tegra114_spi_ids[] = { + { .compatible = "nvidia,tegra114-spi" }, + { } +}; + +U_BOOT_DRIVER(tegra114_spi) = { + .name = "tegra114_spi", + .id = UCLASS_SPI, + .of_match = tegra114_spi_ids, + .ops = &tegra114_spi_ops, + .ofdata_to_platdata = tegra114_spi_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct tegra_spi_platdata), + .priv_auto_alloc_size = sizeof(struct tegra114_spi_priv), + .per_child_auto_alloc_size = sizeof(struct spi_slave), + .probe = tegra114_spi_probe, +}; diff --git a/drivers/spi/tegra20_sflash.c b/drivers/spi/tegra20_sflash.c index b5d561be34..7d0d0f37fc 100644 --- a/drivers/spi/tegra20_sflash.c +++ b/drivers/spi/tegra20_sflash.c @@ -7,15 +7,16 @@ */ #include <common.h> -#include <malloc.h> +#include <dm.h> +#include <errno.h> #include <asm/io.h> #include <asm/gpio.h> #include <asm/arch/clock.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/clk_rst.h> -#include <asm/arch-tegra20/tegra20_sflash.h> #include <spi.h> #include <fdtdec.h> +#include "tegra_spi.h" DECLARE_GLOBAL_DATA_PTR; @@ -64,129 +65,75 @@ struct spi_regs { u32 rx_fifo; /* SPI_RX_FIFO_0 register */ }; -struct tegra_spi_ctrl { +struct tegra20_sflash_priv { struct spi_regs *regs; unsigned int freq; unsigned int mode; int periph_id; int valid; + int last_transaction_us; }; -struct tegra_spi_slave { - struct spi_slave slave; - struct tegra_spi_ctrl *ctrl; -}; - -/* tegra20 only supports one SFLASH controller */ -static struct tegra_spi_ctrl spi_ctrls[1]; - -static inline struct tegra_spi_slave *to_tegra_spi(struct spi_slave *slave) -{ - return container_of(slave, struct tegra_spi_slave, slave); -} - -int tegra20_spi_cs_is_valid(unsigned int bus, unsigned int cs) +int tegra20_sflash_cs_info(struct udevice *bus, unsigned int cs, + struct spi_cs_info *info) { /* Tegra20 SPI-Flash - only 1 device ('bus/cs') */ - if (bus != 0 || cs != 0) - return 0; + if (cs != 0) + return -ENODEV; else - return 1; + return 0; } -struct spi_slave *tegra20_spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) +static int tegra20_sflash_ofdata_to_platdata(struct udevice *bus) { - struct tegra_spi_slave *spi; + struct tegra_spi_platdata *plat = bus->platdata; + const void *blob = gd->fdt_blob; + int node = bus->of_offset; - if (!spi_cs_is_valid(bus, cs)) { - printf("SPI error: unsupported bus %d / chip select %d\n", - bus, cs); - return NULL; - } + plat->base = fdtdec_get_addr(blob, node, "reg"); + plat->periph_id = clock_decode_periph_id(blob, node); - if (max_hz > TEGRA_SPI_MAX_FREQ) { - printf("SPI error: unsupported frequency %d Hz. Max frequency" - " is %d Hz\n", max_hz, TEGRA_SPI_MAX_FREQ); - return NULL; + if (plat->periph_id == PERIPH_ID_NONE) { + debug("%s: could not decode periph id %d\n", __func__, + plat->periph_id); + return -FDT_ERR_NOTFOUND; } - spi = spi_alloc_slave(struct tegra_spi_slave, bus, cs); - if (!spi) { - printf("SPI error: malloc of SPI structure failed\n"); - return NULL; - } - spi->ctrl = &spi_ctrls[bus]; - if (!spi->ctrl) { - printf("SPI error: could not find controller for bus %d\n", - bus); - return NULL; - } + /* Use 500KHz as a suitable default */ + plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", + 500000); + plat->deactivate_delay_us = fdtdec_get_int(blob, node, + "spi-deactivate-delay", 0); + debug("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", + __func__, plat->base, plat->periph_id, plat->frequency, + plat->deactivate_delay_us); - if (max_hz < spi->ctrl->freq) { - debug("%s: limiting frequency from %u to %u\n", __func__, - spi->ctrl->freq, max_hz); - spi->ctrl->freq = max_hz; - } - spi->ctrl->mode = mode; - - return &spi->slave; + return 0; } -void tegra20_spi_free_slave(struct spi_slave *slave) +static int tegra20_sflash_probe(struct udevice *bus) { - struct tegra_spi_slave *spi = to_tegra_spi(slave); - - free(spi); -} + struct tegra_spi_platdata *plat = dev_get_platdata(bus); + struct tegra20_sflash_priv *priv = dev_get_priv(bus); -int tegra20_spi_init(int *node_list, int count) -{ - struct tegra_spi_ctrl *ctrl; - int i; - int node = 0; - int found = 0; - - for (i = 0; i < count; i++) { - ctrl = &spi_ctrls[i]; - node = node_list[i]; - - ctrl->regs = (struct spi_regs *)fdtdec_get_addr(gd->fdt_blob, - node, "reg"); - if ((fdt_addr_t)ctrl->regs == FDT_ADDR_T_NONE) { - debug("%s: no slink register found\n", __func__); - continue; - } - ctrl->freq = fdtdec_get_int(gd->fdt_blob, node, - "spi-max-frequency", 0); - if (!ctrl->freq) { - debug("%s: no slink max frequency found\n", __func__); - continue; - } + priv->regs = (struct spi_regs *)plat->base; - ctrl->periph_id = clock_decode_periph_id(gd->fdt_blob, node); - if (ctrl->periph_id == PERIPH_ID_NONE) { - debug("%s: could not decode periph id\n", __func__); - continue; - } - ctrl->valid = 1; - found = 1; + priv->last_transaction_us = timer_get_us(); + priv->freq = plat->frequency; + priv->periph_id = plat->periph_id; - debug("%s: found controller at %p, freq = %u, periph_id = %d\n", - __func__, ctrl->regs, ctrl->freq, ctrl->periph_id); - } - return !found; + return 0; } -int tegra20_spi_claim_bus(struct spi_slave *slave) +static int tegra20_sflash_claim_bus(struct udevice *bus) { - struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct spi_regs *regs = spi->ctrl->regs; + struct tegra20_sflash_priv *priv = dev_get_priv(bus); + struct spi_regs *regs = priv->regs; u32 reg; /* Change SPI clock to correct frequency, PLLP_OUT0 source */ - clock_start_periph_pll(spi->ctrl->periph_id, CLOCK_ID_PERIPH, - spi->ctrl->freq); + clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, + priv->freq); /* Clear stale status here */ reg = SPI_STAT_RDY | SPI_STAT_RXF_FLUSH | SPI_STAT_TXF_FLUSH | \ @@ -197,8 +144,8 @@ int tegra20_spi_claim_bus(struct spi_slave *slave) /* * Use sw-controlled CS, so we can clock in data after ReadID, etc. */ - reg = (spi->ctrl->mode & 1) << SPI_CMD_ACTIVE_SDA_SHIFT; - if (spi->ctrl->mode & 2) + reg = (priv->mode & 1) << SPI_CMD_ACTIVE_SDA_SHIFT; + if (priv->mode & 2) reg |= 1 << SPI_CMD_ACTIVE_SCLK_SHIFT; clrsetbits_le32(®s->command, SPI_CMD_ACTIVE_SCLK_MASK | SPI_CMD_ACTIVE_SDA_MASK, SPI_CMD_CS_SOFT | reg); @@ -215,37 +162,54 @@ int tegra20_spi_claim_bus(struct spi_slave *slave) return 0; } -void tegra20_spi_cs_activate(struct spi_slave *slave) +static void spi_cs_activate(struct udevice *dev) { - struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct spi_regs *regs = spi->ctrl->regs; + struct udevice *bus = dev->parent; + struct tegra_spi_platdata *pdata = dev_get_platdata(bus); + struct tegra20_sflash_priv *priv = dev_get_priv(bus); + + /* If it's too soon to do another transaction, wait */ + if (pdata->deactivate_delay_us && + priv->last_transaction_us) { + ulong delay_us; /* The delay completed so far */ + delay_us = timer_get_us() - priv->last_transaction_us; + if (delay_us < pdata->deactivate_delay_us) + udelay(pdata->deactivate_delay_us - delay_us); + } /* CS is negated on Tegra, so drive a 1 to get a 0 */ - setbits_le32(®s->command, SPI_CMD_CS_VAL); + setbits_le32(&priv->regs->command, SPI_CMD_CS_VAL); } -void tegra20_spi_cs_deactivate(struct spi_slave *slave) +static void spi_cs_deactivate(struct udevice *dev) { - struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct spi_regs *regs = spi->ctrl->regs; + struct udevice *bus = dev->parent; + struct tegra_spi_platdata *pdata = dev_get_platdata(bus); + struct tegra20_sflash_priv *priv = dev_get_priv(bus); /* CS is negated on Tegra, so drive a 0 to get a 1 */ - clrbits_le32(®s->command, SPI_CMD_CS_VAL); + clrbits_le32(&priv->regs->command, SPI_CMD_CS_VAL); + + /* Remember time of this transaction so we can honour the bus delay */ + if (pdata->deactivate_delay_us) + priv->last_transaction_us = timer_get_us(); } -int tegra20_spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *data_out, void *data_in, unsigned long flags) +static int tegra20_sflash_xfer(struct udevice *dev, unsigned int bitlen, + const void *data_out, void *data_in, + unsigned long flags) { - struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct spi_regs *regs = spi->ctrl->regs; + struct udevice *bus = dev->parent; + struct tegra20_sflash_priv *priv = dev_get_priv(bus); + struct spi_regs *regs = priv->regs; u32 reg, tmpdout, tmpdin = 0; const u8 *dout = data_out; u8 *din = data_in; int num_bytes; int ret; - debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", - slave->bus, slave->cs, *(u8 *)dout, *(u8 *)din, bitlen); + debug("%s: slave %u:%u dout %p din %p bitlen %u\n", + __func__, bus->seq, spi_chip_select(dev), dout, din, bitlen); if (bitlen % 8) return -1; num_bytes = bitlen / 8; @@ -262,7 +226,7 @@ int tegra20_spi_xfer(struct spi_slave *slave, unsigned int bitlen, debug("spi_xfer: COMMAND = %08x\n", readl(®s->command)); if (flags & SPI_XFER_BEGIN) - spi_cs_activate(slave); + spi_cs_activate(dev); /* handle data in 32-bit chunks */ while (num_bytes > 0) { @@ -327,7 +291,7 @@ int tegra20_spi_xfer(struct spi_slave *slave, unsigned int bitlen, } if (flags & SPI_XFER_END) - spi_cs_deactivate(slave); + spi_cs_deactivate(dev); debug("spi_xfer: transfer ended. Value=%08x, status = %08x\n", tmpdin, readl(®s->status)); @@ -339,3 +303,51 @@ int tegra20_spi_xfer(struct spi_slave *slave, unsigned int bitlen, return 0; } + +static int tegra20_sflash_set_speed(struct udevice *bus, uint speed) +{ + struct tegra_spi_platdata *plat = bus->platdata; + struct tegra20_sflash_priv *priv = dev_get_priv(bus); + + if (speed > plat->frequency) + speed = plat->frequency; + priv->freq = speed; + debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); + + return 0; +} + +static int tegra20_sflash_set_mode(struct udevice *bus, uint mode) +{ + struct tegra20_sflash_priv *priv = dev_get_priv(bus); + + priv->mode = mode; + debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); + + return 0; +} + +static const struct dm_spi_ops tegra20_sflash_ops = { + .claim_bus = tegra20_sflash_claim_bus, + .xfer = tegra20_sflash_xfer, + .set_speed = tegra20_sflash_set_speed, + .set_mode = tegra20_sflash_set_mode, + .cs_info = tegra20_sflash_cs_info, +}; + +static const struct udevice_id tegra20_sflash_ids[] = { + { .compatible = "nvidia,tegra20-sflash" }, + { } +}; + +U_BOOT_DRIVER(tegra20_sflash) = { + .name = "tegra20_sflash", + .id = UCLASS_SPI, + .of_match = tegra20_sflash_ids, + .ops = &tegra20_sflash_ops, + .ofdata_to_platdata = tegra20_sflash_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct tegra_spi_platdata), + .priv_auto_alloc_size = sizeof(struct tegra20_sflash_priv), + .per_child_auto_alloc_size = sizeof(struct spi_slave), + .probe = tegra20_sflash_probe, +}; diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c index 664de6e916..213fa5f793 100644 --- a/drivers/spi/tegra20_slink.c +++ b/drivers/spi/tegra20_slink.c @@ -22,14 +22,13 @@ */ #include <common.h> -#include <malloc.h> +#include <dm.h> #include <asm/io.h> -#include <asm/gpio.h> #include <asm/arch/clock.h> #include <asm/arch-tegra/clk_rst.h> -#include <asm/arch-tegra20/tegra20_slink.h> #include <spi.h> #include <fdtdec.h> +#include "tegra_spi.h" DECLARE_GLOBAL_DATA_PTR; @@ -87,130 +86,70 @@ struct spi_regs { u32 rx_fifo; /* SLINK_RX_FIFO_0 reg off 180h */ }; -struct tegra_spi_ctrl { +struct tegra30_spi_priv { struct spi_regs *regs; unsigned int freq; unsigned int mode; int periph_id; int valid; + int last_transaction_us; }; struct tegra_spi_slave { struct spi_slave slave; - struct tegra_spi_ctrl *ctrl; + struct tegra30_spi_priv *ctrl; }; -static struct tegra_spi_ctrl spi_ctrls[CONFIG_TEGRA_SLINK_CTRLS]; - -static inline struct tegra_spi_slave *to_tegra_spi(struct spi_slave *slave) -{ - return container_of(slave, struct tegra_spi_slave, slave); -} - -int tegra30_spi_cs_is_valid(unsigned int bus, unsigned int cs) +static int tegra30_spi_ofdata_to_platdata(struct udevice *bus) { - if (bus >= CONFIG_TEGRA_SLINK_CTRLS || cs > 3 || !spi_ctrls[bus].valid) - return 0; - else - return 1; -} + struct tegra_spi_platdata *plat = bus->platdata; + const void *blob = gd->fdt_blob; + int node = bus->of_offset; -struct spi_slave *tegra30_spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct tegra_spi_slave *spi; + plat->base = fdtdec_get_addr(blob, node, "reg"); + plat->periph_id = clock_decode_periph_id(blob, node); - debug("%s: bus: %u, cs: %u, max_hz: %u, mode: %u\n", __func__, - bus, cs, max_hz, mode); - - if (!spi_cs_is_valid(bus, cs)) { - printf("SPI error: unsupported bus %d / chip select %d\n", - bus, cs); - return NULL; - } - - if (max_hz > TEGRA_SPI_MAX_FREQ) { - printf("SPI error: unsupported frequency %d Hz. Max frequency" - " is %d Hz\n", max_hz, TEGRA_SPI_MAX_FREQ); - return NULL; + if (plat->periph_id == PERIPH_ID_NONE) { + debug("%s: could not decode periph id %d\n", __func__, + plat->periph_id); + return -FDT_ERR_NOTFOUND; } - spi = spi_alloc_slave(struct tegra_spi_slave, bus, cs); - if (!spi) { - printf("SPI error: malloc of SPI structure failed\n"); - return NULL; - } - spi->ctrl = &spi_ctrls[bus]; - if (!spi->ctrl) { - printf("SPI error: could not find controller for bus %d\n", - bus); - return NULL; - } + /* Use 500KHz as a suitable default */ + plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", + 500000); + plat->deactivate_delay_us = fdtdec_get_int(blob, node, + "spi-deactivate-delay", 0); + debug("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", + __func__, plat->base, plat->periph_id, plat->frequency, + plat->deactivate_delay_us); - if (max_hz < spi->ctrl->freq) { - debug("%s: limiting frequency from %u to %u\n", __func__, - spi->ctrl->freq, max_hz); - spi->ctrl->freq = max_hz; - } - spi->ctrl->mode = mode; - - return &spi->slave; + return 0; } -void tegra30_spi_free_slave(struct spi_slave *slave) +static int tegra30_spi_probe(struct udevice *bus) { - struct tegra_spi_slave *spi = to_tegra_spi(slave); - - free(spi); -} + struct tegra_spi_platdata *plat = dev_get_platdata(bus); + struct tegra30_spi_priv *priv = dev_get_priv(bus); -int tegra30_spi_init(int *node_list, int count) -{ - struct tegra_spi_ctrl *ctrl; - int i; - int node = 0; - int found = 0; - - for (i = 0; i < count; i++) { - ctrl = &spi_ctrls[i]; - node = node_list[i]; - - ctrl->regs = (struct spi_regs *)fdtdec_get_addr(gd->fdt_blob, - node, "reg"); - if ((fdt_addr_t)ctrl->regs == FDT_ADDR_T_NONE) { - debug("%s: no slink register found\n", __func__); - continue; - } - ctrl->freq = fdtdec_get_int(gd->fdt_blob, node, - "spi-max-frequency", 0); - if (!ctrl->freq) { - debug("%s: no slink max frequency found\n", __func__); - continue; - } + priv->regs = (struct spi_regs *)plat->base; - ctrl->periph_id = clock_decode_periph_id(gd->fdt_blob, node); - if (ctrl->periph_id == PERIPH_ID_NONE) { - debug("%s: could not decode periph id\n", __func__); - continue; - } - ctrl->valid = 1; - found = 1; + priv->last_transaction_us = timer_get_us(); + priv->freq = plat->frequency; + priv->periph_id = plat->periph_id; - debug("%s: found controller at %p, freq = %u, periph_id = %d\n", - __func__, ctrl->regs, ctrl->freq, ctrl->periph_id); - } - return !found; + return 0; } -int tegra30_spi_claim_bus(struct spi_slave *slave) +static int tegra30_spi_claim_bus(struct udevice *bus) { - struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct spi_regs *regs = spi->ctrl->regs; + struct tegra30_spi_priv *priv = dev_get_priv(bus); + struct spi_regs *regs = priv->regs; u32 reg; /* Change SPI clock to correct frequency, PLLP_OUT0 source */ - clock_start_periph_pll(spi->ctrl->periph_id, CLOCK_ID_PERIPH, - spi->ctrl->freq); + clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, + priv->freq); /* Clear stale status here */ reg = SLINK_STAT_RDY | SLINK_STAT_RXF_FLUSH | SLINK_STAT_TXF_FLUSH | \ @@ -227,29 +166,46 @@ int tegra30_spi_claim_bus(struct spi_slave *slave) return 0; } -void tegra30_spi_cs_activate(struct spi_slave *slave) +static void spi_cs_activate(struct udevice *dev) { - struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct spi_regs *regs = spi->ctrl->regs; + struct udevice *bus = dev->parent; + struct tegra_spi_platdata *pdata = dev_get_platdata(bus); + struct tegra30_spi_priv *priv = dev_get_priv(bus); + + /* If it's too soon to do another transaction, wait */ + if (pdata->deactivate_delay_us && + priv->last_transaction_us) { + ulong delay_us; /* The delay completed so far */ + delay_us = timer_get_us() - priv->last_transaction_us; + if (delay_us < pdata->deactivate_delay_us) + udelay(pdata->deactivate_delay_us - delay_us); + } /* CS is negated on Tegra, so drive a 1 to get a 0 */ - setbits_le32(®s->command, SLINK_CMD_CS_VAL); + setbits_le32(&priv->regs->command, SLINK_CMD_CS_VAL); } -void tegra30_spi_cs_deactivate(struct spi_slave *slave) +static void spi_cs_deactivate(struct udevice *dev) { - struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct spi_regs *regs = spi->ctrl->regs; + struct udevice *bus = dev->parent; + struct tegra_spi_platdata *pdata = dev_get_platdata(bus); + struct tegra30_spi_priv *priv = dev_get_priv(bus); /* CS is negated on Tegra, so drive a 0 to get a 1 */ - clrbits_le32(®s->command, SLINK_CMD_CS_VAL); + clrbits_le32(&priv->regs->command, SLINK_CMD_CS_VAL); + + /* Remember time of this transaction so we can honour the bus delay */ + if (pdata->deactivate_delay_us) + priv->last_transaction_us = timer_get_us(); } -int tegra30_spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *data_out, void *data_in, unsigned long flags) +static int tegra30_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *data_out, void *data_in, + unsigned long flags) { - struct tegra_spi_slave *spi = to_tegra_spi(slave); - struct spi_regs *regs = spi->ctrl->regs; + struct udevice *bus = dev->parent; + struct tegra30_spi_priv *priv = dev_get_priv(bus); + struct spi_regs *regs = priv->regs; u32 reg, tmpdout, tmpdin = 0; const u8 *dout = data_out; u8 *din = data_in; @@ -257,7 +213,7 @@ int tegra30_spi_xfer(struct spi_slave *slave, unsigned int bitlen, int ret; debug("%s: slave %u:%u dout %p din %p bitlen %u\n", - __func__, slave->bus, slave->cs, dout, din, bitlen); + __func__, bus->seq, spi_chip_select(dev), dout, din, bitlen); if (bitlen % 8) return -1; num_bytes = bitlen / 8; @@ -276,11 +232,11 @@ int tegra30_spi_xfer(struct spi_slave *slave, unsigned int bitlen, clrsetbits_le32(®s->command2, SLINK_CMD2_SS_EN_MASK, SLINK_CMD2_TXEN | SLINK_CMD2_RXEN | - (slave->cs << SLINK_CMD2_SS_EN_SHIFT)); + (spi_chip_select(dev) << SLINK_CMD2_SS_EN_SHIFT)); debug("%s entry: COMMAND2 = %08x\n", __func__, readl(®s->command2)); if (flags & SPI_XFER_BEGIN) - spi_cs_activate(slave); + spi_cs_activate(dev); /* handle data in 32-bit chunks */ while (num_bytes > 0) { @@ -344,7 +300,7 @@ int tegra30_spi_xfer(struct spi_slave *slave, unsigned int bitlen, } if (flags & SPI_XFER_END) - spi_cs_deactivate(slave); + spi_cs_deactivate(dev); debug("%s: transfer ended. Value=%08x, status = %08x\n", __func__, tmpdin, readl(®s->status)); @@ -357,3 +313,54 @@ int tegra30_spi_xfer(struct spi_slave *slave, unsigned int bitlen, return 0; } + +static int tegra30_spi_set_speed(struct udevice *bus, uint speed) +{ + struct tegra_spi_platdata *plat = bus->platdata; + struct tegra30_spi_priv *priv = dev_get_priv(bus); + + if (speed > plat->frequency) + speed = plat->frequency; + priv->freq = speed; + debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq); + + return 0; +} + +static int tegra30_spi_set_mode(struct udevice *bus, uint mode) +{ + struct tegra30_spi_priv *priv = dev_get_priv(bus); + + priv->mode = mode; + debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode); + + return 0; +} + +static const struct dm_spi_ops tegra30_spi_ops = { + .claim_bus = tegra30_spi_claim_bus, + .xfer = tegra30_spi_xfer, + .set_speed = tegra30_spi_set_speed, + .set_mode = tegra30_spi_set_mode, + /* + * cs_info is not needed, since we require all chip selects to be + * in the device tree explicitly + */ +}; + +static const struct udevice_id tegra30_spi_ids[] = { + { .compatible = "nvidia,tegra20-slink" }, + { } +}; + +U_BOOT_DRIVER(tegra30_spi) = { + .name = "tegra20_slink", + .id = UCLASS_SPI, + .of_match = tegra30_spi_ids, + .ops = &tegra30_spi_ops, + .ofdata_to_platdata = tegra30_spi_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct tegra_spi_platdata), + .priv_auto_alloc_size = sizeof(struct tegra30_spi_priv), + .per_child_auto_alloc_size = sizeof(struct spi_slave), + .probe = tegra30_spi_probe, +}; diff --git a/drivers/spi/tegra_spi.h b/drivers/spi/tegra_spi.h new file mode 100644 index 0000000000..fb2b50f0bc --- /dev/null +++ b/drivers/spi/tegra_spi.h @@ -0,0 +1,12 @@ +/* + * (C) Copyright 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +struct tegra_spi_platdata { + enum periph_id periph_id; + int frequency; /* Default clock frequency, -1 for none */ + ulong base; + uint deactivate_delay_us; /* Delay to wait after deactivate */ +}; |
