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-rw-r--r--drivers/mtd/nand/fsl_ifc_spl.c2
-rw-r--r--drivers/mtd/nand/lpc32xx_nand_slc.c2
-rw-r--r--drivers/mtd/nand/mxc_nand_spl.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/drivers/mtd/nand/fsl_ifc_spl.c b/drivers/mtd/nand/fsl_ifc_spl.c
index fccbfb5129..cbeb74a5bb 100644
--- a/drivers/mtd/nand/fsl_ifc_spl.c
+++ b/drivers/mtd/nand/fsl_ifc_spl.c
@@ -236,7 +236,7 @@ int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
/*
* Main entrypoint for NAND Boot. It's necessary that SDRAM is already
- * configured and available since this code loads the main U-boot image
+ * configured and available since this code loads the main U-Boot image
* from NAND into SDRAM and starts from there.
*/
void nand_boot(void)
diff --git a/drivers/mtd/nand/lpc32xx_nand_slc.c b/drivers/mtd/nand/lpc32xx_nand_slc.c
index 2e5f139606..4e1be36654 100644
--- a/drivers/mtd/nand/lpc32xx_nand_slc.c
+++ b/drivers/mtd/nand/lpc32xx_nand_slc.c
@@ -516,7 +516,7 @@ static int lpc32xx_write_page_hwecc(struct mtd_info *mtd,
/*
* LPC32xx has only one SLC NAND controller, don't utilize
* CONFIG_SYS_NAND_SELF_INIT to be able to reuse this function
- * both in SPL NAND and U-boot images.
+ * both in SPL NAND and U-Boot images.
*/
int board_nand_init(struct nand_chip *lpc32xx_chip)
{
diff --git a/drivers/mtd/nand/mxc_nand_spl.c b/drivers/mtd/nand/mxc_nand_spl.c
index 69b736a848..6ac2c96eeb 100644
--- a/drivers/mtd/nand/mxc_nand_spl.c
+++ b/drivers/mtd/nand/mxc_nand_spl.c
@@ -337,7 +337,7 @@ void nand_boot(void)
if (!nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
CONFIG_SYS_NAND_U_BOOT_SIZE,
(uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
- /* Copy from NAND successful, start U-boot */
+ /* Copy from NAND successful, start U-Boot */
uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
uboot();
} else {
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