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-rw-r--r--drivers/gpio/Makefile1
-rw-r--r--drivers/gpio/da8xx_gpio.c77
-rw-r--r--drivers/gpio/mpc83xx_gpio.c199
-rw-r--r--drivers/gpio/mvgpio.c74
-rw-r--r--drivers/gpio/mxc_gpio.c42
-rw-r--r--drivers/gpio/mxs_gpio.c42
-rw-r--r--drivers/gpio/s5p_gpio.c47
-rw-r--r--drivers/gpio/tegra2_gpio.c165
8 files changed, 429 insertions, 218 deletions
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index e22c09689d..4375a55267 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -37,6 +37,7 @@ COBJS-$(CONFIG_S5P) += s5p_gpio.o
COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o
COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o
COBJS-$(CONFIG_ALTERA_PIO) += altera_pio.o
+COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c
index 74b58e889f..84d2b77d92 100644
--- a/drivers/gpio/da8xx_gpio.c
+++ b/drivers/gpio/da8xx_gpio.c
@@ -23,7 +23,6 @@
#include <common.h>
#include <asm/io.h>
#include <asm/gpio.h>
-#include <asm/arch/gpio.h>
#include <asm/arch/hardware.h>
#include <asm/arch/davinci_misc.h>
@@ -181,87 +180,93 @@ static const struct pinmux_config gpio_pinmux[] = {
{ pinmux(18), 8, 2 },
};
-int gpio_request(int gp, const char *label)
+int gpio_request(unsigned gpio, const char *label)
{
- if (gp >= MAX_NUM_GPIOS)
+ if (gpio >= MAX_NUM_GPIOS)
return -1;
- if (gpio_registry[gp].is_registered)
+ if (gpio_registry[gpio].is_registered)
return -1;
- gpio_registry[gp].is_registered = 1;
- strncpy(gpio_registry[gp].name, label, GPIO_NAME_SIZE);
- gpio_registry[gp].name[GPIO_NAME_SIZE - 1] = 0;
+ gpio_registry[gpio].is_registered = 1;
+ strncpy(gpio_registry[gpio].name, label, GPIO_NAME_SIZE);
+ gpio_registry[gpio].name[GPIO_NAME_SIZE - 1] = 0;
- davinci_configure_pin_mux(&gpio_pinmux[gp], 1);
+ davinci_configure_pin_mux(&gpio_pinmux[gpio], 1);
return 0;
}
-void gpio_free(int gp)
+int gpio_free(unsigned gpio)
{
- gpio_registry[gp].is_registered = 0;
-}
+ if (gpio >= MAX_NUM_GPIOS)
+ return -1;
-void gpio_toggle_value(int gp)
-{
- gpio_set_value(gp, !gpio_get_value(gp));
+ if (!gpio_registry[gpio].is_registered)
+ return -1;
+
+ gpio_registry[gpio].is_registered = 0;
+ gpio_registry[gpio].name[0] = '\0';
+ /* Do not configure as input or change pin mux here */
+ return 0;
}
-int gpio_direction_input(int gp)
+int gpio_direction_input(unsigned gpio)
{
struct davinci_gpio *bank;
- bank = GPIO_BANK(gp);
- setbits_le32(&bank->dir, 1U << GPIO_BIT(gp));
+ bank = GPIO_BANK(gpio);
+ setbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
return 0;
}
-int gpio_direction_output(int gp, int value)
+int gpio_direction_output(unsigned gpio, int value)
{
struct davinci_gpio *bank;
- bank = GPIO_BANK(gp);
- clrbits_le32(&bank->dir, 1U << GPIO_BIT(gp));
- gpio_set_value(gp, value);
+ bank = GPIO_BANK(gpio);
+ clrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
+ gpio_set_value(gpio, value);
return 0;
}
-int gpio_get_value(int gp)
+int gpio_get_value(unsigned gpio)
{
struct davinci_gpio *bank;
unsigned int ip;
- bank = GPIO_BANK(gp);
- ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gp));
+ bank = GPIO_BANK(gpio);
+ ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gpio));
return ip ? 1 : 0;
}
-void gpio_set_value(int gp, int value)
+int gpio_set_value(unsigned gpio, int value)
{
struct davinci_gpio *bank;
- bank = GPIO_BANK(gp);
+ bank = GPIO_BANK(gpio);
if (value)
- bank->set_data = 1U << GPIO_BIT(gp);
+ bank->set_data = 1U << GPIO_BIT(gpio);
else
- bank->clr_data = 1U << GPIO_BIT(gp);
+ bank->clr_data = 1U << GPIO_BIT(gpio);
+
+ return 0;
}
void gpio_info(void)
{
- int gp, dir, val;
+ unsigned gpio, dir, val;
struct davinci_gpio *bank;
- for (gp = 0; gp < MAX_NUM_GPIOS; ++gp) {
- bank = GPIO_BANK(gp);
- dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gp));
- val = gpio_get_value(gp);
+ for (gpio = 0; gpio < MAX_NUM_GPIOS; ++gpio) {
+ bank = GPIO_BANK(gpio);
+ dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gpio));
+ val = gpio_get_value(gpio);
printf("% 4d: %s: %d [%c] %s\n",
- gp, dir ? " in" : "out", val,
- gpio_registry[gp].is_registered ? 'x' : ' ',
- gpio_registry[gp].name);
+ gpio, dir ? " in" : "out", val,
+ gpio_registry[gpio].is_registered ? 'x' : ' ',
+ gpio_registry[gpio].name);
}
}
diff --git a/drivers/gpio/mpc83xx_gpio.c b/drivers/gpio/mpc83xx_gpio.c
new file mode 100644
index 0000000000..a9afcb2dd6
--- /dev/null
+++ b/drivers/gpio/mpc83xx_gpio.c
@@ -0,0 +1,199 @@
+/*
+ * Freescale MPC83xx GPIO handling.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc83xx.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+
+#ifndef CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION
+#define CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION 0
+#endif
+#ifndef CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION
+#define CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION 0
+#endif
+#ifndef CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN
+#define CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0
+#endif
+#ifndef CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN
+#define CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0
+#endif
+#ifndef CONFIG_MPC83XX_GPIO_0_INIT_VALUE
+#define CONFIG_MPC83XX_GPIO_0_INIT_VALUE 0
+#endif
+#ifndef CONFIG_MPC83XX_GPIO_1_INIT_VALUE
+#define CONFIG_MPC83XX_GPIO_1_INIT_VALUE 0
+#endif
+
+static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS];
+
+/*
+ * Generic_GPIO primitives.
+ */
+
+int gpio_request(unsigned gpio, const char *label)
+{
+ if (gpio >= MAX_NUM_GPIOS)
+ return -1;
+
+ return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+ /* Do not set to input */
+ return 0;
+}
+
+/* set GPIO pin 'gpio' as an input */
+int gpio_direction_input(unsigned gpio)
+{
+ immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ unsigned int ctrlr;
+ unsigned int line;
+ unsigned int line_mask;
+
+ /* 32-bits per controller */
+ ctrlr = gpio >> 5;
+ line = gpio & (0x1F);
+
+ /* Big endian */
+ line_mask = 1 << (31 - line);
+
+ clrbits_be32(&im->gpio[ctrlr].dir, line_mask);
+
+ return 0;
+}
+
+/* set GPIO pin 'gpio' as an output, with polarity 'value' */
+int gpio_direction_output(unsigned gpio, int value)
+{
+ immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ unsigned int ctrlr;
+ unsigned int line;
+ unsigned int line_mask;
+
+ if (value != 0 && value != 1) {
+ printf("Error: Value parameter must be 0 or 1.\n");
+ return -1;
+ }
+
+ gpio_set_value(gpio, value);
+
+ /* 32-bits per controller */
+ ctrlr = gpio >> 5;
+ line = gpio & (0x1F);
+
+ /* Big endian */
+ line_mask = 1 << (31 - line);
+
+ /* Make the line output */
+ setbits_be32(&im->gpio[ctrlr].dir, line_mask);
+
+ return 0;
+}
+
+/* read GPIO IN value of pin 'gpio' */
+int gpio_get_value(unsigned gpio)
+{
+ immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ unsigned int ctrlr;
+ unsigned int line;
+ unsigned int line_mask;
+
+ /* 32-bits per controller */
+ ctrlr = gpio >> 5;
+ line = gpio & (0x1F);
+
+ /* Big endian */
+ line_mask = 1 << (31 - line);
+
+ /* Read the value and mask off the bit */
+ return (in_be32(&im->gpio[ctrlr].dat) & line_mask) != 0;
+}
+
+/* write GPIO OUT value to pin 'gpio' */
+int gpio_set_value(unsigned gpio, int value)
+{
+ immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ unsigned int ctrlr;
+ unsigned int line;
+ unsigned int line_mask;
+
+ if (value != 0 && value != 1) {
+ printf("Error: Value parameter must be 0 or 1.\n");
+ return -1;
+ }
+
+ /* 32-bits per controller */
+ ctrlr = gpio >> 5;
+ line = gpio & (0x1F);
+
+ /* Big endian */
+ line_mask = 1 << (31 - line);
+
+ /* Update the local output buffer soft copy */
+ gpio_output_value[ctrlr] =
+ (gpio_output_value[ctrlr] & ~line_mask) | \
+ (value ? line_mask : 0);
+
+ /* Write the output */
+ out_be32(&im->gpio[ctrlr].dat, gpio_output_value[ctrlr]);
+
+ return 0;
+}
+
+/* Configure GPIO registers early */
+void mpc83xx_gpio_init_f()
+{
+ immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+
+#if MPC83XX_GPIO_CTRLRS >= 1
+ out_be32(&im->gpio[0].dir, CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION);
+ out_be32(&im->gpio[0].odr, CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN);
+ out_be32(&im->gpio[0].dat, CONFIG_MPC83XX_GPIO_0_INIT_VALUE);
+ out_be32(&im->gpio[0].ier, 0xFFFFFFFF); /* Clear all events */
+ out_be32(&im->gpio[0].imr, 0);
+ out_be32(&im->gpio[0].icr, 0);
+#endif
+
+#if MPC83XX_GPIO_CTRLRS >= 2
+ out_be32(&im->gpio[1].dir, CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION);
+ out_be32(&im->gpio[1].odr, CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN);
+ out_be32(&im->gpio[1].dat, CONFIG_MPC83XX_GPIO_1_INIT_VALUE);
+ out_be32(&im->gpio[1].ier, 0xFFFFFFFF); /* Clear all events */
+ out_be32(&im->gpio[1].imr, 0);
+ out_be32(&im->gpio[1].icr, 0);
+#endif
+}
+
+/* Initialize GPIO soft-copies */
+void mpc83xx_gpio_init_r()
+{
+#if MPC83XX_GPIO_CTRLRS >= 1
+ gpio_output_value[0] = CONFIG_MPC83XX_GPIO_0_INIT_VALUE;
+#endif
+
+#if MPC83XX_GPIO_CTRLRS >= 2
+ gpio_output_value[1] = CONFIG_MPC83XX_GPIO_1_INIT_VALUE;
+#endif
+}
diff --git a/drivers/gpio/mvgpio.c b/drivers/gpio/mvgpio.c
index 276f206ccd..c80891cd50 100644
--- a/drivers/gpio/mvgpio.c
+++ b/drivers/gpio/mvgpio.c
@@ -35,81 +35,79 @@
#define MV_MAX_GPIO 128
#endif
-int gpio_request(int gp, const char *label)
+int gpio_request(unsigned gpio, const char *label)
{
- if (gp >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO requested %d\n", __func__, gp);
- return -EINVAL;
+ if (gpio >= MV_MAX_GPIO) {
+ printf("%s: Invalid GPIO requested %d\n", __func__, gpio);
+ return -1;
}
return 0;
}
-void gpio_free(int gp)
+int gpio_free(unsigned gpio)
{
+ return 0;
}
-void gpio_toggle_value(int gp)
-{
- gpio_set_value(gp, !gpio_get_value(gp));
-}
-
-int gpio_direction_input(int gp)
+int gpio_direction_input(unsigned gpio)
{
struct gpio_reg *gpio_reg_bank;
- if (gp >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO %d\n", __func__, gp);
- return -EINVAL;
+ if (gpio >= MV_MAX_GPIO) {
+ printf("%s: Invalid GPIO %d\n", __func__, gpio);
+ return -1;
}
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
- writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gcdr);
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
+ writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gcdr);
return 0;
}
-int gpio_direction_output(int gp, int value)
+int gpio_direction_output(unsigned gpio, int value)
{
struct gpio_reg *gpio_reg_bank;
- if (gp >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO %d\n", __func__, gp);
- return -EINVAL;
+ if (gpio >= MV_MAX_GPIO) {
+ printf("%s: Invalid GPIO %d\n", __func__, gpio);
+ return -1;
}
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
- writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gsdr);
- gpio_set_value(gp, value);
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
+ writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gsdr);
+ gpio_set_value(gpio, value);
return 0;
}
-int gpio_get_value(int gp)
+int gpio_get_value(unsigned gpio)
{
struct gpio_reg *gpio_reg_bank;
- u32 gp_val;
+ u32 gpio_val;
- if (gp >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO %d\n", __func__, gp);
- return -EINVAL;
+ if (gpio >= MV_MAX_GPIO) {
+ printf("%s: Invalid GPIO %d\n", __func__, gpio);
+ return -1;
}
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
- gp_val = readl(&gpio_reg_bank->gplr);
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
+ gpio_val = readl(&gpio_reg_bank->gplr);
- return GPIO_VAL(gp, gp_val);
+ return GPIO_VAL(gpio, gpio_val);
}
-void gpio_set_value(int gp, int value)
+int gpio_set_value(unsigned gpio, int value)
{
struct gpio_reg *gpio_reg_bank;
- if (gp >= MV_MAX_GPIO) {
- printf("%s: Invalid GPIO %d\n", __func__, gp);
- return;
+ if (gpio >= MV_MAX_GPIO) {
+ printf("%s: Invalid GPIO %d\n", __func__, gpio);
+ return -1;
}
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp));
+ gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio));
if (value)
- writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gpsr);
+ writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gpsr);
else
- writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gpcr);
+ writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gpcr);
+
+ return 0;
}
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index 908808d50e..df6bbbbc4b 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -58,7 +58,7 @@ static int mxc_gpio_direction(unsigned int gpio,
u32 l;
if (port >= ARRAY_SIZE(gpio_ports))
- return -EINVAL;
+ return -1;
gpio &= 0x1f;
@@ -78,14 +78,14 @@ static int mxc_gpio_direction(unsigned int gpio,
return 0;
}
-void gpio_set_value(int gpio, int value)
+int gpio_set_value(unsigned gpio, int value)
{
unsigned int port = gpio >> 5;
struct gpio_regs *regs;
u32 l;
if (port >= ARRAY_SIZE(gpio_ports))
- return;
+ return -1;
gpio &= 0x1f;
@@ -97,55 +97,53 @@ void gpio_set_value(int gpio, int value)
else
l &= ~(1 << gpio);
writel(l, &regs->gpio_dr);
+
+ return 0;
}
-int gpio_get_value(int gpio)
+int gpio_get_value(unsigned gpio)
{
unsigned int port = gpio >> 5;
struct gpio_regs *regs;
- u32 l;
+ u32 val;
if (port >= ARRAY_SIZE(gpio_ports))
- return -EINVAL;
+ return -1;
gpio &= 0x1f;
regs = (struct gpio_regs *)gpio_ports[port];
- l = (readl(&regs->gpio_dr) >> gpio) & 0x01;
+ val = (readl(&regs->gpio_dr) >> gpio) & 0x01;
- return l;
+ return val;
}
-int gpio_request(int gp, const char *label)
+int gpio_request(unsigned gpio, const char *label)
{
- unsigned int port = gp >> 5;
+ unsigned int port = gpio >> 5;
if (port >= ARRAY_SIZE(gpio_ports))
- return -EINVAL;
+ return -1;
return 0;
}
-void gpio_free(int gp)
+int gpio_free(unsigned gpio)
{
+ return 0;
}
-void gpio_toggle_value(int gp)
-{
- gpio_set_value(gp, !gpio_get_value(gp));
-}
-
-int gpio_direction_input(int gp)
+int gpio_direction_input(unsigned gpio)
{
- return mxc_gpio_direction(gp, MXC_GPIO_DIRECTION_IN);
+ return mxc_gpio_direction(gpio, MXC_GPIO_DIRECTION_IN);
}
-int gpio_direction_output(int gp, int value)
+int gpio_direction_output(unsigned gpio, int value)
{
- int ret = mxc_gpio_direction(gp, MXC_GPIO_DIRECTION_OUT);
+ int ret = mxc_gpio_direction(gpio, MXC_GPIO_DIRECTION_OUT);
if (ret < 0)
return ret;
- gpio_set_value(gp, value);
+ gpio_set_value(gpio, value);
return 0;
}
diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index 539738be9b..0365812c0a 100644
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -69,68 +69,64 @@ void mxs_gpio_init(void)
}
}
-int gpio_get_value(int gp)
+int gpio_get_value(unsigned gpio)
{
- uint32_t bank = PAD_BANK(gp);
+ uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DIN(bank);
struct mx28_register *reg =
(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
- return (readl(&reg->reg) >> PAD_PIN(gp)) & 1;
+ return (readl(&reg->reg) >> PAD_PIN(gpio)) & 1;
}
-void gpio_set_value(int gp, int value)
+void gpio_set_value(unsigned gpio, int value)
{
- uint32_t bank = PAD_BANK(gp);
+ uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DOUT(bank);
struct mx28_register *reg =
(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
if (value)
- writel(1 << PAD_PIN(gp), &reg->reg_set);
+ writel(1 << PAD_PIN(gpio), &reg->reg_set);
else
- writel(1 << PAD_PIN(gp), &reg->reg_clr);
+ writel(1 << PAD_PIN(gpio), &reg->reg_clr);
}
-int gpio_direction_input(int gp)
+int gpio_direction_input(unsigned gpio)
{
- uint32_t bank = PAD_BANK(gp);
+ uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DOE(bank);
struct mx28_register *reg =
(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
- writel(1 << PAD_PIN(gp), &reg->reg_clr);
+ writel(1 << PAD_PIN(gpio), &reg->reg_clr);
return 0;
}
-int gpio_direction_output(int gp, int value)
+int gpio_direction_output(unsigned gpio, int value)
{
- uint32_t bank = PAD_BANK(gp);
+ uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DOE(bank);
struct mx28_register *reg =
(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
- writel(1 << PAD_PIN(gp), &reg->reg_set);
+ writel(1 << PAD_PIN(gpio), &reg->reg_set);
- gpio_set_value(gp, value);
+ gpio_set_value(gpio, value);
return 0;
}
-int gpio_request(int gp, const char *label)
+int gpio_request(unsigned gpio, const char *label)
{
- if (PAD_BANK(gp) >= PINCTRL_BANKS)
- return -EINVAL;
+ if (PAD_BANK(gpio) >= PINCTRL_BANKS)
+ return -1;
return 0;
}
-void gpio_free(int gp)
+int gpio_free(unsigned gpio)
{
-}
-
-void gpio_toggle_value(int gp)
-{
- gpio_set_value(gp, !gpio_get_value(gp));
+ return 0;
}
diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index 1edf9a26a2..47f3213927 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -20,7 +20,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/gpio.h>
+#include <asm/gpio.h>
#define CON_MASK(x) (0xf << ((x) << 2))
#define CON_SFR(x, v) ((v) << ((x) << 2))
@@ -142,46 +142,55 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode)
writel(value, &bank->drv);
}
-struct s5p_gpio_bank *s5p_gpio_get_bank(int nr)
+struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned gpio)
{
- int bank = nr / GPIO_PER_BANK;
+ int bank = gpio / GPIO_PER_BANK;
bank *= sizeof(struct s5p_gpio_bank);
- return (struct s5p_gpio_bank *) (s5p_gpio_base(nr) + bank);
+ return (struct s5p_gpio_bank *) (s5p_gpio_base(gpio) + bank);
}
-int s5p_gpio_get_pin(int nr)
+int s5p_gpio_get_pin(unsigned gpio)
{
- return nr % GPIO_PER_BANK;
+ return gpio % GPIO_PER_BANK;
}
-int gpio_request(int gpio, const char *label)
+/* Common GPIO API */
+
+int gpio_request(unsigned gpio, const char *label)
{
return 0;
}
-int gpio_direction_input(int nr)
+int gpio_free(unsigned gpio)
{
- s5p_gpio_direction_input(s5p_gpio_get_bank(nr),
- s5p_gpio_get_pin(nr));
return 0;
}
-int gpio_direction_output(int nr, int value)
+int gpio_direction_input(unsigned gpio)
{
- s5p_gpio_direction_output(s5p_gpio_get_bank(nr),
- s5p_gpio_get_pin(nr), value);
+ s5p_gpio_direction_input(s5p_gpio_get_bank(gpio),
+ s5p_gpio_get_pin(gpio));
return 0;
}
-int gpio_get_value(int nr)
+int gpio_direction_output(unsigned gpio, int value)
{
- return (int) s5p_gpio_get_value(s5p_gpio_get_bank(nr),
- s5p_gpio_get_pin(nr));
+ s5p_gpio_direction_output(s5p_gpio_get_bank(gpio),
+ s5p_gpio_get_pin(gpio), value);
+ return 0;
}
-void gpio_set_value(int nr, int value)
+int gpio_get_value(unsigned gpio)
{
- s5p_gpio_set_value(s5p_gpio_get_bank(nr),
- s5p_gpio_get_pin(nr), value);
+ return (int) s5p_gpio_get_value(s5p_gpio_get_bank(gpio),
+ s5p_gpio_get_pin(gpio));
+}
+
+int gpio_set_value(unsigned gpio, int value)
+{
+ s5p_gpio_set_value(s5p_gpio_get_bank(gpio),
+ s5p_gpio_get_pin(gpio), value);
+
+ return 0;
}
diff --git a/drivers/gpio/tegra2_gpio.c b/drivers/gpio/tegra2_gpio.c
index 22669b6160..70ca46fae5 100644
--- a/drivers/gpio/tegra2_gpio.c
+++ b/drivers/gpio/tegra2_gpio.c
@@ -49,188 +49,192 @@ static char *get_name(int i)
return *gpio_names[i].name ? gpio_names[i].name : "UNKNOWN";
}
-/* Return config of pin 'gp' as GPIO (1) or SFPIO (0) */
-static int get_config(int gp)
+/* Return config of pin 'gpio' as GPIO (1) or SFPIO (0) */
+static int get_config(unsigned gpio)
{
- struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
u32 u;
int type;
- u = readl(&bank->gpio_config[GPIO_PORT(gp)]);
- type = (u >> GPIO_BIT(gp)) & 1;
+ u = readl(&bank->gpio_config[GPIO_PORT(gpio)]);
+ type = (u >> GPIO_BIT(gpio)) & 1;
debug("get_config: port = %d, bit = %d is %s\n",
- GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO");
+ GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
return type;
}
-/* Config pin 'gp' as GPIO or SFPIO, based on 'type' */
-static void set_config(int gp, int type)
+/* Config pin 'gpio' as GPIO or SFPIO, based on 'type' */
+static void set_config(unsigned gpio, int type)
{
- struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
u32 u;
debug("set_config: port = %d, bit = %d, %s\n",
- GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO");
+ GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
- u = readl(&bank->gpio_config[GPIO_PORT(gp)]);
+ u = readl(&bank->gpio_config[GPIO_PORT(gpio)]);
if (type) /* GPIO */
- u |= 1 << GPIO_BIT(gp);
+ u |= 1 << GPIO_BIT(gpio);
else
- u &= ~(1 << GPIO_BIT(gp));
- writel(u, &bank->gpio_config[GPIO_PORT(gp)]);
+ u &= ~(1 << GPIO_BIT(gpio));
+ writel(u, &bank->gpio_config[GPIO_PORT(gpio)]);
}
-/* Return GPIO pin 'gp' direction - 0 = input or 1 = output */
-static int get_direction(int gp)
+/* Return GPIO pin 'gpio' direction - 0 = input or 1 = output */
+static int get_direction(unsigned gpio)
{
- struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
u32 u;
int dir;
- u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
- dir = (u >> GPIO_BIT(gp)) & 1;
+ u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]);
+ dir = (u >> GPIO_BIT(gpio)) & 1;
debug("get_direction: port = %d, bit = %d, %s\n",
- GPIO_FULLPORT(gp), GPIO_BIT(gp), dir ? "OUT" : "IN");
+ GPIO_FULLPORT(gpio), GPIO_BIT(gpio), dir ? "OUT" : "IN");
return dir;
}
-/* Config GPIO pin 'gp' as input or output (OE) as per 'output' */
-static void set_direction(int gp, int output)
+/* Config GPIO pin 'gpio' as input or output (OE) as per 'output' */
+static void set_direction(unsigned gpio, int output)
{
- struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
u32 u;
debug("set_direction: port = %d, bit = %d, %s\n",
- GPIO_FULLPORT(gp), GPIO_BIT(gp), output ? "OUT" : "IN");
+ GPIO_FULLPORT(gpio), GPIO_BIT(gpio), output ? "OUT" : "IN");
- u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
+ u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]);
if (output)
- u |= 1 << GPIO_BIT(gp);
+ u |= 1 << GPIO_BIT(gpio);
else
- u &= ~(1 << GPIO_BIT(gp));
- writel(u, &bank->gpio_dir_out[GPIO_PORT(gp)]);
+ u &= ~(1 << GPIO_BIT(gpio));
+ writel(u, &bank->gpio_dir_out[GPIO_PORT(gpio)]);
}
-/* set GPIO pin 'gp' output bit as 0 or 1 as per 'high' */
-static void set_level(int gp, int high)
+/* set GPIO pin 'gpio' output bit as 0 or 1 as per 'high' */
+static void set_level(unsigned gpio, int high)
{
- struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
u32 u;
debug("set_level: port = %d, bit %d == %d\n",
- GPIO_FULLPORT(gp), GPIO_BIT(gp), high);
+ GPIO_FULLPORT(gpio), GPIO_BIT(gpio), high);
- u = readl(&bank->gpio_out[GPIO_PORT(gp)]);
+ u = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
if (high)
- u |= 1 << GPIO_BIT(gp);
+ u |= 1 << GPIO_BIT(gpio);
else
- u &= ~(1 << GPIO_BIT(gp));
- writel(u, &bank->gpio_out[GPIO_PORT(gp)]);
+ u &= ~(1 << GPIO_BIT(gpio));
+ writel(u, &bank->gpio_out[GPIO_PORT(gpio)]);
}
/*
* Generic_GPIO primitives.
*/
-int gpio_request(int gp, const char *label)
+int gpio_request(unsigned gpio, const char *label)
{
- if (gp >= MAX_NUM_GPIOS)
+ if (gpio >= MAX_NUM_GPIOS)
return -1;
if (label != NULL) {
- strncpy(gpio_names[gp].name, label, GPIO_NAME_SIZE);
- gpio_names[gp].name[GPIO_NAME_SIZE - 1] = '\0';
+ strncpy(gpio_names[gpio].name, label, GPIO_NAME_SIZE);
+ gpio_names[gpio].name[GPIO_NAME_SIZE - 1] = '\0';
}
/* Configure as a GPIO */
- set_config(gp, 1);
+ set_config(gpio, 1);
return 0;
}
-void gpio_free(int gp)
+int gpio_free(unsigned gpio)
{
+ if (gpio >= MAX_NUM_GPIOS)
+ return -1;
+
+ gpio_names[gpio].name[0] = '\0';
+ /* Do not configure as input or change pin mux here */
+ return 0;
}
-/* read GPIO OUT value of pin 'gp' */
-static int gpio_get_output_value(int gp)
+/* read GPIO OUT value of pin 'gpio' */
+static int gpio_get_output_value(unsigned gpio)
{
- struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
int val;
debug("gpio_get_output_value: pin = %d (port %d:bit %d)\n",
- gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));
+ gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
- val = readl(&bank->gpio_out[GPIO_PORT(gp)]);
+ val = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
- return (val >> GPIO_BIT(gp)) & 1;
+ return (val >> GPIO_BIT(gpio)) & 1;
}
-void gpio_toggle_value(int gp)
-{
- gpio_set_value(gp, !gpio_get_output_value(gp));
-}
-
-/* set GPIO pin 'gp' as an input */
-int gpio_direction_input(int gp)
+/* set GPIO pin 'gpio' as an input */
+int gpio_direction_input(unsigned gpio)
{
debug("gpio_direction_input: pin = %d (port %d:bit %d)\n",
- gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));
+ gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
/* Configure GPIO direction as input. */
- set_direction(gp, 0);
+ set_direction(gpio, 0);
return 0;
}
-/* set GPIO pin 'gp' as an output, with polarity 'value' */
-int gpio_direction_output(int gp, int value)
+/* set GPIO pin 'gpio' as an output, with polarity 'value' */
+int gpio_direction_output(unsigned gpio, int value)
{
debug("gpio_direction_output: pin = %d (port %d:bit %d) = %s\n",
- gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value ? "HIGH" : "LOW");
+ gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio),
+ value ? "HIGH" : "LOW");
/* Configure GPIO output value. */
- set_level(gp, value);
+ set_level(gpio, value);
/* Configure GPIO direction as output. */
- set_direction(gp, 1);
+ set_direction(gpio, 1);
return 0;
}
-/* read GPIO IN value of pin 'gp' */
-int gpio_get_value(int gp)
+/* read GPIO IN value of pin 'gpio' */
+int gpio_get_value(unsigned gpio)
{
- struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
int val;
debug("gpio_get_value: pin = %d (port %d:bit %d)\n",
- gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));
+ gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
- val = readl(&bank->gpio_in[GPIO_PORT(gp)]);
+ val = readl(&bank->gpio_in[GPIO_PORT(gpio)]);
- return (val >> GPIO_BIT(gp)) & 1;
+ return (val >> GPIO_BIT(gpio)) & 1;
}
-/* write GPIO OUT value to pin 'gp' */
-void gpio_set_value(int gp, int value)
+/* write GPIO OUT value to pin 'gpio' */
+int gpio_set_value(unsigned gpio, int value)
{
debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n",
- gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value);
+ gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), value);
/* Configure GPIO output value. */
- set_level(gp, value);
+ set_level(gpio, value);
+
+ return 0;
}
/*
@@ -238,7 +242,8 @@ void gpio_set_value(int gp, int value)
*/
void gpio_info(void)
{
- int c, type;
+ unsigned c;
+ int type;
for (c = 0; c < MAX_NUM_GPIOS; c++) {
type = get_config(c); /* GPIO, not SFPIO */
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