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-rw-r--r--board/freescale/common/ngpixis.c12
-rw-r--r--board/freescale/mpc8568mds/bcsr.c8
-rw-r--r--board/freescale/mpc8569mds/bcsr.c8
3 files changed, 16 insertions, 12 deletions
diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c
index 276ae3c5cf..3c7502879b 100644
--- a/board/freescale/common/ngpixis.c
+++ b/board/freescale/common/ngpixis.c
@@ -237,13 +237,17 @@ int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
return 0;
}
-U_BOOT_CMD(
- pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd,
- "Reset the board using the FPGA sequencer",
+#ifdef CONFIG_SYS_LONGHELP
+static char pixis_help_text[] =
"- hard reset to default bank\n"
"pixis_reset altbank - reset to alternate bank\n"
#ifdef DEBUG
"pixis_reset dump - display the PIXIS registers\n"
#endif
- "pixis_reset sysclk <SYSCLK_freq> - reset with SYSCLK frequency(KHz)\n"
+ "pixis_reset sysclk <SYSCLK_freq> - reset with SYSCLK frequency(KHz)\n";
+#endif
+
+U_BOOT_CMD(
+ pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd,
+ "Reset the board using the FPGA sequencer", pixis_help_text
);
diff --git a/board/freescale/mpc8568mds/bcsr.c b/board/freescale/mpc8568mds/bcsr.c
index 30676e1e1c..2a172ccdef 100644
--- a/board/freescale/mpc8568mds/bcsr.c
+++ b/board/freescale/mpc8568mds/bcsr.c
@@ -25,7 +25,7 @@
#include "bcsr.h"
-void enable_8568mds_duart()
+void enable_8568mds_duart(void)
{
volatile uint* duart_mux = (uint *)(CONFIG_SYS_CCSRBAR + 0xe0060);
volatile uint* devices = (uint *)(CONFIG_SYS_CCSRBAR + 0xe0070);
@@ -36,21 +36,21 @@ void enable_8568mds_duart()
bcsr[5] |= 0x01; /* Enable Duart in BCSR*/
}
-void enable_8568mds_flash_write()
+void enable_8568mds_flash_write(void)
{
volatile u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
bcsr[9] |= 0x01;
}
-void disable_8568mds_flash_write()
+void disable_8568mds_flash_write(void)
{
volatile u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
bcsr[9] &= ~(0x01);
}
-void enable_8568mds_qe_mdio()
+void enable_8568mds_qe_mdio(void)
{
u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
diff --git a/board/freescale/mpc8569mds/bcsr.c b/board/freescale/mpc8569mds/bcsr.c
index b688e5cc73..37d0c5f9a9 100644
--- a/board/freescale/mpc8569mds/bcsr.c
+++ b/board/freescale/mpc8569mds/bcsr.c
@@ -25,17 +25,17 @@
#include "bcsr.h"
-void enable_8569mds_flash_write()
+void enable_8569mds_flash_write(void)
{
setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP);
}
-void disable_8569mds_flash_write()
+void disable_8569mds_flash_write(void)
{
clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP);
}
-void enable_8569mds_qe_uec()
+void enable_8569mds_qe_uec(void)
{
#if defined(CONFIG_SYS_UCC_RGMII_MODE)
setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7),
@@ -60,7 +60,7 @@ void enable_8569mds_qe_uec()
#endif
}
-void disable_8569mds_brd_eeprom_write_protect()
+void disable_8569mds_brd_eeprom_write_protect(void)
{
clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7), BCSR7_BRD_WRT_PROTECT);
}
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