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-rw-r--r--board/esd/cpciiser4/cpciiser4.c3
-rw-r--r--board/esd/cpciiser4/u-boot.lds19
2 files changed, 2 insertions, 20 deletions
diff --git a/board/esd/cpciiser4/cpciiser4.c b/board/esd/cpciiser4/cpciiser4.c
index b5d25433f5..6e97392c4b 100644
--- a/board/esd/cpciiser4/cpciiser4.c
+++ b/board/esd/cpciiser4/cpciiser4.c
@@ -58,7 +58,6 @@ const unsigned char fpgadata[] = {
int board_early_init_f (void)
{
int index, len, i;
- volatile unsigned char dummy;
int status;
#ifdef FPGA_DEBUG
@@ -116,7 +115,7 @@ int board_early_init_f (void)
/*
* Init FPGA via RESET (read access on CS3)
*/
- dummy = *(unsigned char *) 0xf0200000;
+ in_8((void *)0xf0200000);
/*
* IRQ 0-15 405GP internally generated; active high; level sensitive
diff --git a/board/esd/cpciiser4/u-boot.lds b/board/esd/cpciiser4/u-boot.lds
index 9697cc6b35..8c010162f0 100644
--- a/board/esd/cpciiser4/u-boot.lds
+++ b/board/esd/cpciiser4/u-boot.lds
@@ -57,22 +57,7 @@ SECTIONS
.plt : { *(.plt) }
.text :
{
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
cpu/ppc4xx/start.o (.text)
- cpu/ppc4xx/traps.o (.text)
- cpu/ppc4xx/interrupts.o (.text)
- cpu/ppc4xx/4xx_uart.o (.text)
- cpu/ppc4xx/cpu_init.o (.text)
- cpu/ppc4xx/speed.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
-
-/* . = env_offset;*/
-/* common/env_embedded.o(.text)*/
*(.text)
*(.fixup)
@@ -82,10 +67,8 @@ SECTIONS
PROVIDE (etext = .);
.rodata :
{
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
*(.eh_frame)
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
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