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-rw-r--r--arch/Kconfig1
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/cpu/armv7/am33xx/ddr.c11
-rw-r--r--arch/arm/cpu/armv7/omap-common/boot-common.c1
-rw-r--r--arch/arm/include/asm/arch-stm32f4/stm32.h10
-rw-r--r--arch/m68k/lib/Makefile4
-rw-r--r--arch/m68k/lib/ashldi3.c50
-rw-r--r--arch/m68k/lib/lshrdi3.c50
-rw-r--r--arch/m68k/lib/muldi3.c71
9 files changed, 198 insertions, 2 deletions
diff --git a/arch/Kconfig b/arch/Kconfig
index 6489cc9406..1709d40e97 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -40,6 +40,7 @@ config BLACKFIN
config M68K
bool "M68000 architecture"
+ select HAVE_PRIVATE_LIBGCC
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7383975a64..75d6bbcba3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -697,6 +697,8 @@ config ARCH_UNIPHIER
config TARGET_STM32F429_DISCOVERY
bool "Support STM32F429 Discovery"
select CPU_V7M
+ select DM
+ select DM_SERIAL
config ARCH_ROCKCHIP
bool "Support Rockchip SoCs"
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c
index b3fb0c47ab..888cf1f732 100644
--- a/arch/arm/cpu/armv7/am33xx/ddr.c
+++ b/arch/arm/cpu/armv7/am33xx/ddr.c
@@ -164,6 +164,13 @@ void config_sdram(const struct emif_regs *regs, int nr)
writel(regs->zq_config, &emif_reg[nr]->emif_zq_config);
writel(regs->sdram_config, &cstat->secure_emif_sdram_config);
writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config);
+
+ /* Trigger initialization */
+ writel(0x00003100, &emif_reg[nr]->emif_sdram_ref_ctrl);
+ /* Wait 1ms because of L3 timeout error */
+ udelay(1000);
+
+ /* Write proper sdram_ref_cref_ctrl value */
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
}
@@ -292,7 +299,9 @@ void config_ddr_phy(const struct emif_regs *regs, int nr)
EMIF_REG_INITREF_DIS_MASK);
#endif
if (regs->zq_config)
- writel(0x80003100, &emif_reg[nr]->emif_sdram_ref_ctrl);
+ /* Set time between rising edge of DDR_RESET to rising
+ * edge of DDR_CKE to > 500us per memory spec. */
+ writel(0x00003100, &emif_reg[nr]->emif_sdram_ref_ctrl);
writel(regs->emif_ddr_phy_ctlr_1,
&emif_reg[nr]->emif_ddr_phy_ctrl_1);
diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c b/arch/arm/cpu/armv7/omap-common/boot-common.c
index 8e5d5c979c..0456263d6e 100644
--- a/arch/arm/cpu/armv7/omap-common/boot-common.c
+++ b/arch/arm/cpu/armv7/omap-common/boot-common.c
@@ -208,6 +208,7 @@ int board_mmc_init(bd_t *bis)
break;
case BOOT_DEVICE_MMC2:
case BOOT_DEVICE_MMC2_2:
+ omap_mmc_init(0, 0, 0, -1, -1);
omap_mmc_init(1, 0, 0, -1, -1);
break;
}
diff --git a/arch/arm/include/asm/arch-stm32f4/stm32.h b/arch/arm/include/asm/arch-stm32f4/stm32.h
index 7ca6dc3de8..6b64d0361b 100644
--- a/arch/arm/include/asm/arch-stm32f4/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f4/stm32.h
@@ -3,7 +3,7 @@
* Yuri Tikhonov, Emcraft Systems, yur@emcraft.com
*
* (C) Copyright 2015
- * Kamil Lulko, <rev13@wp.pl>
+ * Kamil Lulko, <kamil.lulko@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -106,6 +106,14 @@ struct stm32_flash_regs {
#define STM32_FLASH_CR_SNB_OFFSET 3
#define STM32_FLASH_CR_SNB_MASK (15 << STM32_FLASH_CR_SNB_OFFSET)
+/*
+ * Peripheral base addresses
+ */
+#define STM32_USART1_BASE (STM32_APB2PERIPH_BASE + 0x1000)
+#define STM32_USART2_BASE (STM32_APB1PERIPH_BASE + 0x4400)
+#define STM32_USART3_BASE (STM32_APB1PERIPH_BASE + 0x4800)
+#define STM32_USART6_BASE (STM32_APB2PERIPH_BASE + 0x1400)
+
enum clock {
CLOCK_CORE,
CLOCK_AHB,
diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile
index 73d40bda8b..dbca42cd7a 100644
--- a/arch/m68k/lib/Makefile
+++ b/arch/m68k/lib/Makefile
@@ -5,6 +5,10 @@
# SPDX-License-Identifier: GPL-2.0+
#
+## Build a couple of necessary functions into a private libgcc
+## if the user asked for it
+lib-$(CONFIG_USE_PRIVATE_LIBGCC) += lshrdi3.o muldi3.o ashldi3.o
+
obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-y += cache.o
obj-y += interrupts.o
diff --git a/arch/m68k/lib/ashldi3.c b/arch/m68k/lib/ashldi3.c
new file mode 100644
index 0000000000..be197da81e
--- /dev/null
+++ b/arch/m68k/lib/ashldi3.c
@@ -0,0 +1,50 @@
+/*
+ * ashldi3.c extracted from gcc-2.7.2.3/libgcc2.c and
+ * gcc-2.7.2.3/longlong.h
+ *
+ * Copyright (C) 1989-2015 Free Software Foundation, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#define BITS_PER_UNIT 8
+
+typedef int SItype __attribute__ ((mode (SI)));
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+typedef int DItype __attribute__ ((mode (DI)));
+typedef int word_type __attribute__ ((mode (__word__)));
+
+struct DIstruct {SItype high, low;};
+
+typedef union
+{
+ struct DIstruct s;
+ DItype ll;
+} DIunion;
+
+DItype __ashldi3 (DItype u, word_type b)
+{
+ DIunion w;
+ word_type bm;
+ DIunion uu;
+
+ if (b == 0)
+ return u;
+
+ uu.ll = u;
+
+ bm = (sizeof (SItype) * BITS_PER_UNIT) - b;
+ if (bm <= 0)
+ {
+ w.s.low = 0;
+ w.s.high = (USItype)uu.s.low << -bm;
+ }
+ else
+ {
+ USItype carries = (USItype)uu.s.low >> bm;
+ w.s.low = (USItype)uu.s.low << b;
+ w.s.high = ((USItype)uu.s.high << b) | carries;
+ }
+
+ return w.ll;
+} \ No newline at end of file
diff --git a/arch/m68k/lib/lshrdi3.c b/arch/m68k/lib/lshrdi3.c
new file mode 100644
index 0000000000..9052383508
--- /dev/null
+++ b/arch/m68k/lib/lshrdi3.c
@@ -0,0 +1,50 @@
+/*
+ * lshrdi3.c extracted from gcc-2.7.2.3/libgcc2.c and
+ * gcc-2.7.2.3/longlong.h
+ *
+ * Copyright (C) 1989-2015 Free Software Foundation, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#define BITS_PER_UNIT 8
+
+typedef int SItype __attribute__ ((mode (SI)));
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+typedef int DItype __attribute__ ((mode (DI)));
+typedef int word_type __attribute__ ((mode (__word__)));
+
+struct DIstruct {SItype high, low;};
+
+typedef union
+{
+ struct DIstruct s;
+ DItype ll;
+} DIunion;
+
+DItype __lshrdi3 (DItype u, word_type b)
+{
+ DIunion w;
+ word_type bm;
+ DIunion uu;
+
+ if (b == 0)
+ return u;
+
+ uu.ll = u;
+
+ bm = (sizeof (SItype) * BITS_PER_UNIT) - b;
+ if (bm <= 0)
+ {
+ w.s.high = 0;
+ w.s.low = (USItype)uu.s.high >> -bm;
+ }
+ else
+ {
+ USItype carries = (USItype)uu.s.high << bm;
+ w.s.high = (USItype)uu.s.high >> b;
+ w.s.low = ((USItype)uu.s.low >> b) | carries;
+ }
+
+ return w.ll;
+} \ No newline at end of file
diff --git a/arch/m68k/lib/muldi3.c b/arch/m68k/lib/muldi3.c
new file mode 100644
index 0000000000..d709c32145
--- /dev/null
+++ b/arch/m68k/lib/muldi3.c
@@ -0,0 +1,71 @@
+/*
+ * muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and
+ * gcc-2.7.2.3/longlong.h
+ *
+ * Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#define SI_TYPE_SIZE 32
+#define __BITS4 (SI_TYPE_SIZE / 4)
+#define __ll_B (1L << (SI_TYPE_SIZE / 2))
+#define __ll_lowpart(t) ((USItype) (t) % __ll_B)
+#define __ll_highpart(t) ((USItype) (t) / __ll_B)
+
+#define umul_ppmm(w1, w0, u, v) \
+ do { \
+ USItype __x0, __x1, __x2, __x3; \
+ USItype __ul, __vl, __uh, __vh; \
+ \
+ __ul = __ll_lowpart (u); \
+ __uh = __ll_highpart (u); \
+ __vl = __ll_lowpart (v); \
+ __vh = __ll_highpart (v); \
+ \
+ __x0 = (USItype) __ul * __vl; \
+ __x1 = (USItype) __ul * __vh; \
+ __x2 = (USItype) __uh * __vl; \
+ __x3 = (USItype) __uh * __vh; \
+ \
+ __x1 += __ll_highpart (__x0);/* this can't give carry */ \
+ __x1 += __x2; /* but this indeed can */ \
+ if (__x1 < __x2) /* did we get it? */ \
+ __x3 += __ll_B; /* yes, add it in the proper pos. */ \
+ \
+ (w1) = __x3 + __ll_highpart (__x1); \
+ (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \
+ } while (0)
+
+#define __umulsidi3(u, v) \
+ ({DIunion __w; \
+ umul_ppmm (__w.s.high, __w.s.low, u, v); \
+ __w.ll; })
+
+typedef int SItype __attribute__ ((mode (SI)));
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+typedef int DItype __attribute__ ((mode (DI)));
+typedef int word_type __attribute__ ((mode (__word__)));
+
+struct DIstruct {SItype high, low;};
+
+typedef union
+{
+ struct DIstruct s;
+ DItype ll;
+} DIunion;
+
+DItype __muldi3 (DItype u, DItype v)
+{
+ DIunion w;
+ DIunion uu, vv;
+
+ uu.ll = u,
+ vv.ll = v;
+
+ w.ll = __umulsidi3 (uu.s.low, vv.s.low);
+ w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
+ + (USItype) uu.s.high * (USItype) vv.s.low);
+
+ return w.ll;
+}
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