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-rw-r--r--arch/arm/cpu/armv8/start.S8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 670e323b61..dfce469206 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -81,6 +81,14 @@ reset:
msr cpacr_el1, x0 /* Enable FP/SIMD */
0:
+ /* Enalbe SMPEN bit for coherency.
+ * This register is not architectural but at the moment
+ * this bit should be set for A53/A57/A72.
+ */
+ mrs x0, S3_1_c15_c2_1 /* cpuactlr_el1 */
+ orr x0, x0, #0x40
+ msr S3_1_c15_c2_1, x0
+
/* Apply ARM core specific erratas */
bl apply_core_errata
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