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-rw-r--r--arch/powerpc/cpu/mpc86xx/start.S24
1 files changed, 7 insertions, 17 deletions
diff --git a/arch/powerpc/cpu/mpc86xx/start.S b/arch/powerpc/cpu/mpc86xx/start.S
index ed1e4ca668..3817f19d53 100644
--- a/arch/powerpc/cpu/mpc86xx/start.S
+++ b/arch/powerpc/cpu/mpc86xx/start.S
@@ -40,6 +40,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
+#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
@@ -83,17 +84,7 @@ version_string:
. = EXC_OFF_SYS_RESET
.globl _start
_start:
- li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
b boot_cold
- sync
-
- . = EXC_OFF_SYS_RESET + 0x10
-
- .globl _start_warm
-_start_warm:
- li r21, BOOTFLAG_WARM /* Software reboot */
- b boot_warm
- sync
/* the boot code is located below the exception table */
@@ -166,7 +157,6 @@ _end_of_vectors:
. = 0x2000
boot_cold:
-boot_warm:
/*
* NOTE: Only Cpu 0 will ever come here. Other cores go to an
* address specified by the BPTR
@@ -303,14 +293,12 @@ diag_done:
#endif
/* bl l2cache_enable */
- mr r3, r21
- /* r3: BOOTFLAG */
/* run 1st part of board init code (from Flash) */
bl board_init_f
sync
- /* NOTREACHED */
+ /* NOTREACHED - board_init_f() does not return */
.globl invalidate_bats
invalidate_bats:
@@ -739,10 +727,12 @@ in_ram:
beq 4f
3: lwzu r4,4(r3)
lwzux r0,r4,r11
+ cmpwi r0,0
add r0,r0,r11
stw r10,0(r3)
+ beq- 5f
stw r0,0(r4)
- bdnz 3b
+5: bdnz 3b
4:
/* clear_bss: */
/*
@@ -861,8 +851,8 @@ setup_ccsrbar:
stw r5, 0(r4) /* Store physical value of CCSR */
isync
- lis r5, TEXT_BASE@h
- ori r5,r5,TEXT_BASE@l
+ lis r5, CONFIG_SYS_TEXT_BASE@h
+ ori r5,r5,CONFIG_SYS_TEXT_BASE@l
lwz r5, 0(r5)
isync
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