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Diffstat (limited to 'arch/arm/include/asm/arch-omap4/sys_proto.h')
-rw-r--r--arch/arm/include/asm/arch-omap4/sys_proto.h38
1 files changed, 25 insertions, 13 deletions
diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h
index 1aacbb12e3..4146e21818 100644
--- a/arch/arm/include/asm/arch-omap4/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap4/sys_proto.h
@@ -21,7 +21,7 @@
#ifndef _SYS_PROTO_H_
#define _SYS_PROTO_H_
-#include <asm/arch/omap4.h>
+#include <asm/arch/omap.h>
#include <asm/arch/clocks.h>
#include <asm/io.h>
#include <asm/omap_common.h>
@@ -32,17 +32,17 @@ struct omap_sysinfo {
};
extern const struct omap_sysinfo sysinfo;
-extern struct omap4_prcm_regs *const prcm;
-
void gpmc_init(void);
void watchdog_init(void);
u32 get_device_type(void);
void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
+void set_muxconf_regs_essential(void);
void set_muxconf_regs_non_essential(void);
void sr32(void *, u32, u32, u32);
u32 wait_on_value(u32, u32, void *, u32);
void sdelay(unsigned long);
void set_pl310_ctrl_reg(u32 val);
+void omap_rev_string(char *omap_rev_string);
void setup_clocks_for_console(void);
void prcm_init(void);
void bypass_dpll(u32 *const base);
@@ -51,7 +51,17 @@ u32 get_sys_clk_freq(void);
u32 omap4_ddr_clk(void);
void cancel_out(u32 *num, u32 *den, u32 den_limit);
void sdram_init(void);
-u32 omap4_sdram_size(void);
+u32 omap_sdram_size(void);
+u32 cortex_rev(void);
+void init_omap_revision(void);
+void do_io_settings(void);
+/*
+ * This is used to verify if the configuration header
+ * was executed by Romcode prior to control of transfer
+ * to the bootloader. SPL is responsible for saving and
+ * passing this to the u-boot.
+ */
+extern struct omap_boot_parameters boot_params;
static inline u32 running_from_sdram(void)
{
@@ -64,15 +74,17 @@ static inline u32 running_from_sdram(void)
static inline u8 uboot_loaded_by_spl(void)
{
/*
- * Configuration Header is not supported yet, so u-boot init running
- * from SDRAM implies that it was loaded by SPL. When this situation
- * changes one of these approaches could be taken:
- * i. Pass a magic from SPL to U-Boot and U-Boot save it at a known
- * location.
- * ii. Check the OPP. CH can support only 50% OPP while SPL initializes
- * the DPLLs at 100% OPP.
+ * u-boot can be running from sdram either because of configuration
+ * Header or by SPL. If because of CH, then the romcode sets the
+ * CHSETTINGS executed bit to true in the boot parameter structure that
+ * it passes to the bootloader.This parameter is stored in the ch_flags
+ * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
+ * mandatory section if CH is present.
*/
- return running_from_sdram();
+ if ((boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
+ return 0;
+ else
+ return running_from_sdram();
}
/*
* The basic hardware init of OMAP(s_init()) can happen in 4
@@ -86,7 +98,7 @@ static inline u8 uboot_loaded_by_spl(void)
* This function finds this context.
* Defining as inline may help in compiling out unused functions in SPL
*/
-static inline u32 omap4_hw_init_context(void)
+static inline u32 omap_hw_init_context(void)
{
#ifdef CONFIG_SPL_BUILD
return OMAP_INIT_CONTEXT_SPL;
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