diff options
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/arm1136/start.S | 71 | ||||
| -rw-r--r-- | arch/arm/cpu/arm1176/start.S | 62 | ||||
| -rw-r--r-- | arch/arm/cpu/arm720t/start.S | 53 | ||||
| -rw-r--r-- | arch/arm/cpu/arm920t/start.S | 61 | ||||
| -rw-r--r-- | arch/arm/cpu/arm925t/start.S | 65 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c | 13 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/kirkwood/mpp.c | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/start.S | 86 | ||||
| -rw-r--r-- | arch/arm/cpu/arm946es/start.S | 56 | ||||
| -rw-r--r-- | arch/arm/cpu/arm_intcm/start.S | 63 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/exynos/clock.c | 272 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/exynos/pinmux.c | 74 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/start.S | 58 | ||||
| -rw-r--r-- | arch/arm/cpu/ixp/start.S | 55 | ||||
| -rw-r--r-- | arch/arm/cpu/pxa/start.S | 63 | ||||
| -rw-r--r-- | arch/arm/cpu/s3c44b0/start.S | 55 | ||||
| -rw-r--r-- | arch/arm/cpu/sa1100/start.S | 50 |
17 files changed, 479 insertions, 680 deletions
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 5d3b4c2299..a067b8a186 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -165,13 +165,7 @@ next: bl cpu_init_crit #endif -/* Set stackpointer in internal RAM to call board_init_f */ -call_board_init_f: - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0,=0x00000000 - - bl board_init_f + bl _main /*------------------------------------------------------------------------------*/ @@ -188,14 +182,10 @@ relocate_code: mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - /* Set up the stack */ -stack_setup: - mov sp, r4 - adr r0, _start cmp r0, r6 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ - beq clear_bss /* skip relocation */ + beq relocate_done /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _image_copy_end_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -245,7 +235,15 @@ fixnext: add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 blo fixloop - b clear_bss + bx lr + +#endif + +relocate_done: + + bx lr + +#ifndef CONFIG_SPL_BUILD _rel_dyn_start_ofs: .word __rel_dyn_start - _start @@ -253,54 +251,13 @@ _rel_dyn_end_ofs: .word __rel_dyn_end - _start _dynsym_start_ofs: .word __dynsym_start - _start -#endif -clear_bss: -#ifdef CONFIG_SPL_BUILD - /* No relocation for SPL */ - ldr r0, =__bss_start - ldr r1, =__bss_end__ -#else - ldr r0, _bss_start_ofs - ldr r1, _bss_end_ofs - mov r4, r6 /* reloc addr */ - add r0, r0, r4 - add r1, r1, r4 #endif - mov r2, #0x00000000 /* clear */ - -clbss_l:cmp r0, r1 /* clear loop... */ - bhs clbss_e /* if reached end of bss, exit */ - str r2, [r0] - add r0, r0, #4 - b clbss_l -clbss_e: -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ -#ifdef CONFIG_NAND_SPL - ldr r0, _nand_boot_ofs - mov pc, r0 + .globl c_runtime_cpu_setup +c_runtime_cpu_setup: -_nand_boot_ofs: - .word nand_boot -#else -jump_2_ram: - ldr r0, _board_init_r_ofs - adr r1, _start - add lr, r0, r1 - add lr, lr, r9 - /* setup parameters for board_init_r */ - mov r0, r5 /* gd_t */ - mov r1, r6 /* dest_addr */ - /* jump to it ... */ - mov pc, lr - -_board_init_r_ofs: - .word board_init_r - _start -#endif + bx lr /* ************************************************************************* diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 667a0e0c48..40df4b1614 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -224,12 +224,7 @@ skip_tcmdisable: */ bl lowlevel_init /* go setup pll,mux,memory */ -/* Set stackpointer in internal RAM to call board_init_f */ -call_board_init_f: - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0,=0x00000000 - bl board_init_f + bl _main /*------------------------------------------------------------------------------*/ @@ -246,14 +241,10 @@ relocate_code: mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - /* Set up the stack */ -stack_setup: - mov sp, r4 - adr r0, _start cmp r0, r6 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ - beq clear_bss /* skip relocation */ + beq relocate_done /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -343,49 +334,9 @@ mmu_enable: skip_hw_init: #endif -clear_bss: -#ifndef CONFIG_SPL_BUILD - ldr r0, _bss_start_ofs - ldr r1, _bss_end_ofs - mov r4, r6 /* reloc addr */ - add r0, r0, r4 - add r1, r1, r4 - mov r2, #0x00000000 /* clear */ - -clbss_l:cmp r0, r1 /* clear loop... */ - bhs clbss_e /* if reached end of bss, exit */ - str r2, [r0] - add r0, r0, #4 - b clbss_l -clbss_e: -#ifndef CONFIG_NAND_SPL - bl coloured_LED_init - bl red_led_on -#endif -#endif +relocate_done: -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ -#ifdef CONFIG_NAND_SPL - ldr pc, _nand_boot - -_nand_boot: .word nand_boot -#else - ldr r0, _board_init_r_ofs - adr r1, _start - add lr, r0, r1 - add lr, lr, r9 - /* setup parameters for board_init_r */ - mov r0, r5 /* gd_t */ - mov r1, r6 /* dest_addr */ - /* jump to it ... */ - mov pc, lr - -_board_init_r_ofs: - .word board_init_r - _start -#endif + bx lr _rel_dyn_start_ofs: .word __rel_dyn_start - _start @@ -399,6 +350,11 @@ _mmu_table_base: .word mmu_table #endif + .globl c_runtime_cpu_setup +c_runtime_cpu_setup: + + mov pc, lr + #ifndef CONFIG_NAND_SPL /* * we assume that cache operation is done before. (eg. cleanup_before_linux()) diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index c2a7763fff..771d3869c1 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -147,12 +147,7 @@ reset: bl cpu_init_crit #endif -/* Set stackpointer in internal RAM to call board_init_f */ -call_board_init_f: - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0,=0x00000000 - bl board_init_f + bl _main /*------------------------------------------------------------------------------*/ @@ -169,14 +164,10 @@ relocate_code: mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - /* Set up the stack */ -stack_setup: - mov sp, r4 - adr r0, _start cmp r0, r6 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ - beq clear_bss /* skip relocation */ + beq relocate_done /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -228,43 +219,10 @@ fixnext: blo fixloop #endif -clear_bss: -#ifndef CONFIG_SPL_BUILD - ldr r0, _bss_start_ofs - ldr r1, _bss_end_ofs - mov r4, r6 /* reloc addr */ - add r0, r0, r4 - add r1, r1, r4 - mov r2, #0x00000000 /* clear */ - -clbss_l:cmp r0, r1 /* clear loop... */ - bhs clbss_e /* if reached end of bss, exit */ - str r2, [r0] - add r0, r0, #4 - b clbss_l -clbss_e: - - bl coloured_LED_init - bl red_led_on -#endif +relocate_done: -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ - ldr r0, _board_init_r_ofs - adr r1, _start - add lr, r0, r1 - add lr, lr, r9 - /* setup parameters for board_init_r */ - mov r0, r5 /* gd_t */ - mov r1, r6 /* dest_addr */ - /* jump to it ... */ mov pc, lr -_board_init_r_ofs: - .word board_init_r - _start - _rel_dyn_start_ofs: .word __rel_dyn_start - _start _rel_dyn_end_ofs: @@ -272,6 +230,11 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start + .globl c_runtime_cpu_setup +c_runtime_cpu_setup: + + mov pc, lr + /* ************************************************************************* * diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 14c9156c08..511d21d334 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -182,12 +182,7 @@ copyex: bl cpu_init_crit #endif -/* Set stackpointer in internal RAM to call board_init_f */ -call_board_init_f: - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0,=0x00000000 - bl board_init_f + bl _main /*------------------------------------------------------------------------------*/ @@ -204,14 +199,10 @@ relocate_code: mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - /* Set up the stack */ -stack_setup: - mov sp, r4 - adr r0, _start cmp r0, r6 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ - beq clear_bss /* skip relocation */ + beq relocate_done /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -263,51 +254,10 @@ fixnext: blo fixloop #endif -clear_bss: -#ifndef CONFIG_SPL_BUILD - ldr r0, _bss_start_ofs - ldr r1, _bss_end_ofs - mov r4, r6 /* reloc addr */ - add r0, r0, r4 - add r1, r1, r4 - mov r2, #0x00000000 /* clear */ - -clbss_l:cmp r0, r1 /* clear loop... */ - bhs clbss_e /* if reached end of bss, exit */ - str r2, [r0] - add r0, r0, #4 - b clbss_l -clbss_e: - - bl coloured_LED_init - bl red_led_on -#endif - -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ -#ifdef CONFIG_NAND_SPL - ldr r0, _nand_boot_ofs - mov pc, r0 +relocate_done: -_nand_boot_ofs: - .word nand_boot -#else - ldr r0, _board_init_r_ofs - adr r1, _start - add lr, r0, r1 - add lr, lr, r9 - /* setup parameters for board_init_r */ - mov r0, r5 /* gd_t */ - mov r1, r6 /* dest_addr */ - /* jump to it ... */ mov pc, lr -_board_init_r_ofs: - .word board_init_r - _start -#endif - _rel_dyn_start_ofs: .word __rel_dyn_start - _start _rel_dyn_end_ofs: @@ -315,6 +265,11 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start + .globl c_runtime_cpu_setup +c_runtime_cpu_setup: + + mov pc, lr + /* ************************************************************************* * diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 3a483f6cae..e8d6d71c17 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -34,10 +34,6 @@ #include <config.h> #include <version.h> -#if defined(CONFIG_OMAP1510) -#include <./configs/omap1510.h> -#endif - /* ************************************************************************* * @@ -176,12 +172,7 @@ poll1: bl cpu_init_crit #endif -/* Set stackpointer in internal RAM to call board_init_f */ -call_board_init_f: - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0,=0x00000000 - bl board_init_f + bl _main /*------------------------------------------------------------------------------*/ @@ -198,14 +189,10 @@ relocate_code: mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - /* Set up the stack */ -stack_setup: - mov sp, r4 - adr r0, _start cmp r0, r6 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ - beq clear_bss /* skip relocation */ + beq relocate_done /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -257,51 +244,10 @@ fixnext: blo fixloop #endif -clear_bss: -#ifndef CONFIG_SPL_BUILD - ldr r0, _bss_start_ofs - ldr r1, _bss_end_ofs - mov r4, r6 /* reloc addr */ - add r0, r0, r4 - add r1, r1, r4 - mov r2, #0x00000000 /* clear */ - -clbss_l:cmp r0, r1 /* clear loop... */ - bhs clbss_e /* if reached end of bss, exit */ - str r2, [r0] - add r0, r0, #4 - b clbss_l -clbss_e: - - bl coloured_LED_init - bl red_led_on -#endif - -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ -#ifdef CONFIG_NAND_SPL - ldr r0, _nand_boot_ofs - mov pc, r0 +relocate_done: -_nand_boot_ofs: - .word nand_boot -#else - ldr r0, _board_init_r_ofs - adr r1, _start - add lr, r0, r1 - add lr, lr, r9 - /* setup parameters for board_init_r */ - mov r0, r5 /* gd_t */ - mov r1, r6 /* dest_addr */ - /* jump to it ... */ mov pc, lr -_board_init_r_ofs: - .word board_init_r - _start -#endif - _rel_dyn_start_ofs: .word __rel_dyn_start - _start _rel_dyn_end_ofs: @@ -309,6 +255,11 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start + .globl c_runtime_cpu_setup +c_runtime_cpu_setup: + + mov pc, lr + /* ************************************************************************* * diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c index 93485523b5..0448c0b133 100644 --- a/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c @@ -193,6 +193,19 @@ void at91_spi1_hw_init(unsigned long cs_mask) } #endif +#if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI) +void at91_uhp_hw_init(void) +{ + /* Enable VBus on UHP ports */ + at91_set_pio_output(AT91_PIO_PORTD, 18, 0); /* port A */ + at91_set_pio_output(AT91_PIO_PORTD, 19, 0); /* port B */ +#if defined(CONFIG_USB_OHCI_NEW) + /* port C is OHCI only */ + at91_set_pio_output(AT91_PIO_PORTD, 20, 0); /* port C */ +#endif +} +#endif + #ifdef CONFIG_MACB void at91_macb_hw_init(void) { diff --git a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c index 03eb2de520..0ba6f098cb 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/mpp.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c @@ -31,7 +31,7 @@ static u32 kirkwood_variant(void) #define MPP_CTRL(i) (KW_MPP_BASE + (i* 4)) #define MPP_NR_REGS (1 + MPP_MAX/8) -void kirkwood_mpp_conf(u32 *mpp_list, u32 *mpp_save) +void kirkwood_mpp_conf(const u32 *mpp_list, u32 *mpp_save) { u32 mpp_ctrl[MPP_NR_REGS]; unsigned int variant_mask; diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 2188f7e35d..66a8b654bd 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -36,12 +36,6 @@ #include <common.h> #include <version.h> -#if defined(CONFIG_OMAP1610) -#include <./configs/omap1510.h> -#elif defined(CONFIG_OMAP730) -#include <./configs/omap730.h> -#endif - /* ************************************************************************* * @@ -198,20 +192,7 @@ reset: bl cpu_init_crit #endif -/* Set stackpointer in internal RAM to call board_init_f */ -call_board_init_f: -#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */ - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) -#else -#ifdef CONFIG_SPL_BUILD - ldr sp, =(CONFIG_SPL_STACK) -#else - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) -#endif -#endif - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0,=0x00000000 - bl board_init_f + bl _main /*------------------------------------------------------------------------------*/ @@ -229,15 +210,11 @@ relocate_code: mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - /* Set up the stack */ -stack_setup: - mov sp, r4 - adr r0, _start sub r9, r6, r0 /* r9 <- relocation offset */ cmp r0, r6 - moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ - beq clear_bss /* skip relocation */ + moveq r9, #0 /* no relocation. offset(r9) = 0 */ + beq relocate_done /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy loop */ ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -289,56 +266,9 @@ fixnext: blo fixloop #endif -clear_bss: -#ifdef CONFIG_SPL_BUILD - /* No relocation for SPL */ - ldr r0, =__bss_start - ldr r1, =__bss_end__ -#else - ldr r0, _bss_start_ofs - ldr r1, _bss_end_ofs - mov r4, r6 /* reloc addr */ - add r0, r0, r4 - add r1, r1, r4 -#endif - mov r2, #0x00000000 /* clear */ - -clbss_l:cmp r0, r1 /* clear loop... */ - bhs clbss_e /* if reached end of bss, exit */ - str r2, [r0] - add r0, r0, #4 - b clbss_l -clbss_e: - -#ifndef CONFIG_SPL_BUILD - bl coloured_LED_init - bl red_led_on -#endif - -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ -#ifdef CONFIG_NAND_SPL - ldr r0, _nand_boot_ofs - mov pc, r0 +relocate_done: -_nand_boot_ofs: - .word nand_boot -#else - ldr r0, _board_init_r_ofs - ldr r1, _TEXT_BASE - add lr, r0, r1 - add lr, lr, r9 - /* setup parameters for board_init_r */ - mov r0, r5 /* gd_t */ - mov r1, r6 /* dest_addr */ - /* jump to it ... */ - mov pc, lr - -_board_init_r_ofs: - .word board_init_r - _start -#endif + bx lr _rel_dyn_start_ofs: .word __rel_dyn_start - _start @@ -346,8 +276,14 @@ _rel_dyn_end_ofs: .word __rel_dyn_end - _start _dynsym_start_ofs: .word __dynsym_start - _start + #endif + .globl c_runtime_cpu_setup +c_runtime_cpu_setup: + + bx lr + /* ************************************************************************* * diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 30e21835cc..a7a98a4e58 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -147,12 +147,7 @@ reset: bl cpu_init_crit #endif -/* Set stackpointer in internal RAM to call board_init_f */ -call_board_init_f: - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0,=0x00000000 - bl board_init_f + bl _main /*------------------------------------------------------------------------------*/ @@ -169,14 +164,10 @@ relocate_code: mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - /* Set up the stack */ -stack_setup: - mov sp, r4 - adr r0, _start cmp r0, r6 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ - beq clear_bss /* skip relocation */ + beq relocate_done /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -228,46 +219,10 @@ fixnext: blo fixloop #endif -clear_bss: -#ifndef CONFIG_SPL_BUILD - ldr r0, _bss_start_ofs - ldr r1, _bss_end_ofs - mov r4, r6 /* reloc addr */ - add r0, r0, r4 - add r1, r1, r4 - mov r2, #0x00000000 /* clear */ - -clbss_l:cmp r0, r1 /* clear loop... */ - bhs clbss_e /* if reached end of bss, exit */ - str r2, [r0] - add r0, r0, #4 - b clbss_l -clbss_e: -#endif - -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ -#ifdef CONFIG_NAND_SPL - ldr pc, _nand_boot +relocate_done: -_nand_boot: .word nand_boot -#else - ldr r0, _board_init_r_ofs - adr r1, _start - add lr, r0, r1 - add lr, lr, r9 - /* setup parameters for board_init_r */ - mov r0, r5 /* gd_t */ - mov r1, r6 /* dest_addr */ - /* jump to it ... */ mov pc, lr -_board_init_r_ofs: - .word board_init_r - _start -#endif - _rel_dyn_start_ofs: .word __rel_dyn_start - _start _rel_dyn_end_ofs: @@ -275,6 +230,11 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start + .globl c_runtime_cpu_setup +c_runtime_cpu_setup: + + mov pc, lr + /* ************************************************************************* * diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index a133d19bc8..c189849fa8 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -143,12 +143,7 @@ reset: bl cpu_init_crit #endif -/* Set stackpointer in internal RAM to call board_init_f */ -call_board_init_f: - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0,=0x00000000 - bl board_init_f + bl _main /*------------------------------------------------------------------------------*/ @@ -165,14 +160,10 @@ relocate_code: mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - /* Set up the stack */ -stack_setup: - mov sp, r4 - adr r0, _start cmp r0, r6 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ - beq clear_bss /* skip relocation */ + beq relocate_done /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -224,50 +215,9 @@ fixnext: blo fixloop #endif -clear_bss: -#ifndef CONFIG_SPL_BUILD - ldr r0, _bss_start_ofs - ldr r1, _bss_end_ofs - mov r4, r6 /* reloc addr */ - add r0, r0, r4 - add r1, r1, r4 - mov r2, #0x00000000 /* clear */ - -clbss_l:cmp r0, r1 /* clear loop... */ - bhs clbss_e /* if reached end of bss, exit */ - str r2, [r0] - add r0, r0, #4 - b clbss_l -clbss_e: - - bl coloured_LED_init - bl red_led_on -#endif +relocate_done: -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ -#ifdef CONFIG_NAND_SPL - ldr r0, _nand_boot_ofs - mov pc, r0 - -_nand_boot_ofs: - .word nand_boot -#else - ldr r0, _board_init_r_ofs - adr r1, _start - add lr, r0, r1 - add lr, lr, r9 - /* setup parameters for board_init_r */ - mov r0, r5 /* gd_t */ - mov r1, r6 /* dest_addr */ - /* jump to it ... */ - mov pc, lr - -_board_init_r_ofs: - .word board_init_r - _start -#endif + bx lr _rel_dyn_start_ofs: .word __rel_dyn_start - _start @@ -276,6 +226,11 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start + .globl c_runtime_cpu_setup +c_runtime_cpu_setup: + + mov pc, lr + /* ************************************************************************* * diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 74599798c4..956427c9eb 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -112,6 +112,36 @@ static unsigned long exynos4_get_pll_clk(int pllreg) return exynos_get_pll_clk(pllreg, r, k); } +/* exynos4x12: return pll clock frequency */ +static unsigned long exynos4x12_get_pll_clk(int pllreg) +{ + struct exynos4x12_clock *clk = + (struct exynos4x12_clock *)samsung_get_base_clock(); + unsigned long r, k = 0; + + switch (pllreg) { + case APLL: + r = readl(&clk->apll_con0); + break; + case MPLL: + r = readl(&clk->mpll_con0); + break; + case EPLL: + r = readl(&clk->epll_con0); + k = readl(&clk->epll_con1); + break; + case VPLL: + r = readl(&clk->vpll_con0); + k = readl(&clk->vpll_con1); + break; + default: + printf("Unsupported PLL (%d)\n", pllreg); + return 0; + } + + return exynos_get_pll_clk(pllreg, r, k); +} + /* exynos5: return pll clock frequency */ static unsigned long exynos5_get_pll_clk(int pllreg) { @@ -193,6 +223,28 @@ static unsigned long exynos4_get_arm_clk(void) return armclk; } +/* exynos4x12: return ARM clock frequency */ +static unsigned long exynos4x12_get_arm_clk(void) +{ + struct exynos4x12_clock *clk = + (struct exynos4x12_clock *)samsung_get_base_clock(); + unsigned long div; + unsigned long armclk; + unsigned int core_ratio; + unsigned int core2_ratio; + + div = readl(&clk->div_cpu0); + + /* CORE_RATIO: [2:0], CORE2_RATIO: [30:28] */ + core_ratio = (div >> 0) & 0x7; + core2_ratio = (div >> 28) & 0x7; + + armclk = get_pll_clk(APLL) / (core_ratio + 1); + armclk /= (core2_ratio + 1); + + return armclk; +} + /* exynos5: return ARM clock frequency */ static unsigned long exynos5_get_arm_clk(void) { @@ -258,6 +310,20 @@ static unsigned long exynos4_get_pwm_clk(void) return pclk; } +/* exynos4x12: return pwm clock frequency */ +static unsigned long exynos4x12_get_pwm_clk(void) +{ + unsigned long pclk, sclk; + unsigned int ratio; + + sclk = get_pll_clk(MPLL); + ratio = 8; + + pclk = sclk / (ratio + 1); + + return pclk; +} + /* exynos5: return pwm clock frequency */ static unsigned long exynos5_get_pwm_clk(void) { @@ -326,6 +392,51 @@ static unsigned long exynos4_get_uart_clk(int dev_index) return uclk; } +/* exynos4x12: return uart clock frequency */ +static unsigned long exynos4x12_get_uart_clk(int dev_index) +{ + struct exynos4x12_clock *clk = + (struct exynos4x12_clock *)samsung_get_base_clock(); + unsigned long uclk, sclk; + unsigned int sel; + unsigned int ratio; + + /* + * CLK_SRC_PERIL0 + * UART0_SEL [3:0] + * UART1_SEL [7:4] + * UART2_SEL [8:11] + * UART3_SEL [12:15] + * UART4_SEL [16:19] + */ + sel = readl(&clk->src_peril0); + sel = (sel >> (dev_index << 2)) & 0xf; + + if (sel == 0x6) + sclk = get_pll_clk(MPLL); + else if (sel == 0x7) + sclk = get_pll_clk(EPLL); + else if (sel == 0x8) + sclk = get_pll_clk(VPLL); + else + return 0; + + /* + * CLK_DIV_PERIL0 + * UART0_RATIO [3:0] + * UART1_RATIO [7:4] + * UART2_RATIO [8:11] + * UART3_RATIO [12:15] + * UART4_RATIO [16:19] + */ + ratio = readl(&clk->div_peril0); + ratio = (ratio >> (dev_index << 2)) & 0xf; + + uclk = sclk / (ratio + 1); + + return uclk; +} + /* exynos5: return uart clock frequency */ static unsigned long exynos5_get_uart_clk(int dev_index) { @@ -373,6 +484,100 @@ static unsigned long exynos5_get_uart_clk(int dev_index) return uclk; } +static unsigned long exynos4_get_mmc_clk(int dev_index) +{ + struct exynos4_clock *clk = + (struct exynos4_clock *)samsung_get_base_clock(); + unsigned long uclk, sclk; + unsigned int sel, ratio, pre_ratio; + int shift; + + sel = readl(&clk->src_fsys); + sel = (sel >> (dev_index << 2)) & 0xf; + + if (sel == 0x6) + sclk = get_pll_clk(MPLL); + else if (sel == 0x7) + sclk = get_pll_clk(EPLL); + else if (sel == 0x8) + sclk = get_pll_clk(VPLL); + else + return 0; + + switch (dev_index) { + case 0: + case 1: + ratio = readl(&clk->div_fsys1); + pre_ratio = readl(&clk->div_fsys1); + break; + case 2: + case 3: + ratio = readl(&clk->div_fsys2); + pre_ratio = readl(&clk->div_fsys2); + break; + case 4: + ratio = readl(&clk->div_fsys3); + pre_ratio = readl(&clk->div_fsys3); + break; + default: + return 0; + } + + if (dev_index == 1 || dev_index == 3) + shift = 16; + + ratio = (ratio >> shift) & 0xf; + pre_ratio = (pre_ratio >> (shift + 8)) & 0xff; + uclk = (sclk / (ratio + 1)) / (pre_ratio + 1); + + return uclk; +} + +static unsigned long exynos5_get_mmc_clk(int dev_index) +{ + struct exynos5_clock *clk = + (struct exynos5_clock *)samsung_get_base_clock(); + unsigned long uclk, sclk; + unsigned int sel, ratio, pre_ratio; + int shift; + + sel = readl(&clk->src_fsys); + sel = (sel >> (dev_index << 2)) & 0xf; + + if (sel == 0x6) + sclk = get_pll_clk(MPLL); + else if (sel == 0x7) + sclk = get_pll_clk(EPLL); + else if (sel == 0x8) + sclk = get_pll_clk(VPLL); + else + return 0; + + switch (dev_index) { + case 0: + case 1: + ratio = readl(&clk->div_fsys1); + pre_ratio = readl(&clk->div_fsys1); + break; + case 2: + case 3: + ratio = readl(&clk->div_fsys2); + pre_ratio = readl(&clk->div_fsys2); + break; + default: + return 0; + } + + if (dev_index == 1 || dev_index == 3) + shift = 16; + + ratio = (ratio >> shift) & 0xf; + pre_ratio = (pre_ratio >> (shift + 8)) & 0xff; + uclk = (sclk / (ratio + 1)) / (pre_ratio + 1); + + return uclk; +} + /* exynos4: set the mmc clock */ static void exynos4_set_mmc_clk(int dev_index, unsigned int div) { @@ -386,6 +591,38 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div) * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24] * CLK_DIV_FSYS2 * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24] + * CLK_DIV_FSYS3 + * MMC4_PRE_RATIO [15:8] + */ + if (dev_index < 2) { + addr = (unsigned int)&clk->div_fsys1; + } else if (dev_index == 4) { + addr = (unsigned int)&clk->div_fsys3; + dev_index -= 4; + } else { + addr = (unsigned int)&clk->div_fsys2; + dev_index -= 2; + } + + val = readl(addr); + val &= ~(0xff << ((dev_index << 4) + 8)); + val |= (div & 0xff) << ((dev_index << 4) + 8); + writel(val, addr); +} + +/* exynos4x12: set the mmc clock */ +static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div) +{ + struct exynos4x12_clock *clk = + (struct exynos4x12_clock *)samsung_get_base_clock(); + unsigned int addr; + unsigned int val; + + /* + * CLK_DIV_FSYS1 + * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24] + * CLK_DIV_FSYS2 + * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24] */ if (dev_index < 2) { addr = (unsigned int)&clk->div_fsys1; @@ -603,7 +840,7 @@ void exynos5_set_lcd_clk(void) */ cfg = readl(&clk->src_disp1_0); cfg &= ~(0xf); - cfg |= 0x8; + cfg |= 0x6; writel(cfg, &clk->src_disp1_0); /* @@ -940,16 +1177,22 @@ unsigned long get_pll_clk(int pllreg) { if (cpu_is_exynos5()) return exynos5_get_pll_clk(pllreg); - else + else { + if (proid_is_exynos4412()) + return exynos4x12_get_pll_clk(pllreg); return exynos4_get_pll_clk(pllreg); + } } unsigned long get_arm_clk(void) { if (cpu_is_exynos5()) return exynos5_get_arm_clk(); - else + else { + if (proid_is_exynos4412()) + return exynos4x12_get_arm_clk(); return exynos4_get_arm_clk(); + } } unsigned long get_i2c_clk(void) @@ -968,24 +1211,41 @@ unsigned long get_pwm_clk(void) { if (cpu_is_exynos5()) return exynos5_get_pwm_clk(); - else + else { + if (proid_is_exynos4412()) + return exynos4x12_get_pwm_clk(); return exynos4_get_pwm_clk(); + } } unsigned long get_uart_clk(int dev_index) { if (cpu_is_exynos5()) return exynos5_get_uart_clk(dev_index); - else + else { + if (proid_is_exynos4412()) + return exynos4x12_get_uart_clk(dev_index); return exynos4_get_uart_clk(dev_index); + } +} + +unsigned long get_mmc_clk(int dev_index) +{ + if (cpu_is_exynos5()) + return exynos5_get_mmc_clk(dev_index); + else + return exynos4_get_mmc_clk(dev_index); } void set_mmc_clk(int dev_index, unsigned int div) { if (cpu_is_exynos5()) exynos5_set_mmc_clk(dev_index, div); - else + else { + if (proid_is_exynos4412()) + exynos4x12_set_mmc_clk(dev_index, div); exynos4_set_mmc_clk(dev_index, div); + } } unsigned long get_lcd_clk(void) diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c index 20a4b8414a..bd499b4761 100644 --- a/arch/arm/cpu/armv7/exynos/pinmux.c +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -22,6 +22,7 @@ */ #include <common.h> +#include <fdtdec.h> #include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> #include <asm/arch/sromc.h> @@ -370,6 +371,43 @@ static void exynos4_i2c_config(int peripheral, int flags) } } +static int exynos4_mmc_config(int peripheral, int flags) +{ + struct exynos4_gpio_part2 *gpio2 = + (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2(); + struct s5p_gpio_bank *bank, *bank_ext; + int i; + + switch (peripheral) { + case PERIPH_ID_SDMMC0: + bank = &gpio2->k0; + bank_ext = &gpio2->k1; + break; + case PERIPH_ID_SDMMC2: + bank = &gpio2->k2; + bank_ext = &gpio2->k3; + break; + default: + return -1; + } + for (i = 0; i < 7; i++) { + if (i == 2) + continue; + s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2)); + s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE); + s5p_gpio_set_drv(bank, i, GPIO_DRV_4X); + } + if (flags & PINMUX_FLAG_8BIT_MODE) { + for (i = 3; i < 7; i++) { + s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3)); + s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE); + s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X); + } + } + + return 0; +} + static int exynos4_pinmux_config(int peripheral, int flags) { switch (peripheral) { @@ -383,6 +421,14 @@ static int exynos4_pinmux_config(int peripheral, int flags) case PERIPH_ID_I2C7: exynos4_i2c_config(peripheral, flags); break; + case PERIPH_ID_SDMMC0: + case PERIPH_ID_SDMMC2: + return exynos4_mmc_config(peripheral, flags); + case PERIPH_ID_SDMMC1: + case PERIPH_ID_SDMMC3: + case PERIPH_ID_SDMMC4: + printf("SDMMC device %d not implemented\n", peripheral); + return -1; default: debug("%s: invalid peripheral %d", __func__, peripheral); return -1; @@ -402,3 +448,31 @@ int exynos_pinmux_config(int peripheral, int flags) return -1; } } + +#ifdef CONFIG_OF_CONTROL +static int exynos5_pinmux_decode_periph_id(const void *blob, int node) +{ + int err; + u32 cell[3]; + + err = fdtdec_get_int_array(blob, node, "interrupts", cell, + ARRAY_SIZE(cell)); + if (err) + return PERIPH_ID_NONE; + + /* check for invalid peripheral id */ + if ((PERIPH_ID_SDMMC4 > cell[1]) || (cell[1] < PERIPH_ID_UART0)) + return cell[1]; + + debug(" invalid peripheral id\n"); + return PERIPH_ID_NONE; +} + +int pinmux_decode_periph_id(const void *blob, int node) +{ + if (cpu_is_exynos5()) + return exynos5_pinmux_decode_periph_id(blob, node); + else + return PERIPH_ID_NONE; +} +#endif diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 7df97c5a3a..dcc1f831bc 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -155,12 +155,7 @@ reset: bl cpu_init_crit #endif -/* Set stackpointer in internal RAM to call board_init_f */ -call_board_init_f: - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0,=0x00000000 - bl board_init_f + bl _main /*------------------------------------------------------------------------------*/ @@ -177,14 +172,10 @@ ENTRY(relocate_code) mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - /* Set up the stack */ -stack_setup: - mov sp, r4 - adr r0, _start cmp r0, r6 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ - beq clear_bss /* skip relocation */ + beq relocate_done /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _image_copy_end_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -233,34 +224,22 @@ fixnext: add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 blo fixloop - b clear_bss + +relocate_done: + + bx lr + _rel_dyn_start_ofs: .word __rel_dyn_start - _start _rel_dyn_end_ofs: .word __rel_dyn_end - _start _dynsym_start_ofs: .word __dynsym_start - _start +ENDPROC(relocate_code) -clear_bss: - ldr r0, _bss_start_ofs - ldr r1, _bss_end_ofs - mov r4, r6 /* reloc addr */ - add r0, r0, r4 - add r1, r1, r4 - mov r2, #0x00000000 /* clear */ - -clbss_l:cmp r0, r1 /* clear loop... */ - bhs clbss_e /* if reached end of bss, exit */ - str r2, [r0] - add r0, r0, #4 - b clbss_l -clbss_e: +#endif -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ -jump_2_ram: +ENTRY(c_runtime_cpu_setup) /* * If I-cache is enabled invalidate it */ @@ -279,20 +258,9 @@ jump_2_ram: mcr p15, 0, r0, c12, c0, 0 @Set VBAR #endif /* !Tegra20 */ - ldr r0, _board_init_r_ofs - adr r1, _start - add lr, r0, r1 - add lr, lr, r9 - /* setup parameters for board_init_r */ - mov r0, r5 /* gd_t */ - mov r1, r6 /* dest_addr */ - /* jump to it ... */ - mov pc, lr - -_board_init_r_ofs: - .word board_init_r - _start -ENDPROC(relocate_code) -#endif + bx lr + +ENDPROC(c_runtime_cpu_setup) /************************************************************************* * diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index c12f1a7db8..efb5a400cf 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -245,12 +245,7 @@ reset: orr r0,r0,#0x13 msr cpsr,r0 -/* Set initial stackpointer in SDRAM to call board_init_f */ -call_board_init_f: - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0,=0x00000000 - bl board_init_f + bl _main /*------------------------------------------------------------------------------*/ @@ -267,14 +262,10 @@ relocate_code: mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - /* Set up the stack */ -stack_setup: - mov sp, r4 - adr r0, _start cmp r0, r6 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ - beq clear_bss /* skip relocation */ + beq relocate_done /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -326,42 +317,9 @@ fixnext: blo fixloop #endif -clear_bss: -#ifndef CONFIG_SPL_BUILD - ldr r0, _bss_start_ofs - ldr r1, _bss_end_ofs - mov r4, r6 /* reloc addr */ - add r0, r0, r4 - add r1, r1, r4 - mov r2, #0x00000000 /* clear */ - -clbss_l:cmp r0, r1 /* clear loop... */ - bhs clbss_e /* if reached end of bss, exit */ - str r2, [r0] - add r0, r0, #4 - b clbss_l -clbss_e: - - bl coloured_LED_init - bl red_led_on -#endif +relocate_done: -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ - ldr r0, _board_init_r_ofs - adr r1, _start - add lr, r0, r1 - add lr, lr, r9 - /* setup parameters for board_init_r */ - mov r0, r5 /* gd_t */ - mov r1, r6 /* dest_addr */ - /* jump to it ... */ - mov pc, lr - -_board_init_r_ofs: - .word board_init_r - _start + bx lr _rel_dyn_start_ofs: .word __rel_dyn_start - _start @@ -370,6 +328,11 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start + .globl c_runtime_cpu_setup +c_runtime_cpu_setup: + + bx lr + /****************************************************************************/ /* */ /* Interrupt handling */ diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index 536cf5c974..72af869704 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -164,12 +164,7 @@ reset: bl lock_cache_for_stack #endif -/* Set stackpointer in internal RAM to call board_init_f */ -call_board_init_f: - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0, =0x00000000 - bl board_init_f + bl _main /*------------------------------------------------------------------------------*/ #ifndef CONFIG_SPL_BUILD @@ -186,10 +181,6 @@ relocate_code: mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - /* Set up the stack */ -stack_setup: - mov sp, r4 - /* Disable the Dcache RAM lock for stack now */ #ifdef CONFIG_CPU_PXA25X bl cpu_init_crit @@ -198,7 +189,7 @@ stack_setup: adr r0, _start cmp r0, r6 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ - beq clear_bss /* skip relocation */ + beq relocate_done /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -250,48 +241,9 @@ fixnext: blo fixloop #endif -clear_bss: -#ifndef CONFIG_SPL_BUILD - ldr r0, _bss_start_ofs - ldr r1, _bss_end_ofs - mov r4, r6 /* reloc addr */ - add r0, r0, r4 - add r1, r1, r4 - mov r2, #0x00000000 /* clear */ - -clbss_l:cmp r0, r1 /* clear loop... */ - bhs clbss_e /* if reached end of bss, exit */ - str r2, [r0] - add r0, r0, #4 - b clbss_l -clbss_e: -#endif /* #ifndef CONFIG_SPL_BUILD */ +relocate_done: -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ -#ifdef CONFIG_ONENAND_SPL - ldr r0, _onenand_boot_ofs - mov pc, r0 - -_onenand_boot_ofs: - .word onenand_boot -#else -jump_2_ram: - ldr r0, _board_init_r_ofs - ldr r1, _TEXT_BASE - add lr, r0, r1 - add lr, lr, r9 - /* setup parameters for board_init_r */ - mov r0, r5 /* gd_t */ - mov r1, r6 /* dest_addr */ - /* jump to it ... */ - mov pc, lr - -_board_init_r_ofs: - .word board_init_r - _start -#endif + bx lr _rel_dyn_start_ofs: .word __rel_dyn_start - _start @@ -299,7 +251,14 @@ _rel_dyn_end_ofs: .word __rel_dyn_end - _start _dynsym_start_ofs: .word __dynsym_start - _start + #endif + + .globl c_runtime_cpu_setup +c_runtime_cpu_setup: + + bx lr + /* ************************************************************************* * diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index 323b923f13..4528c91983 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -128,12 +128,7 @@ reset: bl lowlevel_init #endif -/* Set stackpointer in internal RAM to call board_init_f */ -call_board_init_f: - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0,=0x00000000 - bl board_init_f + bl _main /*------------------------------------------------------------------------------*/ @@ -150,14 +145,10 @@ relocate_code: mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - /* Set up the stack */ -stack_setup: - mov sp, r4 - adr r0, _start cmp r0, r6 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ - beq clear_bss /* skip relocation */ + beq relocate_done /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -209,42 +200,9 @@ fixnext: blo fixloop #endif -clear_bss: -#ifndef CONFIG_SPL_BUILD - ldr r0, _bss_start_ofs - ldr r1, _bss_end_ofs - mov r4, r6 /* reloc addr */ - add r0, r0, r4 - add r1, r1, r4 - mov r2, #0x00000000 /* clear */ - -clbss_l:cmp r0, r1 /* clear loop... */ - bhs clbss_e /* if reached end of bss, exit */ - str r2, [r0] - add r0, r0, #4 - b clbss_l -clbss_e: - - bl coloured_LED_init - bl red_led_on -#endif +relocate_done: -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ - ldr r0, _board_init_r_ofs - adr r1, _start - add lr, r0, r1 - add lr, lr, r9 - /* setup parameters for board_init_r */ - mov r0, r5 /* gd_t */ - mov r1, r6 /* dest_addr */ - /* jump to it ... */ - mov pc, lr - -_board_init_r_ofs: - .word board_init_r - _start + bx lr _rel_dyn_start_ofs: .word __rel_dyn_start - _start @@ -253,6 +211,11 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start + .globl c_runtime_cpu_setup +c_runtime_cpu_setup: + + bx lr + /* ************************************************************************* * diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index 1ea92d1456..3144299afe 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -132,12 +132,7 @@ reset: bl cpu_init_crit #endif -/* Set stackpointer in internal RAM to call board_init_f */ -call_board_init_f: - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - ldr r0,=0x00000000 - bl board_init_f + bl _main /*------------------------------------------------------------------------------*/ @@ -154,14 +149,10 @@ relocate_code: mov r5, r1 /* save addr of gd */ mov r6, r2 /* save addr of destination */ - /* Set up the stack */ -stack_setup: - mov sp, r4 - adr r0, _start cmp r0, r6 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ - beq clear_bss /* skip relocation */ + beq relocate_done /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -213,40 +204,10 @@ fixnext: blo fixloop #endif -clear_bss: -#ifndef CONFIG_SPL_BUILD - ldr r0, _bss_start_ofs - ldr r1, _bss_end_ofs - mov r4, r6 /* reloc addr */ - add r0, r0, r4 - add r1, r1, r4 - mov r2, #0x00000000 /* clear */ - -clbss_l:cmp r0, r1 /* clear loop... */ - bhs clbss_e /* if reached end of bss, exit */ - str r2, [r0] - add r0, r0, #4 - b clbss_l -clbss_e: -#endif +relocate_done: -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ - ldr r0, _board_init_r_ofs - adr r1, _start - add lr, r0, r1 - add lr, lr, r9 - /* setup parameters for board_init_r */ - mov r0, r5 /* gd_t */ - mov r1, r6 /* dest_addr */ - /* jump to it ... */ mov pc, lr -_board_init_r_ofs: - .word board_init_r - _start - _rel_dyn_start_ofs: .word __rel_dyn_start - _start _rel_dyn_end_ofs: @@ -254,6 +215,11 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start + .globl c_runtime_cpu_setup +c_runtime_cpu_setup: + + mov pc, lr + /* ************************************************************************* * |
