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-rw-r--r--arch/arm/cpu/armv7/mx6/clock.c2
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c5
2 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index bd65a08ba2..7dd83ec9e1 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -80,7 +80,7 @@ static u32 decode_pll(enum pll_clocks pll, u32 infreq)
div = __raw_readl(&imx_ccm->analog_pll_sys);
div &= BM_ANADIG_PLL_SYS_DIV_SELECT;
- return infreq * (div >> 1);
+ return (infreq * div) >> 1;
case PLL_BUS:
div = __raw_readl(&imx_ccm->analog_pll_528);
div &= BM_ANADIG_PLL_528_DIV_SELECT;
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 172527987d..f20bdebf3f 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -124,10 +124,9 @@ static void clear_ldo_ramp(void)
}
/*
- * Set the VDDSOC
+ * Set the PMU_REG_CORE register
*
- * Mask out the REG_CORE[22:18] bits (REG2_TRIG) and set
- * them to the specified millivolt level.
+ * Set LDO_SOC/PU/ARM regulators to the specified millivolt level.
* Possible values are from 0.725V to 1.450V in steps of
* 0.025V (25mV).
*/
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