1 files changed, 32 insertions, 14 deletions

diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c b/arch/arm/cpu/arm926ejs/davinci/timer.c
index 8b1734c8e1..c7bf7a5ad2 100644
--- a/arch/arm/cpu/arm926ejs/davinci/timer.c
+++ b/arch/arm/cpu/arm926ejs/davinci/timer.c
@@ -39,23 +39,10 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <asm/arch/timer_defs.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-struct davinci_timer {
-	u_int32_t	pid12;
-	u_int32_t	emumgt;
-	u_int32_t	na1;
-	u_int32_t	na2;
-	u_int32_t	tim12;
-	u_int32_t	tim34;
-	u_int32_t	prd12;
-	u_int32_t	prd34;
-	u_int32_t	tcr;
-	u_int32_t	tgcr;
-	u_int32_t	wdtcr;
-};
-
 static struct davinci_timer * const timer =
 	(struct davinci_timer *)CONFIG_SYS_TIMERBASE;
 
@@ -121,3 +108,34 @@ ulong get_tbclk(void)
 {
 	return CONFIG_SYS_HZ;
 }
+
+#ifdef CONFIG_HW_WATCHDOG
+static struct davinci_timer * const wdttimer =
+	(struct davinci_timer *)CONFIG_SYS_WDTTIMERBASE;
+
+/*
+ * See prufw2.pdf for using Timer as a WDT
+ */
+void davinci_hw_watchdog_enable(void)
+{
+	writel(0x0, &wdttimer->tcr);
+	writel(0x0, &wdttimer->tgcr);
+	/* TIMMODE = 2h */
+	writel(0x08 | 0x03 | ((TIM_CLK_DIV - 1) << 8), &wdttimer->tgcr);
+	writel(CONFIG_SYS_WDT_PERIOD_LOW, &wdttimer->prd12);
+	writel(CONFIG_SYS_WDT_PERIOD_HIGH, &wdttimer->prd34);
+	writel(2 << 22, &wdttimer->tcr);
+	writel(0x0, &wdttimer->tim12);
+	writel(0x0, &wdttimer->tim34);
+	/* set WDEN bit, WDKEY 0xa5c6 */
+	writel(0xa5c64000, &wdttimer->wdtcr);
+	/* clear counter register */
+	writel(0xda7e4000, &wdttimer->wdtcr);
+}
+
+void davinci_hw_watchdog_reset(void)
+{
+	writel(0xa5c64000, &wdttimer->wdtcr);
+	writel(0xda7e4000, &wdttimer->wdtcr);
+}
+#endif