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-rw-r--r--board/idmr/flash.c2
-rw-r--r--cpu/mcf52x2/cpu.c34
-rw-r--r--include/asm-m68k/m5271.h6
-rw-r--r--include/configs/idmr.h20
4 files changed, 58 insertions, 4 deletions
diff --git a/board/idmr/flash.c b/board/idmr/flash.c
index ba9b009e1c..33512b8946 100644
--- a/board/idmr/flash.c
+++ b/board/idmr/flash.c
@@ -97,7 +97,7 @@ unsigned long flash_init (void)
flash_protect (FLAG_PROTECT_SET,
CFG_FLASH_BASE,
- CFG_FLASH_BASE + 0x30000, &flash_info[0]);
+ CFG_FLASH_BASE + 0x2ffff, &flash_info[0]);
return size;
}
diff --git a/cpu/mcf52x2/cpu.c b/cpu/mcf52x2/cpu.c
index aa6b2bd670..ce59d39cfa 100644
--- a/cpu/mcf52x2/cpu.c
+++ b/cpu/mcf52x2/cpu.c
@@ -49,11 +49,43 @@
#endif
#ifdef CONFIG_M5271
+/*
+ * Both MCF5270 and MCF5271 are members of the MPC5271 family. Try to
+ * determine which one we are running on, based on the Chip Identification
+ * Register (CIR).
+ */
int checkcpu (void)
{
char buf[32];
+ unsigned short cir; /* Chip Identification Register */
+ unsigned short pin; /* Part identification number */
+ unsigned char prn; /* Part revision number */
+ char *cpu_model;
+
+ cir = mbar_readShort(MCF_CCM_CIR);
+ pin = cir >> MCF_CCM_CIR_PIN_LEN;
+ prn = cir & MCF_CCM_CIR_PRN_MASK;
+
+ switch (pin) {
+ case MCF_CCM_CIR_PIN_MCF5270:
+ cpu_model = "5270";
+ break;
+ case MCF_CCM_CIR_PIN_MCF5271:
+ cpu_model = "5271";
+ break;
+ default:
+ cpu_model = NULL;
+ break;
+ }
+
+ if (cpu_model)
+ printf("CPU: Freescale ColdFire MCF%s rev. %hu, at %s MHz\n",
+ cpu_model, prn, strmhz(buf, CFG_CLK));
+ else
+ printf("CPU: Unknown - Freescale ColdFire MCF5271 family"
+ " (PIN: 0x%x) rev. %hu, at %s MHz\n",
+ pin, prn, strmhz(buf, CFG_CLK));
- printf ("CPU: Freescale Coldfire MCF5271 at %s MHz\n", strmhz(buf, CFG_CLK));
return 0;
}
diff --git a/include/asm-m68k/m5271.h b/include/asm-m68k/m5271.h
index 765414fdc3..e0f02cf7fd 100644
--- a/include/asm-m68k/m5271.h
+++ b/include/asm-m68k/m5271.h
@@ -57,6 +57,12 @@
#define MCF_GPIO_PAR_FECI2C 0x100047
#define MCF_GPIO_PAR_UART 0x100048
+#define MCF_CCM_CIR 0x11000A
+#define MCF_CCM_CIR_PRN_MASK 0x3F
+#define MCF_CCM_CIR_PIN_LEN 6
+#define MCF_CCM_CIR_PIN_MCF5270 0x2e
+#define MCF_CCM_CIR_PIN_MCF5271 0x80
+
#define MCF_GPIO_AD_ADDR23 0x80
#define MCF_GPIO_AD_ADDR22 0x40
#define MCF_GPIO_AD_ADDR21 0x20
diff --git a/include/configs/idmr.h b/include/configs/idmr.h
index 48915b32e3..b1dbe2ccb9 100644
--- a/include/configs/idmr.h
+++ b/include/configs/idmr.h
@@ -83,8 +83,8 @@
*/
#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \
CFG_CMD_PING | \
- CFG_CMD_NET | \
- CFG_CMD_MII) & \
+ CFG_CMD_JFFS2 | \
+ CFG_CMD_NET) & \
~(CFG_CMD_LOADS | \
CFG_CMD_LOADB))
@@ -194,4 +194,20 @@
/* Port configuration */
#define CFG_FECI2C 0xF0
+
+
+/* Dynamic MTD partition support */
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT "nor0=idmr-0"
+
+#define MTDPARTS_DEFAULT "mtdparts=idmr-0:128k(u-boot)," \
+ "64k(env)," \
+ "640k(kernel)," \
+ "2m(rootfs)," \
+ "-(user)";
+
+#if (CONFIG_COMMANDS & CFG_CMD_MII)
+#error MII commands don't work on iDMR board and sholud not be enabled.
+#endif /* (CONFIG_COMMANDS & CFG_CMD_MII) */
+
#endif /* _IDMR_H */
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