diff options
194 files changed, 2698 insertions, 6365 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index c0fff0e40c..1b2da9421a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -214,9 +214,7 @@ Siddarth Gore <gores@marvell.com> Paul Gortmaker <paul.gortmaker@windriver.com> sbc8349 MPC8349 - sbc8540 MPC8540 sbc8548 MPC8548 - sbc8560 MPC8560 sbc8641d MPC8641D Frank Gottschling <fgottschling@eltec.de> diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index f8088fe21a..2b9af93806 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -34,7 +34,7 @@ typedef struct global_data { bd_t *bd; unsigned long flags; - unsigned long baudrate; + unsigned int baudrate; unsigned long have_console; /* serial_init() was called */ #ifdef CONFIG_PRE_CONSOLE_BUFFER unsigned long precon_buf_idx; /* Pre-Console buffer index */ diff --git a/arch/arm/include/asm/u-boot.h b/arch/arm/include/asm/u-boot.h index eac3800729..2ba98bca7d 100644 --- a/arch/arm/include/asm/u-boot.h +++ b/arch/arm/include/asm/u-boot.h @@ -37,7 +37,7 @@ #define _U_BOOT_H_ 1 typedef struct bd_info { - int bi_baudrate; /* serial console baudrate */ + unsigned int bi_baudrate; /* serial console baudrate */ ulong bi_arch_number; /* unique id for this board */ ulong bi_boot_params; /* where this board expects params */ unsigned long bi_arm_freq; /* arm frequency */ diff --git a/arch/avr32/include/asm/global_data.h b/arch/avr32/include/asm/global_data.h index 7878bb185a..bf661e23be 100644 --- a/arch/avr32/include/asm/global_data.h +++ b/arch/avr32/include/asm/global_data.h @@ -33,7 +33,7 @@ typedef struct global_data { bd_t *bd; unsigned long flags; - unsigned long baudrate; + unsigned int baudrate; unsigned long stack_end; /* highest stack address */ unsigned long have_console; /* serial_init() was called */ #ifdef CONFIG_PRE_CONSOLE_BUFFER diff --git a/arch/avr32/include/asm/u-boot.h b/arch/avr32/include/asm/u-boot.h index 1d2959a2ad..97bbbdef6d 100644 --- a/arch/avr32/include/asm/u-boot.h +++ b/arch/avr32/include/asm/u-boot.h @@ -23,7 +23,7 @@ #define __ASM_U_BOOT_H__ 1 typedef struct bd_info { - unsigned long bi_baudrate; + unsigned int bi_baudrate; unsigned char bi_phy_id[4]; unsigned long bi_board_number; void *bi_boot_params; diff --git a/arch/blackfin/include/asm/global_data.h b/arch/blackfin/include/asm/global_data.h index 290a9e7662..d91e5a40d3 100644 --- a/arch/blackfin/include/asm/global_data.h +++ b/arch/blackfin/include/asm/global_data.h @@ -41,7 +41,7 @@ typedef struct global_data { bd_t *bd; unsigned long flags; unsigned long board_type; - unsigned long baudrate; + unsigned int baudrate; unsigned long have_console; /* serial_init() was called */ #ifdef CONFIG_PRE_CONSOLE_BUFFER unsigned long precon_buf_idx; /* Pre-Console buffer index */ diff --git a/arch/blackfin/include/asm/u-boot.h b/arch/blackfin/include/asm/u-boot.h index df81183e81..7abd6c2a32 100644 --- a/arch/blackfin/include/asm/u-boot.h +++ b/arch/blackfin/include/asm/u-boot.h @@ -29,7 +29,7 @@ #define _U_BOOT_H_ 1 typedef struct bd_info { - int bi_baudrate; /* serial console baudrate */ + unsigned int bi_baudrate; /* serial console baudrate */ unsigned long bi_boot_params; /* where this board expects params */ unsigned long bi_memstart; /* start of DRAM memory */ phys_size_t bi_memsize; /* size of DRAM memory in bytes */ diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c index e47b606e87..9fbbea0d9b 100644 --- a/arch/blackfin/lib/board.c +++ b/arch/blackfin/lib/board.c @@ -78,7 +78,7 @@ static void display_global_data(void) printf(" gd: %p\n", gd); printf(" |-flags: %lx\n", gd->flags); printf(" |-board_type: %lx\n", gd->board_type); - printf(" |-baudrate: %lu\n", gd->baudrate); + printf(" |-baudrate: %u\n", gd->baudrate); printf(" |-have_console: %lx\n", gd->have_console); printf(" |-ram_size: %lx\n", gd->ram_size); printf(" |-env_addr: %lx\n", gd->env_addr); diff --git a/arch/m68k/cpu/mcf5227x/start.S b/arch/m68k/cpu/mcf5227x/start.S index c5096a80c2..a683778127 100644 --- a/arch/m68k/cpu/mcf5227x/start.S +++ b/arch/m68k/cpu/mcf5227x/start.S @@ -485,7 +485,7 @@ clear_bss: /* exception code */ .globl _fault _fault: - jmp _fault + bra _fault .globl _exc_handler _exc_handler: diff --git a/arch/m68k/cpu/mcf523x/start.S b/arch/m68k/cpu/mcf523x/start.S index e6a69ab470..05f17231b2 100644 --- a/arch/m68k/cpu/mcf523x/start.S +++ b/arch/m68k/cpu/mcf523x/start.S @@ -247,7 +247,7 @@ clear_bss: /* exception code */ .globl _fault _fault: - jmp _fault + bra _fault .globl _exc_handler _exc_handler: diff --git a/arch/m68k/cpu/mcf52x2/start.S b/arch/m68k/cpu/mcf52x2/start.S index ee17792cb3..f5e55dd965 100644 --- a/arch/m68k/cpu/mcf52x2/start.S +++ b/arch/m68k/cpu/mcf52x2/start.S @@ -307,7 +307,7 @@ clear_bss: /* exception code */ .globl _fault _fault: - jmp _fault + bra _fault .globl _exc_handler _exc_handler: diff --git a/arch/m68k/cpu/mcf532x/start.S b/arch/m68k/cpu/mcf532x/start.S index fe98d76474..583ed1d41a 100644 --- a/arch/m68k/cpu/mcf532x/start.S +++ b/arch/m68k/cpu/mcf532x/start.S @@ -261,7 +261,7 @@ clear_bss: /* exception code */ .globl _fault _fault: - jmp _fault + bra _fault .globl _exc_handler _exc_handler: diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c index 3f9209ff19..b6ceac32e8 100644 --- a/arch/m68k/cpu/mcf5445x/cpu_init.c +++ b/arch/m68k/cpu/mcf5445x/cpu_init.c @@ -31,6 +31,7 @@ #include <asm/processor.h> #include <asm/rtc.h> #include <asm/io.h> +#include <linux/compiler.h> #if defined(CONFIG_CMD_NET) #include <config.h> @@ -49,7 +50,7 @@ void cpu_init_f(void) { scm1_t *scm1 = (scm1_t *) MMAP_SCM1; gpio_t *gpio = (gpio_t *) MMAP_GPIO; - fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS; + fbcs_t *fbcs __maybe_unused = (fbcs_t *) MMAP_FBCS; out_be32(&scm1->mpr, 0x77777777); out_be32(&scm1->pacra, 0); diff --git a/arch/m68k/cpu/mcf5445x/speed.c b/arch/m68k/cpu/mcf5445x/speed.c index 073b7efafb..d71b5fe842 100644 --- a/arch/m68k/cpu/mcf5445x/speed.c +++ b/arch/m68k/cpu/mcf5445x/speed.c @@ -91,9 +91,12 @@ int get_clocks(void) pll_t *pll = (pll_t *)MMAP_PLL; int pllmult_nopci[] = { 20, 10, 24, 18, 12, 6, 16, 8 }; int pllmult_pci[] = { 12, 6, 16, 8 }; - int vco = 0, bPci, temp, fbtemp, pcrvalue; + int vco = 0, temp, fbtemp, pcrvalue; int *pPllmult = NULL; u16 fbpll_mask; +#ifdef CONFIG_PCI + int bPci; +#endif #ifdef CONFIG_M54455EVB u8 *cpld = (u8 *)(CONFIG_SYS_CS2_BASE + 3); @@ -105,14 +108,16 @@ int get_clocks(void) ((in_be16(&ccm->ccr) & CCM_CCR_360_FBCONFIG_MASK) == 0x0060)) { pPllmult = &pllmult_pci[0]; fbpll_mask = 3; /* 11b */ +#ifdef CONFIG_PCI bPci = 1; +#endif } else { pPllmult = &pllmult_nopci[0]; fbpll_mask = 7; /* 111b */ #ifdef CONFIG_PCI gd->pci_clk = 0; -#endif bPci = 0; +#endif } #ifdef CONFIG_M54455EVB diff --git a/arch/m68k/cpu/mcf547x_8x/start.S b/arch/m68k/cpu/mcf547x_8x/start.S index ec65cae3d8..d99747b7fa 100644 --- a/arch/m68k/cpu/mcf547x_8x/start.S +++ b/arch/m68k/cpu/mcf547x_8x/start.S @@ -164,8 +164,8 @@ _start: move.l #__got_start, %a5 /* put relocation table address to a5 */ - bsr cpu_init_f /* run low-level CPU init code (from flash) */ - bsr board_init_f /* run low-level board init code (from flash) */ + jbsr cpu_init_f /* run low-level CPU init code (from flash) */ + jbsr board_init_f /* run low-level board init code (from flash) */ /* board_init_f() does not return */ diff --git a/arch/m68k/include/asm/global_data.h b/arch/m68k/include/asm/global_data.h index cd55b83c52..0cdb11cf99 100644 --- a/arch/m68k/include/asm/global_data.h +++ b/arch/m68k/include/asm/global_data.h @@ -34,7 +34,7 @@ typedef struct global_data { bd_t *bd; unsigned long flags; - unsigned long baudrate; + unsigned int baudrate; unsigned long cpu_clk; /* CPU clock in Hz! */ unsigned long bus_clk; #ifdef CONFIG_PCI diff --git a/arch/m68k/include/asm/u-boot.h b/arch/m68k/include/asm/u-boot.h index 973c9ee098..8c7c554a46 100644 --- a/arch/m68k/include/asm/u-boot.h +++ b/arch/m68k/include/asm/u-boot.h @@ -58,7 +58,7 @@ typedef struct bd_info { unsigned long bi_vcofreq; /* vco Freq in MHz */ unsigned long bi_flbfreq; /* Flexbus Freq in MHz */ #endif - unsigned long bi_baudrate; /* Console Baudrate */ + unsigned int bi_baudrate; /* Console Baudrate */ } bd_t; #endif /* __ASSEMBLY__ */ diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c index 67c9a1382e..92f935bd01 100644 --- a/arch/m68k/lib/board.c +++ b/arch/m68k/lib/board.c @@ -29,6 +29,7 @@ #include <command.h> #include <malloc.h> #include <stdio_dev.h> +#include <linux/compiler.h> #include <asm/immap.h> @@ -387,7 +388,7 @@ board_init_f (ulong bootflag) */ void board_init_r (gd_t *id, ulong dest_addr) { - char *s; + char *s __maybe_unused; bd_t *bd; #ifndef CONFIG_ENV_IS_NOWHERE diff --git a/arch/microblaze/include/asm/global_data.h b/arch/microblaze/include/asm/global_data.h index de3b8dbe92..2111c7cba2 100644 --- a/arch/microblaze/include/asm/global_data.h +++ b/arch/microblaze/include/asm/global_data.h @@ -35,7 +35,7 @@ typedef struct global_data { bd_t *bd; unsigned long flags; - unsigned long baudrate; + unsigned int baudrate; unsigned long have_console; /* serial_init() was called */ #ifdef CONFIG_PRE_CONSOLE_BUFFER unsigned long precon_buf_idx; /* Pre-Console buffer index */ diff --git a/arch/microblaze/include/asm/u-boot.h b/arch/microblaze/include/asm/u-boot.h index a0b1dbf9e6..8d00658564 100644 --- a/arch/microblaze/include/asm/u-boot.h +++ b/arch/microblaze/include/asm/u-boot.h @@ -40,7 +40,7 @@ typedef struct bd_info { unsigned long bi_flashoffset; /* reserved area for startup monitor */ unsigned long bi_sramstart; /* start of SRAM memory */ unsigned long bi_sramsize; /* size of SRAM memory */ - unsigned long bi_baudrate; /* Console Baudrate */ + unsigned int bi_baudrate; /* Console Baudrate */ } bd_t; /* For image.h:image_check_target_arch() */ diff --git a/arch/mips/cpu/mips32/au1x00/Makefile b/arch/mips/cpu/mips32/au1x00/Makefile index dc58475f68..b9f895df5b 100644 --- a/arch/mips/cpu/mips32/au1x00/Makefile +++ b/arch/mips/cpu/mips32/au1x00/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o -COBJS = au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o +COBJS = au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o au1x00_ide.o SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/bmw/m48t59y.h b/arch/mips/cpu/mips32/au1x00/au1x00_ide.c index 717300d957..932cdfb9bb 100644 --- a/board/bmw/m48t59y.h +++ b/arch/mips/cpu/mips32/au1x00/au1x00_ide.c @@ -1,13 +1,7 @@ /* - * SGS M48-T59Y TOD/NVRAM Driver - * - * (C) Copyright 2000 + * (C) Copyright 2000-2011 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * - * (C) Copyright 1999, by Curt McDowell, 08-06-99, Broadcom Corp. - * - * (C) Copyright 2001, James Dougherty, 07/18/01, Broadcom Corp. - * * See file CREDITS for list of people who contributed to this * project. * @@ -25,33 +19,14 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA + * */ -#ifndef __M48_T59_Y_H -#define __M48_T59_Y_H - -/* - * M48 T59Y -Timekeeping Battery backed SRAM. - */ - -int m48_tod_init(void); - -int m48_tod_set(int year, - int month, - int day, - int hour, - int minute, - int second); - -int m48_tod_get(int *year, - int *month, - int *day, - int *hour, - int *minute, - int *second); - -int m48_tod_get_second(void); - -void m48_watchdog_arm(int usec); +#include <common.h> +#include <ide.h> -#endif /*!__M48_T59_Y_H */ +/* AU1X00 swaps data in big-endian mode, enforce little-endian function */ +void ide_input_swap_data(int dev, ulong *sect_buf, int words) +{ + ide_input_data(dev, sect_buf, words); +} diff --git a/arch/mips/cpu/mips32/au1x00/au1x00_serial.c b/arch/mips/cpu/mips32/au1x00/au1x00_serial.c index 0beac98fde..3e85b90cde 100644 --- a/arch/mips/cpu/mips32/au1x00/au1x00_serial.c +++ b/arch/mips/cpu/mips32/au1x00/au1x00_serial.c @@ -103,12 +103,6 @@ static void au1x00_serial_putc(const char c) *uart_tx = (u32)c; } -static void au1x00_serial_puts(const char *s) -{ - while (*s) - serial_putc(*s++); -} - static int au1x00_serial_getc(void) { volatile u32 *uart_rx = (volatile u32*)(UART0_ADDR+UART_RX); @@ -137,7 +131,7 @@ static struct serial_device au1x00_serial_drv = { .stop = NULL, .setbrg = au1x00_serial_setbrg, .putc = au1x00_serial_putc, - .puts = au1x00_serial_puts, + .puts = default_serial_puts, .getc = au1x00_serial_getc, .tstc = au1x00_serial_tstc, }; diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S index e683e8be8c..64dfad0263 100644 --- a/arch/mips/cpu/mips32/cache.S +++ b/arch/mips/cpu/mips32/cache.S @@ -85,17 +85,17 @@ LEAF(mips_init_icache) /* clear tag to invalidate */ PTR_LI t0, INDEX_BASE PTR_ADDU t1, t0, a1 -1: cache_op Index_Store_Tag_I t0 +1: cache_op INDEX_STORE_TAG_I t0 PTR_ADDU t0, a2 bne t0, t1, 1b /* fill once, so data field parity is correct */ PTR_LI t0, INDEX_BASE -2: cache_op Fill t0 +2: cache_op FILL t0 PTR_ADDU t0, a2 bne t0, t1, 2b /* invalidate again - prudent but not strictly neccessary */ PTR_LI t0, INDEX_BASE -1: cache_op Index_Store_Tag_I t0 +1: cache_op INDEX_STORE_TAG_I t0 PTR_ADDU t0, a2 bne t0, t1, 1b 9: jr ra @@ -110,7 +110,7 @@ LEAF(mips_init_dcache) /* clear all tags */ PTR_LI t0, INDEX_BASE PTR_ADDU t1, t0, a1 -1: cache_op Index_Store_Tag_D t0 +1: cache_op INDEX_STORE_TAG_D t0 PTR_ADDU t0, a2 bne t0, t1, 1b /* load from each line (in cached space) */ @@ -120,7 +120,7 @@ LEAF(mips_init_dcache) bne t0, t1, 2b /* clear all tags */ PTR_LI t0, INDEX_BASE -1: cache_op Index_Store_Tag_D t0 +1: cache_op INDEX_STORE_TAG_D t0 PTR_ADDU t0, a2 bne t0, t1, 1b 9: jr ra diff --git a/arch/mips/cpu/mips32/cpu.c b/arch/mips/cpu/mips32/cpu.c index 7b49e1b612..50bb248bd0 100644 --- a/arch/mips/cpu/mips32/cpu.c +++ b/arch/mips/cpu/mips32/cpu.c @@ -61,8 +61,8 @@ void flush_cache(ulong start_addr, ulong size) return; while (1) { - cache_op(Hit_Writeback_Inv_D, addr); - cache_op(Hit_Invalidate_I, addr); + cache_op(HIT_WRITEBACK_INV_D, addr); + cache_op(HIT_INVALIDATE_I, addr); if (addr == aend) break; addr += lsize; @@ -76,7 +76,7 @@ void flush_dcache_range(ulong start_addr, ulong stop) unsigned long aend = (stop - 1) & ~(lsize - 1); while (1) { - cache_op(Hit_Writeback_Inv_D, addr); + cache_op(HIT_WRITEBACK_INV_D, addr); if (addr == aend) break; addr += lsize; @@ -90,7 +90,7 @@ void invalidate_dcache_range(ulong start_addr, ulong stop) unsigned long aend = (stop - 1) & ~(lsize - 1); while (1) { - cache_op(Hit_Invalidate_D, addr); + cache_op(HIT_INVALIDATE_D, addr); if (addr == aend) break; addr += lsize; diff --git a/arch/mips/cpu/mips32/incaip/asc_serial.c b/arch/mips/cpu/mips32/incaip/asc_serial.c index 08949f4fb0..6f0e4f2520 100644 --- a/arch/mips/cpu/mips32/incaip/asc_serial.c +++ b/arch/mips/cpu/mips32/incaip/asc_serial.c @@ -236,14 +236,6 @@ static void asc_serial_putc(const char c) } } -static void asc_serial_puts(const char *s) -{ - while (*s) - { - serial_putc (*s++); - } -} - static int asc_serial_getc(void) { ulong symbol_mask; @@ -292,7 +284,7 @@ static struct serial_device asc_serial_drv = { .stop = NULL, .setbrg = asc_serial_setbrg, .putc = asc_serial_putc, - .puts = asc_serial_puts, + .puts = default_serial_puts, .getc = asc_serial_getc, .tstc = asc_serial_tstc, }; diff --git a/board/sbc8560/Makefile b/arch/mips/cpu/mips64/Makefile index ce0156040a..be38664844 100644 --- a/board/sbc8560/Makefile +++ b/arch/mips/cpu/mips64/Makefile @@ -1,10 +1,7 @@ # -# (C) Copyright 2004-2006 +# (C) Copyright 2003-2006 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # -# (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>. -# Added support for Wind River SBC8560 board -# # See file CREDITS for list of people who contributed to this # project. # @@ -26,18 +23,18 @@ include $(TOPDIR)/config.mk -LIB = $(obj)lib$(BOARD).o +LIB = $(obj)lib$(CPU).o + +START = start.o +COBJS-y = cpu.o interrupts.o time.o cache.o -COBJS-y += $(BOARD).o -COBJS-y += law.o -COBJS-y += tlb.o -COBJS-$(CONFIG_FSL_DDR1) += ddr.o +SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) +START := $(addprefix $(obj),$(START)) -SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS-y)) -SOBJS := $(addprefix $(obj),$(SOBJS)) +all: $(obj).depend $(START) $(LIB) -$(LIB): $(obj).depend $(OBJS) $(SOBJS) +$(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) ######################################################################### @@ -46,5 +43,3 @@ $(LIB): $(obj).depend $(OBJS) $(SOBJS) include $(SRCTREE)/rules.mk sinclude $(obj).depend - -######################################################################### diff --git a/arch/mips/cpu/mips64/cache.S b/arch/mips/cpu/mips64/cache.S new file mode 100644 index 0000000000..036f035d96 --- /dev/null +++ b/arch/mips/cpu/mips64/cache.S @@ -0,0 +1,229 @@ +/* + * Cache-handling routined for MIPS CPUs + * + * Copyright (c) 2003 Wolfgang Denk <wd@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <asm-offsets.h> +#include <config.h> +#include <asm/asm.h> +#include <asm/regdef.h> +#include <asm/mipsregs.h> +#include <asm/addrspace.h> +#include <asm/cacheops.h> + +#define RA t9 + +/* + * 16kB is the maximum size of instruction and data caches on MIPS 4K, + * 64kB is on 4KE, 24K, 5K, etc. Set bigger size for convenience. + * + * Note that the above size is the maximum size of primary cache. U-Boot + * doesn't have L2 cache support for now. + */ +#define MIPS_MAX_CACHE_SIZE 0x10000 + +#define INDEX_BASE CKSEG0 + + .macro cache_op op addr + .set push + .set noreorder + .set mips3 + cache \op, 0(\addr) + .set pop + .endm + + .macro f_fill64 dst, offset, val + LONG_S \val, (\offset + 0 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 1 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 2 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 3 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 4 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 5 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 6 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 7 * LONGSIZE)(\dst) +#if LONGSIZE == 4 + LONG_S \val, (\offset + 8 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 9 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 10 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 11 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 12 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 13 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 14 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 15 * LONGSIZE)(\dst) +#endif + .endm + +/* + * mips_init_icache(uint PRId, ulong icache_size, unchar icache_linesz) + */ +LEAF(mips_init_icache) + blez a1, 9f + mtc0 zero, CP0_TAGLO + /* clear tag to invalidate */ + PTR_LI t0, INDEX_BASE + PTR_ADDU t1, t0, a1 +1: cache_op INDEX_STORE_TAG_I t0 + PTR_ADDU t0, a2 + bne t0, t1, 1b + /* fill once, so data field parity is correct */ + PTR_LI t0, INDEX_BASE +2: cache_op FILL t0 + PTR_ADDU t0, a2 + bne t0, t1, 2b + /* invalidate again - prudent but not strictly neccessary */ + PTR_LI t0, INDEX_BASE +1: cache_op INDEX_STORE_TAG_I t0 + PTR_ADDU t0, a2 + bne t0, t1, 1b +9: jr ra + END(mips_init_icache) + +/* + * mips_init_dcache(uint PRId, ulong dcache_size, unchar dcache_linesz) + */ +LEAF(mips_init_dcache) + blez a1, 9f + mtc0 zero, CP0_TAGLO + /* clear all tags */ + PTR_LI t0, INDEX_BASE + PTR_ADDU t1, t0, a1 +1: cache_op INDEX_STORE_TAG_D t0 + PTR_ADDU t0, a2 + bne t0, t1, 1b + /* load from each line (in cached space) */ + PTR_LI t0, INDEX_BASE +2: LONG_L zero, 0(t0) + PTR_ADDU t0, a2 + bne t0, t1, 2b + /* clear all tags */ + PTR_LI t0, INDEX_BASE +1: cache_op INDEX_STORE_TAG_D t0 + PTR_ADDU t0, a2 + bne t0, t1, 1b +9: jr ra + END(mips_init_dcache) + +/* + * mips_cache_reset - low level initialisation of the primary caches + * + * This routine initialises the primary caches to ensure that they have good + * parity. It must be called by the ROM before any cached locations are used + * to prevent the possibility of data with bad parity being written to memory. + * + * To initialise the instruction cache it is essential that a source of data + * with good parity is available. This routine will initialise an area of + * memory starting at location zero to be used as a source of parity. + * + * RETURNS: N/A + * + */ +NESTED(mips_cache_reset, 0, ra) + move RA, ra + li t2, CONFIG_SYS_ICACHE_SIZE + li t3, CONFIG_SYS_DCACHE_SIZE + li t8, CONFIG_SYS_CACHELINE_SIZE + + li v0, MIPS_MAX_CACHE_SIZE + + /* + * Now clear that much memory starting from zero. + */ + PTR_LI a0, CKSEG1 + PTR_ADDU a1, a0, v0 +2: PTR_ADDIU a0, 64 + f_fill64 a0, -64, zero + bne a0, a1, 2b + + /* + * The caches are probably in an indeterminate state, + * so we force good parity into them by doing an + * invalidate, load/fill, invalidate for each line. + */ + + /* + * Assume bottom of RAM will generate good parity for the cache. + */ + + /* + * Initialize the I-cache first, + */ + move a1, t2 + move a2, t8 + PTR_LA v1, mips_init_icache + jalr v1 + + /* + * then initialize D-cache. + */ + move a1, t3 + move a2, t8 + PTR_LA v1, mips_init_dcache + jalr v1 + + jr RA + END(mips_cache_reset) + +/* + * dcache_status - get cache status + * + * RETURNS: 0 - cache disabled; 1 - cache enabled + * + */ +LEAF(dcache_status) + mfc0 t0, CP0_CONFIG + li t1, CONF_CM_UNCACHED + andi t0, t0, CONF_CM_CMASK + move v0, zero + beq t0, t1, 2f + li v0, 1 +2: jr ra + END(dcache_status) + +/* + * dcache_disable - disable cache + * + * RETURNS: N/A + * + */ +LEAF(dcache_disable) + mfc0 t0, CP0_CONFIG + li t1, -8 + and t0, t0, t1 + ori t0, t0, CONF_CM_UNCACHED + mtc0 t0, CP0_CONFIG + jr ra + END(dcache_disable) + +/* + * dcache_enable - enable cache + * + * RETURNS: N/A + * + */ +LEAF(dcache_enable) + mfc0 t0, CP0_CONFIG + ori t0, CONF_CM_CMASK + xori t0, CONF_CM_CMASK + ori t0, CONF_CM_CACHABLE_NONCOHERENT + mtc0 t0, CP0_CONFIG + jr ra + END(dcache_enable) diff --git a/board/bmw/config.mk b/arch/mips/cpu/mips64/config.mk index a1a44e5811..ebc1ceb83b 100644 --- a/board/bmw/config.mk +++ b/arch/mips/cpu/mips64/config.mk @@ -1,6 +1,6 @@ # -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, <wd@denx.de> # # See file CREDITS for list of people who contributed to this # project. @@ -22,9 +22,19 @@ # # -# BMW board +# Default optimization level for MIPS64 # +# Note: Toolchains with binutils prior to v2.16 +# are no longer supported by U-Boot MIPS tree! +# +MIPSFLAGS = -march=mips64 + +PLATFORM_CPPFLAGS += $(MIPSFLAGS) +PLATFORM_CPPFLAGS += -mabi=64 -DCONFIG_64BIT +ifdef CONFIG_SYS_BIG_ENDIAN +PLATFORM_LDFLAGS += -m elf64btsmip +else +PLATFORM_LDFLAGS += -m elf64ltsmip +endif -# NOTE: The flags below affect how the BCM570x driver is compiled -PLATFORM_CPPFLAGS += -DEMBEDDED -DBIG_ENDIAN_HOST -DINCLUDE_5701_AX_FIX=1\ - -DDBG=0 -DT3_JUMBO_RCV_RCB_ENTRY_COUNT=256 +CONFIG_STANDALONE_LOAD_ADDR ?= 0xffffffff80200000 -T mips64.lds diff --git a/arch/mips/cpu/mips64/cpu.c b/arch/mips/cpu/mips64/cpu.c new file mode 100644 index 0000000000..2a38d0c8d0 --- /dev/null +++ b/arch/mips/cpu/mips64/cpu.c @@ -0,0 +1,111 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, <wd@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <netdev.h> +#include <asm/mipsregs.h> +#include <asm/cacheops.h> +#include <asm/reboot.h> + +#define cache_op(op, addr) \ + __asm__ __volatile__( \ + " .set push\n" \ + " .set noreorder\n" \ + " .set mips64\n" \ + " cache %0, %1\n" \ + " .set pop\n" \ + : \ + : "i" (op), "R" (*(unsigned char *)(addr))) + +void __attribute__((weak)) _machine_restart(void) +{ + fprintf(stderr, "*** reset failed ***\n"); + + while (1) + /* NOP */; +} + +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + _machine_restart(); + + return 0; +} + +void flush_cache(ulong start_addr, ulong size) +{ + unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE; + unsigned long addr = start_addr & ~(lsize - 1); + unsigned long aend = (start_addr + size - 1) & ~(lsize - 1); + + /* aend will be miscalculated when size is zero, so we return here */ + if (size == 0) + return; + + while (1) { + cache_op(HIT_WRITEBACK_INV_D, addr); + cache_op(HIT_INVALIDATE_I, addr); + if (addr == aend) + break; + addr += lsize; + } +} + +void flush_dcache_range(ulong start_addr, ulong stop) +{ + unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE; + unsigned long addr = start_addr & ~(lsize - 1); + unsigned long aend = (stop - 1) & ~(lsize - 1); + + while (1) { + cache_op(HIT_WRITEBACK_INV_D, addr); + if (addr == aend) + break; + addr += lsize; + } +} + +void invalidate_dcache_range(ulong start_addr, ulong stop) +{ + unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE; + unsigned long addr = start_addr & ~(lsize - 1); + unsigned long aend = (stop - 1) & ~(lsize - 1); + + while (1) { + cache_op(HIT_INVALIDATE_D, addr); + if (addr == aend) + break; + addr += lsize; + } +} + +void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1) +{ + write_c0_entrylo0(low0); + write_c0_pagemask(pagemask); + write_c0_entrylo1(low1); + write_c0_entryhi(hi); + write_c0_index(index); + tlb_write_indexed(); +} diff --git a/arch/mips/cpu/mips64/interrupts.c b/arch/mips/cpu/mips64/interrupts.c new file mode 100644 index 0000000000..e4e9aae0ca --- /dev/null +++ b/arch/mips/cpu/mips64/interrupts.c @@ -0,0 +1,34 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, <wd@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/mipsregs.h> + +void enable_interrupts(void) +{ +} + +int disable_interrupts(void) +{ + return 0; +} diff --git a/arch/mips/cpu/mips64/start.S b/arch/mips/cpu/mips64/start.S new file mode 100644 index 0000000000..4112de7026 --- /dev/null +++ b/arch/mips/cpu/mips64/start.S @@ -0,0 +1,256 @@ +/* + * Startup Code for MIPS64 CPU-core + * + * Copyright (c) 2003 Wolfgang Denk <wd@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any dlater version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICUdlaR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Pdlace, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <asm-offsets.h> +#include <config.h> +#include <asm/regdef.h> +#include <asm/mipsregs.h> + +#ifndef CONFIG_SYS_MIPS_CACHE_MODE +#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT +#endif + + /* + * For the moment disable interrupts, mark the kernel mode and + * set ST0_KX so that the CPU does not spit fire when using + * 64-bit addresses. + */ + .macro setup_c0_status set clr + .set push + mfc0 t0, CP0_STATUS + or t0, ST0_CU0 | \set | 0x1f | \clr + xor t0, 0x1f | \clr + mtc0 t0, CP0_STATUS + .set noreorder + sll zero, 3 # ehb + .set pop + .endm + + .set noreorder + + .globl _start + .text +_start: + .org 0x000 + b reset + nop + .org 0x080 + b romReserved + nop + .org 0x100 + b romReserved + nop + .org 0x180 + b romReserved + nop + .org 0x200 + b romReserved + nop + .org 0x280 + b romReserved + nop + .org 0x300 + b romReserved + nop + .org 0x380 + b romReserved + nop + .org 0x480 + b romReserved + nop + + /* + * We hope there are no more reserved vectors! + * 128 * 8 == 1024 == 0x400 + * so this is address R_VEC+0x400 == 0xbfc00400 + */ + .org 0x500 + .align 4 +reset: + + /* Clear watch registers */ + dmtc0 zero, CP0_WATCHLO + dmtc0 zero, CP0_WATCHHI + + /* WP(Watch Pending), SW0/1 should be cleared */ + mtc0 zero, CP0_CAUSE + + setup_c0_status ST0_KX 0 + + /* Init Timer */ + mtc0 zero, CP0_COUNT + mtc0 zero, CP0_COMPARE + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT + /* CONFIG0 register */ + dli t0, CONF_CM_UNCACHED + mtc0 t0, CP0_CONFIG +#endif + + /* Initialize $gp */ + bal 1f + nop + .dword _gp +1: + ld gp, 0(ra) + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT + /* Initialize any external memory */ + dla t9, lowlevel_init + jalr t9 + nop + + /* Initialize caches... */ + dla t9, mips_cache_reset + jalr t9 + nop + + /* ... and enable them */ + dli t0, CONFIG_SYS_MIPS_CACHE_MODE + mtc0 t0, CP0_CONFIG +#endif + + /* Set up temporary stack */ + dli t0, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET + dla sp, 0(t0) + + dla t9, board_init_f + jr t9 + nop + +/* + * void relocate_code (addr_sp, gd, addr_moni) + * + * This "function" does not return, instead it continues in RAM + * after relocating the monitor code. + * + * a0 = addr_sp + * a1 = gd + * a2 = destination address + */ + .globl relocate_code + .ent relocate_code +relocate_code: + move sp, a0 # set new stack pointer + + dli t0, CONFIG_SYS_MONITOR_BASE + dla t3, in_ram + ld t2, -24(t3) # t2 <-- uboot_end_data + move t1, a2 + move s2, a2 # s2 <-- destination address + + /* + * Fix $gp: + * + * New $gp = (Old $gp - CONFIG_SYS_MONITOR_BASE) + Destination Address + */ + move t8, gp + dsub gp, CONFIG_SYS_MONITOR_BASE + dadd gp, a2 # gp now adjusted + dsub s1, gp, t8 # s1 <-- relocation offset + + /* + * t0 = source address + * t1 = target address + * t2 = source end address + */ + + /* + * Save destination address and size for dlater usage in flush_cache() + */ + move s0, a1 # save gd in s0 + move a0, t1 # a0 <-- destination addr + dsub a1, t2, t0 # a1 <-- size + +1: + lw t3, 0(t0) + sw t3, 0(t1) + daddu t0, 4 + ble t0, t2, 1b + daddu t1, 4 + + /* If caches were enabled, we would have to flush them here. */ + + /* a0 & a1 are already set up for flush_cache(start, size) */ + dla t9, flush_cache + jalr t9 + nop + + /* Jump to where we've relocated ourselves */ + daddi t0, s2, in_ram - _start + jr t0 + nop + + .dword _gp + .dword _GLOBAL_OFFSET_TABLE_ + .dword uboot_end_data + .dword uboot_end + .dword num_got_entries + +in_ram: + /* + * Now we want to update GOT. + * + * GOT[0] is reserved. GOT[1] is also reserved for the dynamic object + * generated by GNU ld. Skip these reserved entries from relocation. + */ + ld t3, -8(t0) # t3 <-- num_got_entries + ld t8, -32(t0) # t8 <-- _GLOBAL_OFFSET_TABLE_ + ld t9, -40(t0) # t9 <-- _gp + dsub t8, t9 # compute offset + dadd t8, t8, gp # t8 now holds relocated _G_O_T_ + daddi t8, t8, 16 # skipping first two entries + dli t2, 2 +1: + ld t1, 0(t8) + beqz t1, 2f + dadd t1, s1 + sd t1, 0(t8) +2: + daddi t2, 1 + blt t2, t3, 1b + daddi t8, 8 + + /* Clear BSS */ + ld t1, -24(t0) # t1 <-- uboot_end_data + ld t2, -16(t0) # t2 <-- uboot_end + dadd t1, s1 # adjust pointers + dadd t2, s1 + + dsub t1, 8 +1: + daddi t1, 8 + bltl t1, t2, 1b + sd zero, 0(t1) + + move a0, s0 # a0 <-- gd + dla t9, board_init_r + jr t9 + move a1, s2 + + .end relocate_code + + /* Exception handlers */ +romReserved: + b romReserved diff --git a/arch/mips/cpu/mips64/time.c b/arch/mips/cpu/mips64/time.c new file mode 100644 index 0000000000..51542808dd --- /dev/null +++ b/arch/mips/cpu/mips64/time.c @@ -0,0 +1,87 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/mipsregs.h> + +static unsigned long timestamp; + +/* how many counter cycles in a jiffy */ +#define CYCLES_PER_JIFFY \ + (CONFIG_SYS_MIPS_TIMER_FREQ + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ + +/* + * timer without interrupts + */ + +int timer_init(void) +{ + /* Set up the timer for the first expiration. */ + timestamp = 0; + write_c0_compare(read_c0_count() + CYCLES_PER_JIFFY); + + return 0; +} + +ulong get_timer(ulong base) +{ + unsigned int count; + unsigned int expirelo = read_c0_compare(); + + /* Check to see if we have missed any timestamps. */ + count = read_c0_count(); + while ((count - expirelo) < 0x7fffffff) { + expirelo += CYCLES_PER_JIFFY; + timestamp++; + } + write_c0_compare(expirelo); + + return timestamp - base; +} + +void __udelay(unsigned long usec) +{ + unsigned int tmo; + + tmo = read_c0_count() + (usec * (CONFIG_SYS_MIPS_TIMER_FREQ / 1000000)); + while ((tmo - read_c0_count()) < 0x7fffffff) + /*NOP*/; +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On MIPS it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On MIPS it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + return CONFIG_SYS_HZ; +} diff --git a/arch/mips/cpu/xburst/cpu.c b/arch/mips/cpu/xburst/cpu.c index ddcbfaa47c..cc190dfe56 100644 --- a/arch/mips/cpu/xburst/cpu.c +++ b/arch/mips/cpu/xburst/cpu.c @@ -84,8 +84,8 @@ void flush_cache(ulong start_addr, ulong size) unsigned long aend = (start_addr + size - 1) & ~(lsize - 1); for (; addr <= aend; addr += lsize) { - cache_op(Hit_Writeback_Inv_D, addr); - cache_op(Hit_Invalidate_I, addr); + cache_op(HIT_WRITEBACK_INV_D, addr); + cache_op(HIT_INVALIDATE_I, addr); } } @@ -96,7 +96,7 @@ void flush_dcache_range(ulong start_addr, ulong stop) unsigned long aend = (stop - 1) & ~(lsize - 1); for (; addr <= aend; addr += lsize) - cache_op(Hit_Writeback_Inv_D, addr); + cache_op(HIT_WRITEBACK_INV_D, addr); } void invalidate_dcache_range(ulong start_addr, ulong stop) @@ -106,7 +106,7 @@ void invalidate_dcache_range(ulong start_addr, ulong stop) unsigned long aend = (stop - 1) & ~(lsize - 1); for (; addr <= aend; addr += lsize) - cache_op(Hit_Invalidate_D, addr); + cache_op(HIT_INVALIDATE_D, addr); } void flush_icache_all(void) @@ -118,7 +118,7 @@ void flush_icache_all(void) for (addr = CKSEG0; addr < CKSEG0 + CONFIG_SYS_ICACHE_SIZE; addr += CONFIG_SYS_CACHELINE_SIZE) { - cache_op(Index_Store_Tag_I, addr); + cache_op(INDEX_STORE_TAG_I, addr); } /* invalidate btb */ @@ -139,7 +139,7 @@ void flush_dcache_all(void) for (addr = CKSEG0; addr < CKSEG0 + CONFIG_SYS_DCACHE_SIZE; addr += CONFIG_SYS_CACHELINE_SIZE) { - cache_op(Index_Writeback_Inv_D, addr); + cache_op(INDEX_WRITEBACK_INV_D, addr); } __asm__ __volatile__("sync"); diff --git a/arch/mips/cpu/xburst/jz_serial.c b/arch/mips/cpu/xburst/jz_serial.c index 3199007757..a147657350 100644 --- a/arch/mips/cpu/xburst/jz_serial.c +++ b/arch/mips/cpu/xburst/jz_serial.c @@ -109,19 +109,13 @@ static int jz_serial_getc(void) return readb(&uart->rbr_thr_dllr); } -static void jz_serial_puts(const char *s) -{ - while (*s) - serial_putc(*s++); -} - static struct serial_device jz_serial_drv = { .name = "jz_serial", .start = jz_serial_init, .stop = NULL, .setbrg = jz_serial_setbrg, .putc = jz_serial_putc, - .puts = jz_serial_puts, + .puts = default_serial_puts, .getc = jz_serial_getc, .tstc = jz_serial_tstc, }; diff --git a/arch/mips/cpu/xburst/start.S b/arch/mips/cpu/xburst/start.S index d846104d10..3a8280cb0a 100644 --- a/arch/mips/cpu/xburst/start.S +++ b/arch/mips/cpu/xburst/start.S @@ -96,7 +96,7 @@ relocate_code: li t0, KSEG0 addi t1, t0, CONFIG_SYS_DCACHE_SIZE 2: - cache Index_Writeback_Inv_D, 0(t0) + cache INDEX_WRITEBACK_INV_D, 0(t0) bne t0, t1, 2b addi t0, CONFIG_SYS_CACHELINE_SIZE @@ -106,7 +106,7 @@ relocate_code: li t0, KSEG0 addi t1, t0, CONFIG_SYS_ICACHE_SIZE 3: - cache Index_Invalidate_I, 0(t0) + cache INDEX_INVALIDATE_I, 0(t0) bne t0, t1, 3b addi t0, CONFIG_SYS_CACHELINE_SIZE diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h index 3a1e6d615f..b768bb5081 100644 --- a/arch/mips/include/asm/addrspace.h +++ b/arch/mips/include/asm/addrspace.h @@ -136,7 +136,7 @@ cannot access physical memory directly from core */ #define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000) #else /* !CONFIG_SOC_AU1X00 */ -#define UNCACHED_SDRAM(a) KSEG1ADDR(a) +#define UNCACHED_SDRAM(a) CKSEG1ADDR(a) #endif /* CONFIG_SOC_AU1X00 */ #endif /* __ASSEMBLY__ */ diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h index 608cfcfbb3..933ccb1b78 100644 --- a/arch/mips/include/asm/asm.h +++ b/arch/mips/include/asm/asm.h @@ -401,7 +401,7 @@ symbol = value #ifdef CONFIG_SGI_IP28 /* Inhibit speculative stores to volatile (e.g.DMA) or invalid addresses. */ #include <asm/cacheops.h> -#define R10KCBARRIER(addr) cache Cache_Barrier, addr; +#define R10KCBARRIER(addr) cache CACHE_BARRIER, addr; #else #define R10KCBARRIER(addr) #endif diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h index 70bcad7694..6464250d84 100644 --- a/arch/mips/include/asm/cacheops.h +++ b/arch/mips/include/asm/cacheops.h @@ -14,54 +14,54 @@ /* * Cache Operations available on all MIPS processors with R4000-style caches */ -#define Index_Invalidate_I 0x00 -#define Index_Writeback_Inv_D 0x01 -#define Index_Load_Tag_I 0x04 -#define Index_Load_Tag_D 0x05 -#define Index_Store_Tag_I 0x08 -#define Index_Store_Tag_D 0x09 +#define INDEX_INVALIDATE_I 0x00 +#define INDEX_WRITEBACK_INV_D 0x01 +#define INDEX_LOAD_TAG_I 0x04 +#define INDEX_LOAD_TAG_D 0x05 +#define INDEX_STORE_TAG_I 0x08 +#define INDEX_STORE_TAG_D 0x09 #if defined(CONFIG_CPU_LOONGSON2) -#define Hit_Invalidate_I 0x00 +#define HIT_INVALIDATE_I 0x00 #else -#define Hit_Invalidate_I 0x10 +#define HIT_INVALIDATE_I 0x10 #endif -#define Hit_Invalidate_D 0x11 -#define Hit_Writeback_Inv_D 0x15 +#define HIT_INVALIDATE_D 0x11 +#define HIT_WRITEBACK_INV_D 0x15 /* * R4000-specific cacheops */ -#define Create_Dirty_Excl_D 0x0d -#define Fill 0x14 -#define Hit_Writeback_I 0x18 -#define Hit_Writeback_D 0x19 +#define CREATE_DIRTY_EXCL_D 0x0d +#define FILL 0x14 +#define HIT_WRITEBACK_I 0x18 +#define HIT_WRITEBACK_D 0x19 /* * R4000SC and R4400SC-specific cacheops */ -#define Index_Invalidate_SI 0x02 -#define Index_Writeback_Inv_SD 0x03 -#define Index_Load_Tag_SI 0x06 -#define Index_Load_Tag_SD 0x07 -#define Index_Store_Tag_SI 0x0A -#define Index_Store_Tag_SD 0x0B -#define Create_Dirty_Excl_SD 0x0f -#define Hit_Invalidate_SI 0x12 -#define Hit_Invalidate_SD 0x13 -#define Hit_Writeback_Inv_SD 0x17 -#define Hit_Writeback_SD 0x1b -#define Hit_Set_Virtual_SI 0x1e -#define Hit_Set_Virtual_SD 0x1f +#define INDEX_INVALIDATE_SI 0x02 +#define INDEX_WRITEBACK_INV_SD 0x03 +#define INDEX_LOAD_TAG_SI 0x06 +#define INDEX_LOAD_TAG_SD 0x07 +#define INDEX_STORE_TAG_SI 0x0A +#define INDEX_STORE_TAG_SD 0x0B +#define CREATE_DIRTY_EXCL_SD 0x0f +#define HIT_INVALIDATE_SI 0x12 +#define HIT_INVALIDATE_SD 0x13 +#define HIT_WRITEBACK_INV_SD 0x17 +#define HIT_WRITEBACK_SD 0x1b +#define HIT_SET_VIRTUAL_SI 0x1e +#define HIT_SET_VIRTUAL_SD 0x1f /* * R5000-specific cacheops */ -#define R5K_Page_Invalidate_S 0x17 +#define R5K_PAGE_INVALIDATE_S 0x17 /* * RM7000-specific cacheops */ -#define Page_Invalidate_T 0x16 +#define PAGE_INVALIDATE_T 0x16 /* * R10000-specific cacheops @@ -69,17 +69,17 @@ * Cacheops 0x02, 0x06, 0x0a, 0x0c-0x0e, 0x16, 0x1a and 0x1e are unused. * Most of the _S cacheops are identical to the R4000SC _SD cacheops. */ -#define Index_Writeback_Inv_S 0x03 -#define Index_Load_Tag_S 0x07 -#define Index_Store_Tag_S 0x0B -#define Hit_Invalidate_S 0x13 -#define Cache_Barrier 0x14 -#define Hit_Writeback_Inv_S 0x17 -#define Index_Load_Data_I 0x18 -#define Index_Load_Data_D 0x19 -#define Index_Load_Data_S 0x1b -#define Index_Store_Data_I 0x1c -#define Index_Store_Data_D 0x1d -#define Index_Store_Data_S 0x1f +#define INDEX_WRITEBACK_INV_S 0x03 +#define INDEX_LOAD_TAG_S 0x07 +#define INDEX_STORE_TAG_S 0x0B +#define HIT_INVALIDATE_S 0x13 +#define CACHE_BARRIER 0x14 +#define HIT_WRITEBACK_INV_S 0x17 +#define INDEX_LOAD_DATA_I 0x18 +#define INDEX_LOAD_DATA_D 0x19 +#define INDEX_LOAD_DATA_S 0x1b +#define INDEX_STORE_DATA_I 0x1c +#define INDEX_STORE_DATA_D 0x1d +#define INDEX_STORE_DATA_S 0x1f #endif /* __ASM_CACHEOPS_H */ diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h index 6e2cdc72cf..a735a8a2c7 100644 --- a/arch/mips/include/asm/global_data.h +++ b/arch/mips/include/asm/global_data.h @@ -48,7 +48,7 @@ typedef struct global_data { unsigned long tbl; unsigned long lastinc; #endif - unsigned long baudrate; + unsigned int baudrate; unsigned long have_console; /* serial_init() was called */ #ifdef CONFIG_PRE_CONSOLE_BUFFER unsigned long precon_buf_idx; /* Pre-Console buffer index */ diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 025012ae60..80eab75e15 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -120,12 +120,20 @@ static inline void set_io_port_base(unsigned long base) */ extern inline phys_addr_t virt_to_phys(volatile void * address) { +#ifndef CONFIG_64BIT return CPHYSADDR(address); +#else + return XPHYSADDR(address); +#endif } extern inline void * phys_to_virt(unsigned long address) { +#ifndef CONFIG_64BIT return (void *)KSEG0ADDR(address); +#else + return (void *)CKSEG0ADDR(address); +#endif } /* @@ -133,12 +141,20 @@ extern inline void * phys_to_virt(unsigned long address) */ extern inline unsigned long virt_to_bus(volatile void * address) { +#ifndef CONFIG_64BIT return CPHYSADDR(address); +#else + return XPHYSADDR(address); +#endif } extern inline void * bus_to_virt(unsigned long address) { +#ifndef CONFIG_64BIT return (void *)KSEG0ADDR(address); +#else + return (void *)CKSEG0ADDR(address); +#endif } /* diff --git a/arch/mips/include/asm/posix_types.h b/arch/mips/include/asm/posix_types.h index 879aae210b..4deac5207a 100644 --- a/arch/mips/include/asm/posix_types.h +++ b/arch/mips/include/asm/posix_types.h @@ -24,9 +24,15 @@ typedef int __kernel_pid_t; typedef int __kernel_ipc_pid_t; typedef int __kernel_uid_t; typedef int __kernel_gid_t; +#if _MIPS_SZLONG != 64 typedef unsigned int __kernel_size_t; typedef int __kernel_ssize_t; typedef int __kernel_ptrdiff_t; +#else +typedef unsigned long __kernel_size_t; +typedef long __kernel_ssize_t; +typedef long __kernel_ptrdiff_t; +#endif typedef long __kernel_time_t; typedef long __kernel_suseconds_t; typedef long __kernel_clock_t; diff --git a/arch/mips/include/asm/u-boot.h b/arch/mips/include/asm/u-boot.h index 590649aa3e..5fa4a6a730 100644 --- a/arch/mips/include/asm/u-boot.h +++ b/arch/mips/include/asm/u-boot.h @@ -32,7 +32,7 @@ #define _U_BOOT_H_ 1 typedef struct bd_info { - int bi_baudrate; /* serial console baudrate */ + unsigned int bi_baudrate; /* serial console baudrate */ unsigned long bi_arch_number; /* unique id for this board */ unsigned long bi_boot_params; /* where this board expects params */ unsigned long bi_memstart; /* start of DRAM memory */ diff --git a/arch/nds32/include/asm/global_data.h b/arch/nds32/include/asm/global_data.h index 94bd4c2722..b1feb2c0d0 100644 --- a/arch/nds32/include/asm/global_data.h +++ b/arch/nds32/include/asm/global_data.h @@ -44,7 +44,7 @@ typedef struct global_data { bd_t *bd; unsigned long flags; - unsigned long baudrate; + unsigned int baudrate; unsigned long have_console; /* serial_init() was called */ unsigned long reloc_off; /* Relocation Offset */ diff --git a/arch/nds32/include/asm/u-boot.h b/arch/nds32/include/asm/u-boot.h index b533fea7c5..7b8d8e48fb 100644 --- a/arch/nds32/include/asm/u-boot.h +++ b/arch/nds32/include/asm/u-boot.h @@ -39,7 +39,7 @@ #include <environment.h> typedef struct bd_info { - int bi_baudrate; /* serial console baudrate */ + unsigned int bi_baudrate; /* serial console baudrate */ unsigned long bi_arch_number; /* unique id for this board */ unsigned long bi_boot_params; /* where this board expects params */ unsigned long bi_memstart; /* start of DRAM memory */ diff --git a/arch/nds32/lib/board.c b/arch/nds32/lib/board.c index 89900fea43..875f22013c 100644 --- a/arch/nds32/lib/board.c +++ b/arch/nds32/lib/board.c @@ -396,7 +396,7 @@ void board_init_r(gd_t *id, ulong dest_addr) /* Initialize from environment */ load_addr = getenv_ulong("loadaddr", 16, load_addr); -#ifdef BOARD_LATE_INIT +#ifdef CONFIG_BOARD_LATE_INIT board_late_init(); #endif diff --git a/arch/nios2/include/asm/global_data.h b/arch/nios2/include/asm/global_data.h index 3b0d9e6294..413b485b61 100644 --- a/arch/nios2/include/asm/global_data.h +++ b/arch/nios2/include/asm/global_data.h @@ -26,7 +26,7 @@ typedef struct global_data { bd_t *bd; unsigned long flags; - unsigned long baudrate; + unsigned int baudrate; unsigned long cpu_clk; /* CPU clock in Hz! */ unsigned long have_console; /* serial_init() was called */ #ifdef CONFIG_PRE_CONSOLE_BUFFER diff --git a/arch/nios2/include/asm/u-boot.h b/arch/nios2/include/asm/u-boot.h index 315ef8bedb..e591237634 100644 --- a/arch/nios2/include/asm/u-boot.h +++ b/arch/nios2/include/asm/u-boot.h @@ -39,7 +39,7 @@ typedef struct bd_info { unsigned long bi_flashoffset; /* reserved area for startup monitor */ unsigned long bi_sramstart; /* start of SRAM memory */ unsigned long bi_sramsize; /* size of SRAM memory */ - unsigned long bi_baudrate; /* Console Baudrate */ + unsigned int bi_baudrate; /* Console Baudrate */ } bd_t; /* For image.h:image_check_target_arch() */ diff --git a/arch/openrisc/include/asm/global_data.h b/arch/openrisc/include/asm/global_data.h index 6a0c0cc547..96f3f1cdbb 100644 --- a/arch/openrisc/include/asm/global_data.h +++ b/arch/openrisc/include/asm/global_data.h @@ -35,7 +35,7 @@ typedef struct global_data { bd_t *bd; unsigned long flags; - unsigned long baudrate; + unsigned int baudrate; unsigned long cpu_clk; /* CPU clock in Hz! */ unsigned long have_console; /* serial_init() was called */ phys_size_t ram_size; /* RAM size */ diff --git a/arch/openrisc/include/asm/u-boot.h b/arch/openrisc/include/asm/u-boot.h index 76b813273f..f2f31d3bb4 100644 --- a/arch/openrisc/include/asm/u-boot.h +++ b/arch/openrisc/include/asm/u-boot.h @@ -32,7 +32,7 @@ #define _U_BOOT_H_ typedef struct bd_info { - unsigned long bi_baudrate; /* serial console baudrate */ + unsigned int bi_baudrate; /* serial console baudrate */ unsigned long bi_arch_number; /* unique id for this board */ unsigned long bi_boot_params; /* where this board expects params */ unsigned long bi_memstart; /* start of DRAM memory */ diff --git a/arch/powerpc/cpu/mpc5xx/serial.c b/arch/powerpc/cpu/mpc5xx/serial.c index 6ef8be8fac..732856a5c5 100644 --- a/arch/powerpc/cpu/mpc5xx/serial.c +++ b/arch/powerpc/cpu/mpc5xx/serial.c @@ -161,21 +161,13 @@ static void mpc5xx_serial_setbrg(void) #endif } -static void mpc5xx_serial_puts(const char *s) -{ - while (*s) { - serial_putc(*s); - ++s; - } -} - static struct serial_device mpc5xx_serial_drv = { .name = "mpc5xx_serial", .start = mpc5xx_serial_init, .stop = NULL, .setbrg = mpc5xx_serial_setbrg, .putc = mpc5xx_serial_putc, - .puts = mpc5xx_serial_puts, + .puts = default_serial_puts, .getc = mpc5xx_serial_getc, .tstc = mpc5xx_serial_tstc, }; diff --git a/arch/powerpc/cpu/mpc8220/uart.c b/arch/powerpc/cpu/mpc8220/uart.c index 25d4472ea0..772528f82c 100644 --- a/arch/powerpc/cpu/mpc8220/uart.c +++ b/arch/powerpc/cpu/mpc8220/uart.c @@ -84,13 +84,6 @@ static void mpc8220_serial_putc(const char c) psc->xmitbuf[0] = c; } -static void mpc8220_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static int mpc8220_serial_getc(void) { volatile psc8220_t *psc = (psc8220_t *) PSC_BASE; @@ -132,7 +125,7 @@ static struct serial_device mpc8220_serial_drv = { .stop = NULL, .setbrg = mpc8220_serial_setbrg, .putc = mpc8220_serial_putc, - .puts = mpc8220_serial_puts, + .puts = default_serial_puts, .getc = mpc8220_serial_getc, .tstc = mpc8220_serial_tstc, }; diff --git a/arch/powerpc/cpu/mpc824x/cpu_init.c b/arch/powerpc/cpu/mpc824x/cpu_init.c index 395f7767d1..cfc665d95c 100644 --- a/arch/powerpc/cpu/mpc824x/cpu_init.c +++ b/arch/powerpc/cpu/mpc824x/cpu_init.c @@ -63,7 +63,7 @@ void cpu_init_f (void) { /* MOUSSE board is initialized in asm */ -#if !defined(CONFIG_MOUSSE) && !defined(CONFIG_BMW) +#if !defined(CONFIG_MOUSSE) register unsigned long val; CONFIG_WRITE_HALFWORD(PCICR, 0x06); /* Bus Master, respond to PCI memory space acesses*/ /* CONFIG_WRITE_HALFWORD(PCISR, 0xffff); */ /*reset PCISR*/ @@ -321,7 +321,7 @@ cpu_init_f (void) CONFIG_WRITE_WORD(MCCR1, val | MCCR1_MEMGO); /* set memory access going */ __asm__ __volatile__("eieio"); -#endif /* !CONFIG_MOUSSE && !CONFIG_BMW */ +#endif /* !CONFIG_MOUSSE */ } diff --git a/arch/powerpc/cpu/mpc824x/start.S b/arch/powerpc/cpu/mpc824x/start.S index 70db73e156..076df70a9f 100644 --- a/arch/powerpc/cpu/mpc824x/start.S +++ b/arch/powerpc/cpu/mpc824x/start.S @@ -113,9 +113,6 @@ _start: in_flash: -#if defined(CONFIG_BMW) - bl early_init_f /* Must be ASM: no stack yet! */ -#endif /* * Setup BATs - cannot be done in C since we don't have a stack yet */ @@ -126,7 +123,7 @@ in_flash: mfmsr r3 ori r3, r3, (MSR_IR | MSR_DR) mtmsr r3 -#if !defined(CONFIG_BMW) + /* Enable and invalidate data cache. */ mfspr r3, HID0 @@ -158,7 +155,7 @@ in_flash: ori r3, r3, 0x0080 sync mtspr 1011, r3 -#endif /* !CONFIG_BMW */ + /* * Thisk the stack pointer *somewhere* sensible. Doesnt * matter much where as we'll move it when we relocate @@ -498,7 +495,6 @@ relocate_code: bdnz 3b 4: -#if !defined(CONFIG_BMW) /* Unlock the data cache and invalidate locked area */ xor r0, r0, r0 mtspr 1011, r0 @@ -510,7 +506,6 @@ relocate_code: dcbi r0, r4 addi r4, r4, 32 bdnz 41b -#endif /* * Now flush the cache: note that we must start from a cache aligned diff --git a/arch/powerpc/cpu/mpc8260/serial_scc.c b/arch/powerpc/cpu/mpc8260/serial_scc.c index ab7755824a..ab2a2b29cb 100644 --- a/arch/powerpc/cpu/mpc8260/serial_scc.c +++ b/arch/powerpc/cpu/mpc8260/serial_scc.c @@ -217,13 +217,6 @@ static void mpc8260_scc_serial_putc(const char c) tbdf->cbd_sc |= BD_SC_READY; } -static void mpc8260_scc_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static int mpc8260_scc_serial_getc(void) { volatile cbd_t *rbdf; @@ -267,7 +260,7 @@ static struct serial_device mpc8260_scc_serial_drv = { .stop = NULL, .setbrg = mpc8260_scc_serial_setbrg, .putc = mpc8260_scc_serial_putc, - .puts = mpc8260_scc_serial_puts, + .puts = default_serial_puts, .getc = mpc8260_scc_serial_getc, .tstc = mpc8260_scc_serial_tstc, }; diff --git a/arch/powerpc/cpu/mpc8260/serial_smc.c b/arch/powerpc/cpu/mpc8260/serial_smc.c index 7edde9a492..feba1f63d2 100644 --- a/arch/powerpc/cpu/mpc8260/serial_smc.c +++ b/arch/powerpc/cpu/mpc8260/serial_smc.c @@ -216,13 +216,6 @@ static void mpc8260_smc_serial_putc(const char c) rtx->txbd.cbd_sc |= BD_SC_READY; } -static void mpc8260_smc_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static int mpc8260_smc_serial_getc(void) { volatile smc_uart_t *up; @@ -270,7 +263,7 @@ static struct serial_device mpc8260_smc_serial_drv = { .stop = NULL, .setbrg = mpc8260_smc_serial_setbrg, .putc = mpc8260_smc_serial_putc, - .puts = mpc8260_smc_serial_puts, + .puts = default_serial_puts, .getc = mpc8260_smc_serial_getc, .tstc = mpc8260_smc_serial_tstc, }; diff --git a/arch/powerpc/cpu/mpc85xx/serial_scc.c b/arch/powerpc/cpu/mpc85xx/serial_scc.c index fe9af55c7a..6345362d88 100644 --- a/arch/powerpc/cpu/mpc85xx/serial_scc.c +++ b/arch/powerpc/cpu/mpc85xx/serial_scc.c @@ -220,13 +220,6 @@ static void mpc85xx_serial_putc(const char c) tbdf->cbd_sc |= BD_SC_READY; } -static void mpc85xx_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static int mpc85xx_serial_getc(void) { volatile cbd_t *rbdf; @@ -268,7 +261,7 @@ static struct serial_device mpc85xx_serial_drv = { .stop = NULL, .setbrg = mpc85xx_serial_setbrg, .putc = mpc85xx_serial_putc, - .puts = mpc85xx_serial_puts, + .puts = default_serial_puts, .getc = mpc85xx_serial_getc, .tstc = mpc85xx_serial_tstc, }; diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index 5a5877fc2c..374fc6d5ab 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -38,7 +38,7 @@ typedef struct global_data { bd_t *bd; unsigned long flags; - unsigned long baudrate; + unsigned int baudrate; unsigned long cpu_clk; /* CPU clock in Hz! */ unsigned long bus_clk; #if defined(CONFIG_8xx) diff --git a/arch/powerpc/include/asm/u-boot.h b/arch/powerpc/include/asm/u-boot.h index b2fa2b574b..7229a98eaa 100644 --- a/arch/powerpc/include/asm/u-boot.h +++ b/arch/powerpc/include/asm/u-boot.h @@ -81,7 +81,7 @@ typedef struct bd_info { unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */ unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ #endif - unsigned long bi_baudrate; /* Console Baudrate */ + unsigned int bi_baudrate; /* Console Baudrate */ #if defined(CONFIG_405) || \ defined(CONFIG_405GP) || \ defined(CONFIG_405CR) || \ diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 965f9ea4a5..808021c42e 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -50,6 +50,7 @@ COBJS-y += cache.o COBJS-y += extable.o COBJS-y += interrupts.o COBJS-$(CONFIG_CMD_KGDB) += kgdb.o +COBJS-${CONFIG_CMD_IDE} += ide.o COBJS-y += time.o # Workaround for local bus unaligned access problems diff --git a/arch/powerpc/lib/ide.c b/arch/powerpc/lib/ide.c new file mode 100644 index 0000000000..139a94a5c1 --- /dev/null +++ b/arch/powerpc/lib/ide.c @@ -0,0 +1,201 @@ +/* + * (C) Copyright 2000-2011 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +/* Code taken from cmd_ide.c */ +#include <common.h> +#include <ata.h> +#include "ide.h" + +#ifdef CONFIG_IDE_8xx_DIRECT +#include <mpc8xx.h> +#include <pcmcia.h> +DECLARE_GLOBAL_DATA_PTR; + +/* Timings for IDE Interface + * + * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk + * 70 165 30 PIO-Mode 0, [ns] + * 4 9 2 [Cycles] + * 50 125 20 PIO-Mode 1, [ns] + * 3 7 2 [Cycles] + * 30 100 15 PIO-Mode 2, [ns] + * 2 6 1 [Cycles] + * 30 80 10 PIO-Mode 3, [ns] + * 2 5 1 [Cycles] + * 25 70 10 PIO-Mode 4, [ns] + * 2 4 1 [Cycles] + */ + +static const pio_config_t pio_config_ns[IDE_MAX_PIO_MODE+1] = { + /* Setup Length Hold */ + { 70, 165, 30 }, /* PIO-Mode 0, [ns] */ + { 50, 125, 20 }, /* PIO-Mode 1, [ns] */ + { 30, 101, 15 }, /* PIO-Mode 2, [ns] */ + { 30, 80, 10 }, /* PIO-Mode 3, [ns] */ + { 25, 70, 10 }, /* PIO-Mode 4, [ns] */ +}; + +static pio_config_t pio_config_clk[IDE_MAX_PIO_MODE+1]; + +#ifndef CONFIG_SYS_PIO_MODE +#define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */ +#endif +static int pio_mode = CONFIG_SYS_PIO_MODE; + +/* Make clock cycles and always round up */ + +#define PCMCIA_MK_CLKS(t, T) (((t) * (T) + 999U) / 1000U) + +static void set_pcmcia_timing(int pmode) +{ + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; + volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia); + ulong timings; + + debug("Set timing for PIO Mode %d\n", pmode); + + timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold) + | PCMCIA_SST(pio_config_clk[pmode].t_setup) + | PCMCIA_SL(pio_config_clk[pmode].t_length); + + /* + * IDE 0 + */ + pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0; +#if (CONFIG_SYS_PCMCIA_POR0 != 0) + pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0 | timings; +#else + pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0; +#endif + debug("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0); + + pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1; +#if (CONFIG_SYS_PCMCIA_POR1 != 0) + pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1 | timings; +#else + pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1; +#endif + debug("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1); + + pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2; +#if (CONFIG_SYS_PCMCIA_POR2 != 0) + pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2 | timings; +#else + pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2; +#endif + debug("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2); + + pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3; +#if (CONFIG_SYS_PCMCIA_POR3 != 0) + pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3 | timings; +#else + pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3; +#endif + debug("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3); + + /* + * IDE 1 + */ + pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4; +#if (CONFIG_SYS_PCMCIA_POR4 != 0) + pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4 | timings; +#else + pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4; +#endif + debug("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4); + + pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5; +#if (CONFIG_SYS_PCMCIA_POR5 != 0) + pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5 | timings; +#else + pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5; +#endif + debug("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5); + + pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6; +#if (CONFIG_SYS_PCMCIA_POR6 != 0) + pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6 | timings; +#else + pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6; +#endif + debug("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6); + + pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7; +#if (CONFIG_SYS_PCMCIA_POR7 != 0) + pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7 | timings; +#else + pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7; +#endif + debug("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7); + +} + +int ide_preinit(void) +{ + int i; + /* Initialize PIO timing tables */ + for (i = 0; i <= IDE_MAX_PIO_MODE; ++i) { + pio_config_clk[i].t_setup = + PCMCIA_MK_CLKS(pio_config_ns[i].t_setup, gd->bus_clk); + pio_config_clk[i].t_length = + PCMCIA_MK_CLKS(pio_config_ns[i].t_length, gd->bus_clk); + pio_config_clk[i].t_hold = + PCMCIA_MK_CLKS(pio_config_ns[i].t_hold, gd->bus_clk); + debug("PIO Mode %d: setup=%2d ns/%d clk" " len=%3d ns/%d clk" + " hold=%2d ns/%d clk\n", i, pio_config_ns[i].t_setup, + pio_config_clk[i].t_setup, pio_config_ns[i].t_length, + pio_config_clk[i].t_length, pio_config_ns[i].t_hold, + pio_config_clk[i].t_hold); + } + + return 0; +} + +int ide_init_postreset(void) +{ + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; + volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia); + + /* PCMCIA / IDE initialization for common mem space */ + pcmp->pcmc_pgcrb = 0; + + /* start in PIO mode 0 - most relaxed timings */ + pio_mode = 0; + set_pcmcia_timing(pio_mode); + return 0; +} +#endif /* CONFIG_IDE_8xx_DIRECT */ + +#ifdef CONFIG_IDE_8xx_PCCARD +int ide_preinit(void) +{ + ide_devices_found = 0; + /* initialize the PCMCIA IDE adapter card */ + pcmcia_on(); + if (!ide_devices_found) + return 1; + udelay(1000000);/* 1 s */ + return 0; +} +#endif diff --git a/arch/powerpc/lib/ide.h b/arch/powerpc/lib/ide.h new file mode 100644 index 0000000000..9e80702916 --- /dev/null +++ b/arch/powerpc/lib/ide.h @@ -0,0 +1,31 @@ +/* + * (C) Copyright 2012 + * Pavel Herrmann <morpheus.ibis@gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _MPC8XX_IDE_H_ +#define _MPC8XX_IDE_H_ 1 + +#ifdef CONFIG_IDE_8xx_PCCARD +int pcmcia_on(void); +extern int ide_devices_found; +#endif +#endif diff --git a/arch/sandbox/include/asm/global_data.h b/arch/sandbox/include/asm/global_data.h index 581fd2f2a0..78a751d96f 100644 --- a/arch/sandbox/include/asm/global_data.h +++ b/arch/sandbox/include/asm/global_data.h @@ -36,7 +36,7 @@ typedef struct global_data { bd_t *bd; unsigned long flags; - unsigned long baudrate; + unsigned int baudrate; unsigned long have_console; /* serial_init() was called */ unsigned long env_addr; /* Address of Environment struct */ unsigned long env_valid; /* Checksum of Environment valid? */ diff --git a/arch/sh/include/asm/global_data.h b/arch/sh/include/asm/global_data.h index 6e534ad614..9a2c19376d 100644 --- a/arch/sh/include/asm/global_data.h +++ b/arch/sh/include/asm/global_data.h @@ -31,7 +31,7 @@ typedef struct global_data { bd_t *bd; unsigned long flags; - unsigned long baudrate; + unsigned int baudrate; unsigned long cpu_clk; /* CPU clock in Hz! */ unsigned long have_console; /* serial_init() was called */ #ifdef CONFIG_PRE_CONSOLE_BUFFER diff --git a/arch/sh/include/asm/u-boot.h b/arch/sh/include/asm/u-boot.h index 6c04daf3bc..2c9c4634d8 100644 --- a/arch/sh/include/asm/u-boot.h +++ b/arch/sh/include/asm/u-boot.h @@ -33,7 +33,7 @@ typedef struct bd_info { unsigned long bi_flashoffset; /* reserved area for startup monitor */ unsigned long bi_sramstart; /* start of SRAM memory */ unsigned long bi_sramsize; /* size of SRAM memory */ - unsigned long bi_baudrate; /* Console Baudrate */ + unsigned int bi_baudrate; /* Console Baudrate */ unsigned long bi_boot_params; /* where this board expects params */ } bd_t; diff --git a/arch/sparc/cpu/leon2/serial.c b/arch/sparc/cpu/leon2/serial.c index 16fffb621d..40d5b01d27 100644 --- a/arch/sparc/cpu/leon2/serial.c +++ b/arch/sparc/cpu/leon2/serial.c @@ -105,13 +105,6 @@ static void leon2_serial_putc(const char c) leon2_serial_putc_raw(c); } -static void leon2_serial_puts(const char *s) -{ - while (*s) { - serial_putc(*s++); - } -} - static int leon2_serial_getc(void) { LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS; @@ -172,7 +165,7 @@ static struct serial_device leon2_serial_drv = { .stop = NULL, .setbrg = leon2_serial_setbrg, .putc = leon2_serial_putc, - .puts = leon2_serial_puts, + .puts = default_serial_puts, .getc = leon2_serial_getc, .tstc = leon2_serial_tstc, }; diff --git a/arch/sparc/cpu/leon3/serial.c b/arch/sparc/cpu/leon3/serial.c index c4f3ee83c3..838d4514ee 100644 --- a/arch/sparc/cpu/leon3/serial.c +++ b/arch/sparc/cpu/leon3/serial.c @@ -99,13 +99,6 @@ static void leon3_serial_putc(const char c) leon3_serial_putc_raw(c); } -static void leon3_serial_puts(const char *s) -{ - while (*s) { - serial_putc(*s++); - } -} - static int leon3_serial_getc(void) { if (!leon3_apbuart) @@ -146,7 +139,7 @@ static struct serial_device leon3_serial_drv = { .stop = NULL, .setbrg = leon3_serial_setbrg, .putc = leon3_serial_putc, - .puts = leon3_serial_puts, + .puts = default_serial_puts, .getc = leon3_serial_getc, .tstc = leon3_serial_tstc, }; diff --git a/arch/sparc/include/asm/global_data.h b/arch/sparc/include/asm/global_data.h index 93d3cc02eb..aa63b35cab 100644 --- a/arch/sparc/include/asm/global_data.h +++ b/arch/sparc/include/asm/global_data.h @@ -40,7 +40,7 @@ typedef struct global_data { bd_t *bd; unsigned long flags; - unsigned long baudrate; + unsigned int baudrate; unsigned long cpu_clk; /* CPU clock in Hz! */ unsigned long bus_clk; diff --git a/arch/sparc/include/asm/u-boot.h b/arch/sparc/include/asm/u-boot.h index 8d011185a0..04c05d4ffe 100644 --- a/arch/sparc/include/asm/u-boot.h +++ b/arch/sparc/include/asm/u-boot.h @@ -54,7 +54,7 @@ typedef struct bd_info { unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ unsigned long bi_intfreq; /* Internal Freq, in MHz */ unsigned long bi_busfreq; /* Bus Freq, in MHz */ - unsigned long bi_baudrate; /* Console Baudrate */ + unsigned int bi_baudrate; /* Console Baudrate */ } bd_t; #endif /* __ASSEMBLY__ */ diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 6d29c0b9a3..bce999f41c 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -38,7 +38,7 @@ typedef struct global_data { unsigned long gd_addr; /* Location of Global Data */ bd_t *bd; unsigned long flags; - unsigned long baudrate; + unsigned int baudrate; unsigned long have_console; /* serial_init() was called */ #ifdef CONFIG_PRE_CONSOLE_BUFFER unsigned long precon_buf_idx; /* Pre-Console buffer index */ diff --git a/board/Marvell/common/serial.c b/board/Marvell/common/serial.c index 1327c62a75..4a780c3746 100644 --- a/board/Marvell/common/serial.c +++ b/board/Marvell/common/serial.c @@ -139,20 +139,13 @@ static void marvell_serial_setbrg(void) #endif /* CONFIG_MPSC */ -static void marvell_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static struct serial_device marvell_serial_drv = { .name = "marvell_serial", .start = marvell_serial_init, .stop = NULL, .setbrg = marvell_serial_setbrg, .putc = marvell_serial_putc, - .puts = marvell_serial_puts, + .puts = default_serial_puts, .getc = marvell_serial_getc, .tstc = marvell_serial_tstc, }; diff --git a/board/astro/mcf5373l/u-boot.lds b/board/astro/mcf5373l/u-boot.lds index a1d8e0f6dc..19342ac214 100644 --- a/board/astro/mcf5373l/u-boot.lds +++ b/board/astro/mcf5373l/u-boot.lds @@ -22,51 +22,18 @@ */ OUTPUT_ARCH(m68k) -/* Do we need any of these for elf? - __DYNAMIC = 0; */ + SECTIONS { /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - arch/m68k/cpu/mcf532x/start.o (.text) - arch/m68k/lib/traps.o (.text) - arch/m68k/lib/interrupts.o (.text) - common/dlmalloc.o (.text) - lib/zlib.o (.text) + arch/m68k/cpu/mcf532x/start.o (.text*) . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text) + common/env_embedded.o (.text*) - *(.text) -/* *(.fixup)*/ - *(.got1) + *(.text*) } _etext = .; PROVIDE (etext = .); @@ -74,9 +41,6 @@ SECTIONS { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } /* Read-write section, merged into data segment: */ . = (. + 0x00FF) & 0xFFFFFF00; @@ -86,24 +50,20 @@ SECTIONS .reloc : { __got_start = .; - *(.got) + KEEP(*(.got)) __got_end = .; _GOT2_TABLE_ = .; - *(.got2) + KEEP(*(.got2)) _FIXUP_TABLE_ = .; - *(.fixup) + KEEP(*(.fixup)) } __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; __fixup_entries = (. - _FIXUP_TABLE_)>>2; .data : { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS + *(.data*) + *(.sdata*) } _edata = .; PROVIDE (edata = .); @@ -113,7 +73,6 @@ SECTIONS .u_boot_cmd : { *(.u_boot_cmd) } __u_boot_cmd_end = .; - . = .; __start___ex_table = .; __ex_table : { *(__ex_table) } @@ -130,9 +89,8 @@ SECTIONS .bss : { _sbss = .; - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) + *(.sbss*) + *(.bss*) *(COMMON) . = ALIGN(4); _ebss = .; diff --git a/board/bmw/Makefile b/board/bmw/Makefile deleted file mode 100644 index 4f88efafd4..0000000000 --- a/board/bmw/Makefile +++ /dev/null @@ -1,50 +0,0 @@ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# (C) Copyright 2002 -# James F. Dougherty, Broadcom Corporation, jfd@broadcom.com -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS = $(BOARD).o flash.o ns16550.o serial.o m48t59y.o - -SOBJS = early_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/bmw/README b/board/bmw/README deleted file mode 100644 index 1fbef79e64..0000000000 --- a/board/bmw/README +++ /dev/null @@ -1,331 +0,0 @@ -Broadcom 95xx BMW CPCI Platform - -Overview -========= -BMW is an MPC8245 system controller featuring: -* 3U CPCI Form Factor -* BCM5703 Gigabit Ethernet -* M48T59Y NVRAM -* 16MB DOC -* DIP Socket for Socketed DOC up to 1GB -* 64MB SDRAM -* LCD Display -* Configurable Jumper options for 66,85, and 100Mhz memory bus - - -BMW System Address Map -====================== -BMW uses the MPC8245 CHRP Address MAP B found in the MPC8245 Users Manual -(P.121, Section 3.1 Address Maps, Address Map B). Other I/O devices found -onboard the processor module are listed briefly below: - -0x00000000 - 0x40000000 - 64MB SDRAM SIMM - (Unregistered PC-100 SDRAM DIMM Module) - -0xFF000000 - 0xFF001FFF - M-Systems DiskOnChip (TM) 2000 - TSOP 16MB (MD2211-D16-V3) - -0x70000000 - 0x70001FFF - M-Systems DiskOnChip (TM) 2000 - DIP32 (Socketed 16MB - 1GB ) * - NOTE: this is not populated on all systems. - -0x7c000000 - 0x7c000000 - Reset Register - (Write 0 to reset) - -0x7c000001 - 0x7c000001 - System LED - (Clear Bit 7 to turn on, set to shut off) - -0x7c000002 - 0x7c000002 - M48T59 Watchdog IRQ3 - (Clear bit 7 to reset, set to assert IRQ3) - -0x7c000003 - 0x7c000003 - M48T59 Write-Protect Register - (Clear bit 7 to make R/W, set to make R/O) - -0x7c002000 - 0x7c002003 - Infineon OSRAM DLR2416 4 Character - 5x7 Dot Matrix Alphanumeric Display - (Each byte sets the appropriate character) - -0x7c004000 - 0x7c005FF0 - SGS-THOMSON M48T59Y 8K NVRAM/RTC - NVRAM Memory Region - -0x7c005FF0 - 0x7c005FFF - SGS-THOMSON M48T59Y 8K NVRAM/RTC - Realtime Clock Registers - -0xFFF00000 - 0xFFF80000 - 512K PLCC32 BootRom - (AMD AM29F040, ST 29W040B) - -0xFFF00100 - System Reset Vector - - -IO/MMU (BAT) Configuration -====================== -The following Block-Address-Translation (BAT) configuration -is recommended to access all I/O devices. - -#define CONFIG_SYS_IBAT0L (0x00000000 | BATL_PP_10 | BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT0U (0x00000000 | BATU_BL_256M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_IBAT1L (0x70000000 | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CONFIG_SYS_IBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CONFIG_SYS_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_IBAT3L (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CONFIG_SYS_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L -#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U -#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L -#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U -#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L -#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U -#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L -#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U - - -Interrupt Mappings -====================== -BMW uses MPC8245 discrete mode interrupts. With the following -hardwired mappings: - -BCM5701 10/100/1000 Ethernet IRQ1 -CompactPCI Interrupt A IRQ2 -RTC/Watchdog Interrupt IRQ3 -Internal NS16552 UART IRQ4 - - -Jumper Settings -====================== - -BMW has a jumper (JP600) for selecting 66, 85, or 100Mhz memory bus. -A jumper (X) is a 0 bit. - -Hence 66= 10110 - 85= 11000 - 100= 10000 - -Jumper Settings for various Speeds -======================= -J1 J2 J3 J4 J5 - X X 66Mhz -======================= -J1 J2 J3 J4 J5 - X X X 85Mhz -======================= -J1 J2 J3 J4 J5 - X X X X 100Mhz -======================= - -Obviously, 100Mhz memory bus is recommended for optimum performance. - - -U-Boot -=============== -Broadcom BMW board is supported under config_BWM option. -Supported features: - -- NVRAM setenv/getenv (used by Linux Kernel for configuration variables) -- BCM570x TFTP file transfer support -- LCD Display Support -- DOC Support - (underway) - - -U-Boot 1.2.0 (Aug 6 2002 - 17:44:48) - -CPU: MPC8245 Revision 16.20 at 264 MHz: 16 kB I-Cache 16 kB D-Cache -Board: BMW MPC8245/KAHLUA2 - CHRP (MAP B) -Built: Aug 6 2002 at 17:44:37 -Local Bus at 66 MHz -DRAM: 64 MB -FLASH: 4095 MB -In: serial -Out: serial -Err: serial -DOC: No DiskOnChip found -Hit any key to stop autoboot: 0 -=>printenv -bootdelay=5 -baudrate=9600 -clocks_in_mhz=1 -hostname=switch-2 -bootcmd=tftp 100000 vmlinux.img;bootm -gateway=10.16.64.1 -ethaddr=00:00:10:18:10:10 -nfsroot=172.16.40.111:/boot/root-fs -filesize=5ec8c -netmask=255.255.240.0 -ipaddr=172.16.40.114 -serverip=172.16.40.111 -root=/dev/nfs -stdin=serial -stdout=serial -stderr=serial - -Environment size: 315/8172 bytes -=>boot - - -DevTools -======== -ELDK - DENX Embedded Linux Development Kit - -ROM Emulator - Grammar Engine PROMICE P1160-90-AI21E (2MBx8bit, 90ns access time) - Grammar Engine PL32E 32Pin PLCC Emulation cables - Grammar Engine 3VA8CON (3Volt adapter with Short cables) - Grammar Engine FPNET PromICE Ethernet Adapters - -ICE - WRS/EST VisionICE-II (PPC8240) - - -=>reset - - -U-Boot 1.2.0 (Aug 6 2002 - 17:44:48) - -CPU: MPC8245 Revision 16.20 at 264 MHz: 16 kB I-Cache 16 kB D-Cache -Board: BMW MPC8245/KAHLUA2 - CHRP (MAP B) -Built: Aug 6 2002 at 17:44:37 -Local Bus at 66 MHz -DRAM: 64 MB -FLASH: 4095 MB -In: serial -Out: serial -Err: serial -DOC: No DiskOnChip found -Hit any key to stop autoboot: 0 - -Broadcom BCM5701 1000Base-T: bus 0, device 13, function 0: MBAR=0x80100000 -BCM570x PCI Memory base address @0x80100000 -eth0:Broadcom BCM5701 1000Base-T: 100 Mbps half duplex link up, flow control OFF -eth0: Broadcom BCM5701 1000Base-T @0x80100000,node addr 000010181010 -eth0: BCM5700 with Broadcom BCM5701 Integrated Copper transceiver found -eth0: 32-bit PCI 33MHz, MTU: 1500,Rx Checksum ON -ARP broadcast 1 -TFTP from server 172.16.40.111; our IP address is 172.16.40.114 -Filename 'vmlinux.img'. -Load address: 0x100000 -Loading: ################################################################# - ####################################T ############################# - ###################### -done -Bytes transferred = 777199 (bdbef hex) - -eth0:Broadcom BCM5701 1000Base-T,HALT,POWER DOWN,done - offline. -## Booting image at 00100000 ... - Image Name: vmlinux.bin.gz - Created: 2002-08-06 6:30:13 UTC - Image Type: PowerPC Linux Kernel Image (gzip compressed) - Data Size: 777135 Bytes = 758 kB = 0 MB - Load Address: 00000000 - Entry Point: 00000000 - Verifying Checksum ... OK - Uncompressing Kernel Image ... OK -Memory BAT mapping: BAT2=64Mb, BAT3=0Mb, residual: 0Mb -Linux version 2.4.19-rc3 (jfd@que) (gcc version 2.95.3 20010111 (prerelease/franzo/20010111)) #168 Mon Aug 5 23:29:20 PDT 2002 -CPU:82xx: 32 I-Cache Block Size, 32 D-Cache Block Size PVR: 0x810000 -U-Boot Environment: 0xc01b08f0 -IP PNP: 802.3 Ethernet Address=<0:0:10:18:10:10> -cpu0: MPC8245/KAHLUA-II : BMW Platform : 64MB RAM: BPLD Rev. 6e -NOTICE: mounting root file system via NFS -IP PNP: switch-2: eth0 IP 172.16.40.114/255.255.240.0 gateway 10.16.64.1 server 172.16.40.111 -On node 0 totalpages: 16384 -zone(0): 16384 pages. -zone(1): 0 pages. -zone(2): 0 pages. -Kernel command line: console=ttyS0,9600 ip=172.16.40.114:172.16.40.111:10.16.64.1:255.255.240.0:switch-2:eth0 root=/dev/nfs rw nfsroot=172.16.40.111:/boot/root-fs,timeo=200,retrans=500 nfsaddrs=172.16.40.114:172.16.40.111 -root_dev_setup:/dev/nfs or 00:ff -time_init: decrementer frequency = 16.501145 MHz -Calibrating delay loop... 175.71 BogoMIPS -Memory: 62572k available (1396k kernel code, 436k data, 100k init, 0k highmem) -Dentry cache hash table entries: 8192 (order: 4, 65536 bytes) -Inode cache hash table entries: 4096 (order: 3, 32768 bytes) -Mount-cache hash table entries: 1024 (order: 1, 8192 bytes) -Buffer-cache hash table entries: 4096 (order: 2, 16384 bytes) -Page-cache hash table entries: 16384 (order: 4, 65536 bytes) -POSIX conformance testing by UNIFIX -PCI: Probing PCI hardware -Linux NET4.0 for Linux 2.4 -Based upon Swansea University Computer Society NET3.039 -Initializing RT netlink socket -Starting kswapd -devfs: v1.12a (20020514) Richard Gooch (rgooch@atnf.csiro.au) -devfs: devfs_debug: 0x0 -devfs: boot_options: 0x1 -Installing knfsd (copyright (C) 1996 okir@monad.swb.de). -pty: 256 Unix98 ptys configured -Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled -Testing ttyS0 (0xf7f51500, 0xf7f51500)... -Testing ttyS1 (0xfc004600, 0xfc004600)... -ttyS00 at 0xf7f51500 (irq = 24) is a ST16650 -ttyS01 at 0xfc004600 (irq = 25) is a 16550A -Real Time Clock Driver v1.10e -RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize -loop: loaded (max 8 devices) -TFFS 5.1.1 Flash disk driver for DiskOnChip -Copyright (C) 1998,2001 M-Systems Flash Disk Pioneers Ltd. -DOC device(s) found: 1 -fl_init: registered device at major: 100 -fl_geninit: registered device at major: 100 -Partition check: - fla: p1 -partition: /dev/fl/0: start_sect: 0,nr_sects: 32000 Fl_blk_size[]: 16000KB -partition: /dev/fl/1: start_sect: 2,nr_sects: 31998 Fl_blk_size[]: 15999KB -partition: /dev/fl/2: start_sect: 0,nr_sects: 0 Fl_blk_size[]: 0KB -partition: /dev/fl/3: start_sect: 0,nr_sects: 0 Fl_blk_size[]: 0KB -Broadcom Gigabit Ethernet Driver bcm5700 ver. 3.0.7 (07/17/02) -eth0: Broadcom BCM5701 found at mem bfff0000, IRQ 1, node addr 000010181010 -eth0: Broadcom BCM5701 Integrated Copper transceiver found -eth0: Scatter-gather ON, 64-bit DMA ON, Tx Checksum ON, Rx Checksum ON, 802.1Q VLAN ON -bond0 registered without MII link monitoring, in bonding mode. -rtc: unable to get misc minor -NET4: Linux TCP/IP 1.0 for NET4.0 -IP Protocols: ICMP, UDP, TCP, IGMP -IP: routing cache hash table of 512 buckets, 4Kbytes -TCP: Hash tables configured (established 4096 bind 4096) -bcm5700: eth0 NIC Link is UP, 100 Mbps half duplex -IP-Config: Gateway not on directly connected network. -NET4: Unix domain sockets 1.0/SMP for Linux NET4.0. -802.1Q VLAN Support v1.7 Ben Greear <greearb@candelatech.com> -All bugs added by David S. Miller <davem@redhat.com> -Looking up port of RPC 100003/2 on 172.16.40.111 -Looking up port of RPC 100005/1 on 172.16.40.111 -VFS: Mounted root (nfs filesystem). -Mounted devfs on /dev -Freeing unused kernel memory: 100k init -INIT: version 2.78 booting -Mounting local filesystems... -not mounted anything -Setting up symlinks in /dev...done. -Setting up extra devices in /dev...done. -Starting devfsd...Started device management daemon for /dev -INIT: Entering runlevel: 2 -Starting internet superserver: inetd. - - -Welcome to Linux/PPC -MPC8245/BMW - - -switch-2 login: root -Password: -PAM_unix[49]: (login) session opened for user root by LOGIN(uid=0) -Last login: Thu Nov 25 11:51:14 1920 on console - - -Welcome to Linux/PPC -MPC8245/BMW - - -login[49]: ROOT LOGIN on `console' - -root@switch-2:~# cat /proc/cpuinfo -cpu : 82xx -revision : 16.20 (pvr 8081 1014) -bogomips : 175.71 -vendor : Broadcom -machine : BMW/MPC8245 -root@switch-2:~# diff --git a/board/bmw/bmw.c b/board/bmw/bmw.c deleted file mode 100644 index 5ba6c09d1c..0000000000 --- a/board/bmw/bmw.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * (C) Copyright 2002 - * James F. Dougherty, Broadcom Corporation, jfd@broadcom.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <watchdog.h> -#include <command.h> -#include <malloc.h> -#include <stdio_dev.h> -#include <net.h> -#include <timestamp.h> -#include <dtt.h> -#include <mpc824x.h> -#include <asm/processor.h> -#include <linux/mtd/doc2000.h> - -#include "bmw.h" -#include "m48t59y.h" -#include <pci.h> - - -int checkboard(void) -{ - ulong busfreq = get_bus_freq(0); - char buf[32]; - - puts ("Board: BMW MPC8245/KAHLUA2 - CHRP (MAP B)\n"); - printf("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME); - /* printf("MPLD: Revision %d\n", SYS_REVID_GET()); */ - printf("Local Bus at %s MHz\n", strmhz(buf, busfreq)); - return 0; -} - -phys_size_t initdram(int board_type) -{ - return 64*1024*1024; -} - - -void -get_tod(void) -{ - int year, month, day, hour, minute, second; - - m48_tod_get(&year, - &month, - &day, - &hour, - &minute, - &second); - - printf(" Current date/time: %d/%d/%d %d:%d:%d \n", - month, day, year, hour, minute, second); - -} - -/* - * EPIC, PCI, and I/O devices. - * Initialize Mousse Platform, probe for PCI devices, - * Query configuration parameters if not set. - */ -int misc_init_f (void) -{ -#if 0 - m48_tod_init(); /* Init SGS M48T59Y TOD/NVRAM */ - printf("RTC: M48T589 TOD/NVRAM (%d) bytes\n", - TOD_NVRAM_SIZE); - get_tod(); -#endif - - sys_led_msg("BOOT"); - return 0; -} - - -/* - * Initialize PCI Devices, report devices found. - */ -struct pci_controller hose; - -void pci_init_board (void) -{ - pci_mpc824x_init(&hose); - /* pci_dev_init(0); */ -} - -/* - * Write characters to LCD display. - * Note that the bytes for the first character is the last address. - */ -void -sys_led_msg(char* msg) -{ - LED_REG(0) = msg[3]; - LED_REG(1) = msg[2]; - LED_REG(2) = msg[1]; - LED_REG(3) = msg[0]; -} - -#ifdef CONFIG_CMD_DOC -/* - * Map onboard TSOP-16MB DOC FLASH chip. - */ -void doc_init (void) -{ - doc_probe(DOC_BASE_ADDR); -} -#endif - -#define NV_ADDR ((volatile unsigned char *) CONFIG_ENV_ADDR) - -/* Read from NVRAM */ -void* -nvram_read(void *dest, const long src, size_t count) -{ - int i; - volatile unsigned char* d = (unsigned char*)dest; - volatile unsigned char* s = (unsigned char*)src; - - for( i = 0; i < count;i++) - d[i] = s[i]; - - return dest; -} - -/* Write to NVRAM */ -void -nvram_write(long dest, const void *src, size_t count) -{ - int i; - volatile unsigned char* d = (unsigned char*)dest; - volatile unsigned char* s = (unsigned char*)src; - - SYS_TOD_UNPROTECT(); - - for( i = 0; i < count;i++) - d[i] = s[i]; - - SYS_TOD_PROTECT(); -} diff --git a/board/bmw/bmw.h b/board/bmw/bmw.h deleted file mode 100644 index dd97569303..0000000000 --- a/board/bmw/bmw.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * BMW/MPC8245 Board definitions. - * For more info, see http://www.vooha.com/ - * - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2002 - * James Dougherty (jfd@broadcom.com) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __BMW_H -#define __BMW_H - -/* System addresses */ - -#define PCI_SPECIAL_BASE 0xfe000000 -#define PCI_SPECIAL_SIZE 0x01000000 - -#define EUMBBAR_VAL 0x80500000 /* Location of EUMB region */ -#define EUMBSIZE 0x00100000 /* Size of EUMB region */ - -/* Extended ROM space devices */ -#define DOC_BASE_ADDR 0xff000000 /* Onboard DOC TSOP 16MB */ -#define DOC2_BASE_ADDR 0x70000000 /* DIP32 socket -> 1GB */ -#define XROM_BASE_ADDR 0x7c000000 /* RCS2 (PAL / Satellite IO) */ -#define PLD_REG_BASE XROM_BASE_ADDR -#define LED_REG_BASE (XROM_BASE_ADDR | 0x2000) -#define TOD_BASE (XROM_BASE_ADDR | 0x4000) -#define LED_REG(x) (*(volatile unsigned char *) \ - (LED_REG_BASE + (x))) -#define XROM_DEV_SIZE 0x00006000 - -#define ENET_DEV_BASE 0x80000000 - -#define PLD_REG(off) (*(volatile unsigned char *)\ - (PLD_REG_BASE + (off))) - -#define PLD_REVID_B1 0x7f /* Fix me */ -#define PLD_REVID_B2 0x01 /* Fix me */ - -#define SYS_HARD_RESET() { for (;;) PLD_REG(0) = 0; } /* clr 0x80 bit */ -#define SYS_REVID_GET() ((int) PLD_REG(0) & 0x7f) -#define SYS_LED_OFF() (PLD_REG(1) |= 0x80) -#define SYS_LED_ON() (PLD_REG(1) &= ~0x80) -#define SYS_WATCHDOG_IRQ3() (PLD_REG(2) |= 0x80) -#define SYS_WATCHDOG_RESET() (PLD_REG(2) &= ~0x80) -#define SYS_TOD_PROTECT() (PLD_REG(3) |= 0x80) -#define SYS_TOD_UNPROTECT() (PLD_REG(3) &= ~0x80) - -#define TOD_REG_BASE (TOD_BASE | 0x1ff0) -#define TOD_NVRAM_BASE TOD_BASE -#define TOD_NVRAM_SIZE 0x1ff0 -#define TOD_NVRAM_LIMIT (TOD_NVRAM_BASE + TOD_NVRAM_SIZE) -#define RTC(r) (TOD_BASE + r) - -/* Onboard BCM570x device */ -#define PCI_ENET_IOADDR 0x80000000 -#define PCI_ENET_MEMADDR 0x80000000 - - -#ifndef __ASSEMBLY__ -/* C Function prototypes */ -void sys_led_msg(char* msg); - -#endif /* !__ASSEMBLY__ */ - -#endif /* __BMW_H */ diff --git a/board/bmw/early_init.S b/board/bmw/early_init.S deleted file mode 100644 index 63c29d500f..0000000000 --- a/board/bmw/early_init.S +++ /dev/null @@ -1,1170 +0,0 @@ -#include <ppc_asm.tmpl> -#include <mpc824x.h> -#include <ppc_defs.h> -#include <asm/cache.h> -#include <asm/mmu.h> - -#define USE_V2_INIT 1 /* Jimmy Blair's initialization. */ - - -/* - * Initialize the MMU using BAT entries and hardwired TLB - * This obviates the need for any code in cpu_init_f which - * configures the BAT registers. -*/ -#define MEMORY_MGMT_MSR_BITS (MSR_DR | MSR_IR) /* Data and Inst Relocate */ - .global iommu_setup - /* Initialize IO/MMU mappings via BAT method Ch. 7, - * PPC Programming Reference - */ -iommu_setup: - -/* initialize the BAT registers (SPRs 528 - 543 */ -#define mtibat0u(x) mtspr 528,(x) /* SPR 528 (IBAT0U) */ -#define mtibat0l(x) mtspr 529,(x) /* SPR 529 (IBAT0L) */ -#define mtibat1u(x) mtspr 530,(x) /* SPR 530 (IBAT1U) */ -#define mtibat1l(x) mtspr 531,(x) /* SPR 531 (IBAT1L) */ -#define mtibat2u(x) mtspr 532,(x) /* SPR 532 (IBAT2U) */ -#define mtibat2l(x) mtspr 533,(x) /* SPR 533 (IBAT2L) */ -#define mtibat3u(x) mtspr 534,(x) /* SPR 534 (IBAT3U) */ -#define mtibat3l(x) mtspr 535,(x) /* SPR 535 (IBAT3L) */ -#define mtdbat0u(x) mtspr 536,(x) /* SPR 536 (DBAT0U) */ -#define mtdbat0l(x) mtspr 537,(x) /* SPR 537 (DBAT0L) */ -#define mtdbat1u(x) mtspr 538,(x) /* SPR 538 (DBAT1U) */ -#define mtdbat1l(x) mtspr 539,(x) /* SPR 539 (DBAT1L) */ -#define mtdbat2u(x) mtspr 540,(x) /* SPR 540 (DBAT2U) */ -#define mtdbat2l(x) mtspr 541,(x) /* SPR 541 (DBAT2L) */ -#define mtdbat3u(x) mtspr 542,(x) /* SPR 542 (DBAT3U) */ -#define mtdbat3l(x) mtspr 543,(x) /* SPR 543 (DBAT3L) */ - - -/* PowerPC processors do not necessarily initialize the BAT - registers on power-up or reset. So they are in an unknown - state. Before programming the BATs for the first time, all - BAT registers MUST have their Vs and Vp bits cleared in the - upper BAT half in order to avoid possibly having 2 BATs - valid and mapping the same memory region. - - The reason for this is that, even with address translation - disabled, multiple BAT hits for an address are treated as - programming errors and can cause unpredictable results. - - It is up to the software to make sure it never has 2 IBAT - mappings or 2 DBAT mappings that are valid for the same - addresses. It is not necessary to perform this code - sequence every time the BATs are programmed, only when - there is a possibility that there may be overlapping BAT - entries. - - When programming the BATs in non-reset scenarios, even if - you are sure that your new mapping will not temporarily - create overlapping regions, it is still a wise idea to - invalidate a BAT entry by setting its upper BAT register to - all 0's before programming it. This will avoid having a - BAT marked valid that is in an unknown or transient state -*/ - - addis r5,0,0x0000 - mtibat0u(r5) - mtibat0l(r5) - mtibat1u(r5) - mtibat1l(r5) - mtibat2u(r5) - mtibat2l(r5) - mtibat3u(r5) - mtibat3l(r5) - mtdbat0u(r5) - mtdbat0l(r5) - mtdbat1u(r5) - mtdbat1l(r5) - mtdbat2u(r5) - mtdbat2l(r5) - mtdbat3u(r5) - mtdbat3l(r5) - isync - -/* - * Set up I/D BAT0 - */ - lis r4, CONFIG_SYS_DBAT0L@h - ori r4, r4, CONFIG_SYS_DBAT0L@l - lis r3, CONFIG_SYS_DBAT0U@h - ori r3, r3, CONFIG_SYS_DBAT0U@l - - mtdbat0l(r4) - isync - mtdbat0u(r3) - isync - sync - - lis r4, CONFIG_SYS_IBAT0L@h - ori r4, r4, CONFIG_SYS_IBAT0L@l - lis r3, CONFIG_SYS_IBAT0U@h - ori r3, r3, CONFIG_SYS_IBAT0U@l - - isync - mtibat0l(r4) - isync - mtibat0u(r3) - isync - -/* - * Set up I/D BAT1 - */ - lis r4, CONFIG_SYS_IBAT1L@h - ori r4, r4, CONFIG_SYS_IBAT1L@l - lis r3, CONFIG_SYS_IBAT1U@h - ori r3, r3, CONFIG_SYS_IBAT1U@l - - isync - mtibat1l(r4) - isync - mtibat1u(r3) - isync - mtdbat1l(r4) - isync - mtdbat1u(r3) - isync - sync - -/* - * Set up I/D BAT2 - */ - lis r4, CONFIG_SYS_IBAT2L@h - ori r4, r4, CONFIG_SYS_IBAT2L@l - lis r3, CONFIG_SYS_IBAT2U@h - ori r3, r3, CONFIG_SYS_IBAT2U@l - - isync - mtibat2l(r4) - isync - mtibat2u(r3) - isync - mtdbat2l(r4) - isync - mtdbat2u(r3) - isync - sync - -/* - * Setup I/D BAT3 - */ - lis r4, CONFIG_SYS_IBAT3L@h - ori r4, r4, CONFIG_SYS_IBAT3L@l - lis r3, CONFIG_SYS_IBAT3U@h - ori r3, r3, CONFIG_SYS_IBAT3U@l - - isync - mtibat3l(r4) - isync - mtibat3u(r3) - isync - mtdbat3l(r4) - isync - mtdbat3u(r3) - isync - sync - - -/* - * Invalidate all 64 TLB's - */ - lis r3, 0 - mtctr r3 - lis r5, 4 - -tlblp: - tlbie r3 - sync - addi r3, r3, 0x1000 - cmplw r3, r5 - blt tlblp - - sync - -/* - * Enable Data Translation - */ - lis r4, MEMORY_MGMT_MSR_BITS@h - ori r4, r4, MEMORY_MGMT_MSR_BITS@l - mfmsr r3 - or r3, r4, r3 - mtmsr r3 - isync - sync - - blr - - -#ifdef USE_V2_INIT -/* #define USER_I_CACHE_ENABLE 1*/ /* Fast rom boots */ -/* Macro for hiadjust and lo */ -#define HIADJ(arg) arg@ha -#define HI(arg) arg@h -#define LO(arg) arg@l - -#undef LOADPTR -#define LOADPTR(reg,const32) \ - addis reg,r0,HIADJ(const32); addi reg,reg,LO(const32) - -.globl early_init_f - -early_init_f: -/* MPC8245/BMW CPCI System Init - * Jimmy Blair, Broadcom Corp, 2002. - */ - mflr r11 - /* Zero-out registers */ - - addis r0,r0,0 - mtspr SPRG0,r0 - mtspr SPRG1,r0 - mtspr SPRG2,r0 - mtspr SPRG3,r0 - - /* Set MPU/MSR to a known state. Turn on FP */ - - LOADPTR (r3, MSR_FP) - sync - mtmsr r3 - isync - - /* Init the floating point control/status register */ - - mtfsfi 7,0x0 - mtfsfi 6,0x0 - mtfsfi 5,0x0 - mtfsfi 4,0x0 - mtfsfi 3,0x0 - mtfsfi 2,0x0 - mtfsfi 1,0x0 - mtfsfi 0,0x0 - isync - - /* Set MPU/MSR to a known state. Turn off FP */ - -#if 1 /* Turn off floating point (remove to keep FP on) */ - andi. r3, r3, 0 - sync - mtmsr r3 - isync -#endif - - /* Init the Segment registers */ - - andi. r3, r3, 0 - isync - mtsr 0,r3 - isync - mtsr 1,r3 - isync - mtsr 2,r3 - isync - mtsr 3,r3 - isync - mtsr 4,r3 - isync - mtsr 5,r3 - isync - mtsr 6,r3 - isync - mtsr 7,r3 - isync - mtsr 8,r3 - isync - mtsr 9,r3 - isync - mtsr 10,r3 - isync - mtsr 11,r3 - isync - mtsr 12,r3 - isync - mtsr 13,r3 - isync - mtsr 14,r3 - isync - mtsr 15,r3 - isync - - /* Turn off data and instruction cache control bits */ - - mfspr r3, HID0 - isync - rlwinm r4, r3, 0, 18, 15 /* r4 has ICE and DCE bits cleared */ - sync - isync - mtspr HID0, r4 /* HID0 = r4 */ - isync - - /* Get cpu type */ - - mfspr r28, PVR - rlwinm r28, r28, 16, 16, 31 - - /* invalidate the MPU's data/instruction caches */ - - lis r3, 0x0 - cmpli 0, 0, r28, CPU_TYPE_603 - beq cpuIs603 - cmpli 0, 0, r28, CPU_TYPE_603E - beq cpuIs603 - cmpli 0, 0, r28, CPU_TYPE_603P - beq cpuIs603 - cmpli 0, 0, r28, CPU_TYPE_604R - bne cpuNot604R - -cpuIs604R: - lis r3, 0x0 - mtspr HID0, r3 /* disable the caches */ - isync - ori r4, r4, 0x0002 /* disable BTAC by setting bit 30 */ - -cpuNot604R: - ori r3, r3, (HID0_ICFI |HID0_DCI) - -cpuIs603: - ori r3, r3, (HID0_ICE | HID0_DCE) - or r4, r4, r3 /* set bits */ - sync - isync - mtspr HID0, r4 /* HID0 = r4 */ - andc r4, r4, r3 /* clear bits */ - isync - cmpli 0, 0, r28, CPU_TYPE_604 - beq cpuIs604 - cmpli 0, 0, r28, CPU_TYPE_604E - beq cpuIs604 - cmpli 0, 0, r28, CPU_TYPE_604R - beq cpuIs604 - mtspr HID0, r4 - isync - -#ifdef USER_I_CACHE_ENABLE - b instCacheOn603 -#else - b cacheEnableDone -#endif - -cpuIs604: - LOADPTR (r5, 0x1000) /* loop count, 0x1000 */ - mtspr CTR, r5 -loopDelay: - nop - bdnz loopDelay - isync - mtspr HID0, r4 - isync - - /* turn the Instruction cache ON for faster FLASH ROM boots */ - -#ifdef USER_I_CACHE_ENABLE - - ori r4, r4, (HID0_ICE | HID0_ICFI) - isync /* Synchronize for ICE enable */ - b writeReg4 -instCacheOn603: - ori r4, r4, (HID0_ICE | HID0_ICFI) - rlwinm r3, r4, 0, 21, 19 /* clear the ICFI bit */ - - /* - * The setting of the instruction cache enable (ICE) bit must be - * preceded by an isync instruction to prevent the cache from being - * enabled or disabled while an instruction access is in progress. - */ - isync -writeReg4: - mtspr HID0, r4 /* Enable Instr Cache & Inval cache */ - cmpli 0, 0, r28, CPU_TYPE_604 - beq cacheEnableDone - cmpli 0, 0, r28, CPU_TYPE_604E - beq cacheEnableDone - - mtspr HID0, r3 /* using 2 consec instructions */ - /* PPC603 recommendation */ -#endif -cacheEnableDone: - - /* Detect map A or B */ - - addis r5,r0, HI(CHRP_REG_ADDR) - addis r6,r0, HI(CHRP_REG_DATA) - LOADPTR (r7, KAHLUA_ID) /* Kahlua PCI controller ID */ - LOADPTR (r8, BMC_BASE) - - stwbrx r8,0,(r5) - lwbrx r3,0,(r6) /* Store read value to r3 */ - cmp 0,0,r3,r7 - beq cr0, X4_KAHLUA_START - - /* It's not an 8240, is it an 8245? */ - - LOADPTR (r7, KAHLUA2_ID) /* Kahlua PCI controller ID */ - cmp 0,0,r3,r7 - beq cr0, X4_KAHLUA_START - - /* Save the PCI controller type in r7 */ - mr r7, r3 - - LOADPTR (r5, PREP_REG_ADDR) - LOADPTR (r6, PREP_REG_DATA) - -X4_KAHLUA_START: - /* MPC8245 changes begin here */ - LOADPTR (r3, MPC107_PCI_CMD) /* PCI command reg */ - stwbrx r3,0,r5 - li r4, 6 /* Command register value */ - sthbrx r4, 0, r6 - - LOADPTR (r3, MPC107_PCI_STAT) /* PCI status reg */ - stwbrx r3,0,r5 - li r4, -1 /* Write-to-clear all bits */ - li r3, 2 /* PCI_STATUS is at +2 offset */ - sthbrx r4, r3, r6 - - /*-------PROC_INT1_ADR */ - - LOADPTR (r3, PROC_INT1_ADR) /* Processor I/F Config 1 reg. */ - stwbrx r3,0,r5 - LOADPTR (r4, 0xff141b98) - stwbrx r4,0,r6 - - /*-------PROC_INT2_ADR */ - - LOADPTR (r3, PROC_INT2_ADR) /* Processor I/F Config 2 reg. */ - stwbrx r3,0,r5 - lis r4, 0x2000 /* Flush PCI config writes */ - stwbrx r4,0,r6 - - LOADPTR (r9, KAHLUA2_ID) - cmpl 0, 0, r7, r9 - bne L1not8245 - - /* MIOCR1 -- turn on bit for DLL delay */ - - LOADPTR (r3, MIOCR1_ADR_X) - stwbrx r3,0,r5 - li r4, 0x04 - stb r4, MIOCR1_SHIFT(r6) - - /* For the MPC8245, set register 77 to %00100000 (see Errata #15) */ - /* SDRAM_CLK_DEL (0x77)*/ - - LOADPTR (r3, MIOCR2_ADR_X) - stwbrx r3,0,r5 - li r4, 0x10 - stb r4, MIOCR2_SHIFT(r6) - - /* PMCR2 -- set PCI hold delay to <10>b for 33 MHz */ - - LOADPTR (r3, PMCR2_ADR_X) - stwbrx r3,0,r5 - li r4, 0x20 - stb r4, PMCR2_SHIFT(r6) - - /* Initialize EUMBBAR early since 8245 has internal UART in EUMB */ - - LOADPTR (r3, EUMBBAR) - stwbrx r3,0,r5 - LOADPTR (r4, CONFIG_SYS_EUMB_ADDR) - stwbrx r4,0,r6 - -L1not8245: - - /* Toggle the DLL reset bit in AMBOR */ - - LOADPTR (r3, AMBOR) - stwbrx r3,0,r5 - lbz r4, 0(r6) - - andi. r4, r4, 0xdf - stb r4, 0(r6) /* Clear DLL_RESET */ - sync - - ori r4, r4, 0x20 /* Set DLL_RESET */ - stb r4, 0(r6) - sync - - andi. r4, r4, 0xdf - stb r4, 0(r6) /* Clear DLL_RESET */ - - - /* Enable RCS2, use supplied timings */ - LOADPTR (r3, ERCR1) - stwbrx r3,0,r5 - LOADPTR (r4, 0x80408000) - stwbrx r4,0,r6 - - /* Disable RCS3 parameters */ - LOADPTR (r3, ERCR2) - stwbrx r3,0,r5 - LOADPTR (r4, 0x00000000) - stwbrx r4,0,r6 - - /* RCS3 at 0x70000000, 64KBytes */ - LOADPTR (r3, ERCR2) - stwbrx r3,0,r5 - LOADPTR (r4, 0x00000004) - stwbrx r4,0,r6 - - /*-------MCCR1 */ - -#ifdef INCLUDE_ECC -#define MC_ECC 1 -#else /* INCLUDE_ECC */ -#define MC_ECC 0 -#endif /* INCLUDE_ECC */ - -#define MC1_ROMNAL 8 /* 0-15 */ -#define MC1_ROMFAL 11 /* 0-31 */ -#define MC1_DBUS_SIZE 0 /* 0-3, read only */ -#define MC1_BURST 0 /* 0-1 */ -#define MC1_MEMGO 0 /* 0-1 */ -#define MC1_SREN 1 /* 0-1 */ -#define MC1_RAM_TYPE 0 /* 0-1 */ -#define MC1_PCKEN MC_ECC /* 0-1 */ -#define MC1_BANKBITS 0x5555 /* 2 bits/bank 7-0 */ - - LOADPTR (r3, MEM_CONT1_ADR) /* Set MCCR1 (F0) */ - stwbrx r3,0,r5 - LOADPTR(r4, \ - MC1_ROMNAL << 28 | MC1_ROMFAL << 23 | \ - MC1_DBUS_SIZE << 21 | MC1_BURST << 20 | \ - MC1_MEMGO << 19 | MC1_SREN << 18 | \ - MC1_RAM_TYPE << 17 | MC1_PCKEN << 16 ) - li r3, MC1_BANKBITS - cmpl 0, 0, r7, r9 /* Check for Kahlua2 */ - bne BankBitsAdd - cmpli 0, 0, r3, 0x5555 - beq K2BankBitsHack /* On 8245, 5555 ==> 0 */ -BankBitsAdd: - ori r4, r3, 0 -K2BankBitsHack: - stwbrx r4, 0, r6 - - /*------- MCCR2 */ - -#define MC2_TS_WAIT_TIMER 0 /* 0-7 */ -#define MC2_ASRISE 8 /* 0-15 */ -#define MC2_ASFALL 4 /* 0-15 */ -#define MC2_INLINE_PAR_NOT_ECC 0 /* 0-1 */ -#define MC2_WRITE_PARITY_CHK_EN MC_ECC /* 0-1 */ -#define MC2_INLRD_PARECC_CHK_EN MC_ECC /* 0-1 */ -#define MC2_ECC_EN 0 /* 0-1 */ -#define MC2_EDO 0 /* 0-1 */ -/* -* N.B. This refresh interval looks good up to 85 MHz with Hynix SDRAM. -* May need to be decreased for 100 MHz -*/ -#define MC2_REFINT 0x3a5 /* 0-0x3fff */ -#define MC2_RSV_PG 0 /* 0-1 */ -#define MC2_RMW_PAR MC_ECC /* 0-1 */ - - LOADPTR (r3, MEM_CONT2_ADR) /* Set MCCR2 (F4) */ - stwbrx r3,0,r5 - LOADPTR(r4, \ - MC2_TS_WAIT_TIMER << 29 | MC2_ASRISE << 25 | \ - MC2_ASFALL << 21 | MC2_INLINE_PAR_NOT_ECC << 20 | \ - MC2_WRITE_PARITY_CHK_EN << 19 | \ - MC2_INLRD_PARECC_CHK_EN << 18 | \ - MC2_ECC_EN << 17 | MC2_EDO << 16 | \ - MC2_REFINT << 2 | MC2_RSV_PG << 1 | MC2_RMW_PAR) - cmpl 0, 0, r7, r9 /* Check for Kahlua2 */ - bne notK2 - /* clear Kahlua2 reserved bits */ - LOADPTR (r3, 0xfffcffff) - and r4, r4, r3 -notK2: - stwbrx r4,0,r6 - - /*------- MCCR3 */ - -#define MC_BSTOPRE 0x079 /* 0-0x7ff */ - -#define MC3_BSTOPRE_U (MC_BSTOPRE >> 4 & 0xf) -#define MC3_REFREC 8 /* 0-15 */ -#define MC3_RDLAT (4+MC_ECC) /* 0-15 */ -#define MC3_CPX 0 /* 0-1 */ -#define MC3_RAS6P 0 /* 0-15 */ -#define MC3_CAS5 0 /* 0-7 */ -#define MC3_CP4 0 /* 0-7 */ -#define MC3_CAS3 0 /* 0-7 */ -#define MC3_RCD2 0 /* 0-7 */ -#define MC3_RP1 0 /* 0-7 */ - - LOADPTR (r3, MEM_CONT3_ADR) /* Set MCCR3 (F8) */ - stwbrx r3,0,r5 - LOADPTR(r4, \ - MC3_BSTOPRE_U << 28 | MC3_REFREC << 24 | \ - MC3_RDLAT << 20 | MC3_CPX << 19 | \ - MC3_RAS6P << 15 | MC3_CAS5 << 12 | MC3_CP4 << 9 | \ - MC3_CAS3 << 6 | MC3_RCD2 << 3 | MC3_RP1) - cmpl 0, 0, r7, r9 /* Check for Kahlua2 */ - bne notK2b - /* clear Kahlua2 reserved bits */ - LOADPTR (r3, 0xff000000) - and r4, r4, r3 -notK2b: - stwbrx r4,0,r6 - - /*------- MCCR4 */ - -#define MC4_PRETOACT 3 /* 0-15 */ -#define MC4_ACTOPRE 5 /* 0-15 */ -#define MC4_WMODE 0 /* 0-1 */ -#define MC4_INLINE MC_ECC /* 0-1 */ -#define MC4_REGISTERED (1-MC_ECC) /* 0-1 */ -#define MC4_BSTOPRE_UU (MC_BSTOPRE >> 8 & 3) -#define MC4_REGDIMM 0 /* 0-1 */ -#define MC4_SDMODE_CAS 2 /* 0-7 */ -#define MC4_DBUS_RCS1 1 /* 0-1, 8-bit */ -#define MC4_SDMODE_WRAP 0 /* 0-1 */ -#define MC4_SDMODE_BURST 2 /* 0-7 */ -#define MC4_ACTORW 3 /* 0-15 */ -#define MC4_BSTOPRE_L (MC_BSTOPRE & 0xf) - - LOADPTR (r3, MEM_CONT4_ADR) /* Set MCCR4 (FC) */ - stwbrx r3,0,r5 - LOADPTR(r4, \ - MC4_PRETOACT << 28 | MC4_ACTOPRE << 24 | \ - MC4_WMODE << 23 | MC4_INLINE << 22 | \ - MC4_REGISTERED << 20 | MC4_BSTOPRE_UU << 18 | \ - MC4_DBUS_RCS1 << 17 | \ - MC4_REGDIMM << 15 | MC4_SDMODE_CAS << 12 | \ - MC4_SDMODE_WRAP << 11 | MC4_SDMODE_BURST << 8 | \ - MC4_ACTORW << 4 | MC4_BSTOPRE_L) - cmpl 0, 0, r7, r9 /* Check for Kahlua 2 */ - bne notK2c - /* Turn on Kahlua2 extended ROM space */ - LOADPTR (r3, 0x00200000) - or r4, r4, r3 -notK2c: - stwbrx r4,0,r6 - -#ifdef INCLUDE_ECC - /*------- MEM_ERREN1 */ - - LOADPTR (r3, MEM_ERREN1_ADR) /* Set MEM_ERREN1 (c0) */ - stwbrx r3,0,r5 - lwbrx r4,0,r6 - ori r4,r4,4 /* Set MEM_PERR_EN */ - stwbrx r4,0,r6 -#endif /* INCLUDE_ECC */ - - /*------- MSAR/MEAR */ - - LOADPTR (r3, MEM_START1_ADR) /* Set MSAR1 (80) */ - stwbrx r3,0,r5 - LOADPTR (r4, 0xc0804000) - stwbrx r4,0,r6 - - LOADPTR (r3, MEM_START2_ADR) /* Set MSAR2 (84) */ - stwbrx r3,0,r5 - LOADPTR (r4, 0xc0804000) - stwbrx r4,0,r6 - - LOADPTR (r3, XMEM_START1_ADR) /* Set MESAR1 (88) */ - stwbrx r3,0,r5 - LOADPTR (r4, 0x00000000) - stwbrx r4,0,r6 - - LOADPTR (r3, XMEM_START2_ADR) /* Set MESAR2 (8c) */ - stwbrx r3,0,r5 - LOADPTR (r4, 0x01010101) - stwbrx r4,0,r6 - - LOADPTR (r3, MEM_END1_ADR) /* Set MEAR1 (90) */ - stwbrx r3,0,r5 - LOADPTR (r4, 0xffbf7f3f) - stwbrx r4,0,r6 - - LOADPTR (r3, MEM_END2_ADR) /* Set MEAR2 (94) */ - stwbrx r3,0,r5 - LOADPTR (r4, 0xffbf7f3f) - stwbrx r4,0,r6 - - LOADPTR (r3, XMEM_END1_ADR) /* MEEAR1 (98) */ - stwbrx r3,0,r5 - LOADPTR (r4, 0x00000000) - stwbrx r4,0,r6 - - LOADPTR (r3, XMEM_END2_ADR) /* MEEAR2 (9c) */ - stwbrx r3,0,r5 - LOADPTR (r4, 0x01010101) - stwbrx r4,0,r6 - - /*-------ODCR */ - - LOADPTR (r3, ODCR_ADR_X) /* Set ODCR */ - stwbrx r3,0,r5 - - li r4, 0x7f - stb r4, ODCR_SHIFT(r6) /* ODCR is at +3 offset */ - - /*-------MBEN */ - - LOADPTR (r3, MEM_EN_ADR) /* Set MBEN (a0) */ - stwbrx r3,0,r5 - li r4, 0x01 /* Enable bank 0 */ - stb r4, 0(r6) /* MBEN is at +0 offset */ - -#if 0 /* Jimmy: I think page made is broken */ - /*-------PGMAX */ - - LOADPTR (r3, MPM_ADR_X) - stwbrx r3,0,r5 - li r4, 0x32 - stb r4, MPM_SHIFT(r6) /* PAGE_MODE is at +3 offset */ -#endif - - /* Wait before initializing other registers */ - - lis r4,0x0001 - mtctr r4 - -KahluaX4wait200us: - bdnz KahluaX4wait200us - - /* Set MEMGO bit */ - - LOADPTR (r3, MEM_CONT1_ADR) /* MCCR1 (F0) |= PGMAX */ - stwbrx r3,0,r5 - lwbrx r4,0,r6 /* old MCCR1 */ - oris r4,r4,0x0008 /* MEMGO=1 */ - stwbrx r4, 0, r6 - - /* Wait again */ - - addis r4,r0,0x0002 - ori r4,r4,0xffff - - mtctr r4 - -KahluaX4wait8ref: - bdnz KahluaX4wait8ref - - sync - eieio - mtlr r11 - blr - -#else /* USE_V2_INIT */ - - -/* U-Boot works, but memory will not run reliably for all address ranges. - * Early U-Boot Working init, but 2.4.19 kernel will crash since memory is not - * initialized correctly. Could work if debugged. - */ -/* PCI Support routines */ - - .globl __pci_config_read_32 -__pci_config_read_32: - lis r4, 0xfec0 - stwbrx r3, r0, r4 - sync - lis r4, 0xfee0 - lwbrx r3, 0, r4 - blr - .globl __pci_config_read_16 -__pci_config_read_16: - lis r4, 0xfec0 - andi. r5, r3, 2 - stwbrx r3, r0, r4 - sync - oris r4, r5, 0xfee0 - lhbrx r3, r0, r4 - blr - .globl __pci_config_read_8 -__pci_config_read_8: - lis r4, 0xfec0 - andi. r5, r3, 3 - stwbrx r3, r0, r4 - sync - oris r4, r5, 0xfee0 - lbz r3, 0(4) - blr - .globl __pci_config_write_32 -__pci_config_write_32: - lis r5, 0xfec0 - stwbrx r3, r0, r5 - sync - lis r5, 0xfee0 - stwbrx r4, r0, r5 - sync - blr - .globl __pci_config_write_16 -__pci_config_write_16: - lis r5, 0xfec0 - andi. r6, r3, 2 - stwbrx r3, r0, 5 - sync - oris r5, r6, 0xfee0 - sthbrx r4, r0, r5 - sync - blr - .globl __pci_config_write_8 -__pci_config_write_8: - lis r5, 0xfec0 - andi. r6, r3, 3 - stwbrx r3, r0, r5 - sync - oris r5, r6, 0xfee0 - stb r4, 0(r5) - sync - blr - .globl in_8 -in_8: - oris r3, r3, 0xfe00 - lbz r3,0(r3) - blr - .globl in_16 -in_16: - oris r3, r3, 0xfe00 - lhbrx r3, 0, r3 - blr - .globl in_16_ne -in_16_ne: - oris r3, r3, 0xfe00 - lhzx r3, 0, r3 - blr - .globl in_32 -in_32: - oris r3, r3, 0xfe00 - lwbrx r3, 0, r3 - blr - .globl out_8 -out_8: - oris r3, r3, 0xfe00 - stb r4, 0(r3) - eieio - blr - .globl out_16 -out_16: - oris r3, r3, 0xfe00 - sthbrx r4, 0, r3 - eieio - blr - .globl out_16_ne -out_16_ne: - oris r3, r3, 0xfe00 - sth r4, 0(r3) - eieio - blr - .globl out_32 -out_32: - oris r3, r3, 0xfe00 - stwbrx r4, 0, r3 - eieio - blr - .globl read_8 -read_8: - lbz r3,0(r3) - blr - .globl read_16 -read_16: - lhbrx r3, 0, r3 - blr - .globl read_32 -read_32: - lwbrx r3, 0, r3 - blr - .globl read_32_ne -read_32_ne: - lwz r3, 0(r3) - blr - .globl write_8 -write_8: - stb r4, 0(r3) - eieio - blr - .globl write_16 -write_16: - sthbrx r4, 0, r3 - eieio - blr - .globl write_32 -write_32: - stwbrx r4, 0, r3 - eieio - blr - .globl write_32_ne -write_32_ne: - stw r4, 0(r3) - eieio - blr - - -.globl early_init_f - -early_init_f: - mflr r11 - lis r10, 0x8000 - - /* PCI Latency Timer */ - li r4, 0x0d - ori r3, r10, PLTR@l - bl __pci_config_write_8 - - /* Cache Line Size */ - li r4, 0x08 - ori r3, r10, PCLSR@l - bl __pci_config_write_8 - - /* PCI Cmd */ - li r4, 6 - ori r3, r10, PCICR@l - bl __pci_config_write_16 - -#if 1 - /* PCI Stat */ - ori r3, r10, PCISR@l - bl __pci_config_read_16 - ori r4, r4, 0xffff - ori r3, r10, PCISR@l - bl __pci_config_write_16 -#endif - - /* PICR1 */ - lis r4, 0xff14 - ori r4, r4, 0x1b98 - ori r3, r10, PICR1@l - bl __pci_config_write_32 - - - /* PICR2 */ - lis r4, 0x0404 - ori r4, r4, 0x0004 - ori r3, r10, PICR2@l - bl __pci_config_write_32 - - /* MIOCR1 */ - li r4, 0x04 - ori r3, r10, MIOCR1@l - bl __pci_config_write_8 - - /* For the MPC8245, set register 77 to %00100000 (see Errata #15) */ - /* SDRAM_CLK_DEL (0x77)*/ - li r4, 0x10 - ori r3, r10, MIOCR2@l - bl __pci_config_write_8 - - /* EUMBBAR */ - lis r4, 0xfc00 - ori r3, r10, EUMBBAR@l - bl __pci_config_write_32 - - /* AMBOR */ - - /* Even if Address Map B is not being used (though it should), - * the memory DLL needs to be cleared/set/cleared before using memory. - */ - - ori r3, r10, AMBOR@l - bl __pci_config_read_8 /* get Current bits */ - - andi. r4, r4, 0xffdf - ori r3, r10, AMBOR@l - bl __pci_config_write_16 /* Clear DLL_RESET */ - - ori r4, r4, 0x0020 - ori r3, r10, AMBOR@l - bl __pci_config_write_16 /* Set DLL_RESET */ - - andi. r4, r4, 0xffdf - ori r3, r10, AMBOR@l - bl __pci_config_write_16 /* Clear DLL_RESET */ - - /* ERCR1 */ - lis r4, 0x8040 /* Enable RCS2, use supplied timings */ - ori r4, r4, 0x8000 - ori r3, r10, ERCR1@l - bl __pci_config_write_32 - - /* ERCR2 */ - lis r4, 0x0000 /* Disable RCS3 parms */ - ori r4, r4, 0x0000 - ori r3, r10, ERCR2@l - bl __pci_config_write_32 - - /* ERCR3 */ - lis r4, 0x0000 /* RCS3 at 0x70000000, 64K bytes */ - ori r4, r4, 0x0004 - ori r3, r10, ERCR2@l - bl __pci_config_write_32 - - /* Preserve memgo bit */ - /* MCCR1 */ - -/* lis r4, 0x75a8 / Safe Local ROM = 11+3 clocks */ - lis r4, 0x75a0 /* Safe Local ROM = 11+3 clocks */ -/* lis r4, 0x73a0 / Fast Local ROM = 7+3 clocks */ -/* oris r4, r4, 0x0010 / Burst ROM/Flash enable */ -/* oris r4, r4, 0x0004 / Self-refresh enable */ - -/* ori r4,r4,0xFFFF / 16Mbit 2bank SDRAM */ -/* ori r4,r4,0xAAAA / 256Mbit 4bank SDRAM (8245 only) */ -/* ori r4,r4,0x5555 / 64Mbit 2bank SDRAM */ - ori r4,r4,0x0000 /* 64Mbit 4bank SDRAM */ - - ori r3, r10, MCCR1@l - bl __pci_config_write_32 - - /* MCCR2 */ - - lis r4,0x0000 -/* oris r4,r4,0x4000 / TS_WAIT_TIMER = 3 clocks */ - oris r4,r4,0x1000 /* ASRISE = 8 clocks */ - oris r4,r4,0x0080 /* ASFALL = 8 clocks */ -/* oris r4,r4,0x0010 / SDRAM Parity (else ECC) */ -/* oris r4,r4,0x0008 / Write parity check */ -/* oris r4,r4,0x0004 / SDRAM inline reads */ - - -/* Select a refresh rate; it needs to match the bus speed; if too */ -/* slow, data may be lost; if too fast, performance is lost. We */ -/* use the fastest value so we run at all speeds. */ -/* Refresh = (15600ns/busclk) - (213 (see UM)). */ - -/* ori r4,r4,0x1d2c / 133 MHz mem bus = 1867 */ -/* ori r4,r4,0x150c / 100 MHz mem bus = 1347 */ -/* ori r4,r4,0x10fc / 83 MHz mem bus = 1087 */ -/* ori r4,r4,0x0cc4 / 66 MHz mem bus = 817 */ - ori r4,r4,0x04cc /* 33 MHz mem bus (SAFE) = 307 */ -/* ori r4,r4,0x0002 / Reserve a page */ -/* ori r4,r4,0x0001 / RWM parity */ - - ori r3, r10, MCCR2@l - bl __pci_config_write_32 - - - /* MCCR3 */ - lis r4,0x0000 /* BSTOPRE_M = 7 (see A/N) */ - oris r4,r4,0x0500 /* REFREC = 8 clocks */ - ori r3, r10, MCCR3@l - bl __pci_config_write_32 - - /* MCCR4 */ /* Turn on registered buffer mode */ - lis r4, 0x2000 /* PRETOACT = 3 clocks */ - oris r4,r4,0x0400 /* ACTOPRE = 5 clocks */ -/* oris r4,r4,0x0080 / Enable 8-beat burst (32-bit bus) */ -/* oris r4,r4,0x0040 / Enable Inline ECC/Parity */ - oris r4,r4,0x0020 /* EXTROM enabled */ - oris r4,r4,0x0010 /* Registered buffers */ -/* oris r4,r4,0x0000 / BSTOPRE_U = 0 (see A/N) */ - oris r4,r4,0x0002 /* DBUS_SIZ[2] (8 bit on RCS1) */ - -/* ori r4,r4,0x8000 / Registered DIMMs */ - ori r4,r4,0x2000 /*CAS Latency (CL=3) (see RDLAT) */ -/* ori r4,r4,0x2000 / CAS Latency (CL=2) (see RDLAT) */ -/* ori r4,r4,0x0300 / Sequential wrap/8-beat burst */ - ori r4,r4,0x0200 /* Sequential wrap/4-beat burst */ - ori r4,r4,0x0030 /* ACTORW = 3 clocks */ - ori r4,r4,0x0009 /* BSTOPRE_L = 9 (see A/N) */ - - ori r3, r10, MCCR4@l - bl __pci_config_write_32 - - /* MSAR1 */ - lis r4, 0xc0804000@h - ori r4, r4, 0xc0804000@l - ori r3, r10, MSAR1@l - bl __pci_config_write_32 - - /* MSAR2 */ - lis r4, 0xc0804000@h - ori r4, r4, 0xc0804000@l - ori r3, r10, MSAR2@l - bl __pci_config_write_32 - - /* MESAR1 */ - lis r4, 0x00000000@h - ori r4, r4, 0x00000000@l - ori r3, r10, EMSAR1@l - bl __pci_config_write_32 - - /* MESAR2 */ - lis r4, 0x01010101@h - ori r4, r4, 0x01010101@l - ori r3, r10, EMSAR2@l - bl __pci_config_write_32 - - /* MEAR1 */ - lis r4, 0xffbf7f3f@h - ori r4, r4, 0xffbf7f3f@l - ori r3, r10, MEAR1@l - bl __pci_config_write_32 - - /* MEAR2 */ - lis r4, 0xffbf7f3f@h - ori r4, r4, 0xffbf7f3f@l - ori r3, r10, MEAR2@l - bl __pci_config_write_32 - - /* MEEAR1 */ - lis r4, 0x00000000@h - ori r4, r4, 0x00000000@l - ori r3, r10, EMEAR1@l - bl __pci_config_write_32 - - /* MEEAR2 */ - lis r4, 0x01010101@h - ori r4, r4, 0x01010101@l - ori r3, r10, EMEAR2@l - bl __pci_config_write_32 - - /* ODCR */ - li r4, 0x7f - ori r3, r10, ODCR@l - bl __pci_config_write_8 - - /* MBER */ - li r4, 0x01 - ori r3, r10, MBER@l - bl __pci_config_write_8 - - /* Page CTR aka PGMAX */ - li r4, 0x32 - ori r3, r10, 0x70 - bl __pci_config_write_8 - -#if 0 - /* CLK Drive */ - ori r4, r10, 0xfc01 /* Top bit will be ignored */ - ori r3, r10, 0x74 - bl __pci_config_write_16 -#endif - - /* delay */ - lis r7, 1 - mtctr r7 -label1: bdnz label1 - - /* Set memgo bit */ - /* MCCR1 */ - ori r3, r10, MCCR1@l - bl __pci_config_read_32 - lis r7, 0x0008 - or r4, r3, r7 - ori r3, r10, MCCR1@l - bl __pci_config_write_32 - - /* delay again */ - lis r7, 1 - mtctr r7 -label2: bdnz label2 -#if 0 -/* DEBUG: Infinite loop, write then read */ -loop: - lis r7, 0xffff - mtctr r7 - li r3, 0x5004 - lis r4, 0xa0a0 - ori r4, r4, 0x5050 - bl write_32_ne - li r3, 0x5004 - bl read_32_ne - bdnz loop -#endif - mtlr r11 - blr -#endif diff --git a/board/bmw/flash.c b/board/bmw/flash.c deleted file mode 100644 index 57ffe0890f..0000000000 --- a/board/bmw/flash.c +++ /dev/null @@ -1,779 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <mpc824x.h> -#include <asm/processor.h> -#include <asm/pci_io.h> - -#define ROM_CS0_START 0xFF800000 -#define ROM_CS1_START 0xFF000000 - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -#if defined(CONFIG_ENV_IS_IN_FLASH) -# ifndef CONFIG_ENV_ADDR -# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) -# endif -# ifndef CONFIG_ENV_SIZE -# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -# endif -# ifndef CONFIG_ENV_SECT_SIZE -# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE -# endif -#endif - -/*----------------------------------------------------------------------- - * Functions - */ -static int write_word (flash_info_t * info, ulong dest, ulong data); - -#if 0 -static void flash_get_offsets (ulong base, flash_info_t * info); -#endif /* 0 */ - -/*flash command address offsets*/ - -#if 0 -#define ADDR0 (0x555) -#define ADDR1 (0x2AA) -#define ADDR3 (0x001) -#else -#define ADDR0 (0xAAA) -#define ADDR1 (0x555) -#define ADDR3 (0x001) -#endif - -#define FLASH_WORD_SIZE unsigned char - -/*----------------------------------------------------------------------- - */ - -#if 0 -static int byte_parity_odd (unsigned char x) __attribute__ ((const)); -#endif /* 0 */ -static unsigned long flash_id (unsigned char mfct, unsigned char chip) - __attribute__ ((const)); - -typedef struct { - FLASH_WORD_SIZE extval; - unsigned short intval; -} map_entry; - -#if 0 -static int byte_parity_odd (unsigned char x) -{ - x ^= x >> 4; - x ^= x >> 2; - x ^= x >> 1; - return (x & 0x1) != 0; -} -#endif /* 0 */ - - -static unsigned long flash_id (unsigned char mfct, unsigned char chip) -{ - static const map_entry mfct_map[] = { - {(FLASH_WORD_SIZE) AMD_MANUFACT, - (unsigned short) ((unsigned long) FLASH_MAN_AMD >> 16)}, - {(FLASH_WORD_SIZE) FUJ_MANUFACT, - (unsigned short) ((unsigned long) FLASH_MAN_FUJ >> 16)}, - {(FLASH_WORD_SIZE) STM_MANUFACT, - (unsigned short) ((unsigned long) FLASH_MAN_STM >> 16)}, - {(FLASH_WORD_SIZE) MT_MANUFACT, - (unsigned short) ((unsigned long) FLASH_MAN_MT >> 16)}, - {(FLASH_WORD_SIZE) INTEL_MANUFACT, - (unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)}, - {(FLASH_WORD_SIZE) INTEL_ALT_MANU, - (unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)} - }; - - static const map_entry chip_map[] = { - {AMD_ID_F040B, FLASH_AM040}, - {(FLASH_WORD_SIZE) STM_ID_x800AB, FLASH_STM800AB} - }; - - const map_entry *p; - unsigned long result = FLASH_UNKNOWN; - - /* find chip id */ - for (p = &chip_map[0]; - p < &chip_map[sizeof chip_map / sizeof chip_map[0]]; p++) - if (p->extval == chip) { - result = FLASH_VENDMASK | p->intval; - break; - } - - /* find vendor id */ - for (p = &mfct_map[0]; - p < &mfct_map[sizeof mfct_map / sizeof mfct_map[0]]; p++) - if (p->extval == mfct) { - result &= ~FLASH_VENDMASK; - result |= (unsigned long) p->intval << 16; - break; - } - - return result; -} - - -unsigned long flash_init (void) -{ - unsigned long i; - unsigned char j; - static const ulong flash_banks[] = CONFIG_SYS_FLASH_BANKS; - - /* Init: no FLASHes known */ - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - flash_info_t *const pflinfo = &flash_info[i]; - - pflinfo->flash_id = FLASH_UNKNOWN; - pflinfo->size = 0; - pflinfo->sector_count = 0; - } - - for (i = 0; i < sizeof flash_banks / sizeof flash_banks[0]; i++) { - flash_info_t *const pflinfo = &flash_info[i]; - const unsigned long base_address = flash_banks[i]; - volatile FLASH_WORD_SIZE *const flash = - (FLASH_WORD_SIZE *) base_address; -#if 0 - volatile FLASH_WORD_SIZE *addr2; -#endif -#if 0 - /* write autoselect sequence */ - flash[0x5555] = 0xaa; - flash[0x2aaa] = 0x55; - flash[0x5555] = 0x90; -#else - flash[0xAAA << (3 * i)] = 0xaa; - flash[0x555 << (3 * i)] = 0x55; - flash[0xAAA << (3 * i)] = 0x90; -#endif - __asm__ __volatile__ ("sync"); - -#if 0 - pflinfo->flash_id = flash_id (flash[0x0], flash[0x1]); -#else - pflinfo->flash_id = - flash_id (flash[0x0], flash[0x2 + 14 * i]); -#endif - - switch (pflinfo->flash_id & FLASH_TYPEMASK) { - case FLASH_AM040: - pflinfo->size = 0x00080000; - pflinfo->sector_count = 8; - for (j = 0; j < 8; j++) { - pflinfo->start[j] = - base_address + 0x00010000 * j; - pflinfo->protect[j] = flash[(j << 16) | 0x2]; - } - break; - case FLASH_STM800AB: - pflinfo->size = 0x00100000; - pflinfo->sector_count = 19; - pflinfo->start[0] = base_address; - pflinfo->start[1] = base_address + 0x4000; - pflinfo->start[2] = base_address + 0x6000; - pflinfo->start[3] = base_address + 0x8000; - for (j = 1; j < 16; j++) { - pflinfo->start[j + 3] = - base_address + 0x00010000 * j; - } -#if 0 - /* check for protected sectors */ - for (j = 0; j < pflinfo->sector_count; j++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr2 = (volatile FLASH_WORD_SIZE - *) (pflinfo->start[j]); - if (pflinfo->flash_id & FLASH_MAN_SST) - pflinfo->protect[j] = 0; - else - pflinfo->protect[j] = addr2[2] & 1; - } -#endif - break; - } - /* Protect monitor and environment sectors - */ -#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE - flash_protect (FLAG_PROTECT_SET, - CONFIG_SYS_MONITOR_BASE, - CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, - &flash_info[0]); -#endif - -#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR) - flash_protect (FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, - &flash_info[0]); -#endif - - /* reset device to read mode */ - flash[0x0000] = 0xf0; - __asm__ __volatile__ ("sync"); - } - - return flash_info[0].size + flash_info[1].size; -} - -#if 0 -static void flash_get_offsets (ulong base, flash_info_t * info) -{ - int i; - - /* set up sector start address table */ - if (info->flash_id & FLASH_MAN_SST) { - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * 0x00010000); - } else if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00004000; - info->start[2] = base + 0x00006000; - info->start[3] = base + 0x00008000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000) - 0x00030000; - } - } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00004000; - info->start[i--] = base + info->size - 0x00006000; - info->start[i--] = base + info->size - 0x00008000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00010000; - } - } - -} -#endif /* 0 */ - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t * info) -{ - static const char unk[] = "Unknown"; - const char *mfct = unk, *type = unk; - unsigned int i; - - if (info->flash_id != FLASH_UNKNOWN) { - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: - mfct = "AMD"; - break; - case FLASH_MAN_FUJ: - mfct = "FUJITSU"; - break; - case FLASH_MAN_STM: - mfct = "STM"; - break; - case FLASH_MAN_SST: - mfct = "SST"; - break; - case FLASH_MAN_BM: - mfct = "Bright Microelectonics"; - break; - case FLASH_MAN_INTEL: - mfct = "Intel"; - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM040: - type = "AM29F040B (512K * 8, uniform sector size)"; - break; - case FLASH_AM400B: - type = "AM29LV400B (4 Mbit, bottom boot sect)"; - break; - case FLASH_AM400T: - type = "AM29LV400T (4 Mbit, top boot sector)"; - break; - case FLASH_AM800B: - type = "AM29LV800B (8 Mbit, bottom boot sect)"; - break; - case FLASH_AM800T: - type = "AM29LV800T (8 Mbit, top boot sector)"; - break; - case FLASH_AM160T: - type = "AM29LV160T (16 Mbit, top boot sector)"; - break; - case FLASH_AM320B: - type = "AM29LV320B (32 Mbit, bottom boot sect)"; - break; - case FLASH_AM320T: - type = "AM29LV320T (32 Mbit, top boot sector)"; - break; - case FLASH_STM800AB: - type = "M29W800AB (8 Mbit, bottom boot sect)"; - break; - case FLASH_SST800A: - type = "SST39LF/VF800 (8 Mbit, uniform sector size)"; - break; - case FLASH_SST160A: - type = "SST39LF/VF160 (16 Mbit, uniform sector size)"; - break; - } - } - - printf ("\n Brand: %s Type: %s\n" - " Size: %lu KB in %d Sectors\n", - mfct, type, info->size >> 10, info->sector_count); - - printf (" Sector Start Addresses:"); - - for (i = 0; i < info->sector_count; i++) { - unsigned long size; - unsigned int erased; - unsigned long *flash = (unsigned long *) info->start[i]; - - /* - * Check if whole sector is erased - */ - size = (i != (info->sector_count - 1)) ? - (info->start[i + 1] - info->start[i]) >> 2 : - (info->start[0] + info->size - info->start[i]) >> 2; - - for (flash = (unsigned long *) info->start[i], erased = 1; - (flash != (unsigned long *) info->start[i] + size) - && erased; flash++) - erased = *flash == ~0x0UL; - - printf ("%s %08lX %s %s", - (i % 5) ? "" : "\n ", - info->start[i], - erased ? "E" : " ", info->protect[i] ? "RO" : " "); - } - - puts ("\n"); - return; -} - -#if 0 - -/* - * The following code cannot be run from FLASH! - */ -ulong flash_get_size (vu_long * addr, flash_info_t * info) -{ - short i; - FLASH_WORD_SIZE value; - ulong base = (ulong) addr; - volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) addr; - - printf ("flash_get_size: \n"); - /* Write auto select command: read Manufacturer ID */ - eieio (); - addr2[ADDR0] = (FLASH_WORD_SIZE) 0xAA; - addr2[ADDR1] = (FLASH_WORD_SIZE) 0x55; - addr2[ADDR0] = (FLASH_WORD_SIZE) 0x90; - value = addr2[0]; - - switch (value) { - case (FLASH_WORD_SIZE) AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; - case (FLASH_WORD_SIZE) FUJ_MANUFACT: - info->flash_id = FLASH_MAN_FUJ; - break; - case (FLASH_WORD_SIZE) SST_MANUFACT: - info->flash_id = FLASH_MAN_SST; - break; - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* no or unknown flash */ - } - printf ("recognised manufacturer"); - - value = addr2[ADDR3]; /* device ID */ - debug ("\ndev_code=%x\n", value); - - switch (value) { - case (FLASH_WORD_SIZE) AMD_ID_LV400T: - info->flash_id += FLASH_AM400T; - info->sector_count = 11; - info->size = 0x00080000; - break; /* => 0.5 MB */ - - case (FLASH_WORD_SIZE) AMD_ID_LV400B: - info->flash_id += FLASH_AM400B; - info->sector_count = 11; - info->size = 0x00080000; - break; /* => 0.5 MB */ - - case (FLASH_WORD_SIZE) AMD_ID_LV800T: - info->flash_id += FLASH_AM800T; - info->sector_count = 19; - info->size = 0x00100000; - break; /* => 1 MB */ - - case (FLASH_WORD_SIZE) AMD_ID_LV800B: - info->flash_id += FLASH_AM800B; - info->sector_count = 19; - info->size = 0x00100000; - break; /* => 1 MB */ - - case (FLASH_WORD_SIZE) AMD_ID_LV160T: - info->flash_id += FLASH_AM160T; - info->sector_count = 35; - info->size = 0x00200000; - break; /* => 2 MB */ - - case (FLASH_WORD_SIZE) AMD_ID_LV160B: - info->flash_id += FLASH_AM160B; - info->sector_count = 35; - info->size = 0x00200000; - break; /* => 2 MB */ - - case (FLASH_WORD_SIZE) SST_ID_xF800A: - info->flash_id += FLASH_SST800A; - info->sector_count = 16; - info->size = 0x00100000; - break; /* => 1 MB */ - - case (FLASH_WORD_SIZE) SST_ID_xF160A: - info->flash_id += FLASH_SST160A; - info->sector_count = 32; - info->size = 0x00200000; - break; /* => 2 MB */ - - case (FLASH_WORD_SIZE) AMD_ID_F040B: - info->flash_id += FLASH_AM040; - info->sector_count = 8; - info->size = 0x00080000; - break; /* => 0.5 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ - - } - - printf ("flash id %lx; sector count %x, size %lx\n", info->flash_id, - info->sector_count, info->size); - /* set up sector start address table */ - if (info->flash_id & FLASH_MAN_SST) { - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * 0x00010000); - } else if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00004000; - info->start[2] = base + 0x00006000; - info->start[3] = base + 0x00008000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000) - 0x00030000; - } - } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00004000; - info->start[i--] = base + info->size - 0x00006000; - info->start[i--] = base + info->size - 0x00008000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00010000; - } - } - - /* check for protected sectors */ - for (i = 0; i < info->sector_count; i++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr2 = (volatile FLASH_WORD_SIZE *) (info->start[i]); - if (info->flash_id & FLASH_MAN_SST) - info->protect[i] = 0; - else - info->protect[i] = addr2[2] & 1; - } - - /* - * Prevent writes to uninitialized FLASH. - */ - if (info->flash_id != FLASH_UNKNOWN) { - addr2 = (FLASH_WORD_SIZE *) info->start[0]; - *addr2 = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */ - } - - return (info->size); -} - -#endif - - -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]); - int flag, prot, sect, l_sect; - ulong start, now, last; - unsigned char sh8b; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - if ((info->flash_id == FLASH_UNKNOWN) || - (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) { - printf ("Can't erase unknown flash type - aborted\n"); - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", prot); - } else { - printf ("\n"); - } - - l_sect = -1; - - /* Check the ROM CS */ - if ((info->start[0] >= ROM_CS1_START) - && (info->start[0] < ROM_CS0_START)) - sh8b = 3; - else - sh8b = 0; - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); - - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA; - addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055; - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00800080; - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA; - addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055; - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info-> - start - [sect] - - - info-> - start - [0]) << - sh8b)); - if (info->flash_id & FLASH_MAN_SST) { - addr[ADDR0 << sh8b] = - (FLASH_WORD_SIZE) 0x00AA00AA; - addr[ADDR1 << sh8b] = - (FLASH_WORD_SIZE) 0x00550055; - addr[ADDR0 << sh8b] = - (FLASH_WORD_SIZE) 0x00800080; - addr[ADDR0 << sh8b] = - (FLASH_WORD_SIZE) 0x00AA00AA; - addr[ADDR1 << sh8b] = - (FLASH_WORD_SIZE) 0x00550055; - addr[0] = (FLASH_WORD_SIZE) 0x00500050; /* block erase */ - udelay (30000); /* wait 30 ms */ - } else - addr[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */ - l_sect = sect; - } - } - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts (); - - /* wait at least 80us - let's wait 1 ms */ - udelay (1000); - - /* - * We wait for the last triggered sector - */ - if (l_sect < 0) - goto DONE; - - start = get_timer (0); - last = start; - addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info->start[l_sect] - - info-> - start[0]) << sh8b)); - while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) != - (FLASH_WORD_SIZE) 0x00800080) { - if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - return 1; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - serial_putc ('.'); - last = now; - } - } - - DONE: - /* reset to read mode */ - addr = (FLASH_WORD_SIZE *) info->start[0]; - addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */ - - printf (" done\n"); - return 0; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ - -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ulong cp, wp, data; - int i, l, rc; - - wp = (addr & ~3); /* get lower word aligned address */ - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - for (; i < 4 && cnt > 0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt == 0 && i < 4; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - if ((rc = write_word (info, wp, data)) != 0) { - return (rc); - } - wp += 4; - } - - /* - * handle word aligned part - */ - while (cnt >= 4) { - data = 0; - for (i = 0; i < 4; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_word (info, wp, data)) != 0) { - return (rc); - } - wp += 4; - cnt -= 4; - } - - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i < 4; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - return (write_word (info, wp, data)); -} - -/*----------------------------------------------------------------------- - * Write a word to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_word (flash_info_t * info, ulong dest, ulong data) -{ - volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) info->start[0]; - volatile FLASH_WORD_SIZE *dest2; - volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data; - ulong start; - int flag; - int i; - unsigned char sh8b; - - /* Check the ROM CS */ - if ((info->start[0] >= ROM_CS1_START) - && (info->start[0] < ROM_CS0_START)) - sh8b = 3; - else - sh8b = 0; - - dest2 = (FLASH_WORD_SIZE *) (((dest - info->start[0]) << sh8b) + - info->start[0]); - - /* Check if Flash is (sufficiently) erased */ - if ((*dest2 & (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) { - return (2); - } - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); - - for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) { - addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA; - addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055; - addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00A000A0; - - dest2[i << sh8b] = data2[i]; - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts (); - - /* data polling for D7 */ - start = get_timer (0); - while ((dest2[i << sh8b] & (FLASH_WORD_SIZE) 0x00800080) != - (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) { - if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - return (1); - } - } - } - - return (0); -} - -/*----------------------------------------------------------------------- - */ diff --git a/board/bmw/m48t59y.c b/board/bmw/m48t59y.c deleted file mode 100644 index 4e83b9076e..0000000000 --- a/board/bmw/m48t59y.c +++ /dev/null @@ -1,324 +0,0 @@ -/* - * SGS M48-T59Y TOD/NVRAM Driver - * - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 1999, by Curt McDowell, 08-06-99, Broadcom Corp. - * - * (C) Copyright 2001, James Dougherty, 07/18/01, Broadcom Corp. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * SGS M48-T59Y TOD/NVRAM Driver - * - * The SGS M48 an 8K NVRAM starting at offset M48_BASE_ADDR and - * continuing for 8176 bytes. After that starts the Time-Of-Day (TOD) - * registers which are used to set/get the internal date/time functions. - * - * This module implements Y2K compliance by taking full year numbers - * and translating back and forth from the TOD 2-digit year. - * - * NOTE: for proper interaction with an operating system, the TOD should - * be used to store Universal Coordinated Time (GMT) and timezone - * conversions should be used. - * - * Here is a diagram of the memory layout: - * - * +---------------------------------------------+ 0xffe0a000 - * | Non-volatile memory | . - * | | . - * | (8176 bytes of Non-volatile memory) | . - * | | . - * +---------------------------------------------+ 0xffe0bff0 - * | Flags | - * +---------------------------------------------+ 0xffe0bff1 - * | Unused | - * +---------------------------------------------+ 0xffe0bff2 - * | Alarm Seconds | - * +---------------------------------------------+ 0xffe0bff3 - * | Alarm Minutes | - * +---------------------------------------------+ 0xffe0bff4 - * | Alarm Date | - * +---------------------------------------------+ 0xffe0bff5 - * | Interrupts | - * +---------------------------------------------+ 0xffe0bff6 - * | WatchDog | - * +---------------------------------------------+ 0xffe0bff7 - * | Calibration | - * +---------------------------------------------+ 0xffe0bff8 - * | Seconds | - * +---------------------------------------------+ 0xffe0bff9 - * | Minutes | - * +---------------------------------------------+ 0xffe0bffa - * | Hours | - * +---------------------------------------------+ 0xffe0bffb - * | Day | - * +---------------------------------------------+ 0xffe0bffc - * | Date | - * +---------------------------------------------+ 0xffe0bffd - * | Month | - * +---------------------------------------------+ 0xffe0bffe - * | Year (2 digits only) | - * +---------------------------------------------+ 0xffe0bfff - */ -#include <common.h> -#include <rtc.h> -#include "bmw.h" - -/* - * Imported from mousse.h: - * - * TOD_REG_BASE Base of m48t59y TOD registers - * SYS_TOD_UNPROTECT() Disable NVRAM write protect - * SYS_TOD_PROTECT() Re-enable NVRAM write protect - */ - -#define YEAR 0xf -#define MONTH 0xe -#define DAY 0xd -#define DAY_OF_WEEK 0xc -#define HOUR 0xb -#define MINUTE 0xa -#define SECOND 0x9 -#define CONTROL 0x8 -#define WATCH 0x7 -#define INTCTL 0x6 -#define WD_DATE 0x5 -#define WD_HOUR 0x4 -#define WD_MIN 0x3 -#define WD_SEC 0x2 -#define _UNUSED 0x1 -#define FLAGS 0x0 - -#define M48_ADDR ((volatile unsigned char *) TOD_REG_BASE) - -int m48_tod_init(void) -{ - SYS_TOD_UNPROTECT(); - - M48_ADDR[CONTROL] = 0; - M48_ADDR[WATCH] = 0; - M48_ADDR[INTCTL] = 0; - - /* - * If the oscillator is currently stopped (as on a new part shipped - * from the factory), start it running. - * - * Here is an example of the TOD bytes on a brand new M48T59Y part: - * 00 00 00 00 00 00 00 00 00 88 8c c3 bf c8 f5 01 - */ - - if (M48_ADDR[SECOND] & 0x80) - M48_ADDR[SECOND] = 0; - - /* Is battery low */ - if ( M48_ADDR[FLAGS] & 0x10) { - printf("NOTICE: Battery low on Real-Time Clock (replace SNAPHAT).\n"); - } - - SYS_TOD_PROTECT(); - - return 0; -} - -/* - * m48_tod_set - */ - -static int to_bcd(int value) -{ - return value / 10 * 16 + value % 10; -} - -static int from_bcd(int value) -{ - return value / 16 * 10 + value % 16; -} - -static int day_of_week(int y, int m, int d) /* 0-6 ==> Sun-Sat */ -{ - static int t[] = {0, 3, 2, 5, 0, 3, 5, 1, 4, 6, 2, 4}; - y -= m < 3; - return (y + y/4 - y/100 + y/400 + t[m-1] + d) % 7; -} - -/* - * Note: the TOD should store the current GMT - */ - -int m48_tod_set(int year, /* 1980-2079 */ - int month, /* 01-12 */ - int day, /* 01-31 */ - int hour, /* 00-23 */ - int minute, /* 00-59 */ - int second) /* 00-59 */ - -{ - SYS_TOD_UNPROTECT(); - - M48_ADDR[CONTROL] |= 0x80; /* Set WRITE bit */ - - M48_ADDR[YEAR] = to_bcd(year % 100); - M48_ADDR[MONTH] = to_bcd(month); - M48_ADDR[DAY] = to_bcd(day); - M48_ADDR[DAY_OF_WEEK] = day_of_week(year, month, day) + 1; - M48_ADDR[HOUR] = to_bcd(hour); - M48_ADDR[MINUTE] = to_bcd(minute); - M48_ADDR[SECOND] = to_bcd(second); - - M48_ADDR[CONTROL] &= ~0x80; /* Clear WRITE bit */ - - SYS_TOD_PROTECT(); - - return 0; -} - -/* - * Note: the TOD should store the current GMT - */ - -int m48_tod_get(int *year, /* 1980-2079 */ - int *month, /* 01-12 */ - int *day, /* 01-31 */ - int *hour, /* 00-23 */ - int *minute, /* 00-59 */ - int *second) /* 00-59 */ -{ - int y; - - SYS_TOD_UNPROTECT(); - - M48_ADDR[CONTROL] |= 0x40; /* Set READ bit */ - - y = from_bcd(M48_ADDR[YEAR]); - *year = y < 80 ? 2000 + y : 1900 + y; - *month = from_bcd(M48_ADDR[MONTH]); - *day = from_bcd(M48_ADDR[DAY]); - /* day_of_week = M48_ADDR[DAY_OF_WEEK] & 0xf; */ - *hour = from_bcd(M48_ADDR[HOUR]); - *minute = from_bcd(M48_ADDR[MINUTE]); - *second = from_bcd(M48_ADDR[SECOND] & 0x7f); - - M48_ADDR[CONTROL] &= ~0x40; /* Clear READ bit */ - - SYS_TOD_PROTECT(); - - return 0; -} - -int m48_tod_get_second(void) -{ - return from_bcd(M48_ADDR[SECOND] & 0x7f); -} - -/* - * Watchdog function - * - * If usec is 0, the watchdog timer is disarmed. - * - * If usec is non-zero, the watchdog timer is armed (or re-armed) for - * approximately usec microseconds (if the exact requested usec is - * not supported by the chip, the next higher available value is used). - * - * Minimum watchdog timeout = 62500 usec - * Maximum watchdog timeout = 124 sec (124000000 usec) - */ - -void m48_watchdog_arm(int usec) -{ - int mpy, res; - - SYS_TOD_UNPROTECT(); - - if (usec == 0) { - res = 0; - mpy = 0; - } else if (usec < 2000000) { /* Resolution: 1/16s if below 2s */ - res = 0; - mpy = (usec + 62499) / 62500; - } else if (usec < 8000000) { /* Resolution: 1/4s if below 8s */ - res = 1; - mpy = (usec + 249999) / 250000; - } else if (usec < 32000000) { /* Resolution: 1s if below 32s */ - res = 2; - mpy = (usec + 999999) / 1000000; - } else { /* Resolution: 4s up to 124s */ - res = 3; - mpy = (usec + 3999999) / 4000000; - if (mpy > 31) - mpy = 31; - } - - M48_ADDR[WATCH] = (0x80 | /* Steer to RST signal (IRQ = N/C) */ - mpy << 2 | - res); - - SYS_TOD_PROTECT(); -} - -/* - * U-Boot RTC support. - */ -int -rtc_get( struct rtc_time *tmp ) -{ - m48_tod_get(&tmp->tm_year, - &tmp->tm_mon, - &tmp->tm_mday, - &tmp->tm_hour, - &tmp->tm_min, - &tmp->tm_sec); - tmp->tm_yday = 0; - tmp->tm_isdst= 0; - -#ifdef RTC_DEBUG - printf( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec ); -#endif - - return 0; -} - -int rtc_set( struct rtc_time *tmp ) -{ - m48_tod_set(tmp->tm_year, /* 1980-2079 */ - tmp->tm_mon, /* 01-12 */ - tmp->tm_mday, /* 01-31 */ - tmp->tm_hour, /* 00-23 */ - tmp->tm_min, /* 00-59 */ - tmp->tm_sec); /* 00-59 */ - -#ifdef RTC_DEBUG - printf( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); -#endif - - return 0; -} - -void -rtc_reset (void) -{ - m48_tod_init(); -} diff --git a/board/bmw/ns16550.c b/board/bmw/ns16550.c deleted file mode 100644 index be455bbefe..0000000000 --- a/board/bmw/ns16550.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * COM1 NS16550 support - * originally from linux source (arch/powerpc/boot/ns16550.c) - * modified to use CONFIG_SYS_ISA_MEM and new defines - */ - -#include <config.h> -#include "ns16550.h" - -typedef struct NS16550 *NS16550_t; - -const NS16550_t COM_PORTS[] = - { (NS16550_t) ((CONFIG_SYS_EUMB_ADDR) + 0x4500), -(NS16550_t) ((CONFIG_SYS_EUMB_ADDR) + 0x4600) }; - -volatile struct NS16550 *NS16550_init (int chan, int baud_divisor) -{ - volatile struct NS16550 *com_port; - - com_port = (struct NS16550 *) COM_PORTS[chan]; - com_port->ier = 0x00; - com_port->lcr = LCR_BKSE; /* Access baud rate */ - com_port->dll = baud_divisor & 0xff; /* 9600 baud */ - com_port->dlm = (baud_divisor >> 8) & 0xff; - com_port->lcr = LCR_8N1; /* 8 data, 1 stop, no parity */ - com_port->mcr = MCR_RTS; /* RTS/DTR */ - com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR; /* Clear & enable FIFOs */ - return (com_port); -} - -void NS16550_reinit (volatile struct NS16550 *com_port, int baud_divisor) -{ - com_port->ier = 0x00; - com_port->lcr = LCR_BKSE; /* Access baud rate */ - com_port->dll = baud_divisor & 0xff; /* 9600 baud */ - com_port->dlm = (baud_divisor >> 8) & 0xff; - com_port->lcr = LCR_8N1; /* 8 data, 1 stop, no parity */ - com_port->mcr = MCR_RTS; /* RTS/DTR */ - com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR; /* Clear & enable FIFOs */ -} - -void NS16550_putc (volatile struct NS16550 *com_port, unsigned char c) -{ - while ((com_port->lsr & LSR_THRE) == 0); - com_port->thr = c; -} - -unsigned char NS16550_getc (volatile struct NS16550 *com_port) -{ - while ((com_port->lsr & LSR_DR) == 0); - return (com_port->rbr); -} - -int NS16550_tstc (volatile struct NS16550 *com_port) -{ - return ((com_port->lsr & LSR_DR) != 0); -} diff --git a/board/bmw/ns16550.h b/board/bmw/ns16550.h deleted file mode 100644 index 2087a4aabd..0000000000 --- a/board/bmw/ns16550.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * NS16550 Serial Port - * originally from linux source (arch/powerpc/boot/ns16550.h) - * modified slightly to - * have addresses as offsets from CONFIG_SYS_ISA_BASE - * added a few more definitions - * added prototypes for ns16550.c - * reduced no of com ports to 2 - * modifications (c) Rob Taylor, Flying Pig Systems. 2000. - * further modified to support the 8245 duart - * modifications (c) Paul Jimenez, Musenki, Inc. 2001. - */ - - -struct NS16550 { - unsigned char rbrthrdlb; /* 0 */ - unsigned char ierdmb; /* 1 */ - unsigned char iirfcrafr; /* 2 */ - unsigned char lcr; /* 3 */ - unsigned char mcr; /* 4 */ - unsigned char lsr; /* 5 */ - unsigned char msr; /* 6 */ - unsigned char scr; /* 7 */ - unsigned char reserved[2]; /* 8 & 9 */ - unsigned char dsr; /* 10 */ - unsigned char dcr; /* 11 */ -}; - - -#define rbr rbrthrdlb -#define thr rbrthrdlb -#define dll rbrthrdlb -#define ier ierdmb -#define dlm ierdmb -#define iir iirfcrafr -#define fcr iirfcrafr -#define afr iirfcrafr - -#define FCR_FIFO_EN 0x01 /*fifo enable */ -#define FCR_RXSR 0x02 /*receiver soft reset */ -#define FCR_TXSR 0x04 /*transmitter soft reset */ -#define FCR_DMS 0x08 /* DMA Mode Select */ - -#define MCR_RTS 0x02 /* Readyu to Send */ -#define MCR_LOOP 0x10 /* Local loopback mode enable */ -/* #define MCR_DTR 0x01 noton 8245 duart */ -/* #define MCR_DMA_EN 0x04 noton 8245 duart */ -/* #define MCR_TX_DFR 0x08 noton 8245 duart */ - -#define LCR_WLS_MSK 0x03 /* character length slect mask */ -#define LCR_WLS_5 0x00 /* 5 bit character length */ -#define LCR_WLS_6 0x01 /* 6 bit character length */ -#define LCR_WLS_7 0x02 /* 7 bit character length */ -#define LCR_WLS_8 0x03 /* 8 bit character length */ -#define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ -#define LCR_PEN 0x08 /* Parity eneble */ -#define LCR_EPS 0x10 /* Even Parity Select */ -#define LCR_STKP 0x20 /* Stick Parity */ -#define LCR_SBRK 0x40 /* Set Break */ -#define LCR_BKSE 0x80 /* Bank select enable - aka DLAB on 8245 */ - -#define LSR_DR 0x01 /* Data ready */ -#define LSR_OE 0x02 /* Overrun */ -#define LSR_PE 0x04 /* Parity error */ -#define LSR_FE 0x08 /* Framing error */ -#define LSR_BI 0x10 /* Break */ -#define LSR_THRE 0x20 /* Xmit holding register empty */ -#define LSR_TEMT 0x40 /* Xmitter empty */ -#define LSR_ERR 0x80 /* Error */ - -/* useful defaults for LCR*/ -#define LCR_8N1 0x03 - - -volatile struct NS16550 *NS16550_init (int chan, int baud_divisor); -void NS16550_putc (volatile struct NS16550 *com_port, unsigned char c); -unsigned char NS16550_getc (volatile struct NS16550 *com_port); -int NS16550_tstc (volatile struct NS16550 *com_port); -void NS16550_reinit (volatile struct NS16550 *com_port, int baud_divisor); diff --git a/board/bmw/serial.c b/board/bmw/serial.c deleted file mode 100644 index 08f449c864..0000000000 --- a/board/bmw/serial.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * (C) Copyright 2000 - * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <serial.h> -#include <linux/compiler.h> - -#include "ns16550.h" - -DECLARE_GLOBAL_DATA_PTR; - -#if CONFIG_CONS_INDEX == 1 -static struct NS16550 *console = - (struct NS16550 *) (CONFIG_SYS_EUMB_ADDR + 0x4500); -#elif CONFIG_CONS_INDEX == 2 -static struct NS16550 *console = - (struct NS16550 *) (CONFIG_SYS_EUMB_ADDR + 0x4500); -#else -#error no valid console defined -#endif - -extern ulong get_bus_freq (ulong); - -static int bmw_serial_init(void) -{ - int clock_divisor = gd->bus_clk / 16 / gd->baudrate; - - NS16550_init (CONFIG_CONS_INDEX - 1, clock_divisor); - - return (0); -} - -static void bmw_serial_putc(const char c) -{ - if (c == '\n') { - serial_putc ('\r'); - } - NS16550_putc (console, c); -} - -static void bmw_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - - -static int bmw_serial_getc(void) -{ - return NS16550_getc (console); -} - -static int bmw_serial_tstc(void) -{ - return NS16550_tstc (console); -} - -static void bmw_serial_setbrg(void) -{ - int clock_divisor = get_bus_freq (0) / 16 / gd->baudrate; - - NS16550_reinit (console, clock_divisor); -} - -static struct serial_device bmw_serial_drv = { - .name = "bmw_serial", - .start = bmw_serial_init, - .stop = NULL, - .setbrg = bmw_serial_setbrg, - .putc = bmw_serial_putc, - .puts = bmw_serial_puts, - .getc = bmw_serial_getc, - .tstc = bmw_serial_tstc, -}; - -void bmw_serial_initialize(void) -{ - serial_register(&bmw_serial_drv); -} - -__weak struct serial_device *default_serial_console(void) -{ - return &bmw_serial_drv; -} diff --git a/board/cogent/serial.c b/board/cogent/serial.c index cd4a976f89..20631d162d 100644 --- a/board/cogent/serial.c +++ b/board/cogent/serial.c @@ -68,12 +68,6 @@ static void cogent_serial_putc(const char c) cma_mb_reg_write (&mbsp->ser_thr, c); } -static void cogent_serial_puts(const char *s) -{ - while (*s != '\0') - serial_putc (*s++); -} - static int cogent_serial_getc(void) { cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE; @@ -96,7 +90,7 @@ static struct serial_device cogent_serial_drv = { .stop = NULL, .setbrg = cogent_serial_setbrg, .putc = cogent_serial_putc, - .puts = cogent_serial_puts, + .puts = default_serial_puts, .getc = cogent_serial_getc, .tstc = cogent_serial_tstc, }; diff --git a/board/cpc45/Makefile b/board/cpc45/Makefile index 5c6b78f704..ac1d17440f 100644 --- a/board/cpc45/Makefile +++ b/board/cpc45/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o -COBJS = $(BOARD).o flash.o plx9030.o pd67290.o +COBJS = $(BOARD).o flash.o plx9030.o pd67290.o ide.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/cpc45/cpc45.c b/board/cpc45/cpc45.c index 1178822db3..22008066e6 100644 --- a/board/cpc45/cpc45.c +++ b/board/cpc45/cpc45.c @@ -260,21 +260,6 @@ int pcmcia_init(void) #endif -# ifdef CONFIG_IDE_LED -void ide_led (uchar led, uchar status) -{ - u_char val; - /* We have one PCMCIA slot and use LED H4 for the IDE Interface */ - val = readb(BCSR_BASE + 0x04); - if (status) { /* led on */ - val |= B_CTRL_LED0; - } else { - val &= ~B_CTRL_LED0; - } - writeb(val, BCSR_BASE + 0x04); -} -# endif - int board_eth_init(bd_t *bis) { return pci_eth_init(bis); diff --git a/board/cpc45/ide.c b/board/cpc45/ide.c new file mode 100644 index 0000000000..03be59f974 --- /dev/null +++ b/board/cpc45/ide.c @@ -0,0 +1,145 @@ +/* + * (C) Copyright 2001 + * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. + * + * (C) Copyright 2000-2011 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <ide.h> +#include <ata.h> +#include <asm/io.h> + +#define EIEIO __asm__ volatile ("eieio") +#define SYNC __asm__ volatile ("sync") + +void ide_input_swap_data(int dev, ulong *sect_buf, int words) +{ + uchar i; + volatile uchar *pbuf_even = + (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); + volatile uchar *pbuf_odd = + (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); + ushort *dbuf = (ushort *) sect_buf; + + while (words--) { + for (i = 0; i < 2; i++) { + *(((uchar *) (dbuf)) + 1) = *pbuf_even; + *(uchar *) dbuf = *pbuf_odd; + dbuf += 1; + } + } +} + +void ide_input_data(int dev, ulong *sect_buf, int words) +{ + uchar *dbuf; + volatile uchar *pbuf_even; + volatile uchar *pbuf_odd; + + pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); + pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); + dbuf = (uchar *) sect_buf; + while (words--) { + *dbuf++ = *pbuf_even; + EIEIO; + SYNC; + *dbuf++ = *pbuf_odd; + EIEIO; + SYNC; + *dbuf++ = *pbuf_even; + EIEIO; + SYNC; + *dbuf++ = *pbuf_odd; + EIEIO; + SYNC; + } +} + +void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts) +{ + uchar *dbuf; + volatile uchar *pbuf_even; + volatile uchar *pbuf_odd; + + pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); + pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); + dbuf = (uchar *) sect_buf; + while (shorts--) { + EIEIO; + *dbuf++ = *pbuf_even; + EIEIO; + *dbuf++ = *pbuf_odd; + } +} + +void ide_output_data(int dev, const ulong *sect_buf, int words) +{ + uchar *dbuf; + volatile uchar *pbuf_even; + volatile uchar *pbuf_odd; + + pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); + pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); + dbuf = (uchar *) sect_buf; + while (words--) { + EIEIO; + *pbuf_even = *dbuf++; + EIEIO; + *pbuf_odd = *dbuf++; + EIEIO; + *pbuf_even = *dbuf++; + EIEIO; + *pbuf_odd = *dbuf++; + } +} + +void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts) +{ + uchar *dbuf; + volatile uchar *pbuf_even; + volatile uchar *pbuf_odd; + + pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); + pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); + dbuf = (uchar *) sect_buf; + while (shorts--) { + EIEIO; + *pbuf_even = *dbuf++; + EIEIO; + *pbuf_odd = *dbuf++; + } +} + +void ide_led(uchar led, uchar status) +{ + u_char val; + /* We have one PCMCIA slot and use LED H4 for the IDE Interface */ + val = readb(BCSR_BASE + 0x04); + if (status) /* led on */ + val |= B_CTRL_LED0; + else + val &= ~B_CTRL_LED0; + + writeb(val, BCSR_BASE + 0x04); +} + diff --git a/board/esd/cpci750/ide.c b/board/esd/cpci750/ide.c index aa001df0b8..4ef10e7d72 100644 --- a/board/esd/cpci750/ide.c +++ b/board/esd/cpci750/ide.c @@ -30,7 +30,6 @@ #include <ide.h> #include <pci.h> -extern ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS]; int cpci_hd_type; int ata_device(int dev) diff --git a/board/esd/cpci750/serial.c b/board/esd/cpci750/serial.c index 25f8950e9a..160e0e0ae0 100644 --- a/board/esd/cpci750/serial.c +++ b/board/esd/cpci750/serial.c @@ -75,21 +75,13 @@ static void cpci750_serial_setbrg(void) galbrg_set_baudrate (CONFIG_MPSC_PORT, gd->baudrate); } - -static void cpci750_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static struct serial_device cpci750_serial_drv = { .name = "cpci750_serial", .start = cpci750_serial_init, .stop = NULL, .setbrg = cpci750_serial_setbrg, .putc = cpci750_serial_putc, - .puts = cpci750_serial_puts, + .puts = default_serial_puts, .getc = cpci750_serial_getc, .tstc = cpci750_serial_tstc, }; diff --git a/board/evb64260/serial.c b/board/evb64260/serial.c index 9fd429864a..b9ca1d760c 100644 --- a/board/evb64260/serial.c +++ b/board/evb64260/serial.c @@ -139,20 +139,13 @@ static void evb64260_serial_setbrg(void) #endif /* CONFIG_MPSC */ -static void evb64260_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static struct serial_device evb64260_serial_drv = { .name = "evb64260_serial", .start = evb64260_serial_init, .stop = NULL, .setbrg = evb64260_serial_setbrg, .putc = evb64260_serial_putc, - .puts = evb64260_serial_puts, + .puts = default_serial_puts, .getc = evb64260_serial_getc, .tstc = evb64260_serial_tstc, }; diff --git a/board/freescale/m5282evb/u-boot.lds b/board/freescale/m5282evb/u-boot.lds index 4ba1964f7e..500fefd445 100644 --- a/board/freescale/m5282evb/u-boot.lds +++ b/board/freescale/m5282evb/u-boot.lds @@ -29,6 +29,9 @@ SECTIONS { arch/m68k/cpu/mcf52x2/start.o (.text*) + . = DEFINED(env_offset) ? env_offset : .; + common/env_embedded.o (.text*) + *(.text*) } _etext = .; diff --git a/board/ivm/ivm.c b/board/ivm/ivm.c index 71d64d434f..ab294794bd 100644 --- a/board/ivm/ivm.c +++ b/board/ivm/ivm.c @@ -333,13 +333,59 @@ void show_boot_progress (int status) void ide_set_reset (int on) { volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; + int i; /* * Configure PC for IDE Reset Pin */ if (on) { /* assert RESET */ immr->im_ioport.iop_pcdat &= ~(CONFIG_SYS_PC_IDE_RESET); + +#ifdef CONFIG_SYS_PB_12V_ENABLE + /* 12V Enable output OFF */ + immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); + + immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE); + immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE); + immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE; + + /* wait 500 ms for the voltage to stabilize */ + for (i = 0; i < 500; ++i) + udelay(1000); +#endif /* CONFIG_SYS_PB_12V_ENABLE */ } else { /* release RESET */ +#ifdef CONFIG_SYS_PB_12V_ENABLE + /* 12V Enable output ON */ + immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; +#endif /* CONFIG_SYS_PB_12V_ENABLE */ + +#ifdef CONFIG_SYS_PB_IDE_MOTOR + /* configure IDE Motor voltage monitor pin as input */ + immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR); + immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR); + immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR); + +/* wait up to 1 s for the motor voltage to stabilize */ + for (i = 0; i < 1000; ++i) { + if ((immr->im_cpm.cp_pbdat + & CONFIG_SYS_PB_IDE_MOTOR) != 0) + break; + udelay(1000); + } + + if (i == 1000) { /* Timeout */ + printf("\nWarning: 5V for IDE Motor missing\n"); +#ifdef CONFIG_STATUS_LED +#ifdef STATUS_LED_YELLOW + status_led_set(STATUS_LED_YELLOW, STATUS_LED_ON); +#endif +#ifdef STATUS_LED_GREEN + status_led_set(STATUS_LED_GREEN, STATUS_LED_OFF); +#endif +#endif /* CONFIG_STATUS_LED */ + } +#endif /* CONFIG_SYS_PB_IDE_MOTOR */ + immr->im_ioport.iop_pcdat |= CONFIG_SYS_PC_IDE_RESET; } diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c index 525c97aea6..54f25e097c 100644 --- a/board/kmc/kzm9g/kzm9g.c +++ b/board/kmc/kzm9g/kzm9g.c @@ -43,6 +43,7 @@ DECLARE_GLOBAL_DATA_PTR; #define SMSTPCR1_CMT0 (1 << 24) #define SMSTPCR1_I2C0 (1 << 16) #define SMSTPCR3_USB (1 << 22) +#define SMSTPCR3_I2C1 (1 << 23) #define PORT32CR (0xE6051020) #define PORT33CR (0xE6051021) @@ -287,8 +288,8 @@ int board_early_init_f(void) clrbits_le32(&cpg->smstpcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0)); clrbits_le32(&cpg_srcr->srcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0)); - clrbits_le32(&cpg->smstpcr3, SMSTPCR3_USB); - clrbits_le32(&cpg_srcr->srcr3, SMSTPCR3_USB); + clrbits_le32(&cpg->smstpcr3, (SMSTPCR3_USB|SMSTPCR3_I2C1)); + clrbits_le32(&cpg_srcr->srcr3, (SMSTPCR3_USB|SMSTPCR3_I2C1)); writel(VCLKCR1_D, &cpg->vclkcr1); /* Setup SCIF4 / workaround */ @@ -343,6 +344,8 @@ int board_init(void) gpio_direction_output(GPIO_PORT15, 1); /* I2C */ + gpio_request(GPIO_FN_PORT237_I2C_SCL2, NULL); + gpio_request(GPIO_FN_PORT236_I2C_SDA2, NULL); gpio_request(GPIO_FN_PORT27_I2C_SCL3, NULL); gpio_request(GPIO_FN_PORT28_I2C_SDA3, NULL); diff --git a/board/linkstation/ide.c b/board/linkstation/ide.c index f3e3fce824..541c958fca 100644 --- a/board/linkstation/ide.c +++ b/board/linkstation/ide.c @@ -37,7 +37,6 @@ #define IT8212_PCI_IdeBusSkewCONTROL 0x4c #define IT8212_PCI_IdeDrivingCURRENT 0x42 -extern ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS]; extern struct pci_controller hose; int ide_preinit (void) diff --git a/board/pcippc2/fpga_serial.c b/board/pcippc2/fpga_serial.c index 5f89d9b125..de61ca0e56 100644 --- a/board/pcippc2/fpga_serial.c +++ b/board/pcippc2/fpga_serial.c @@ -73,13 +73,6 @@ void fpga_serial_putc (char c) } } -void fpga_serial_puts (const char *s) -{ - while (*s) { - fpga_serial_print (*s++); - } -} - int fpga_serial_getc (void) { while ((in8 (UART (LSR)) & 0x01) == 0); diff --git a/board/pcippc2/fpga_serial.h b/board/pcippc2/fpga_serial.h index 52750143c4..106fbf7a50 100644 --- a/board/pcippc2/fpga_serial.h +++ b/board/pcippc2/fpga_serial.h @@ -26,7 +26,6 @@ extern void fpga_serial_init (int); extern void fpga_serial_putc (char); -extern void fpga_serial_puts (const char *); extern int fpga_serial_getc (void); extern int fpga_serial_tstc (void); extern void fpga_serial_setbrg (void); diff --git a/board/pcippc2/pcippc2.c b/board/pcippc2/pcippc2.c index 4a91458e8e..5e6fc58cf7 100644 --- a/board/pcippc2/pcippc2.c +++ b/board/pcippc2/pcippc2.c @@ -29,6 +29,7 @@ #include <watchdog.h> #include <pci.h> #include <netdev.h> +#include <serial.h> #include "hardware.h" #include "pcippc2.h" @@ -129,7 +130,7 @@ int misc_init_r (void) fpga_serial_init (sconsole_get_baudrate ()); sconsole_putc = fpga_serial_putc; - sconsole_puts = fpga_serial_puts; + sconsole_puts = default_serial_puts; sconsole_getc = fpga_serial_getc; sconsole_tstc = fpga_serial_tstc; sconsole_setbrg = fpga_serial_setbrg; diff --git a/board/pcs440ep/pcs440ep.c b/board/pcs440ep/pcs440ep.c index 746a54c5e3..f8345ddb46 100644 --- a/board/pcs440ep/pcs440ep.c +++ b/board/pcs440ep/pcs440ep.c @@ -32,6 +32,7 @@ #include <sha1.h> #include <asm/io.h> #include <net.h> +#include <ata.h> DECLARE_GLOBAL_DATA_PTR; @@ -672,7 +673,6 @@ U_BOOT_CMD( * ( bus per_addr 20 -30 is connectsd on CF bus A10-A0) * These values are shifted */ -extern ulong *ide_bus_offset; void inline ide_outb(int dev, int port, unsigned char val) { debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n", @@ -714,3 +714,58 @@ void ide_set_reset (int idereset) udelay (10000); } #endif /* defined (CONFIG_CMD_IDE) && defined (CONFIG_IDE_RESET) */ + + +/* this is motly the same as it should, causing a little code duplication */ +#if defined(CONFIG_CMD_IDE) +#define EIEIO __asm__ volatile ("eieio") + +void ide_input_swap_data(int dev, ulong *sect_buf, int words) +{ + volatile ushort *pbuf = + (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); + ushort *dbuf = (ushort *) sect_buf; + + debug("in input swap data base for read is %lx\n", + (unsigned long) pbuf); + + while (words--) { + *dbuf++ = *pbuf; + *dbuf++ = *pbuf; + } +} + +void ide_output_data(int dev, const ulong *sect_buf, int words) +{ + ushort *dbuf; + volatile ushort *pbuf; + + pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); + dbuf = (ushort *) sect_buf; + while (words--) { + EIEIO; + *pbuf = ld_le16(dbuf++); + EIEIO; + *pbuf = ld_le16(dbuf++); + } +} + +void ide_input_data(int dev, ulong *sect_buf, int words) +{ + ushort *dbuf; + volatile ushort *pbuf; + + pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); + dbuf = (ushort *) sect_buf; + + debug("in input data base for read is %lx\n", (unsigned long) pbuf); + + while (words--) { + EIEIO; + *dbuf++ = ld_le16(pbuf); + EIEIO; + *dbuf++ = ld_le16(pbuf); + } +} + +#endif diff --git a/board/prodrive/p3mx/serial.c b/board/prodrive/p3mx/serial.c index 2f4d294b9d..3536933c00 100644 --- a/board/prodrive/p3mx/serial.c +++ b/board/prodrive/p3mx/serial.c @@ -75,21 +75,13 @@ static void p3mx_serial_setbrg(void) galbrg_set_baudrate (CONFIG_MPSC_PORT, gd->baudrate); } - -static void p3mx_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static struct serial_device p3mx_serial_drv = { .name = "p3mx_serial", .start = p3mx_serial_init, .stop = NULL, .setbrg = p3mx_serial_setbrg, .putc = p3mx_serial_putc, - .puts = p3mx_serial_puts, + .puts = default_serial_puts, .getc = p3mx_serial_getc, .tstc = p3mx_serial_tstc, }; diff --git a/board/qemu-mips/config.mk b/board/qemu-mips/config.mk deleted file mode 100644 index 27cd34ac36..0000000000 --- a/board/qemu-mips/config.mk +++ /dev/null @@ -1,10 +0,0 @@ -# -# Qemu -M mips system emulator -# See http://fabrice.bellard.free.fr/qemu -# - -# ROM version -CONFIG_SYS_TEXT_BASE = 0xbfc00000 - -# RAM version -#CONFIG_SYS_TEXT_BASE = 0x80001000 diff --git a/board/qemu-mips/u-boot.lds b/board/qemu-mips/u-boot.lds index 9460b2010c..4d9580f817 100644 --- a/board/qemu-mips/u-boot.lds +++ b/board/qemu-mips/u-boot.lds @@ -24,7 +24,11 @@ /* OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips") */ +#if defined(CONFIG_64BIT) +OUTPUT_FORMAT("elf64-tradbigmips", "elf64-tradbigmips", "elf64-tradlittlemips") +#else OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradlittlemips") +#endif OUTPUT_ARCH(mips) ENTRY(_start) SECTIONS @@ -63,7 +67,11 @@ SECTIONS } uboot_end_data = .; +#if defined(CONFIG_64BIT) + num_got_entries = (__got_end - __got_start) >> 3; +#else num_got_entries = (__got_end - __got_start) >> 2; +#endif . = ALIGN(4); .sbss : { *(.sbss*) } diff --git a/board/sbc8560/README b/board/sbc8560/README deleted file mode 100644 index c4b642236e..0000000000 --- a/board/sbc8560/README +++ /dev/null @@ -1,57 +0,0 @@ -The port was tested on Wind River System Sbc8560 board -<www.windriver.com>. U-Boot was installed on the flash memory of the -CPU card (no the SODIMM). - -NOTE: Please configure uboot compile to the proper PCI frequency and -setup the appropriate DIP switch settings. - -SBC8560 board: - -Make sure boards switches are set to their appropriate conditions. -Refer to the Engineering Reference Guide ERG-00300-002. Of particular -importance are: 1) the settings for JP4 (JP4 1-3 and 2-4), which -select the on-board FLASH device (Intel 28F128Jx); 2) The settings -for the Clock SW9 (33 MHz or 66 MHz). - - Note: SW9 Settings: 66 MHz - 4:1 ratio CCB clocks:SYSCLK - 3:1 ration e500 Core:CCB - pos1 - on, pos2 - on, pos3 - off, pos4 - on, pos5 - off, pos6 - on - Note: SW9 Settings: 33 MHz - 8:1 ratio CCB clocks:SYSCLK - 3:1 ration e500 Core:CCB - pos1 - on, pos2 - on, pos3 - on, pos4 - off, pos5 - off, pos6 - on - - -Flashing the FLASH device with the "Wind River ICE": - -1) Properly connect and configure the Wind River ICE to the target - JTAG port. This includes running the SBC8560 register script. Make - sure target memory can be read and written. - -2) Build the u-boot image: - make distclean - make SBC8560_66_config or SBC8560_33_config - make CROSS_COMPILE=.../ELDK3.0/ppc_8xx-/ all - - Note: reference is made to the ELDK3.0 compiler. Further, it seems - the ppc_8xx compiler is required for the 85xx (no 85xx - designated compiler in ELDK3.0) - -3) Convert the uboot (.elf) file to a uboot.bin file (using - visionClick converter). The bin file should be converted from - fffc0000 to ffffffff - -4) Setup the Flash Utility (tools menu) for: - - Do a "dc clr" [visionClick] to load the default register settings - Determine the clock speed of the PCI bus and set SW9 accordingly - Note: the speed of the PCI bus defaults to the slowest PCI card - PlayBack the "default" register file for the SBC8560 - Select the uboot.bin file with zero bias - Select the initialize Target prior to programming - Select the V28F640Jx (8192 x 8) 1 device FLASH Algorithm - Select the erase base address from FFFC0000 to FFFFFFFF - Select the start address from 0 with size of 4000 - -5) Erase and Program diff --git a/board/sbc8560/ddr.c b/board/sbc8560/ddr.c deleted file mode 100644 index e9babc6477..0000000000 --- a/board/sbc8560/ddr.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright 2008 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * Version 2 as published by the Free Software Foundation. - */ - -#include <common.h> - -#include <asm/fsl_ddr_sdram.h> -#include <asm/fsl_ddr_dimm_params.h> - -void fsl_ddr_board_options(memctl_options_t *popts, - dimm_params_t *pdimm, - unsigned int ctrl_num) -{ - /* - * Factors to consider for CPO: - * - frequency - * - ddr1 vs. ddr2 - */ - popts->cpo_override = 0; - - /* - * Factors to consider for write data delay: - * - number of DIMMs - * - * 1 = 1/4 clock delay - * 2 = 1/2 clock delay - * 3 = 3/4 clock delay - * 4 = 1 clock delay - * 5 = 5/4 clock delay - * 6 = 3/2 clock delay - */ - popts->write_data_delay = 3; - - /* - * Factors to consider for half-strength driver enable: - * - number of DIMMs installed - */ - popts->half_strength_driver_enable = 0; -} diff --git a/board/sbc8560/law.c b/board/sbc8560/law.c deleted file mode 100644 index 4e6baed2f4..0000000000 --- a/board/sbc8560/law.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright 2008 Freescale Semiconductor, Inc. - * - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/fsl_law.h> -#include <asm/mmu.h> - -/* LAW(Local Access Window) configuration: - * 0000_0000-0800_0000: DDR(512M) -or- larger - * c000_0000-cfff_ffff: PCI(256M) - * d000_0000-dfff_ffff: RapidIO(256M) - * e000_0000-ffff_ffff: localbus(512M) - * e000_0000-e3ff_ffff: LBC 64M, 32-bit flash on CS6 - * e400_0000-e7ff_ffff: LBC 64M, 32-bit flash on CS1 - * e800_0000-efff_ffff: LBC 128M, nothing here - * f000_0000-f3ff_ffff: LBC 64M, SDRAM on CS3 - * f400_0000-f7ff_ffff: LBC 64M, SDRAM on CS4 - * f800_0000-fdff_ffff: LBC 64M, nothing here - * fc00_0000-fcff_ffff: LBC 16M, CSR,RTC,UART,etc on CS5 - * fd00_0000-fdff_ffff: LBC 16M, nothing here - * fe00_0000-feff_ffff: LBC 16M, nothing here - * ff00_0000-ff6f_ffff: LBC 7M, nothing here - * ff70_0000-ff7f_ffff: CCSRBAR 1M - * ff80_0000-ffff_ffff: LBC 8M, 8-bit flash on CS0 - * Note: CCSRBAR and L2-as-SRAM don't need configure Local Access - * Window. - * Note: If flash is 8M at default position(last 8M),no LAW needed. - */ - -struct law_entry law_table[] = { -#ifndef CONFIG_SPD_EEPROM - SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR), -#endif - SET_LAW(CONFIG_SYS_PCI_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI), - SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_LBC), -}; - -int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/sbc8560/sbc8560.c b/board/sbc8560/sbc8560.c deleted file mode 100644 index 98bc7df4c8..0000000000 --- a/board/sbc8560/sbc8560.c +++ /dev/null @@ -1,369 +0,0 @@ -/* - * (C) Copyright 2003,Motorola Inc. - * Xianghua Xiao, (X.Xiao@motorola.com) - * - * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com> - * - * (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>. - * Added support for Wind River SBC8560 board - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <common.h> -#include <asm/processor.h> -#include <asm/mmu.h> -#include <asm/immap_85xx.h> -#include <asm/fsl_ddr_sdram.h> -#include <ioports.h> -#include <spd_sdram.h> -#include <miiphy.h> -#include <libfdt.h> -#include <fdt_support.h> - -/* - * I/O Port configuration table - * - * if conf is 1, then that port pin will be configured at boot time - * according to the five values podr/pdir/ppar/psor/pdat for that entry - */ - -const iop_conf_t iop_conf_tab[4][32] = { - - /* Port A configuration */ - { /* conf ppar psor pdir podr pdat */ - /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */ - /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */ - /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */ - /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */ - /* PA27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxSOC */ - /* PA26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxClav */ - /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */ - /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */ - /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */ - /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */ - /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */ - /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */ - /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */ - /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */ - /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */ - /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */ - /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */ - /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */ - /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */ - /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */ - /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */ - /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */ - /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 L1TXD */ - /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 L1RXD */ - /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */ - /* PA6 */ { 0, 1, 1, 1, 0, 0 }, /* TDM A1 L1RSYNC */ - /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */ - /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */ - /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */ - /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */ - /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FREERUN */ - /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */ - }, - - /* Port B configuration */ - { /* conf ppar psor pdir podr pdat */ - /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */ - /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */ - /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */ - /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */ - /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */ - /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */ - /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */ - /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */ - /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */ - /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */ - /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */ - /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */ - /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */ - /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */ - /* PB17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */ - /* PB16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */ - /* PB15 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */ - /* PB14 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */ - /* PB13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:COL */ - /* PB12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:CRS */ - /* PB11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ - /* PB10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ - /* PB9 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ - /* PB8 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ - /* PB7 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ - /* PB6 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ - /* PB5 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ - /* PB4 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ - /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */ - }, - - /* Port C */ - { /* conf ppar psor pdir podr pdat */ - /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */ - /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */ - /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */ - /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */ - /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* UART Clock in */ - /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */ - /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */ - /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */ - /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */ - /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */ - /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */ - /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */ - /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */ - /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */ - /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */ - /* PC16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */ - /* PC15 */ { 1, 1, 0, 0, 0, 0 }, /* PC15 */ - /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */ - /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */ - /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */ - /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */ - /* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* FETHMDC */ - /* PC9 */ { 1, 0, 0, 0, 0, 0 }, /* FETHMDIO */ - /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */ - /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */ - /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */ - /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */ - /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */ - /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */ - /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */ - /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */ - /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */ - }, - - /* Port D */ - { /* conf ppar psor pdir podr pdat */ - /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */ - /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */ - /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 RTS */ - /* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 RxD */ - /* PD27 */ { 1, 1, 1, 1, 0, 0 }, /* SCC2 TxD */ - /* PD26 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 RTS */ - /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */ - /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */ - /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */ - /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */ - /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */ - /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */ - /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */ - /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */ - /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */ - /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */ - /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */ - /* PD14 */ { 0, 0, 0, 1, 0, 0 }, /* LED */ - /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */ - /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */ - /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */ - /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */ - /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */ - /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */ - /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */ - /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */ - /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */ - /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */ - /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */ - } -}; - -int board_early_init_f (void) -{ -#if defined(CONFIG_PCI) - volatile ccsr_pcix_t *pci = (void *)(CONFIG_SYS_MPC85xx_PCIX_ADDR); - - pci->peer &= 0xfffffffdf; /* disable master abort */ -#endif - return 0; -} - -void reset_phy (void) -{ -#if defined(CONFIG_ETHER_ON_FCC) /* avoid compile warnings for now */ - volatile unsigned char *bcsr = (unsigned char *) CONFIG_SYS_BCSR; -#endif - /* reset Giga bit Ethernet port if needed here */ - - /* reset the CPM FEC port */ -#if (CONFIG_ETHER_INDEX == 2) - bcsr[0] &= ~0x20; - udelay(2); - bcsr[0] |= 0x20; - udelay(1000); -#elif (CONFIG_ETHER_INDEX == 3) - bcsr[0] &= ~0x10; - udelay(2); - bcsr[0] |= 0x10; - udelay(1000); -#endif -#if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC) - /* reset PHY */ - miiphy_reset("FCC1", 0x0); - - /* change PHY address to 0x02 */ - bb_miiphy_write(NULL, 0, MII_MIPSCR, 0xf028); - - bb_miiphy_write(NULL, 0x02, MII_BMCR, - BMCR_ANENABLE | BMCR_ANRESTART); -#endif /* CONFIG_MII */ -} - -int checkboard (void) -{ - sys_info_t sysinfo; - char buf[32]; - - get_sys_info (&sysinfo); - -#ifdef CONFIG_SBC8560 - printf ("Board: Wind River SBC8560 Board\n"); -#else - printf ("Board: Wind River SBC8540 Board\n"); -#endif - printf ("\tCPU: %s MHz\n", strmhz(buf, sysinfo.freqProcessor[0])); - printf ("\tCCB: %s MHz\n", strmhz(buf, sysinfo.freqSystemBus)); - printf ("\tDDR: %s MHz\n", strmhz(buf, sysinfo.freqSystemBus/2)); - if((CONFIG_SYS_LBC_LCRR & 0x0f) == 2 || (CONFIG_SYS_LBC_LCRR & 0x0f) == 4 \ - || (CONFIG_SYS_LBC_LCRR & 0x0f) == 8) { - printf ("\tLBC: %s MHz\n", - strmhz(buf, sysinfo.freqSystemBus/(CONFIG_SYS_LBC_LCRR & 0x0f))); - } else { - printf("\tLBC: unknown\n"); - } - printf("\tCPM: %s MHz\n", strmhz(buf, sysinfo.freqSystemBus)); - printf("L1 D-cache 32KB, L1 I-cache 32KB enabled.\n"); - return (0); -} - - -#if defined(CONFIG_SYS_DRAM_TEST) -int testdram (void) -{ - uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START; - uint *pend = (uint *) CONFIG_SYS_MEMTEST_END; - uint *p; - - printf("SDRAM test phase 1:\n"); - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("SDRAM test phase 2:\n"); - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("SDRAM test passed.\n"); - return 0; -} -#endif - -#if !defined(CONFIG_SPD_EEPROM) -/************************************************************************* - * fixed sdram init -- doesn't use serial presence detect. - ************************************************************************/ -phys_size_t fixed_sdram(void) -{ - -#define CONFIG_SYS_DDR_CONTROL 0xc2000000 - - #ifndef CONFIG_SYS_RAMBOOT - volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR); - -#if (CONFIG_SYS_SDRAM_SIZE == 512) - ddr->cs0_bnds = 0x0000000f; -#else - ddr->cs0_bnds = 0x00000007; -#endif - ddr->cs1_bnds = 0x0010001f; - ddr->cs2_bnds = 0x00000000; - ddr->cs3_bnds = 0x00000000; - ddr->cs0_config = 0x80000102; - ddr->cs1_config = 0x80000102; - ddr->cs2_config = 0x00000000; - ddr->cs3_config = 0x00000000; - ddr->timing_cfg_1 = 0x37334321; - ddr->timing_cfg_2 = 0x00000800; - ddr->sdram_cfg = 0x42000000; - ddr->sdram_mode = 0x00000022; - ddr->sdram_interval = 0x05200100; - ddr->err_sbe = 0x00ff0000; - #if defined (CONFIG_DDR_ECC) - ddr->err_disable = 0x0000000D; - #endif - asm("sync;isync;msync"); - udelay(500); - #if defined (CONFIG_DDR_ECC) - /* Enable ECC checking */ - ddr->sdram_cfg = (CONFIG_SYS_DDR_CONTROL | 0x20000000); - #else - ddr->sdram_cfg = CONFIG_SYS_DDR_CONTROL; - #endif - asm("sync; isync; msync"); - udelay(500); - #endif - return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; -} -#endif /* !defined(CONFIG_SPD_EEPROM) */ - - -#if defined(CONFIG_OF_BOARD_SETUP) -void -ft_board_setup(void *blob, bd_t *bd) -{ - int node; -#ifdef CONFIG_PCI - const char *path; -#endif - - ft_cpu_setup(blob, bd); - - node = fdt_path_offset(blob, "/aliases"); - if (node >= 0) { -#ifdef CONFIG_PCI - path = fdt_getprop(blob, node, "pci0", NULL); - if (path) { - tmp[1] = hose.last_busno - hose.first_busno; - do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); - } -#endif - } -} -#endif diff --git a/board/sbc8560/tlb.c b/board/sbc8560/tlb.c deleted file mode 100644 index fe0ac763af..0000000000 --- a/board/sbc8560/tlb.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Copyright 2008 Freescale Semiconductor, Inc. - * - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/mmu.h> - -struct fsl_e_tlb_entry tlb_table[] = { -/* TLB for CCSRBAR (IMMR) */ - SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 1, BOOKE_PAGESZ_1M, 1), - -/* TLB for Local Bus stuff, just map the whole 512M */ -/* note that the LBC SDRAM is cache-inhibit and guarded, like everything else */ - - SET_TLB_ENTRY(1, 0xe0000000, 0xe0000000, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 2, BOOKE_PAGESZ_256M, 1), - - SET_TLB_ENTRY(1, 0xf0000000, 0xf0000000, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 3, BOOKE_PAGESZ_256M, 1), - -#if !defined(CONFIG_SPD_EEPROM) - SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, - MAS3_SX|MAS3_SW|MAS3_SR, 0, - 0, 4, BOOKE_PAGESZ_256M, 1), - - SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, - MAS3_SX|MAS3_SW|MAS3_SR, 0, - 0, 5, BOOKE_PAGESZ_256M, 1), -#endif - - SET_TLB_ENTRY(1, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR, - MAS3_SX|MAS3_SW|MAS3_SR, 0, - 0, 6, BOOKE_PAGESZ_16K, 1), - - SET_TLB_ENTRY(1, CONFIG_SYS_PCI_MEM_PHYS, CONFIG_SYS_PCI_MEM_PHYS, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 7, BOOKE_PAGESZ_256M, 1), -}; - -int num_tlb_entries = ARRAY_SIZE(tlb_table); diff --git a/boards.cfg b/boards.cfg index d467f566c0..83e7084de7 100644 --- a/boards.cfg +++ b/boards.cfg @@ -405,6 +405,8 @@ M5485HFE m68k mcf547x_8x m548xevb freescale - microblaze-generic microblaze microblaze microblaze-generic xilinx qemu_mips mips mips32 qemu-mips - - qemu-mips:SYS_BIG_ENDIAN qemu_mipsel mips mips32 qemu-mips - - qemu-mips:SYS_LITTLE_ENDIAN +qemu_mips64 mips mips64 qemu-mips - - qemu-mips64:SYS_BIG_ENDIAN +qemu_mips64el mips mips64 qemu-mips - - qemu-mips64:SYS_LITTLE_ENDIAN vct_platinum mips mips32 vct micronas - vct:VCT_PLATINUM vct_platinumavc mips mips32 vct micronas - vct:VCT_PLATINUMAVC vct_platinumavc_onenand mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND @@ -545,7 +547,6 @@ Alaska8220 powerpc mpc8220 alaska sorcery powerpc mpc8220 Yukon8220 powerpc mpc8220 alaska A3000 powerpc mpc824x a3000 -BMW powerpc mpc824x bmw CPC45 powerpc mpc824x cpc45 - - CPC45 CPC45_ROMBOOT powerpc mpc824x cpc45 - - CPC45:BOOT_ROM CU824 powerpc mpc824x cu824 @@ -682,17 +683,11 @@ suvd3 powerpc mpc83xx km83xx keymile tuge1 powerpc mpc83xx km83xx keymile - tuxx1:KM_DISABLE_APP2,TUGE1 tuxx1 powerpc mpc83xx km83xx keymile kmsupx5 powerpc mpc83xx km83xx keymile - tuxx1:KM_DISABLE_APP2,KMSUPX5 -sbc8540 powerpc mpc85xx sbc8560 - - SBC8540 -sbc8540_33 powerpc mpc85xx sbc8560 - - SBC8540 -sbc8540_66 powerpc mpc85xx sbc8560 - - SBC8540 sbc8548 powerpc mpc85xx sbc8548 - - sbc8548 sbc8548_PCI_33 powerpc mpc85xx sbc8548 - - sbc8548:PCI,33 sbc8548_PCI_33_PCIE powerpc mpc85xx sbc8548 - - sbc8548:PCI,33,PCIE sbc8548_PCI_66 powerpc mpc85xx sbc8548 - - sbc8548:PCI,66 sbc8548_PCI_66_PCIE powerpc mpc85xx sbc8548 - - sbc8548:PCI,66,PCIE -sbc8560 powerpc mpc85xx sbc8560 - - sbc8560 -sbc8560_33 powerpc mpc85xx sbc8560 - - sbc8560 -sbc8560_66 powerpc mpc85xx sbc8560 - - sbc8560 socrates powerpc mpc85xx socrates HWW1U1A powerpc mpc85xx hww1u1a exmeritus MPC8536DS powerpc mpc85xx mpc8536ds freescale - MPC8536DS diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index 286c8c8011..48cdd16dd2 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -148,7 +148,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_mhz("ethspeed", bd->bi_ethspeed); #endif printf("IP addr = %s\n", getenv("ipaddr")); - printf("baudrate = %6ld bps\n", bd->bi_baudrate); + printf("baudrate = %6u bps\n", bd->bi_baudrate); print_num("relocaddr", gd->relocaddr); return 0; } @@ -175,7 +175,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %ld bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", bd->bi_baudrate); return 0; } @@ -198,7 +198,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %ld bps\n", (ulong)bd->bi_baudrate); + printf("baudrate = %u bps\n", (ulong)bd->bi_baudrate); return 0; } @@ -231,7 +231,7 @@ int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %6ld bps\n", bd->bi_baudrate); + printf("baudrate = %6u bps\n", bd->bi_baudrate); return 0; } @@ -277,7 +277,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %ld bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", bd->bi_baudrate); return 0; } @@ -304,7 +304,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); - printf("baudrate = %d bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", bd->bi_baudrate); return 0; } @@ -324,7 +324,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); - printf("baudrate = %d bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", bd->bi_baudrate); return 0; } @@ -344,7 +344,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); - printf("baudrate = %lu bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", bd->bi_baudrate); return 0; } @@ -369,7 +369,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %d bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", bd->bi_baudrate); #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) print_num("TLB addr", gd->tlb_addr); #endif @@ -405,7 +405,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %ld bps\n", (ulong)bd->bi_baudrate); + printf("baudrate = %u bps\n", bd->bi_baudrate); return 0; } @@ -439,7 +439,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("ip_addr = %s\n", getenv("ipaddr")); print_mhz("ethspeed", bd->bi_ethspeed); #endif - printf("baudrate = %d bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", bd->bi_baudrate); return 0; } @@ -487,7 +487,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %d bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", bd->bi_baudrate); return 0; } @@ -509,7 +509,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %ld bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", bd->bi_baudrate); return 0; } diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c index 795814d88f..82e63e1322 100644 --- a/common/cmd_i2c.c +++ b/common/cmd_i2c.c @@ -223,6 +223,54 @@ static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv return 0; } +static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + u_char chip; + uint devaddr, alen, length; + u_char *memaddr; + + if (argc != 5) + return cmd_usage(cmdtp); + + /* + * memaddr is the address where to store things in memory + */ + memaddr = (u_char *)simple_strtoul(argv[1], NULL, 16); + + /* + * I2C chip address + */ + chip = simple_strtoul(argv[2], NULL, 16); + + /* + * I2C data address within the chip. This can be 1 or + * 2 bytes long. Some day it might be 3 bytes long :-). + */ + devaddr = simple_strtoul(argv[3], NULL, 16); + alen = get_alen(argv[3]); + if (alen > 3) + return cmd_usage(cmdtp); + + /* + * Length is the number of objects, not number of bytes. + */ + length = simple_strtoul(argv[4], NULL, 16); + + while (length-- > 0) { + if (i2c_write(chip, devaddr++, alen, memaddr++, 1) != 0) { + puts("Error writing to the chip.\n"); + return 1; + } +/* + * No write delay with FRAM devices. + */ +#if !defined(CONFIG_SYS_I2C_FRAM) + udelay(11000); +#endif + } + return 0; +} + /* * Syntax: * i2c md {i2c_chip} {addr}{.0, .1, .2} {len} @@ -557,18 +605,28 @@ mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const arg /* * Syntax: - * i2c probe {addr}{.0, .1, .2} + * i2c probe {addr} + * + * Returns zero (success) if one or more I2C devices was found */ static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int j; + int addr = -1; + int found = 0; #if defined(CONFIG_SYS_I2C_NOPROBES) int k, skip; uchar bus = GET_BUS_NUM; #endif /* NOPROBES */ + if (argc == 2) + addr = simple_strtol(argv[1], 0, 16); + puts ("Valid chip addresses:"); for (j = 0; j < 128; j++) { + if ((0 <= addr) && (j != addr)) + continue; + #if defined(CONFIG_SYS_I2C_NOPROBES) skip = 0; for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) { @@ -580,8 +638,10 @@ static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv if (skip) continue; #endif - if (i2c_probe(j) == 0) + if (i2c_probe(j) == 0) { printf(" %02X", j); + found++; + } } putc ('\n'); @@ -594,7 +654,7 @@ static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv putc ('\n'); #endif - return 0; + return (0 == found); } /* @@ -1282,6 +1342,7 @@ static cmd_tbl_t cmd_i2c_sub[] = { U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""), U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""), U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""), + U_BOOT_CMD_MKENT(write, 5, 0, do_i2c_write, "", ""), U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""), #if defined(CONFIG_CMD_SDRAM) U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""), @@ -1331,8 +1392,9 @@ U_BOOT_CMD( "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n" "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n" "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n" - "i2c probe - show devices on the I2C bus\n" + "i2c probe [address] - test for and show device(s) on the I2C bus\n" "i2c read chip address[.0, .1, .2] length memaddress - read to memory \n" + "i2c write memaddress chip address[.0, .1, .2] length - write memory to i2c\n" "i2c reset - re-init the I2C Controller\n" #if defined(CONFIG_CMD_SDRAM) "i2c sdram chip - print SDRAM configuration information\n" diff --git a/common/cmd_ide.c b/common/cmd_ide.c index bae7767310..d508e9f75b 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -38,14 +38,6 @@ # include <pcmcia.h> #endif -#ifdef CONFIG_8xx -# include <mpc8xx.h> -#endif - -#ifdef CONFIG_MPC5xxx -#include <mpc5xxx.h> -#endif - #include <ide.h> #include <ata.h> @@ -53,10 +45,6 @@ # include <status_led.h> #endif -#ifdef CONFIG_IDE_8xx_DIRECT -DECLARE_GLOBAL_DATA_PTR; -#endif - #ifdef __PPC__ # define EIEIO __asm__ volatile ("eieio") # define SYNC __asm__ volatile ("sync") @@ -65,45 +53,6 @@ DECLARE_GLOBAL_DATA_PTR; # define SYNC /* nothing */ #endif -#ifdef CONFIG_IDE_8xx_DIRECT -/* Timings for IDE Interface - * - * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk - * 70 165 30 PIO-Mode 0, [ns] - * 4 9 2 [Cycles] - * 50 125 20 PIO-Mode 1, [ns] - * 3 7 2 [Cycles] - * 30 100 15 PIO-Mode 2, [ns] - * 2 6 1 [Cycles] - * 30 80 10 PIO-Mode 3, [ns] - * 2 5 1 [Cycles] - * 25 70 10 PIO-Mode 4, [ns] - * 2 4 1 [Cycles] - */ - -const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] = -{ - /* Setup Length Hold */ - { 70, 165, 30 }, /* PIO-Mode 0, [ns] */ - { 50, 125, 20 }, /* PIO-Mode 1, [ns] */ - { 30, 101, 15 }, /* PIO-Mode 2, [ns] */ - { 30, 80, 10 }, /* PIO-Mode 3, [ns] */ - { 25, 70, 10 }, /* PIO-Mode 4, [ns] */ -}; - -static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1]; - -#ifndef CONFIG_SYS_PIO_MODE -#define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */ -#endif -static int pio_mode = CONFIG_SYS_PIO_MODE; - -/* Make clock cycles and always round up */ - -#define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U ) - -#endif /* CONFIG_IDE_8xx_DIRECT */ - /* ------------------------------------------------------------------------- */ /* Current I/O Device */ @@ -124,19 +73,6 @@ static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS]; block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE]; /* ------------------------------------------------------------------------- */ -#ifdef CONFIG_IDE_LED -# if !defined(CONFIG_BMS2003) && \ - !defined(CONFIG_CPC45) && \ - !defined(CONFIG_KUP4K) && \ - !defined(CONFIG_KUP4X) -static void ide_led (uchar led, uchar status); -#else -extern void ide_led (uchar led, uchar status); -#endif -#else -#define ide_led(a,b) /* dummy */ -#endif - #ifdef CONFIG_IDE_RESET static void ide_reset (void); #else @@ -152,8 +88,6 @@ static uchar ide_wait (int dev, ulong t); #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */ -static void input_data(int dev, ulong *sect_buf, int words); -static void output_data(int dev, const ulong *sect_buf, int words); static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len); #ifndef CONFIG_SYS_ATA_PORT_ADDR @@ -166,10 +100,6 @@ ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer); #endif -#ifdef CONFIG_IDE_8xx_DIRECT -static void set_pcmcia_timing (int pmode); -#endif - /* ------------------------------------------------------------------------- */ int do_ide(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) @@ -339,6 +269,33 @@ int do_diskboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) /* ------------------------------------------------------------------------- */ +void __ide_led(uchar led, uchar status) +{ +#if defined(CONFIG_IDE_LED) && defined(PER8_BASE) /* required by LED_PORT */ + static uchar led_buffer; /* Buffer for current LED status */ + + uchar *led_port = LED_PORT; + + if (status) /* switch LED on */ + led_buffer |= led; + else /* switch LED off */ + led_buffer &= ~led; + + *led_port = led_buffer; +#endif +} + +void ide_led(uchar led, uchar status) + __attribute__ ((weak, alias("__ide_led"))); + +#ifndef CONFIG_IDE_LED /* define LED macros, they are not used anyways */ +# define DEVICE_LED(x) 0 +# define LED_IDE1 1 +# define LED_IDE2 2 +#endif + +/* ------------------------------------------------------------------------- */ + inline void __ide_outb(int dev, int port, unsigned char val) { debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n", @@ -392,25 +349,14 @@ inline int ide_set_piomode(int pio_mode) void ide_init(void) { - -#ifdef CONFIG_IDE_8xx_DIRECT - volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; - volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia); -#endif unsigned char c; int i, bus; -#if defined(CONFIG_SC3) - unsigned int ata_reset_time = ATA_RESET_TIME; -#endif #ifdef CONFIG_IDE_8xx_PCCARD - extern int pcmcia_on(void); extern int ide_devices_found; /* Initialized in check_ide_device() */ #endif /* CONFIG_IDE_8xx_PCCARD */ #ifdef CONFIG_IDE_PREINIT - extern int ide_preinit(void); - WATCHDOG_RESET(); if (ide_preinit()) { @@ -419,40 +365,8 @@ void ide_init(void) } #endif /* CONFIG_IDE_PREINIT */ -#ifdef CONFIG_IDE_8xx_PCCARD - extern int pcmcia_on(void); - extern int ide_devices_found; /* Initialized in check_ide_device() */ - - WATCHDOG_RESET(); - - ide_devices_found = 0; - /* initialize the PCMCIA IDE adapter card */ - pcmcia_on(); - if (!ide_devices_found) - return; - udelay(1000000); /* 1 s */ -#endif /* CONFIG_IDE_8xx_PCCARD */ - WATCHDOG_RESET(); -#ifdef CONFIG_IDE_8xx_DIRECT - /* Initialize PIO timing tables */ - for (i = 0; i <= IDE_MAX_PIO_MODE; ++i) { - pio_config_clk[i].t_setup = - PCMCIA_MK_CLKS(pio_config_ns[i].t_setup, gd->bus_clk); - pio_config_clk[i].t_length = - PCMCIA_MK_CLKS(pio_config_ns[i].t_length, - gd->bus_clk); - pio_config_clk[i].t_hold = - PCMCIA_MK_CLKS(pio_config_ns[i].t_hold, gd->bus_clk); - debug("PIO Mode %d: setup=%2d ns/%d clk" " len=%3d ns/%d clk" - " hold=%2d ns/%d clk\n", i, pio_config_ns[i].t_setup, - pio_config_clk[i].t_setup, pio_config_ns[i].t_length, - pio_config_clk[i].t_length, pio_config_ns[i].t_hold, - pio_config_clk[i].t_hold); - } -#endif /* CONFIG_IDE_8xx_DIRECT */ - /* * Reset the IDE just to be sure. * Light LED's to show @@ -462,14 +376,14 @@ void ide_init(void) /* ATAPI Drives seems to need a proper IDE Reset */ ide_reset(); -#ifdef CONFIG_IDE_8xx_DIRECT - /* PCMCIA / IDE initialization for common mem space */ - pcmp->pcmc_pgcrb = 0; +#ifdef CONFIG_IDE_INIT_POSTRESET + WATCHDOG_RESET(); - /* start in PIO mode 0 - most relaxed timings */ - pio_mode = 0; - set_pcmcia_timing(pio_mode); -#endif /* CONFIG_IDE_8xx_DIRECT */ + if (ide_init_postreset()) { + puts("ide_preinit_postreset failed\n"); + return; + } +#endif /* CONFIG_IDE_INIT_POSTRESET */ /* * Wait for IDE to get ready. @@ -502,11 +416,7 @@ void ide_init(void) c = ide_inb(dev, ATA_STATUS); i++; -#if defined(CONFIG_SC3) - if (i > (ata_reset_time * 100)) { -#else if (i > (ATA_RESET_TIME * 100)) { -#endif puts("** Timeout **\n"); /* LED's off */ ide_led((LED_IDE1 | LED_IDE2), 0); @@ -538,9 +448,7 @@ void ide_init(void) curr_device = -1; for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) { -#ifdef CONFIG_IDE_LED int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2; -#endif ide_dev_desc[i].type = DEV_TYPE_UNKNOWN; ide_dev_desc[i].if_type = IF_TYPE_IDE; ide_dev_desc[i].dev = i; @@ -575,120 +483,26 @@ block_dev_desc_t *ide_get_dev(int dev) } #endif +/* ------------------------------------------------------------------------- */ -#ifdef CONFIG_IDE_8xx_DIRECT - -static void set_pcmcia_timing(int pmode) -{ - volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; - volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia); - ulong timings; - - debug("Set timing for PIO Mode %d\n", pmode); - - timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold) - | PCMCIA_SST(pio_config_clk[pmode].t_setup) - | PCMCIA_SL(pio_config_clk[pmode].t_length); - - /* - * IDE 0 - */ - pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0; - pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0 -#if (CONFIG_SYS_PCMCIA_POR0 != 0) - | timings -#endif - ; - debug("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0); - - pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1; - pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1 -#if (CONFIG_SYS_PCMCIA_POR1 != 0) - | timings -#endif - ; - debug("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1); - - pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2; - pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2 -#if (CONFIG_SYS_PCMCIA_POR2 != 0) - | timings -#endif - ; - debug("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2); - - pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3; - pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3 -#if (CONFIG_SYS_PCMCIA_POR3 != 0) - | timings -#endif - ; - debug("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3); - - /* - * IDE 1 - */ - pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4; - pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4 -#if (CONFIG_SYS_PCMCIA_POR4 != 0) - | timings -#endif - ; - debug("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4); - - pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5; - pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5 -#if (CONFIG_SYS_PCMCIA_POR5 != 0) - | timings -#endif - ; - debug("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5); - - pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6; - pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6 -#if (CONFIG_SYS_PCMCIA_POR6 != 0) - | timings -#endif - ; - debug("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6); - - pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7; - pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7 -#if (CONFIG_SYS_PCMCIA_POR7 != 0) - | timings -#endif - ; - debug("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7); - -} +void ide_input_swap_data(int dev, ulong *sect_buf, int words) + __attribute__ ((weak, alias("__ide_input_swap_data"))); -#endif /* CONFIG_IDE_8xx_DIRECT */ +void ide_input_data(int dev, ulong *sect_buf, int words) + __attribute__ ((weak, alias("__ide_input_data"))); -/* ------------------------------------------------------------------------- */ +void ide_output_data(int dev, const ulong *sect_buf, int words) + __attribute__ ((weak, alias("__ide_output_data"))); /* We only need to swap data if we are running on a big endian cpu. */ -/* But Au1x00 cpu:s already swaps data in big endian mode! */ -#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SOC_AU1X00) -#define input_swap_data(x,y,z) input_data(x,y,z) -#else -static void input_swap_data(int dev, ulong *sect_buf, int words) +#if defined(__LITTLE_ENDIAN) +void __ide_input_swap_data(int dev, ulong *sect_buf, int words) { -#if defined(CONFIG_CPC45) - uchar i; - volatile uchar *pbuf_even = - (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); - volatile uchar *pbuf_odd = - (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); - ushort *dbuf = (ushort *) sect_buf; - - while (words--) { - for (i = 0; i < 2; i++) { - *(((uchar *) (dbuf)) + 1) = *pbuf_even; - *(uchar *) dbuf = *pbuf_odd; - dbuf += 1; - } - } + ide_input_data(dev, sect_buf, words); +} #else +void __ide_input_swap_data(int dev, ulong *sect_buf, int words) +{ volatile ushort *pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); ushort *dbuf = (ushort *) sect_buf; @@ -700,64 +514,32 @@ static void input_swap_data(int dev, ulong *sect_buf, int words) #ifdef __MIPS__ *dbuf++ = swab16p((u16 *) pbuf); *dbuf++ = swab16p((u16 *) pbuf); -#elif defined(CONFIG_PCS440EP) - *dbuf++ = *pbuf; - *dbuf++ = *pbuf; #else *dbuf++ = ld_le16(pbuf); *dbuf++ = ld_le16(pbuf); #endif /* !MIPS */ } -#endif } -#endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */ +#endif /* __LITTLE_ENDIAN */ #if defined(CONFIG_IDE_SWAP_IO) -static void output_data(int dev, const ulong *sect_buf, int words) +void __ide_output_data(int dev, const ulong *sect_buf, int words) { -#if defined(CONFIG_CPC45) - uchar *dbuf; - volatile uchar *pbuf_even; - volatile uchar *pbuf_odd; - - pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); - pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); - dbuf = (uchar *) sect_buf; - while (words--) { - EIEIO; - *pbuf_even = *dbuf++; - EIEIO; - *pbuf_odd = *dbuf++; - EIEIO; - *pbuf_even = *dbuf++; - EIEIO; - *pbuf_odd = *dbuf++; - } -#else ushort *dbuf; volatile ushort *pbuf; pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG); dbuf = (ushort *) sect_buf; while (words--) { -#if defined(CONFIG_PCS440EP) - /* not tested, because CF was write protected */ - EIEIO; - *pbuf = ld_le16(dbuf++); - EIEIO; - *pbuf = ld_le16(dbuf++); -#else EIEIO; *pbuf = *dbuf++; EIEIO; *pbuf = *dbuf++; -#endif } -#endif } #else /* ! CONFIG_IDE_SWAP_IO */ -static void output_data(int dev, const ulong *sect_buf, int words) +void __ide_output_data(int dev, const ulong *sect_buf, int words) { #if defined(CONFIG_IDE_AHB) ide_write_data(dev, sect_buf, words); @@ -768,31 +550,8 @@ static void output_data(int dev, const ulong *sect_buf, int words) #endif /* CONFIG_IDE_SWAP_IO */ #if defined(CONFIG_IDE_SWAP_IO) -static void input_data(int dev, ulong *sect_buf, int words) +void __ide_input_data(int dev, ulong *sect_buf, int words) { -#if defined(CONFIG_CPC45) - uchar *dbuf; - volatile uchar *pbuf_even; - volatile uchar *pbuf_odd; - - pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); - pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); - dbuf = (uchar *) sect_buf; - while (words--) { - *dbuf++ = *pbuf_even; - EIEIO; - SYNC; - *dbuf++ = *pbuf_odd; - EIEIO; - SYNC; - *dbuf++ = *pbuf_even; - EIEIO; - SYNC; - *dbuf++ = *pbuf_odd; - EIEIO; - SYNC; - } -#else ushort *dbuf; volatile ushort *pbuf; @@ -802,22 +561,14 @@ static void input_data(int dev, ulong *sect_buf, int words) debug("in input data base for read is %lx\n", (unsigned long) pbuf); while (words--) { -#if defined(CONFIG_PCS440EP) - EIEIO; - *dbuf++ = ld_le16(pbuf); - EIEIO; - *dbuf++ = ld_le16(pbuf); -#else EIEIO; *dbuf++ = *pbuf; EIEIO; *dbuf++ = *pbuf; -#endif } -#endif } #else /* ! CONFIG_IDE_SWAP_IO */ -static void input_data(int dev, ulong *sect_buf, int words) +void __ide_input_data(int dev, ulong *sect_buf, int words) { #if defined(CONFIG_IDE_AHB) ide_read_data(dev, sect_buf, words); @@ -927,7 +678,7 @@ static void ide_ident(block_dev_desc_t *dev_desc) return; #endif - input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS); + ide_input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS); ident_cpy((unsigned char *) dev_desc->revision, iop.fw_rev, sizeof(dev_desc->revision)); @@ -1189,7 +940,7 @@ ulong ide_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer) break; } - input_data(device, buffer, ATA_SECTORWORDS); + ide_input_data(device, buffer, ATA_SECTORWORDS); (void) ide_inb(device, ATA_STATUS); /* clear IRQ */ ++n; @@ -1282,7 +1033,7 @@ ulong ide_write(int device, lbaint_t blknr, ulong blkcnt, const void *buffer) goto WR_OUT; } - output_data(device, buffer, ATA_SECTORWORDS); + ide_output_data(device, buffer, ATA_SECTORWORDS); c = ide_inb(device, ATA_STATUS); /* clear IRQ */ ++n; ++blknr; @@ -1352,9 +1103,6 @@ extern void ide_set_reset(int idereset); static void ide_reset(void) { -#if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR) - volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; -#endif int i; curr_device = -1; @@ -1370,51 +1118,6 @@ static void ide_reset(void) WATCHDOG_RESET(); -#ifdef CONFIG_SYS_PB_12V_ENABLE - /* 12V Enable output OFF */ - immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); - - immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE); - immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE); - immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE; - - /* wait 500 ms for the voltage to stabilize */ - for (i = 0; i < 500; ++i) - udelay(1000); - - /* 12V Enable output ON */ - immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; -#endif /* CONFIG_SYS_PB_12V_ENABLE */ - -#ifdef CONFIG_SYS_PB_IDE_MOTOR - /* configure IDE Motor voltage monitor pin as input */ - immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR); - immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR); - immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR); - - /* wait up to 1 s for the motor voltage to stabilize */ - for (i = 0; i < 1000; ++i) { - if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) { - break; - } - udelay(1000); - } - - if (i == 1000) { /* Timeout */ - printf("\nWarning: 5V for IDE Motor missing\n"); -#ifdef CONFIG_STATUS_LED -#ifdef STATUS_LED_YELLOW - status_led_set(STATUS_LED_YELLOW, STATUS_LED_ON); -#endif -#ifdef STATUS_LED_GREEN - status_led_set(STATUS_LED_GREEN, STATUS_LED_OFF); -#endif -#endif /* CONFIG_STATUS_LED */ - } -#endif /* CONFIG_SYS_PB_IDE_MOTOR */ - - WATCHDOG_RESET(); - /* de-assert RESET signal */ ide_set_reset(0); @@ -1427,27 +1130,6 @@ static void ide_reset(void) /* ------------------------------------------------------------------------- */ -#if defined(CONFIG_IDE_LED) && \ - !defined(CONFIG_CPC45) && \ - !defined(CONFIG_KUP4K) && \ - !defined(CONFIG_KUP4X) - -static uchar led_buffer; /* Buffer for current LED status */ - -static void ide_led(uchar led, uchar status) -{ - uchar *led_port = LED_PORT; - - if (status) /* switch LED on */ - led_buffer |= led; - else /* switch LED off */ - led_buffer &= ~led; - - *led_port = led_buffer; -} - -#endif /* CONFIG_IDE_LED */ - #if defined(CONFIG_OF_IDE_FIXUP) int ide_device_present(int dev) { @@ -1463,25 +1145,18 @@ int ide_device_present(int dev) * ATAPI Support */ +void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts) + __attribute__ ((weak, alias("__ide_input_data_shorts"))); + +void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts) + __attribute__ ((weak, alias("__ide_output_data_shorts"))); + + #if defined(CONFIG_IDE_SWAP_IO) /* since ATAPI may use commands with not 4 bytes alligned length * we have our own transfer functions, 2 bytes alligned */ -static void output_data_shorts(int dev, ushort *sect_buf, int shorts) +void __ide_output_data_shorts(int dev, ushort *sect_buf, int shorts) { -#if defined(CONFIG_CPC45) - uchar *dbuf; - volatile uchar *pbuf_even; - volatile uchar *pbuf_odd; - - pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); - pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); - while (shorts--) { - EIEIO; - *pbuf_even = *dbuf++; - EIEIO; - *pbuf_odd = *dbuf++; - } -#else ushort *dbuf; volatile ushort *pbuf; @@ -1495,25 +1170,10 @@ static void output_data_shorts(int dev, ushort *sect_buf, int shorts) EIEIO; *pbuf = *dbuf++; } -#endif } -static void input_data_shorts(int dev, ushort *sect_buf, int shorts) +void __ide_input_data_shorts(int dev, ushort *sect_buf, int shorts) { -#if defined(CONFIG_CPC45) - uchar *dbuf; - volatile uchar *pbuf_even; - volatile uchar *pbuf_odd; - - pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN); - pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD); - while (shorts--) { - EIEIO; - *dbuf++ = *pbuf_even; - EIEIO; - *dbuf++ = *pbuf_odd; - } -#else ushort *dbuf; volatile ushort *pbuf; @@ -1527,16 +1187,15 @@ static void input_data_shorts(int dev, ushort *sect_buf, int shorts) EIEIO; *dbuf++ = *pbuf; } -#endif } #else /* ! CONFIG_IDE_SWAP_IO */ -static void output_data_shorts(int dev, ushort *sect_buf, int shorts) +void __ide_output_data_shorts(int dev, ushort *sect_buf, int shorts) { outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts); } -static void input_data_shorts(int dev, ushort *sect_buf, int shorts) +void __ide_input_data_shorts(int dev, ushort *sect_buf, int shorts) { insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts); } @@ -1615,7 +1274,7 @@ unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen, } /* write command block */ - output_data_shorts(device, (unsigned short *) ccb, ccblen / 2); + ide_output_data_shorts(device, (unsigned short *) ccb, ccblen / 2); /* ATAPI Command written wait for completition */ udelay(5000); /* device must set bsy */ @@ -1666,12 +1325,12 @@ unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen, /* ok now decide if it is an in or output */ if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) { debug("Write to device\n"); - output_data_shorts(device, (unsigned short *) buffer, - n); + ide_output_data_shorts(device, + (unsigned short *) buffer, n); } else { debug("Read from device @ %p shorts %d\n", buffer, n); - input_data_shorts(device, (unsigned short *) buffer, - n); + ide_input_data_shorts(device, + (unsigned short *) buffer, n); } } udelay(5000); /* seems that some CD ROMs need this... */ diff --git a/common/env_common.c b/common/env_common.c index 61c4be54d0..3d3cb70a6d 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -37,102 +37,7 @@ DECLARE_GLOBAL_DATA_PTR; /************************************************************************ * Default settings to be used when no valid environment is found */ - -const uchar default_environment[] = { -#ifdef CONFIG_BOOTARGS - "bootargs=" CONFIG_BOOTARGS "\0" -#endif -#ifdef CONFIG_BOOTCOMMAND - "bootcmd=" CONFIG_BOOTCOMMAND "\0" -#endif -#ifdef CONFIG_RAMBOOTCOMMAND - "ramboot=" CONFIG_RAMBOOTCOMMAND "\0" -#endif -#ifdef CONFIG_NFSBOOTCOMMAND - "nfsboot=" CONFIG_NFSBOOTCOMMAND "\0" -#endif -#if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0) - "bootdelay=" __stringify(CONFIG_BOOTDELAY) "\0" -#endif -#if defined(CONFIG_BAUDRATE) && (CONFIG_BAUDRATE >= 0) - "baudrate=" __stringify(CONFIG_BAUDRATE) "\0" -#endif -#ifdef CONFIG_LOADS_ECHO - "loads_echo=" __stringify(CONFIG_LOADS_ECHO) "\0" -#endif -#ifdef CONFIG_ETHADDR - "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" -#endif -#ifdef CONFIG_ETH1ADDR - "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0" -#endif -#ifdef CONFIG_ETH2ADDR - "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0" -#endif -#ifdef CONFIG_ETH3ADDR - "eth3addr=" __stringify(CONFIG_ETH3ADDR) "\0" -#endif -#ifdef CONFIG_ETH4ADDR - "eth4addr=" __stringify(CONFIG_ETH4ADDR) "\0" -#endif -#ifdef CONFIG_ETH5ADDR - "eth5addr=" __stringify(CONFIG_ETH5ADDR) "\0" -#endif -#ifdef CONFIG_ETHPRIME - "ethprime=" CONFIG_ETHPRIME "\0" -#endif -#ifdef CONFIG_IPADDR - "ipaddr=" __stringify(CONFIG_IPADDR) "\0" -#endif -#ifdef CONFIG_SERVERIP - "serverip=" __stringify(CONFIG_SERVERIP) "\0" -#endif -#ifdef CONFIG_SYS_AUTOLOAD - "autoload=" CONFIG_SYS_AUTOLOAD "\0" -#endif -#ifdef CONFIG_PREBOOT - "preboot=" CONFIG_PREBOOT "\0" -#endif -#ifdef CONFIG_ROOTPATH - "rootpath=" CONFIG_ROOTPATH "\0" -#endif -#ifdef CONFIG_GATEWAYIP - "gatewayip=" __stringify(CONFIG_GATEWAYIP) "\0" -#endif -#ifdef CONFIG_NETMASK - "netmask=" __stringify(CONFIG_NETMASK) "\0" -#endif -#ifdef CONFIG_HOSTNAME - "hostname=" __stringify(CONFIG_HOSTNAME) "\0" -#endif -#ifdef CONFIG_BOOTFILE - "bootfile=" CONFIG_BOOTFILE "\0" -#endif -#ifdef CONFIG_LOADADDR - "loadaddr=" __stringify(CONFIG_LOADADDR) "\0" -#endif -#ifdef CONFIG_CLOCKS_IN_MHZ - "clocks_in_mhz=1\0" -#endif -#if defined(CONFIG_PCI_BOOTDELAY) && (CONFIG_PCI_BOOTDELAY > 0) - "pcidelay=" __stringify(CONFIG_PCI_BOOTDELAY)"\0" -#endif -#ifdef CONFIG_ENV_VARS_UBOOT_CONFIG - "arch=" CONFIG_SYS_ARCH "\0" - "cpu=" CONFIG_SYS_CPU "\0" - "board=" CONFIG_SYS_BOARD "\0" -#ifdef CONFIG_SYS_VENDOR - "vendor=" CONFIG_SYS_VENDOR "\0" -#endif -#ifdef CONFIG_SYS_SOC - "soc=" CONFIG_SYS_SOC "\0" -#endif -#endif -#ifdef CONFIG_EXTRA_ENV_SETTINGS - CONFIG_EXTRA_ENV_SETTINGS -#endif - "\0" -}; +#include <env_default.h> struct hsearch_data env_htab = { .apply = env_check_apply, diff --git a/common/env_embedded.c b/common/env_embedded.c index 8cc08ae4da..52bc6873dd 100644 --- a/common/env_embedded.c +++ b/common/env_embedded.c @@ -89,107 +89,9 @@ # define ENV_CRC (~0) #endif -env_t environment __PPCENV__ = { - ENV_CRC, /* CRC Sum */ -#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT - 1, /* Flags: valid */ -#endif - { -#if defined(CONFIG_BOOTARGS) - "bootargs=" CONFIG_BOOTARGS "\0" -#endif -#if defined(CONFIG_BOOTCOMMAND) - "bootcmd=" CONFIG_BOOTCOMMAND "\0" -#endif -#if defined(CONFIG_RAMBOOTCOMMAND) - "ramboot=" CONFIG_RAMBOOTCOMMAND "\0" -#endif -#if defined(CONFIG_NFSBOOTCOMMAND) - "nfsboot=" CONFIG_NFSBOOTCOMMAND "\0" -#endif -#if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0) - "bootdelay=" __stringify(CONFIG_BOOTDELAY) "\0" -#endif -#if defined(CONFIG_BAUDRATE) && (CONFIG_BAUDRATE >= 0) - "baudrate=" __stringify(CONFIG_BAUDRATE) "\0" -#endif -#ifdef CONFIG_LOADS_ECHO - "loads_echo=" __stringify(CONFIG_LOADS_ECHO) "\0" -#endif -#ifdef CONFIG_ETHADDR - "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" -#endif -#ifdef CONFIG_ETH1ADDR - "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0" -#endif -#ifdef CONFIG_ETH2ADDR - "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0" -#endif -#ifdef CONFIG_ETH3ADDR - "eth3addr=" __stringify(CONFIG_ETH3ADDR) "\0" -#endif -#ifdef CONFIG_ETH4ADDR - "eth4addr=" __stringify(CONFIG_ETH4ADDR) "\0" -#endif -#ifdef CONFIG_ETH5ADDR - "eth5addr=" __stringify(CONFIG_ETH5ADDR) "\0" -#endif -#ifdef CONFIG_ETHPRIME - "ethprime=" CONFIG_ETHPRIME "\0" -#endif -#ifdef CONFIG_IPADDR - "ipaddr=" __stringify(CONFIG_IPADDR) "\0" -#endif -#ifdef CONFIG_SERVERIP - "serverip=" __stringify(CONFIG_SERVERIP) "\0" -#endif -#ifdef CONFIG_SYS_AUTOLOAD - "autoload=" CONFIG_SYS_AUTOLOAD "\0" -#endif -#ifdef CONFIG_ROOTPATH - "rootpath=" CONFIG_ROOTPATH "\0" -#endif -#ifdef CONFIG_GATEWAYIP - "gatewayip=" __stringify(CONFIG_GATEWAYIP) "\0" -#endif -#ifdef CONFIG_NETMASK - "netmask=" __stringify(CONFIG_NETMASK) "\0" -#endif -#ifdef CONFIG_HOSTNAME - "hostname=" __stringify(CONFIG_HOSTNAME) "\0" -#endif -#ifdef CONFIG_BOOTFILE - "bootfile=" CONFIG_BOOTFILE "\0" -#endif -#ifdef CONFIG_LOADADDR - "loadaddr=" __stringify(CONFIG_LOADADDR) "\0" -#endif -#ifdef CONFIG_PREBOOT - "preboot=" CONFIG_PREBOOT "\0" -#endif -#ifdef CONFIG_CLOCKS_IN_MHZ - "clocks_in_mhz=" "1" "\0" -#endif -#if defined(CONFIG_PCI_BOOTDELAY) && (CONFIG_PCI_BOOTDELAY > 0) - "pcidelay=" __stringify(CONFIG_PCI_BOOTDELAY)"\0" -#endif -#ifdef CONFIG_ENV_VARS_UBOOT_CONFIG - "arch=" CONFIG_SYS_ARCH "\0" - "cpu=" CONFIG_SYS_CPU "\0" - "board=" CONFIG_SYS_BOARD "\0" -#ifdef CONFIG_SYS_VENDOR - "vendor=" CONFIG_SYS_VENDOR "\0" -#endif -#ifdef CONFIG_SYS_SOC - "soc=" CONFIG_SYS_SOC "\0" -#endif -#endif -#ifdef CONFIG_EXTRA_ENV_SETTINGS - CONFIG_EXTRA_ENV_SETTINGS -#endif - "\0" /* Term. env_t.data with 2 NULs */ - } -}; +#define DEFAULT_ENV_INSTANCE_EMBEDDED +#include <env_default.h> + #ifdef CONFIG_ENV_ADDR_REDUND env_t redundand_environment __PPCENV__ = { 0, /* CRC Sum: invalid */ diff --git a/disk/part.c b/disk/part.c index 30229692fb..8ba3cdeaa0 100644 --- a/disk/part.c +++ b/disk/part.c @@ -561,6 +561,8 @@ int get_device_and_partition(const char *ifname, const char *dev_part_str, info->size = (*dev_desc)->lba; info->blksz = (*dev_desc)->blksz; info->bootable = 0; + strcpy((char *)info->type, BOOT_PART_TYPE); + strcpy((char *)info->name, "Whole Disk"); #ifdef CONFIG_PARTITION_UUIDS info->uuid[0] = 0; #endif @@ -624,9 +626,9 @@ int get_device_and_partition(const char *ifname, const char *dev_part_str, */ if (p == MAX_SEARCH_PARTITIONS + 1) *info = tmpinfo; - ret = 0; } else { printf("** No valid partitions found **\n"); + ret = -1; goto cleanup; } } diff --git a/disk/part_dos.c b/disk/part_dos.c index 5c454e65ab..3fe901ba1b 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -65,13 +65,14 @@ static inline int is_bootable(dos_partition_t *p) return p->boot_ind == 0x80; } -static void print_one_part (dos_partition_t *p, int ext_part_sector, int part_num) +static void print_one_part(dos_partition_t *p, int ext_part_sector, + int part_num, unsigned int disksig) { int lba_start = ext_part_sector + le32_to_int (p->start4); int lba_size = le32_to_int (p->size4); - printf("%5d\t\t%10d\t%10d\t%2x%s%s\n", - part_num, lba_start, lba_size, p->sys_ind, + printf("%3d\t%-10d\t%-10d\t%08x-%02x\t%02x%s%s\n", + part_num, lba_start, lba_size, disksig, part_num, p->sys_ind, (is_extended(p->sys_ind) ? " Extd" : ""), (is_bootable(p) ? " Boot" : "")); } @@ -105,8 +106,9 @@ int test_part_dos (block_dev_desc_t *dev_desc) /* Print a partition that is relative to its Extended partition table */ -static void print_partition_extended (block_dev_desc_t *dev_desc, int ext_part_sector, int relative, - int part_num) +static void print_partition_extended(block_dev_desc_t *dev_desc, + int ext_part_sector, int relative, + int part_num, unsigned int disksig) { ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz); dos_partition_t *pt; @@ -125,6 +127,9 @@ static void print_partition_extended (block_dev_desc_t *dev_desc, int ext_part_s return; } + if (!ext_part_sector) + disksig = le32_to_int(&buffer[DOS_PART_DISKSIG_OFFSET]); + /* Print all primary/logical partitions */ pt = (dos_partition_t *) (buffer + DOS_PART_TBL_OFFSET); for (i = 0; i < 4; i++, pt++) { @@ -135,7 +140,7 @@ static void print_partition_extended (block_dev_desc_t *dev_desc, int ext_part_s if ((pt->sys_ind != 0) && (ext_part_sector == 0 || !is_extended (pt->sys_ind)) ) { - print_one_part (pt, ext_part_sector, part_num); + print_one_part(pt, ext_part_sector, part_num, disksig); } /* Reverse engr the fdisk part# assignment rule! */ @@ -151,10 +156,9 @@ static void print_partition_extended (block_dev_desc_t *dev_desc, int ext_part_s if (is_extended (pt->sys_ind)) { int lba_start = le32_to_int (pt->start4) + relative; - print_partition_extended (dev_desc, lba_start, - ext_part_sector == 0 ? lba_start - : relative, - part_num); + print_partition_extended(dev_desc, lba_start, + ext_part_sector == 0 ? lba_start : relative, + part_num, disksig); } } @@ -261,8 +265,8 @@ static int get_partition_info_extended (block_dev_desc_t *dev_desc, int ext_part void print_part_dos (block_dev_desc_t *dev_desc) { - printf ("Partition Start Sector Num Sectors Type\n"); - print_partition_extended (dev_desc, 0, 0, 1); + printf("Part\tStart Sector\tNum Sectors\tUUID\t\tType\n"); + print_partition_extended(dev_desc, 0, 0, 1, 0); } int get_partition_info_dos (block_dev_desc_t *dev_desc, int part, disk_partition_t * info) diff --git a/disk/part_efi.c b/disk/part_efi.c index 264ea9c77f..7a39d52f8e 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -113,6 +113,35 @@ static char *print_efiname(gpt_entry *pte) return name; } +static void uuid_string(unsigned char *uuid, char *str) +{ + static const u8 le[16] = {3, 2, 1, 0, 5, 4, 7, 6, 8, 9, 10, 11, + 12, 13, 14, 15}; + int i; + + for (i = 0; i < 16; i++) { + sprintf(str, "%02x", uuid[le[i]]); + str += 2; + switch (i) { + case 3: + case 5: + case 7: + case 9: + *str++ = '-'; + break; + } + } +} + +static efi_guid_t system_guid = PARTITION_SYSTEM_GUID; + +static inline int is_bootable(gpt_entry *p) +{ + return p->attributes.fields.legacy_bios_bootable || + !memcmp(&(p->partition_type_guid), &system_guid, + sizeof(efi_guid_t)); +} + /* * Public Functions (include/part.h) */ @@ -122,6 +151,7 @@ void print_part_efi(block_dev_desc_t * dev_desc) ALLOC_CACHE_ALIGN_BUFFER(gpt_header, gpt_head, 1); gpt_entry *gpt_pte = NULL; int i = 0; + char uuid[37]; if (!dev_desc) { printf("%s: Invalid Argument(s)\n", __func__); @@ -136,17 +166,25 @@ void print_part_efi(block_dev_desc_t * dev_desc) debug("%s: gpt-entry at %p\n", __func__, gpt_pte); - printf("Part\tName\t\t\tStart LBA\tEnd LBA\n"); + printf("Part\tStart LBA\tEnd LBA\t\tName\n"); + printf("\tAttributes\n"); + printf("\tType UUID\n"); + printf("\tPartition UUID\n"); + for (i = 0; i < le32_to_int(gpt_head->num_partition_entries); i++) { + /* Stop at the first non valid PTE */ + if (!is_pte_valid(&gpt_pte[i])) + break; - if (is_pte_valid(&gpt_pte[i])) { - printf("%3d\t%-18s\t0x%08llX\t0x%08llX\n", (i + 1), - print_efiname(&gpt_pte[i]), - le64_to_int(gpt_pte[i].starting_lba), - le64_to_int(gpt_pte[i].ending_lba)); - } else { - break; /* Stop at the first non valid PTE */ - } + printf("%3d\t0x%08llx\t0x%08llx\t\"%s\"\n", (i + 1), + le64_to_int(gpt_pte[i].starting_lba), + le64_to_int(gpt_pte[i].ending_lba), + print_efiname(&gpt_pte[i])); + printf("\tattrs:\t0x%016llx\n", gpt_pte[i].attributes.raw); + uuid_string(gpt_pte[i].partition_type_guid.b, uuid); + printf("\ttype:\t%s\n", uuid); + uuid_string(gpt_pte[i].unique_partition_guid.b, uuid); + printf("\tuuid:\t%s\n", uuid); } /* Remember to free pte */ @@ -154,28 +192,6 @@ void print_part_efi(block_dev_desc_t * dev_desc) return; } -#ifdef CONFIG_PARTITION_UUIDS -static void uuid_string(unsigned char *uuid, char *str) -{ - static const u8 le[16] = {3, 2, 1, 0, 5, 4, 7, 6, 8, 9, 10, 11, - 12, 13, 14, 15}; - int i; - - for (i = 0; i < 16; i++) { - sprintf(str, "%02x", uuid[le[i]]); - str += 2; - switch (i) { - case 3: - case 5: - case 7: - case 9: - *str++ = '-'; - break; - } - } -} -#endif - int get_partition_info_efi(block_dev_desc_t * dev_desc, int part, disk_partition_t * info) { @@ -212,6 +228,7 @@ int get_partition_info_efi(block_dev_desc_t * dev_desc, int part, sprintf((char *)info->name, "%s", print_efiname(&gpt_pte[part - 1])); sprintf((char *)info->type, "U-Boot"); + info->bootable = is_bootable(&gpt_pte[part - 1]); #ifdef CONFIG_PARTITION_UUIDS uuid_string(gpt_pte[part - 1].unique_partition_guid.b, info->uuid); #endif diff --git a/disk/part_efi.h b/disk/part_efi.h index 5903e7c812..4e28d1dcb6 100644 --- a/disk/part_efi.h +++ b/disk/part_efi.h @@ -111,10 +111,15 @@ typedef struct _gpt_header { unsigned char reserved2[GPT_BLOCK_SIZE - 92]; } __attribute__ ((packed)) gpt_header; -typedef struct _gpt_entry_attributes { - unsigned long long required_to_function:1; - unsigned long long reserved:47; - unsigned long long type_guid_specific:16; +typedef union _gpt_entry_attributes { + struct { + unsigned long long required_to_function:1; + unsigned long long no_block_io_protocol:1; + unsigned long long legacy_bios_bootable:1; + unsigned long long reserved:45; + unsigned long long type_guid_specific:16; + } fields; + unsigned long long raw; } __attribute__ ((packed)) gpt_entry_attributes; #define PARTNAME_SZ (72 / sizeof(efi_char16_t)) diff --git a/doc/DocBook/Makefile b/doc/DocBook/Makefile index 2f2ddfc865..7f38444039 100644 --- a/doc/DocBook/Makefile +++ b/doc/DocBook/Makefile @@ -8,7 +8,7 @@ include $(TOPDIR)/config.mk -DOCBOOKS := +DOCBOOKS := stdio.xml ### # The build process is as follows (targets): diff --git a/doc/DocBook/stdio.tmpl b/doc/DocBook/stdio.tmpl new file mode 100644 index 0000000000..4783abb0a0 --- /dev/null +++ b/doc/DocBook/stdio.tmpl @@ -0,0 +1,46 @@ +<?xml version="1.0" encoding="UTF-8"?> +<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN" + "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []> + +<book id="UBootSTDIO"> + <bookinfo> + <title>The U-Boot STDIO subsystem</title> + + <legalnotice> + <para> + This documentation is free software; you can redistribute + it and/or modify it under the terms of the GNU General Public + License as published by the Free Software Foundation; either + version 2 of the License, or (at your option) any later + version. + </para> + + <para> + This program is distributed in the hope that it will be + useful, but WITHOUT ANY WARRANTY; without even the implied + warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + See the GNU General Public License for more details. + </para> + + <para> + You should have received a copy of the GNU General Public + License along with this program; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, + MA 02111-1307 USA + </para> + + <para> + For more details see the file COPYING in the source + distribution of U-Boot Bootloader. + </para> + </legalnotice> + </bookinfo> + +<toc></toc> + + <chapter id="adt"> + <title>U-Boot Serial subsystem</title> +!Idrivers/serial/serial.c + </chapter> + +</book> diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c index 3147123bba..44ba90ef57 100644 --- a/drivers/i2c/sh_i2c.c +++ b/drivers/i2c/sh_i2c.c @@ -43,12 +43,18 @@ static struct sh_i2c *base; #define SH_I2C_ICCR_SCP (1 << 0) /* ICSR / ICIC */ -#define SH_IC_BUSY (1 << 3) +#define SH_IC_BUSY (1 << 4) #define SH_IC_TACK (1 << 2) #define SH_IC_WAIT (1 << 1) #define SH_IC_DTE (1 << 0) -static u8 iccl, icch; +#ifdef CONFIG_SH_I2C_8BIT +/* store 8th bit of iccl and icch in ICIC register */ +#define SH_I2C_ICIC_ICCLB8 (1 << 7) +#define SH_I2C_ICIC_ICCHB8 (1 << 6) +#endif + +static u16 iccl, icch; #define IRQ_WAIT 1000 @@ -63,6 +69,20 @@ static void irq_dte(struct sh_i2c *base) } } +static int irq_dte_with_tack(struct sh_i2c *base) +{ + int i; + + for (i = 0 ; i < IRQ_WAIT ; i++) { + if (SH_IC_DTE & readb(&base->icsr)) + break; + if (SH_IC_TACK & readb(&base->icsr)) + return -1; + udelay(10); + } + return 0; +} + static void irq_busy(struct sh_i2c *base) { int i; @@ -74,71 +94,97 @@ static void irq_busy(struct sh_i2c *base) } } -static void i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop) +static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop) { - writeb(readb(&base->iccr) & ~SH_I2C_ICCR_ICE, &base->iccr); - writeb(readb(&base->iccr) | SH_I2C_ICCR_ICE, &base->iccr); - - writeb(iccl, &base->iccl); - writeb(icch, &base->icch); - writeb(0, &base->icic); + u8 icic = SH_IC_TACK; + + clrbits_8(&base->iccr, SH_I2C_ICCR_ICE); + setbits_8(&base->iccr, SH_I2C_ICCR_ICE); + + writeb(iccl & 0xff, &base->iccl); + writeb(icch & 0xff, &base->icch); +#ifdef CONFIG_SH_I2C_8BIT + if (iccl > 0xff) + icic |= SH_I2C_ICIC_ICCLB8; + if (icch > 0xff) + icic |= SH_I2C_ICIC_ICCHB8; +#endif + writeb(icic, &base->icic); writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), &base->iccr); irq_dte(base); + clrbits_8(&base->icsr, SH_IC_TACK); writeb(id << 1, &base->icdr); - irq_dte(base); + if (irq_dte_with_tack(base) != 0) + return -1; writeb(reg, &base->icdr); if (stop) writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS), &base->iccr); - irq_dte(base); + if (irq_dte_with_tack(base) != 0) + return -1; + return 0; } static void i2c_finish(struct sh_i2c *base) { writeb(0, &base->icsr); - writeb(readb(&base->iccr) & ~SH_I2C_ICCR_ICE, &base->iccr); + clrbits_8(&base->iccr, SH_I2C_ICCR_ICE); } -static void i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 val) +static int i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 val) { - i2c_set_addr(base, id, reg, 0); + int ret = -1; + if (i2c_set_addr(base, id, reg, 0) != 0) + goto exit0; udelay(10); writeb(val, &base->icdr); - irq_dte(base); + if (irq_dte_with_tack(base) != 0) + goto exit0; writeb((SH_I2C_ICCR_ICE | SH_I2C_ICCR_RTS), &base->iccr); - irq_dte(base); + if (irq_dte_with_tack(base) != 0) + goto exit0; irq_busy(base); - + ret = 0; +exit0: i2c_finish(base); + return ret; } -static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg) +static int i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg) { - u8 ret; - - i2c_set_addr(base, id, reg, 1); + int ret = -1; + +#if defined(CONFIG_SH73A0) + if (i2c_set_addr(base, id, reg, 0) != 0) + goto exit0; +#else + if (i2c_set_addr(base, id, reg, 1) != 0) + goto exit0; udelay(100); +#endif writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), &base->iccr); irq_dte(base); writeb(id << 1 | 0x01, &base->icdr); - irq_dte(base); + if (irq_dte_with_tack(base) != 0) + goto exit0; writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_SCP), &base->iccr); - irq_dte(base); + if (irq_dte_with_tack(base) != 0) + goto exit0; - ret = readb(&base->icdr); + ret = readb(&base->icdr) & 0xff; writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RACK), &base->iccr); readb(&base->icdr); /* Dummy read */ irq_busy(base); - +exit0: i2c_finish(base); return ret; @@ -166,6 +212,21 @@ int i2c_set_bus_num(unsigned int bus) case 1: base = (void *)CONFIG_SH_I2C_BASE1; break; +#ifdef CONFIG_SH_I2C_BASE2 + case 2: + base = (void *)CONFIG_SH_I2C_BASE2; + break; +#endif +#ifdef CONFIG_SH_I2C_BASE3 + case 3: + base = (void *)CONFIG_SH_I2C_BASE3; + break; +#endif +#ifdef CONFIG_SH_I2C_BASE4 + case 4: + base = (void *)CONFIG_SH_I2C_BASE4; + break; +#endif default: return -1; } @@ -206,18 +267,18 @@ void i2c_init(int speed, int slaveaddr) denom = speed * (CONFIG_SH_I2C_DATA_HIGH + CONFIG_SH_I2C_DATA_LOW); tmp = num * 10 / denom; if (tmp % 10 >= 5) - iccl = (u8)((num/denom) + 1); + iccl = (u16)((num/denom) + 1); else - iccl = (u8)(num/denom); + iccl = (u16)(num/denom); /* Calculate the value for icch. From the data sheet: icch = (p clock / transfer rate) * (H / (L + H)) */ num = CONFIG_SH_I2C_CLOCK * CONFIG_SH_I2C_DATA_HIGH; tmp = num * 10 / denom; if (tmp % 10 >= 5) - icch = (u8)((num/denom) + 1); + icch = (u16)((num/denom) + 1); else - icch = (u8)(num/denom); + icch = (u16)(num/denom); } /* @@ -235,10 +296,14 @@ void i2c_init(int speed, int slaveaddr) */ int i2c_read(u8 chip, u32 addr, int alen, u8 *buffer, int len) { + int ret; int i = 0; - for (i = 0 ; i < len ; i++) - buffer[i] = i2c_raw_read(base, chip, addr + i); - + for (i = 0 ; i < len ; i++) { + ret = i2c_raw_read(base, chip, addr + i); + if (ret < 0) + return -1; + buffer[i] = ret & 0xff; + } return 0; } @@ -259,8 +324,8 @@ int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int len) { int i = 0; for (i = 0; i < len ; i++) - i2c_raw_write(base, chip, addr + i, buffer[i]); - + if (i2c_raw_write(base, chip, addr + i, buffer[i]) != 0) + return -1; return 0; } @@ -272,5 +337,9 @@ int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int len) */ int i2c_probe(u8 chip) { - return 0; + int ret; + + ret = i2c_set_addr(base, chip, 0, 1); + i2c_finish(base); + return ret; } diff --git a/drivers/input/i8042.c b/drivers/input/i8042.c index c3bc5360ca..26958aaa3e 100644 --- a/drivers/input/i8042.c +++ b/drivers/input/i8042.c @@ -26,6 +26,7 @@ /* includes */ #include <common.h> +#include <linux/compiler.h> #ifdef CONFIG_USE_CPCIDVI extern u8 gt_cpcidvi_in8(u32 offset); @@ -320,6 +321,54 @@ static int kbd_controller_present(void) return in8(I8042_STATUS_REG) != 0xff; } +/* + * Implement a weak default function for boards that optionally + * need to skip the i8042 initialization. + */ +int __weak board_i8042_skip(void) +{ + /* As default, don't skip */ + return 0; +} + +void i8042_flush(void) +{ + int timeout; + + /* + * The delay is to give the keyboard controller some time to fill the + * next byte. + */ + while (1) { + timeout = 100; /* wait for no longer than 100us */ + while (timeout > 0 && !(in8(I8042_STATUS_REG) & 0x01)) { + udelay(1); + timeout--; + } + + /* Try to pull next byte if not timeout. */ + if (in8(I8042_STATUS_REG) & 0x01) + in8(I8042_DATA_REG); + else + break; + } +} + +int i8042_disable(void) +{ + if (kbd_input_empty() == 0) + return -1; + + /* Disable keyboard */ + out8(I8042_COMMAND_REG, 0xad); + + if (kbd_input_empty() == 0) + return -1; + + return 0; +} + + /******************************************************************************* * * i8042_kbd_init - reset keyboard and init state flags @@ -329,7 +378,7 @@ int i8042_kbd_init(void) int keymap, try; char *penv; - if (!kbd_controller_present()) + if (!kbd_controller_present() || board_i8042_skip()) return -1; #ifdef CONFIG_USE_CPCIDVI @@ -607,11 +656,22 @@ static void kbd_led_set(void) static int kbd_input_empty(void) { - int kbdTimeout = KBD_TIMEOUT; + int kbdTimeout = KBD_TIMEOUT * 1000; + + while ((in8(I8042_STATUS_REG) & I8042_STATUS_IN_DATA) && kbdTimeout--) + udelay(1); + + return kbdTimeout != -1; +} + +/******************************************************************************/ + +static int wait_until_kbd_output_full(void) +{ + int kbdTimeout = KBD_TIMEOUT * 1000; - /* wait for input buf empty */ - while ((in8(I8042_STATUS_REG) & 0x02) && kbdTimeout--) - udelay(1000); + while (((in8(I8042_STATUS_REG) & 0x01) == 0) && kbdTimeout--) + udelay(1); return kbdTimeout != -1; } @@ -620,31 +680,39 @@ static int kbd_input_empty(void) static int kbd_reset(void) { + /* KB Reset */ if (kbd_input_empty() == 0) return -1; out8(I8042_DATA_REG, 0xff); - udelay(250000); + if (wait_until_kbd_output_full() == 0) + return -1; + + if (in8(I8042_DATA_REG) != 0xfa) /* ACK */ + return -1; + + if (wait_until_kbd_output_full() == 0) + return -1; + + if (in8(I8042_DATA_REG) != 0xaa) /* Test Pass*/ + return -1; if (kbd_input_empty() == 0) return -1; -#ifdef CONFIG_USE_CPCIDVI + /* Set KBC mode */ out8(I8042_COMMAND_REG, 0x60); -#else - out8(I8042_DATA_REG, 0x60); -#endif if (kbd_input_empty() == 0) return -1; out8(I8042_DATA_REG, 0x45); - if (kbd_input_empty() == 0) return -1; + /* Enable Keyboard */ out8(I8042_COMMAND_REG, 0xae); if (kbd_input_empty() == 0) diff --git a/drivers/input/input.c b/drivers/input/input.c index 5b2b4b0714..98006679b3 100644 --- a/drivers/input/input.c +++ b/drivers/input/input.c @@ -93,6 +93,22 @@ static unsigned char kbd_ctrl_xlate[] = { '\r', 0xff, 0xff }; +/* + * Scan key code to ANSI 3.64 escape sequence table. This table is + * incomplete in that it does not include all possible extra keys. + */ +static struct { + int kbd_scan_code; + char *escape; +} kbd_to_ansi364[] = { + { KEY_UP, "\033[A"}, + { KEY_DOWN, "\033[B"}, + { KEY_RIGHT, "\033[C"}, + { KEY_LEFT, "\033[D"}, +}; + +/* Maximum number of output characters that an ANSI sequence expands to */ +#define ANSI_CHAR_MAX 3 int input_queue_ascii(struct input_config *config, int ch) { @@ -289,24 +305,67 @@ static int input_check_keycodes(struct input_config *config, } /** + * Checks and converts a special key code into ANSI 3.64 escape sequence. + * + * @param config Input state + * @param keycode Key code to examine + * @param output_ch Buffer to place output characters into. It should + * be at least ANSI_CHAR_MAX bytes long, to allow for + * an ANSI sequence. + * @param max_chars Maximum number of characters to add to output_ch + * @return number of characters output, if the key was converted, otherwise 0. + * This may be larger than max_chars, in which case the overflow + * characters are not output. + */ +static int input_keycode_to_ansi364(struct input_config *config, + int keycode, char output_ch[], int max_chars) +{ + const char *escape; + int ch_count; + int i; + + for (i = ch_count = 0; i < ARRAY_SIZE(kbd_to_ansi364); i++) { + if (keycode != kbd_to_ansi364[i].kbd_scan_code) + continue; + for (escape = kbd_to_ansi364[i].escape; *escape; escape++) { + if (ch_count < max_chars) + output_ch[ch_count] = *escape; + ch_count++; + } + return ch_count; + } + + return 0; +} + +/** + * Converts and queues a list of key codes in escaped ASCII string form * Convert a list of key codes into ASCII * * You must call input_check_keycodes() before this. It turns the keycode - * list into a list of ASCII characters which are ready to send to the - * input layer. + * list into a list of ASCII characters and sends them to the input layer. * * Characters which were seen last time do not generate fresh ASCII output. + * The output (calls to queue_ascii) may be longer than num_keycodes, if the + * keycode contains special keys that was encoded to longer escaped sequence. * * @param config Input state * @param keycode List of key codes to examine * @param num_keycodes Number of key codes + * @param output_ch Buffer to place output characters into. It should + * be at last ANSI_CHAR_MAX * num_keycodes, to allow for + * ANSI sequences. + * @param max_chars Maximum number of characters to add to output_ch * @param same Number of key codes which are the same + * @return number of characters written into output_ch, or -1 if we would + * exceed max_chars chars. */ static int input_keycodes_to_ascii(struct input_config *config, - int keycode[], int num_keycodes, char output_ch[], int same) + int keycode[], int num_keycodes, char output_ch[], + int max_chars, int same) { struct input_key_xlate *table; - int ch_count; + int ch_count = 0; int i; table = &config->table[0]; @@ -321,19 +380,31 @@ static int input_keycodes_to_ascii(struct input_config *config, } } - /* now find normal keys */ - for (i = ch_count = 0; i < num_keycodes; i++) { + /* Start conversion by looking for the first new keycode (by same). */ + for (i = same; i < num_keycodes; i++) { int key = keycode[i]; + int ch = (key < table->num_entries) ? table->xlate[key] : 0xff; - if (key < table->num_entries && i >= same) { - int ch = table->xlate[key]; - - /* If a normal key with an ASCII value, add it! */ - if (ch != 0xff) - output_ch[ch_count++] = (uchar)ch; + /* + * For a normal key (with an ASCII value), add it; otherwise + * translate special key to escape sequence if possible. + */ + if (ch != 0xff) { + if (ch_count < max_chars) + output_ch[ch_count] = (uchar)ch; + ch_count++; + } else { + ch_count += input_keycode_to_ansi364(config, key, + output_ch, max_chars); } } + if (ch_count > max_chars) { + debug("%s: Output char buffer overflow size=%d, need=%d\n", + __func__, max_chars, ch_count); + return -1; + } + /* ok, so return keys */ return ch_count; } @@ -341,7 +412,7 @@ static int input_keycodes_to_ascii(struct input_config *config, int input_send_keycodes(struct input_config *config, int keycode[], int num_keycodes) { - char ch[num_keycodes]; + char ch[num_keycodes * ANSI_CHAR_MAX]; int count, i, same = 0; int is_repeat = 0; unsigned delay_ms; @@ -363,7 +434,7 @@ int input_send_keycodes(struct input_config *config, } count = input_keycodes_to_ascii(config, keycode, num_keycodes, - ch, is_repeat ? 0 : same); + ch, sizeof(ch), is_repeat ? 0 : same); for (i = 0; i < count; i++) input_queue_ascii(config, ch[i]); delay_ms = is_repeat ? @@ -371,7 +442,8 @@ int input_send_keycodes(struct input_config *config, config->repeat_delay_ms; config->next_repeat_ms = get_timer(0) + delay_ms; - return 0; + + return count; } int input_add_table(struct input_config *config, int left_keycode, diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c index 471c5efea1..5e64dbdd17 100644 --- a/drivers/net/mcfmii.c +++ b/drivers/net/mcfmii.c @@ -315,13 +315,11 @@ int mcffec_miiphy_read(const char *devname, unsigned char addr, unsigned char re int mcffec_miiphy_write(const char *devname, unsigned char addr, unsigned char reg, unsigned short value) { - short rdreg; /* register working value */ - #ifdef MII_DEBUG printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr); #endif - rdreg = mii_send(mk_mii_write(addr, reg, value)); + mii_send(mk_mii_write(addr, reg, value)); #ifdef MII_DEBUG printf("0x%04x\n", value); diff --git a/drivers/serial/altera_jtag_uart.c b/drivers/serial/altera_jtag_uart.c index 654b5019eb..28319baf18 100644 --- a/drivers/serial/altera_jtag_uart.c +++ b/drivers/serial/altera_jtag_uart.c @@ -59,12 +59,6 @@ static void altera_jtag_serial_putc(char c) writel ((unsigned char)c, &jtag->data); } -static void altera_jtag_serial_puts(const char *s) -{ - while (*s != 0) - serial_putc (*s++); -} - static int altera_jtag_serial_tstc(void) { return ( readl (&jtag->control) & NIOS_JTAG_RRDY); @@ -91,7 +85,7 @@ static struct serial_device altera_jtag_serial_drv = { .stop = NULL, .setbrg = altera_jtag_serial_setbrg, .putc = altera_jtag_serial_putc, - .puts = altera_jtag_serial_puts, + .puts = default_serial_puts, .getc = altera_jtag_serial_getc, .tstc = altera_jtag_serial_tstc, }; diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c index 27550ed48d..118cd58ece 100644 --- a/drivers/serial/altera_uart.c +++ b/drivers/serial/altera_uart.c @@ -82,13 +82,6 @@ static void altera_serial_putc(char c) writel ((unsigned char)c, &uart->txdata); } -static void altera_serial_puts(const char *s) -{ - while (*s != 0) { - serial_putc (*s++); - } -} - static int altera_serial_tstc(void) { return (readl (&uart->status) & NIOS_UART_RRDY); @@ -107,7 +100,7 @@ static struct serial_device altera_serial_drv = { .stop = NULL, .setbrg = altera_serial_setbrg, .putc = altera_serial_putc, - .puts = altera_serial_puts, + .puts = default_serial_puts, .getc = altera_serial_getc, .tstc = altera_serial_tstc, }; diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c index 130303129e..c4d7432efc 100644 --- a/drivers/serial/atmel_usart.c +++ b/drivers/serial/atmel_usart.c @@ -86,12 +86,6 @@ static void atmel_serial_putc(char c) writel(c, &usart->thr); } -static void atmel_serial_puts(const char *s) -{ - while (*s) - serial_putc(*s++); -} - static int atmel_serial_getc(void) { atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; @@ -113,7 +107,7 @@ static struct serial_device atmel_serial_drv = { .stop = NULL, .setbrg = atmel_serial_setbrg, .putc = atmel_serial_putc, - .puts = atmel_serial_puts, + .puts = default_serial_puts, .getc = atmel_serial_getc, .tstc = atmel_serial_tstc, }; diff --git a/drivers/serial/lpc32xx_hsuart.c b/drivers/serial/lpc32xx_hsuart.c index 02429b5541..7559916578 100644 --- a/drivers/serial/lpc32xx_hsuart.c +++ b/drivers/serial/lpc32xx_hsuart.c @@ -77,19 +77,13 @@ static int lpc32xx_serial_init(void) return 0; } -static void lpc32xx_serial_puts(const char *s) -{ - while (*s) - serial_putc(*s++); -} - static struct serial_device lpc32xx_serial_drv = { .name = "lpc32xx_serial", .start = lpc32xx_serial_init, .stop = NULL, .setbrg = lpc32xx_serial_setbrg, .putc = lpc32xx_serial_putc, - .puts = lpc32xx_serial_puts, + .puts = default_serial_puts, .getc = lpc32xx_serial_getc, .tstc = lpc32xx_serial_tstc, }; diff --git a/drivers/serial/mcfuart.c b/drivers/serial/mcfuart.c index 00a7114691..7e25797661 100644 --- a/drivers/serial/mcfuart.c +++ b/drivers/serial/mcfuart.c @@ -28,6 +28,8 @@ */ #include <common.h> +#include <serial.h> +#include <linux/compiler.h> #include <asm/immap.h> #include <asm/uart.h> @@ -87,13 +89,6 @@ static void mcf_serial_putc(const char c) uart->utb = c; } -static void mcf_serial_puts(const char *s) -{ - while (*s) { - serial_putc(*s++); - } -} - static int mcf_serial_getc(void) { volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE); @@ -136,7 +131,7 @@ static struct serial_device mcf_serial_drv = { .stop = NULL, .setbrg = mcf_serial_setbrg, .putc = mcf_serial_putc, - .puts = mcf_serial_puts, + .puts = default_serial_puts, .getc = mcf_serial_getc, .tstc = mcf_serial_tstc, }; diff --git a/drivers/serial/ns9750_serial.c b/drivers/serial/ns9750_serial.c index cb545c4065..85fc68a076 100644 --- a/drivers/serial/ns9750_serial.c +++ b/drivers/serial/ns9750_serial.c @@ -100,19 +100,6 @@ static void ns9750_serial_putc(const char c) } /*********************************************************************** - * @Function: serial_puts - * @Return: n/a - * @Descr: writes non-zero string to the FIFO. - ***********************************************************************/ - -static void ns9750_serial_puts(const char *s) -{ - while (*s) { - serial_putc( *s++ ); - } -} - -/*********************************************************************** * @Function: serial_getc * @Return: the character read * @Descr: performs only 8bit accesses to the FIFO. No error handling @@ -215,7 +202,7 @@ static struct serial_device ns9750_serial_drv = { .stop = NULL, .setbrg = ns9750_serial_setbrg, .putc = ns9750_serial_putc, - .puts = ns9750_serial_puts, + .puts = default_serial_puts, .getc = ns9750_serial_getc, .tstc = ns9750_serial_tstc, }; diff --git a/drivers/serial/opencores_yanu.c b/drivers/serial/opencores_yanu.c index 49bccf3a6c..4ca6ef0b25 100644 --- a/drivers/serial/opencores_yanu.c +++ b/drivers/serial/opencores_yanu.c @@ -161,14 +161,6 @@ static void oc_serial_putc(char c) writel((unsigned char)c, &uart->data); } -static void oc_serial_puts(const char *s) -{ - while (*s != 0) { - serial_putc (*s++); - } -} - - static int oc_serial_tstc(void) { unsigned status ; @@ -195,7 +187,7 @@ static struct serial_device oc_serial_drv = { .stop = NULL, .setbrg = oc_serial_setbrg, .putc = oc_serial_putc, - .puts = oc_serial_puts, + .puts = default_serial_puts, .getc = oc_serial_getc, .tstc = oc_serial_tstc, }; diff --git a/drivers/serial/s3c4510b_uart.c b/drivers/serial/s3c4510b_uart.c index 423d26e678..c460229e05 100644 --- a/drivers/serial/s3c4510b_uart.c +++ b/drivers/serial/s3c4510b_uart.c @@ -199,12 +199,10 @@ static int s3c4510b_serial_getc(void) static void s3c4510b_serial_puts(const char *s) { - while (*s) { - serial_putc (*s++); - } + default_serial_puts(s); /* busy wait for tx complete */ - while ( !uart->m_stat.bf.txComplete); + while (!uart->m_stat.bf.txComplete); /* clear break */ uart->m_ctrl.bf.sendBreak = 0; diff --git a/drivers/serial/s3c64xx.c b/drivers/serial/s3c64xx.c index 9ab8a28d83..ea8d734a9e 100644 --- a/drivers/serial/s3c64xx.c +++ b/drivers/serial/s3c64xx.c @@ -166,19 +166,13 @@ static int s3c64xx_serial_tstc(void) return uart->UTRSTAT & 0x1; } -static void s3c64xx_serial_puts(const char *s) -{ - while (*s) - serial_putc(*s++); -} - static struct serial_device s3c64xx_serial_drv = { .name = "s3c64xx_serial", .start = s3c64xx_serial_init, .stop = NULL, .setbrg = s3c64xx_serial_setbrg, .putc = s3c64xx_serial_putc, - .puts = s3c64xx_serial_puts, + .puts = default_serial_puts, .getc = s3c64xx_serial_getc, .tstc = s3c64xx_serial_tstc, }; diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 5bbf3aeb44..e0886d562e 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -26,16 +26,35 @@ #include <stdio_dev.h> #include <post.h> #include <linux/compiler.h> +#include <errno.h> DECLARE_GLOBAL_DATA_PTR; static struct serial_device *serial_devices; static struct serial_device *serial_current; +/** + * serial_null() - Void registration routine of a serial driver + * + * This routine implements a void registration routine of a serial + * driver. The registration routine of a particular driver is aliased + * to this empty function in case the driver is not compiled into + * U-Boot. + */ static void serial_null(void) { } +/** + * serial_initfunc() - Forward declare of driver registration routine + * @name: Name of the real driver registration routine. + * + * This macro expands onto forward declaration of a driver registration + * routine, which is then used below in serial_initialize() function. + * The declaration is made weak and aliases to serial_null() so in case + * the driver is not compiled in, the function is still declared and can + * be used, but aliases to serial_null() and thus is optimized away. + */ #define serial_initfunc(name) \ void name(void) \ __attribute__((weak, alias("serial_null"))); @@ -94,6 +113,16 @@ serial_initfunc(s3c44b0_serial_initialize); serial_initfunc(sa1100_serial_initialize); serial_initfunc(sh_serial_initialize); +/** + * serial_register() - Register serial driver with serial driver core + * @dev: Pointer to the serial driver structure + * + * This function registers the serial driver supplied via @dev with + * serial driver core, thus making U-Boot aware of it and making it + * available for U-Boot to use. On platforms that still require manual + * relocation of constant variables, relocation of the supplied structure + * is performed. + */ void serial_register(struct serial_device *dev) { #ifdef CONFIG_NEEDS_MANUAL_RELOC @@ -117,6 +146,15 @@ void serial_register(struct serial_device *dev) serial_devices = dev; } +/** + * serial_initialize() - Register all compiled-in serial port drivers + * + * This function registers all serial port drivers that are compiled + * into the U-Boot binary with the serial core, thus making them + * available to U-Boot to use. Lastly, this function assigns a default + * serial port to the serial core. That serial port is then used as a + * default output. + */ void serial_initialize(void) { mpc8xx_serial_initialize(); @@ -176,6 +214,13 @@ void serial_initialize(void) serial_assign(default_serial_console()->name); } +/** + * serial_stdio_init() - Register serial ports with STDIO core + * + * This function generates a proxy driver for each serial port driver. + * These proxy drivers then register with the STDIO core, making the + * serial drivers available as STDIO devices. + */ void serial_stdio_init(void) { struct stdio_dev dev; @@ -200,20 +245,38 @@ void serial_stdio_init(void) } } +/** + * serial_assign() - Select the serial output device by name + * @name: Name of the serial driver to be used as default output + * + * This function configures the serial output multiplexing by + * selecting which serial device will be used as default. In case + * the STDIO "serial" device is selected as stdin/stdout/stderr, + * the serial device previously configured by this function will be + * used for the particular operation. + * + * Returns 0 on success, negative on error. + */ int serial_assign(const char *name) { struct serial_device *s; for (s = serial_devices; s; s = s->next) { - if (strcmp(s->name, name) == 0) { - serial_current = s; - return 0; - } + if (strcmp(s->name, name)) + continue; + serial_current = s; + return 0; } - return 1; + return -EINVAL; } +/** + * serial_reinit_all() - Reinitialize all compiled-in serial ports + * + * This function reinitializes all serial ports that are compiled + * into U-Boot by calling their serial_start() functions. + */ void serial_reinit_all(void) { struct serial_device *s; @@ -222,60 +285,173 @@ void serial_reinit_all(void) s->start(); } +/** + * get_current() - Return pointer to currently selected serial port + * + * This function returns a pointer to currently selected serial port. + * The currently selected serial port is altered by serial_assign() + * function. + * + * In case this function is called before relocation or before any serial + * port is configured, this function calls default_serial_console() to + * determine the serial port. Otherwise, the configured serial port is + * returned. + * + * Returns pointer to the currently selected serial port on success, + * NULL on error. + */ static struct serial_device *get_current(void) { struct serial_device *dev; - if (!(gd->flags & GD_FLG_RELOC) || !serial_current) { + if (!(gd->flags & GD_FLG_RELOC)) + dev = default_serial_console(); + else if (!serial_current) dev = default_serial_console(); + else + dev = serial_current; - /* We must have a console device */ - if (!dev) { + /* We must have a console device */ + if (!dev) { #ifdef CONFIG_SPL_BUILD - puts("Cannot find console\n"); - hang(); + puts("Cannot find console\n"); + hang(); #else - panic("Cannot find console\n"); + panic("Cannot find console\n"); #endif - } - } else - dev = serial_current; + } + return dev; } +/** + * serial_init() - Initialize currently selected serial port + * + * This function initializes the currently selected serial port. This + * usually involves setting up the registers of that particular port, + * enabling clock and such. This function uses the get_current() call + * to determine which port is selected. + * + * Returns 0 on success, negative on error. + */ int serial_init(void) { return get_current()->start(); } +/** + * serial_setbrg() - Configure baud-rate of currently selected serial port + * + * This function configures the baud-rate of the currently selected + * serial port. The baud-rate is retrieved from global data within + * the serial port driver. This function uses the get_current() call + * to determine which port is selected. + * + * Returns 0 on success, negative on error. + */ void serial_setbrg(void) { get_current()->setbrg(); } +/** + * serial_getc() - Read character from currently selected serial port + * + * This function retrieves a character from currently selected serial + * port. In case there is no character waiting on the serial port, + * this function will block and wait for the character to appear. This + * function uses the get_current() call to determine which port is + * selected. + * + * Returns the character on success, negative on error. + */ int serial_getc(void) { return get_current()->getc(); } +/** + * serial_tstc() - Test if data is available on currently selected serial port + * + * This function tests if one or more characters are available on + * currently selected serial port. This function never blocks. This + * function uses the get_current() call to determine which port is + * selected. + * + * Returns positive if character is available, zero otherwise. + */ int serial_tstc(void) { return get_current()->tstc(); } +/** + * serial_putc() - Output character via currently selected serial port + * @c: Single character to be output from the serial port. + * + * This function outputs a character via currently selected serial + * port. This character is passed to the serial port driver responsible + * for controlling the hardware. The hardware may still be in process + * of transmitting another character, therefore this function may block + * for a short amount of time. This function uses the get_current() + * call to determine which port is selected. + */ void serial_putc(const char c) { get_current()->putc(c); } +/** + * serial_puts() - Output string via currently selected serial port + * @s: Zero-terminated string to be output from the serial port. + * + * This function outputs a zero-terminated string via currently + * selected serial port. This function behaves as an accelerator + * in case the hardware can queue multiple characters for transfer. + * The whole string that is to be output is available to the function + * implementing the hardware manipulation. Transmitting the whole + * string may take some time, thus this function may block for some + * amount of time. This function uses the get_current() call to + * determine which port is selected. + */ void serial_puts(const char *s) { get_current()->puts(s); } +/** + * default_serial_puts() - Output string by calling serial_putc() in loop + * @s: Zero-terminated string to be output from the serial port. + * + * This function outputs a zero-terminated string by calling serial_putc() + * in a loop. Most drivers do not support queueing more than one byte for + * transfer, thus this function precisely implements their serial_puts(). + * + * To optimize the number of get_current() calls, this function only + * calls get_current() once and then directly accesses the putc() call + * of the &struct serial_device . + */ +void default_serial_puts(const char *s) +{ + struct serial_device *dev = get_current(); + while (*s) + dev->putc(*s++); +} + #if CONFIG_POST & CONFIG_SYS_POST_UART static const int bauds[] = CONFIG_SYS_BAUDRATE_TABLE; +/** + * uart_post_test() - Test the currently selected serial port using POST + * @flags: POST framework flags + * + * Do a loopback test of the currently selected serial port. This + * function is only useful in the context of the POST testing framwork. + * The serial port is firstly configured into loopback mode and then + * characters are sent through it. + * + * Returns 0 on success, value otherwise. + */ /* Mark weak until post/cpu/.../uart.c migrate over */ __weak int uart_post_test(int flags) diff --git a/drivers/serial/serial_clps7111.c b/drivers/serial/serial_clps7111.c index 65473e8608..c292ed8756 100644 --- a/drivers/serial/serial_clps7111.c +++ b/drivers/serial/serial_clps7111.c @@ -112,20 +112,13 @@ static int clps7111_serial_getc(void) return IO_UARTDR1 & 0xff; } -static void clps7111_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static struct serial_device clps7111_serial_drv = { .name = "clps7111_serial", .start = clps7111_serial_init, .stop = NULL, .setbrg = clps7111_serial_setbrg, .putc = clps7111_serial_putc, - .puts = clps7111_serial_puts, + .puts = default_serial_puts, .getc = clps7111_serial_getc, .tstc = clps7111_serial_tstc, }; diff --git a/drivers/serial/serial_imx.c b/drivers/serial/serial_imx.c index 6c075b5b91..9b9be44c52 100644 --- a/drivers/serial/serial_imx.c +++ b/drivers/serial/serial_imx.c @@ -214,20 +214,13 @@ static int imx_serial_tstc(void) return 1; } -static void imx_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static struct serial_device imx_serial_drv = { .name = "imx_serial", .start = imx_serial_init, .stop = NULL, .setbrg = imx_serial_setbrg, .putc = imx_serial_putc, - .puts = imx_serial_puts, + .puts = default_serial_puts, .getc = imx_serial_getc, .tstc = imx_serial_tstc, }; diff --git a/drivers/serial/serial_ixp.c b/drivers/serial/serial_ixp.c index c8b3658d47..09a3df4016 100644 --- a/drivers/serial/serial_ixp.c +++ b/drivers/serial/serial_ixp.c @@ -121,20 +121,13 @@ static int ixp_serial_getc(void) return (char) RBR(CONFIG_SYS_IXP425_CONSOLE) & 0xff; } -static void ixp_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static struct serial_device ixp_serial_drv = { .name = "ixp_serial", .start = ixp_serial_init, .stop = NULL, .setbrg = ixp_serial_setbrg, .putc = ixp_serial_putc, - .puts = ixp_serial_puts, + .puts = default_serial_puts, .getc = ixp_serial_getc, .tstc = ixp_serial_tstc, }; diff --git a/drivers/serial/serial_ks8695.c b/drivers/serial/serial_ks8695.c index 60e8007201..8b1c974de9 100644 --- a/drivers/serial/serial_ks8695.c +++ b/drivers/serial/serial_ks8695.c @@ -102,13 +102,6 @@ static int ks8695_serial_tstc(void) return 0; } -static void ks8695_serial_puts(const char *s) -{ - char c; - while ((c = *s++) != 0) - serial_putc(c); -} - static int ks8695_serial_getc(void) { volatile struct ks8695uart *uartp = KS8695_UART_ADDR; @@ -124,7 +117,7 @@ static struct serial_device ks8695_serial_drv = { .stop = NULL, .setbrg = ks8695_serial_setbrg, .putc = ks8695_serial_putc, - .puts = ks8695_serial_puts, + .puts = default_serial_puts, .getc = ks8695_serial_getc, .tstc = ks8695_serial_tstc, }; diff --git a/drivers/serial/serial_lpc2292.c b/drivers/serial/serial_lpc2292.c index fcab20280e..8abc476713 100644 --- a/drivers/serial/serial_lpc2292.c +++ b/drivers/serial/serial_lpc2292.c @@ -89,13 +89,6 @@ static int lpc2292_serial_getc(void) return GET8(U0RBR); } -static void lpc2292_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - /* Test if there is a byte to read */ static int lpc2292_serial_tstc(void) { @@ -108,7 +101,7 @@ static struct serial_device lpc2292_serial_drv = { .stop = NULL, .setbrg = lpc2292_serial_setbrg, .putc = lpc2292_serial_putc, - .puts = lpc2292_serial_puts, + .puts = default_serial_puts, .getc = lpc2292_serial_getc, .tstc = lpc2292_serial_tstc, }; diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index b0612f5aca..9227d64088 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -187,13 +187,6 @@ static int mxc_serial_tstc(void) return 1; } -static void mxc_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - /* * Initialise the serial port with the given baudrate. The settings * are always 8 data bits, no parity, 1 stop bit, no start bits. @@ -228,7 +221,7 @@ static struct serial_device mxc_serial_drv = { .stop = NULL, .setbrg = mxc_serial_setbrg, .putc = mxc_serial_putc, - .puts = mxc_serial_puts, + .puts = default_serial_puts, .getc = mxc_serial_getc, .tstc = mxc_serial_tstc, }; diff --git a/drivers/serial/serial_netarm.c b/drivers/serial/serial_netarm.c index d30adc3183..44d7c500c7 100644 --- a/drivers/serial/serial_netarm.c +++ b/drivers/serial/serial_netarm.c @@ -182,20 +182,13 @@ static int netarm_serial_getc(void) return ch_uint & 0xff; } -static void netarm_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static struct serial_device netarm_serial_drv = { .name = "netarm_serial", .start = netarm_serial_init, .stop = NULL, .setbrg = netarm_serial_setbrg, .putc = netarm_serial_putc, - .puts = netarm_serial_puts, + .puts = default_serial_puts, .getc = netarm_serial_getc, .tstc = netarm_serial_tstc, }; diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c index 7db7b65c3f..b331be794b 100644 --- a/drivers/serial/serial_pl01x.c +++ b/drivers/serial/serial_pl01x.c @@ -179,13 +179,6 @@ static void pl01x_serial_putc(const char c) pl01x_putc (CONSOLE_PORT, c); } -static void pl01x_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static int pl01x_serial_getc(void) { return pl01x_getc (CONSOLE_PORT); @@ -259,7 +252,7 @@ static struct serial_device pl01x_serial_drv = { .stop = NULL, .setbrg = pl01x_serial_setbrg, .putc = pl01x_serial_putc, - .puts = pl01x_serial_puts, + .puts = default_serial_puts, .getc = pl01x_serial_getc, .tstc = pl01x_serial_tstc, }; diff --git a/drivers/serial/serial_s3c44b0.c b/drivers/serial/serial_s3c44b0.c index a4428e0f47..9cae843088 100644 --- a/drivers/serial/serial_s3c44b0.c +++ b/drivers/serial/serial_s3c44b0.c @@ -209,20 +209,13 @@ static int s3c44b0_serial_getc(void) } } -static void s3c44b0_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static struct serial_device s3c44b0_serial_drv = { .name = "s3c44b0_serial", .start = s3c44b0_serial_init, .stop = NULL, .setbrg = s3c44b0_serial_setbrg, .putc = s3c44b0_serial_putc, - .puts = s3c44b0_serial_puts, + .puts = default_serial_puts, .getc = s3c44b0_serial_getc, .tstc = s3c44b0_serial_tstc, }; diff --git a/drivers/serial/serial_sa1100.c b/drivers/serial/serial_sa1100.c index c6b34db7c6..3c0f4c59fb 100644 --- a/drivers/serial/serial_sa1100.c +++ b/drivers/serial/serial_sa1100.c @@ -153,20 +153,13 @@ static int sa1100_serial_getc(void) #endif } -static void sa1100_serial_puts(const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - static struct serial_device sa1100_serial_drv = { .name = "sa1100_serial", .start = sa1100_serial_init, .stop = NULL, .setbrg = sa1100_serial_setbrg, .putc = sa1100_serial_putc, - .puts = sa1100_serial_puts, + .puts = default_serial_puts, .getc = sa1100_serial_getc, .tstc = sa1100_serial_tstc, }; diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index 1ddfc7d87f..3c931d0212 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -136,13 +136,6 @@ static void sh_serial_putc(const char c) serial_raw_putc(c); } -static void sh_serial_puts(const char *s) -{ - char c; - while ((c = *s++) != 0) - serial_putc(c); -} - static int sh_serial_tstc(void) { return serial_rx_fifo_level() ? 1 : 0; @@ -196,7 +189,7 @@ static struct serial_device sh_serial_drv = { .stop = NULL, .setbrg = sh_serial_setbrg, .putc = sh_serial_putc, - .puts = sh_serial_puts, + .puts = default_serial_puts, .getc = sh_serial_getc, .tstc = sh_serial_tstc, }; diff --git a/examples/standalone/mips64.lds b/examples/standalone/mips64.lds new file mode 100644 index 0000000000..9b27ef4769 --- /dev/null +++ b/examples/standalone/mips64.lds @@ -0,0 +1,59 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk Engineering, <wd@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* +OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips") +*/ +OUTPUT_FORMAT("elf64-tradbigmips", "elf64-tradbigmips", "elf64-tradlittlemips") +OUTPUT_ARCH(mips) +SECTIONS +{ + .text : + { + *(.text*) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { *(.data*) } + + . = .; + _gp = ALIGN(16) + 0x7ff0; + + .got : { + __got_start = .; + *(.got) + __got_end = .; + } + + .sdata : { *(.sdata*) } + + . = ALIGN(4); + __bss_start = .; + .sbss (NOLOAD) : { *(.sbss*) } + .bss (NOLOAD) : { *(.bss*) . = ALIGN(4); } + + _end = .; +} diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 80156c815f..4a60a2503e 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -567,15 +567,16 @@ get_vfatname(fsdata *mydata, int curclust, __u8 *cluster, } /* Calculate short name checksum */ -static __u8 mkcksum(const char *str) +static __u8 mkcksum(const char name[8], const char ext[3]) { int i; __u8 ret = 0; - for (i = 0; i < 11; i++) { - ret = (((ret & 1) << 7) | ((ret & 0xfe) >> 1)) + str[i]; - } + for (i = 0; i < sizeof(name); i++) + ret = (((ret & 1) << 7) | ((ret & 0xfe) >> 1)) + name[i]; + for (i = 0; i < sizeof(ext); i++) + ret = (((ret & 1) << 7) | ((ret & 0xfe) >> 1)) + ext[i]; return ret; } @@ -678,7 +679,8 @@ static dir_entry *get_dentfromdir(fsdata *mydata, int startsect, return NULL; } #ifdef CONFIG_SUPPORT_VFAT - if (dols && mkcksum(dentptr->name) == prevcksum) { + __u8 csum = mkcksum(dentptr->name, dentptr->ext); + if (dols && csum == prevcksum) { prevcksum = 0xffff; dentptr++; continue; @@ -946,13 +948,16 @@ do_fat_read_at(const char *filename, unsigned long pos, void *buffer, for (i = 0; i < DIRENTSPERBLOCK; i++) { char s_name[14], l_name[VFAT_MAXLEN_BYTES]; + __u8 csum; l_name[0] = '\0'; if (dentptr->name[0] == DELETED_FLAG) { dentptr++; continue; } - if ((dentptr->attr & ATTR_VOLUME)) { + + csum = mkcksum(dentptr->name, dentptr->ext); + if (dentptr->attr & ATTR_VOLUME) { #ifdef CONFIG_SUPPORT_VFAT if ((dentptr->attr & ATTR_VFAT) == ATTR_VFAT && (dentptr->name[0] & LAST_LONG_ENTRY_MASK)) { @@ -1015,8 +1020,7 @@ do_fat_read_at(const char *filename, unsigned long pos, void *buffer, goto exit; } #ifdef CONFIG_SUPPORT_VFAT - else if (dols == LS_ROOT && - mkcksum(dentptr->name) == prevcksum) { + else if (dols == LS_ROOT && csum == prevcksum) { prevcksum = 0xffff; dentptr++; continue; diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c index 5829adf1a1..4a1bda0a37 100644 --- a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -335,7 +335,7 @@ fill_dir_slot(fsdata *mydata, dir_entry **dentptr, const char *l_name) /* Get short file name and checksum value */ strncpy(s_name, (*dentptr)->name, 16); - checksum = mkcksum(s_name); + checksum = mkcksum((*dentptr)->name, (*dentptr)->ext); do { memset(slotptr, 0x00, sizeof(dir_slot)); diff --git a/include/configs/BMW.h b/include/configs/BMW.h deleted file mode 100644 index 633e9bd69f..0000000000 --- a/include/configs/BMW.h +++ /dev/null @@ -1,302 +0,0 @@ -/* - * (C) Copyright 2001 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * - * Configuration settings for the CU824 board. - * - */ - -/* ------------------------------------------------------------------------- */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ - -#define CONFIG_MPC824X 1 -#define CONFIG_MPC8245 1 -#define CONFIG_BMW 1 - -#define CONFIG_SYS_TEXT_BASE 0xFFF00000 - -#define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */ - -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 9600 - -#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ - -#define CONFIG_BOOTCOMMAND "bootm FF820000" /* autoboot command */ -#define CONFIG_BOOTDELAY 5 - -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Only use Onboard TSOP-16MB device */ -#define DOC_PASSIVE_PROBE 1 -#define CONFIG_SYS_DOC_SUPPORT_2000 1 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM 1 -#define CONFIG_SYS_DOC_SHORT_TIMEOUT 1 - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_DATE -#define CONFIG_CMD_ELF -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_NFS - - -#if 0 -#define CONFIG_PCI 1 -#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */ -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "=>" /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ - -/* Print Buffer Size - */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) - -#define CONFIG_SYS_MAXARGS 8 /* Max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* Default load address */ - -/*----------------------------------------------------------------------- - * Start addresses for the final memory configuration - * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 - */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 - -#define CONFIG_SYS_FLASH_BASE0_PRELIM 0xFFF00000 /* FLASH bank on RCS#0 */ -#define CONFIG_SYS_FLASH_BASE1_PRELIM 0xFF800000 /* FLASH bank on RCS#1 */ -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_FLASH_BANKS { CONFIG_SYS_FLASH_BASE0_PRELIM , CONFIG_SYS_FLASH_BASE1_PRELIM } - -/* even though FLASHP_BASE is FF800000, with 4MB is RCS0, the - * reset vector is actually located at FFB00100, but the 8245 - * takes care of us. - */ -#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 - -#define CONFIG_SYS_EUMB_ADDR 0xFC000000 - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MALLOC_LEN (2048 << 10) /* Reserve 2MB for malloc() */ - -#define CONFIG_SYS_MEMTEST_START 0x00004000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x04000000 /* 0 ... 32 MB in DRAM */ - - /* Maximum amount of RAM. - */ -#define CONFIG_SYS_MAX_RAM_SIZE 0x04000000 /* 0 .. 64 MB of (S)DRAM */ - - -#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE -#undef CONFIG_SYS_RAMBOOT -#else -#define CONFIG_SYS_RAMBOOT -#endif - - -/*----------------------------------------------------------------------- - * Definitions for initial stack pointer and data area - */ -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_MONITOR_LEN -#define CONFIG_SYS_INIT_RAM_SIZE 0x2F00 /* Size of used area in DPRAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/* - * Low Level Configuration Settings - * (address mappings, register initial values, etc.) - * You should know what you are doing if you make changes here. - * For the detail description refer to the MPC8240 user's manual. - */ - -#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ -#define CONFIG_SYS_HZ 1000 - -#define CONFIG_SYS_ETH_DEV_FN 0x7800 -#define CONFIG_SYS_ETH_IOBASE 0x00104000 - - /* Bit-field values for MCCR1. - */ -#define CONFIG_SYS_ROMNAL 0xf -#define CONFIG_SYS_ROMFAL 0x1f -#define CONFIG_SYS_DBUS_SIZE 0x3 - - /* Bit-field values for MCCR2. - */ -#define CONFIG_SYS_TSWAIT 0x5 /* Transaction Start Wait States timer */ -#define CONFIG_SYS_REFINT 0x400 /* Refresh interval FIXME: was 0t430 */ - - /* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4. - */ -#define CONFIG_SYS_BSTOPRE 0 /* FIXME: was 192 */ - - /* Bit-field values for MCCR3. - */ -#define CONFIG_SYS_REFREC 2 /* Refresh to activate interval */ - - /* Bit-field values for MCCR4. - */ -#define CONFIG_SYS_PRETOACT 2 /* Precharge to activate interval FIXME: was 2 */ -#define CONFIG_SYS_ACTTOPRE 5 /* Activate to Precharge interval FIXME: was 5 */ -#define CONFIG_SYS_SDMODE_CAS_LAT 3 /* SDMODE CAS latancy */ -#define CONFIG_SYS_SDMODE_WRAP 0 /* SDMODE wrap type */ -#define CONFIG_SYS_SDMODE_BURSTLEN 3 /* SDMODE Burst length */ -#define CONFIG_SYS_ACTORW 0xa /* FIXME was 2 */ -#define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1 - -#define CONFIG_SYS_PGMAX 0x0 /* how long the 8240 reatins the currently accessed page in memory FIXME: was 0x32*/ - -#define CONFIG_SYS_SDRAM_DSCD 0x20 /* SDRAM data in sample clock delay - note bottom 3 bits MUST be 0 */ - -/* Memory bank settings. - * Only bits 20-29 are actually used from these vales to set the - * start/end addresses. The upper two bits will always be 0, and the lower - * 20 bits will be 0x00000 for a start address, or 0xfffff for an end - * address. Refer to the MPC8240 book. - */ - -#define CONFIG_SYS_BANK0_START 0x00000000 -#define CONFIG_SYS_BANK0_END (CONFIG_SYS_MAX_RAM_SIZE - 1) -#define CONFIG_SYS_BANK0_ENABLE 1 -#define CONFIG_SYS_BANK1_START 0x3ff00000 -#define CONFIG_SYS_BANK1_END 0x3fffffff -#define CONFIG_SYS_BANK1_ENABLE 0 -#define CONFIG_SYS_BANK2_START 0x3ff00000 -#define CONFIG_SYS_BANK2_END 0x3fffffff -#define CONFIG_SYS_BANK2_ENABLE 0 -#define CONFIG_SYS_BANK3_START 0x3ff00000 -#define CONFIG_SYS_BANK3_END 0x3fffffff -#define CONFIG_SYS_BANK3_ENABLE 0 -#define CONFIG_SYS_BANK4_START 0x3ff00000 -#define CONFIG_SYS_BANK4_END 0x3fffffff -#define CONFIG_SYS_BANK4_ENABLE 0 -#define CONFIG_SYS_BANK5_START 0x3ff00000 -#define CONFIG_SYS_BANK5_END 0x3fffffff -#define CONFIG_SYS_BANK5_ENABLE 0 -#define CONFIG_SYS_BANK6_START 0x3ff00000 -#define CONFIG_SYS_BANK6_END 0x3fffffff -#define CONFIG_SYS_BANK6_ENABLE 0 -#define CONFIG_SYS_BANK7_START 0x3ff00000 -#define CONFIG_SYS_BANK7_END 0x3fffffff -#define CONFIG_SYS_BANK7_ENABLE 0 - -#define CONFIG_SYS_ODCR 0xff - -#define CONFIG_PCI 1 /* Include PCI support */ -#undef CONFIG_PCI_PNP - -/* PCI Memory space(s) */ -#define PCI_MEM_SPACE1_START 0x80000000 -#define PCI_MEM_SPACE2_START 0xfd000000 - -/* ROM Spaces */ -#include "../board/bmw/bmw.h" - -/* BAT configuration */ -#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_IBAT1L (0x70000000 | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CONFIG_SYS_IBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CONFIG_SYS_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_IBAT3L (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CONFIG_SYS_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L -#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U -#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L -#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U -#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L -#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U -#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L -#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - -/* - * FLASH organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 0 /* Max number of flash banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 64 /* Max number of sectors per flash */ - -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ - -/* - * Warining: environment is not EMBEDDED in the U-Boot code. - * It's stored in flash separately. - */ -#define CONFIG_ENV_IS_IN_NVRAM 1 -#define CONFIG_ENV_OVERWRITE 1 -#define CONFIG_SYS_NVRAM_ACCESS_ROUTINE 1 -#define CONFIG_ENV_ADDR 0x7c004000 /* right at the start of NVRAM */ -#define CONFIG_ENV_SIZE 0x1ff0 /* Size of the Environment - 8K */ -#define CONFIG_ENV_OFFSET 0 /* starting right at the beginning */ - -/* - * Cache Configuration - */ -#define CONFIG_SYS_CACHELINE_SIZE 32 -#if defined(CONFIG_CMD_KGDB) -# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ -#endif - -#endif /* __CONFIG_H */ diff --git a/include/configs/CPC45.h b/include/configs/CPC45.h index fc226f1984..e102c365c4 100644 --- a/include/configs/CPC45.h +++ b/include/configs/CPC45.h @@ -480,6 +480,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/ICU862.h b/include/configs/ICU862.h index 81f219c9b5..b58b6f638c 100644 --- a/include/configs/ICU862.h +++ b/include/configs/ICU862.h @@ -349,6 +349,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/IVML24.h b/include/configs/IVML24.h index f98a66bf24..092fcf0641 100644 --- a/include/configs/IVML24.h +++ b/include/configs/IVML24.h @@ -318,6 +318,8 @@ * IDE/ATA stuff *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ +#define CONFIG_IDE_INIT_POSTRESET 1 /* Use postreset IDE hook */ #define CONFIG_IDE_8xx_DIRECT 1 /* PCMCIA interface required */ #define CONFIG_IDE_RESET 1 /* reset for ide supported */ diff --git a/include/configs/IVMS8.h b/include/configs/IVMS8.h index d6e9b2381d..38837cab46 100644 --- a/include/configs/IVMS8.h +++ b/include/configs/IVMS8.h @@ -312,6 +312,8 @@ * IDE/ATA stuff *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ +#define CONFIG_IDE_INIT_POSTRESET 1 /* Use postreset IDE hook */ #define CONFIG_IDE_8xx_DIRECT 1 /* PCMCIA interface required */ #define CONFIG_IDE_RESET 1 /* reset for ide supported */ diff --git a/include/configs/KUP4K.h b/include/configs/KUP4K.h index c0035e65de..dae9b8c079 100644 --- a/include/configs/KUP4K.h +++ b/include/configs/KUP4K.h @@ -353,6 +353,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/KUP4X.h b/include/configs/KUP4X.h index 5084cccad8..cceee96742 100644 --- a/include/configs/KUP4X.h +++ b/include/configs/KUP4X.h @@ -366,6 +366,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/MBX.h b/include/configs/MBX.h index e8d0cd775b..7145cc4446 100644 --- a/include/configs/MBX.h +++ b/include/configs/MBX.h @@ -276,6 +276,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h index 604938d8b1..074e01f0fa 100644 --- a/include/configs/NETTA.h +++ b/include/configs/NETTA.h @@ -629,6 +629,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/NSCU.h b/include/configs/NSCU.h index 9f462f4b5e..f4184fcd8f 100644 --- a/include/configs/NSCU.h +++ b/include/configs/NSCU.h @@ -318,6 +318,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/R360MPI.h b/include/configs/R360MPI.h index 9befacbaba..868a0b8044 100644 --- a/include/configs/R360MPI.h +++ b/include/configs/R360MPI.h @@ -329,6 +329,7 @@ */ #if 1 +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/RPXClassic.h b/include/configs/RPXClassic.h index b215c2d642..3595200c45 100644 --- a/include/configs/RPXClassic.h +++ b/include/configs/RPXClassic.h @@ -314,6 +314,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/RPXlite.h b/include/configs/RPXlite.h index 8ffb014fe8..563abea95e 100644 --- a/include/configs/RPXlite.h +++ b/include/configs/RPXlite.h @@ -249,6 +249,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/RPXlite_DW.h b/include/configs/RPXlite_DW.h index f8bcf0fae2..67ab1e962b 100644 --- a/include/configs/RPXlite_DW.h +++ b/include/configs/RPXlite_DW.h @@ -335,6 +335,7 @@ * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter) *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/RRvision.h b/include/configs/RRvision.h index 671d52168a..e2b22f0bae 100644 --- a/include/configs/RRvision.h +++ b/include/configs/RRvision.h @@ -329,6 +329,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h deleted file mode 100644 index d448bf6650..0000000000 --- a/include/configs/SBC8540.h +++ /dev/null @@ -1,428 +0,0 @@ -/* - * (C) Copyright 2002,2003 Motorola,Inc. - * Xianghua Xiao <X.Xiao@motorola.com> - * - * (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>. - * Added support for Wind River SBC8540 board - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * sbc8540 board configuration file. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Top level Makefile configuration choices - */ -#ifdef CONFIG_66 -#define CONFIG_PCI_66 -#endif - -#define TSEC_DEBUG - -/* - * High Level Configuration Options - */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ -#define CONFIG_MPC85xx_REV1 1 /* MPC85xx Rev 1.0 chip */ - -#define CONFIG_SYS_TEXT_BASE 0xfffc0000 - - -#define CONFIG_CPM2 1 /* has CPM2 */ - -#define CONFIG_SBC8540 1 /* configuration for SBC8560 board */ -#define CONFIG_MPC8540 1 - -#define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific (supplement) */ - -#define CONFIG_TSEC_ENET /* tsec ethernet support */ -#undef CONFIG_PCI /* pci ethernet support */ -#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ - -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ - -#define CONFIG_ENV_OVERWRITE - -/* Using Localbus SDRAM to emulate flash before we can program the flash, - * normally you need a flash-boot image(u-boot.bin), if so undef this. - */ -#undef CONFIG_RAM_AS_FLASH - -#if defined(CONFIG_PCI_66) /* some PCI card is 33Mhz only */ - #define CONFIG_SYS_CLK_FREQ 66000000 /* sysclk for MPC85xx */ -#else - #define CONFIG_SYS_CLK_FREQ 33000000 /* most pci cards are 33Mhz */ -#endif - -/* below can be toggled for performance analysis. otherwise use default */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ -#undef CONFIG_BTB /* toggle branch predition */ - -#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ -#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */ - -#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - -#if (defined(CONFIG_PCI) && defined(CONFIG_TSEC_ENET) || \ - defined(CONFIG_PCI) && defined(CONFIG_ETHER_ON_FCC) || \ - defined(CONFIG_TSEC_ENET) && defined(CONFIG_ETHER_ON_FCC)) -#error "You can only use ONE of PCI Ethernet Card or TSEC Ethernet or CPM FCC." -#endif - -#define CONFIG_SYS_SDRAM_SIZE 512 /* DDR is 512MB */ - -/* DDR Setup */ -#define CONFIG_FSL_DDR1 -#undef CONFIG_FSL_DDR_INTERACTIVE -#undef CONFIG_DDR_ECC /* only for ECC DDR module */ -#undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ -#undef CONFIG_DDR_SPD - -#if defined(CONFIG_MPC85xx_REV1) -#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN /* possible DLL fix needed */ -#endif - -#undef CONFIG_DDR_ECC /* only for ECC DDR module */ -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_VERY_BIG_RAM - -#define CONFIG_NUM_DDR_CONTROLLERS 1 -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 2 - -/* I2C addresses of SPD EEPROMs */ -#define SPD_EEPROM_ADDRESS 0x55 /* CTLR 0 DIMM 0 */ - -#undef CONFIG_CLOCKS_IN_MHZ - -#if defined(CONFIG_RAM_AS_FLASH) - #define CONFIG_SYS_LBC_SDRAM_BASE 0xfc000000 /* Localbus SDRAM */ - #define CONFIG_SYS_FLASH_BASE 0xf8000000 /* start of FLASH 8M */ - #define CONFIG_SYS_BR0_PRELIM 0xf8000801 /* port size 8bit */ - #define CONFIG_SYS_OR0_PRELIM 0xf8000ff7 /* 8MB Flash */ -#else /* Boot from real Flash */ - #define CONFIG_SYS_LBC_SDRAM_BASE 0xf8000000 /* Localbus SDRAM */ - #define CONFIG_SYS_FLASH_BASE 0xff800000 /* start of FLASH 8M */ - #define CONFIG_SYS_BR0_PRELIM 0xff800801 /* port size 8bit */ - #define CONFIG_SYS_OR0_PRELIM 0xff800ff7 /* 8MB Flash */ -#endif -#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */ - -/* local bus definitions */ -#define CONFIG_SYS_BR1_PRELIM 0xe4001801 /* 64M, 32-bit flash */ -#define CONFIG_SYS_OR1_PRELIM 0xfc000ff7 - -#define CONFIG_SYS_BR2_PRELIM 0x00000000 /* CS2 not used */ -#define CONFIG_SYS_OR2_PRELIM 0x00000000 - -#define CONFIG_SYS_BR3_PRELIM 0xf0001861 /* 64MB localbus SDRAM */ -#define CONFIG_SYS_OR3_PRELIM 0xfc000cc1 - -#if defined(CONFIG_RAM_AS_FLASH) - #define CONFIG_SYS_BR4_PRELIM 0xf4001861 /* 64M localbus SDRAM */ -#else - #define CONFIG_SYS_BR4_PRELIM 0xf8001861 /* 64M localbus SDRAM */ -#endif -#define CONFIG_SYS_OR4_PRELIM 0xfc000cc1 - -#define CONFIG_SYS_BR5_PRELIM 0xfc000801 /* 16M CS5 misc devices */ -#if 1 - #define CONFIG_SYS_OR5_PRELIM 0xff000ff7 -#else - #define CONFIG_SYS_OR5_PRELIM 0xff0000f0 -#endif - -#define CONFIG_SYS_BR6_PRELIM 0xe0001801 /* 64M, 32-bit flash */ -#define CONFIG_SYS_OR6_PRELIM 0xfc000ff7 -#define CONFIG_SYS_LBC_LCRR 0x00030002 /* local bus freq */ -#define CONFIG_SYS_LBC_LBCR 0x00000000 -#define CONFIG_SYS_LBC_LSRT 0x20000000 -#define CONFIG_SYS_LBC_MRTPR 0x20000000 -#define CONFIG_SYS_LBC_LSDMR_1 0x2861b723 -#define CONFIG_SYS_LBC_LSDMR_2 0x0861b723 -#define CONFIG_SYS_LBC_LSDMR_3 0x0861b723 -#define CONFIG_SYS_LBC_LSDMR_4 0x1861b723 -#define CONFIG_SYS_LBC_LSDMR_5 0x4061b723 - -/* just hijack the MOT BCSR def for SBC8560 misc devices */ -#define CONFIG_SYS_BCSR ((CONFIG_SYS_BR5_PRELIM & 0xff000000)|0x00400000) -/* the size of CS5 needs to be >= 16M for TLB and LAW setups */ - -#define CONFIG_SYS_INIT_RAM_LOCK 1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ - -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ -#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */ - -/* Serial Port */ -#undef CONFIG_CONS_ON_SCC /* define if console on SCC */ -#undef CONFIG_CONS_NONE /* define if console on something else */ - -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#if 0 -#define CONFIG_SYS_NS16550_CLK 1843200 /* get_bus_freq(0) */ -#else -#define CONFIG_SYS_NS16550_CLK 264000000 /* get_bus_freq(0) */ -#endif - -#define CONFIG_BAUDRATE 9600 - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} - -#if 0 -#define CONFIG_SYS_NS16550_COM1 ((CONFIG_SYS_BR5_PRELIM & 0xff000000)+0x00700000) -#define CONFIG_SYS_NS16550_COM2 ((CONFIG_SYS_BR5_PRELIM & 0xff000000)+0x00800000) -#else -/* SBC8540 uses internal COMM controller */ -#define CONFIG_SYS_NS16550_COM1 ((CONFIG_SYS_CCSRBAR & 0xfff00000)+0x00004500) -#define CONFIG_SYS_NS16550_COM2 ((CONFIG_SYS_CCSRBAR & 0xfff00000)+0x00004600) -#endif - -/* Use the HUSH parser */ -#define CONFIG_SYS_HUSH_PARSER - -/* - * I2C - */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 - -#define CONFIG_SYS_PCI_MEM_BASE 0xC0000000 -#define CONFIG_SYS_PCI_MEM_PHYS 0xC0000000 -#define CONFIG_SYS_PCI_MEM_SIZE 0x10000000 - -#if defined(CONFIG_TSEC_ENET) /* TSEC Ethernet port */ - -# define CONFIG_MPC85xx_TSEC1 -# define CONFIG_MPC85xx_TSEC1_NAME "TSEC0" -# define CONFIG_MII 1 /* MII PHY management */ -# define TSEC1_PHY_ADDR 25 -# define TSEC1_PHYIDX 0 -/* Options are: TSEC0 */ -# define CONFIG_ETHPRIME "TSEC0" - - -#elif defined(CONFIG_ETHER_ON_FCC) /* CPM FCC Ethernet */ - - #undef CONFIG_ETHER_NONE /* define if ether on something else */ - #define CONFIG_ETHER_ON_FCC2 /* cpm FCC ethernet support */ - #define CONFIG_ETHER_INDEX 2 /* which channel for ether */ - - #if (CONFIG_ETHER_INDEX == 2) - /* - * - Rx-CLK is CLK13 - * - Tx-CLK is CLK14 - * - Select bus for bd/buffers - * - Full duplex - */ - #define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) - #define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) - #define CONFIG_SYS_CPMFCR_RAMTYPE 0 - #define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE) - - #elif (CONFIG_ETHER_INDEX == 3) - /* need more definitions here for FE3 */ - #endif /* CONFIG_ETHER_INDEX */ - - #define CONFIG_MII /* MII PHY management */ - #define CONFIG_BITBANGMII /* bit-bang MII PHY management */ - /* - * GPIO pins used for bit-banged MII communications - */ - #define MDIO_PORT 2 /* Port C */ - #define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \ - (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT ) - #define MDC_DECLARE MDIO_DECLARE - - #define MDIO_ACTIVE (iop->pdir |= 0x00400000) - #define MDIO_TRISTATE (iop->pdir &= ~0x00400000) - #define MDIO_READ ((iop->pdat & 0x00400000) != 0) - - #define MDIO(bit) if(bit) iop->pdat |= 0x00400000; \ - else iop->pdat &= ~0x00400000 - - #define MDC(bit) if(bit) iop->pdat |= 0x00200000; \ - else iop->pdat &= ~0x00200000 - - #define MIIDELAY udelay(1) - -#endif - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */ -#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */ -#if 0 -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ -#define CONFIG_SYS_FLASH_PROTECTION /* use hardware protection */ -#endif -#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ - -#undef CONFIG_SYS_FLASH_CHECKSUM -#define CONFIG_SYS_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */ - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - -#if 0 -/* XXX This doesn't work and I don't want to fix it */ -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) - #define CONFIG_SYS_RAMBOOT -#else - #undef CONFIG_SYS_RAMBOOT -#endif -#endif - -/* Environment */ -#if !defined(CONFIG_SYS_RAMBOOT) - #if defined(CONFIG_RAM_AS_FLASH) - #define CONFIG_ENV_IS_NOWHERE - #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x100000) - #define CONFIG_ENV_SIZE 0x2000 - #else - #define CONFIG_ENV_IS_IN_FLASH 1 - #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ - #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) - #define CONFIG_ENV_SIZE 0x2000 /* CONFIG_ENV_SECT_SIZE */ - #endif -#else - #define CONFIG_SYS_NO_FLASH 1 /* Flash is not usable now */ - #define CONFIG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */ - #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) - #define CONFIG_ENV_SIZE 0x2000 -#endif - -#define CONFIG_BOOTARGS "root=/dev/nfs rw nfsroot=192.168.0.251:/tftpboot ip=192.168.0.105:192.168.0.251::255.255.255.0:sbc8560:eth0:off console=ttyS0,9600" -/*#define CONFIG_BOOTARGS "root=/dev/ram rw console=ttyS0,115200"*/ -#define CONFIG_BOOTCOMMAND "bootm 0xff800000 0xffa00000" -#define CONFIG_BOOTDELAY 5 /* -1 disable autoboot */ - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_PING -#define CONFIG_CMD_I2C -#define CONFIG_CMD_REGINFO - -#if defined(CONFIG_PCI) - #define CONFIG_CMD_PCI -#endif - -#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) - #define CONFIG_CMD_MII -#endif - -#if defined(CONFIG_SYS_RAMBOOT) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#endif - - -#undef CONFIG_WATCHDOG /* watchdog disabled */ - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "SBC8540=> " /* Monitor Command Prompt */ -#if defined(CONFIG_CMD_KGDB) - #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else - #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default load address */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - -#if defined(CONFIG_CMD_KGDB) - #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ - #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/*Note: change below for your network setting!!! */ -#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) -# define CONFIG_ETHADDR 00:vv:ww:xx:yy:8a -# define CONFIG_HAS_ETH1 -# define CONFIG_ETH1ADDR 00:vv:ww:xx:yy:8b -# define CONFIG_HAS_ETH2 -# define CONFIG_ETH2ADDR 00:vv:ww:xx:yy:8c -#endif - -#define CONFIG_SERVERIP YourServerIP -#define CONFIG_IPADDR YourTargetIP -#define CONFIG_GATEWAYIP YourGatewayIP -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_HOSTNAME SBC8560 -#define CONFIG_ROOTPATH "YourRootPath" -#define CONFIG_BOOTFILE "YourImageName" - -#endif /* __CONFIG_H */ diff --git a/include/configs/SPD823TS.h b/include/configs/SPD823TS.h index cffeb11447..72ea217e54 100644 --- a/include/configs/SPD823TS.h +++ b/include/configs/SPD823TS.h @@ -303,6 +303,8 @@ * IDE/ATA stuff *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ +#define CONFIG_IDE_INIT_POSTRESET 1 /* Use postreset IDE hook */ #define CONFIG_IDE_8xx_DIRECT 1 /* PCMCIA interface required */ #define CONFIG_IDE_LED 1 /* LED for ide supported */ #define CONFIG_IDE_RESET 1 /* reset for ide supported */ diff --git a/include/configs/TK885D.h b/include/configs/TK885D.h index 4176c7fe56..623cb6636b 100644 --- a/include/configs/TK885D.h +++ b/include/configs/TK885D.h @@ -343,6 +343,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/TQM823L.h b/include/configs/TQM823L.h index a01b4a6bef..9fac5d15c7 100644 --- a/include/configs/TQM823L.h +++ b/include/configs/TQM823L.h @@ -335,6 +335,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/TQM823M.h b/include/configs/TQM823M.h index 1da4acd455..932f158b2c 100644 --- a/include/configs/TQM823M.h +++ b/include/configs/TQM823M.h @@ -331,6 +331,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/TQM850L.h b/include/configs/TQM850L.h index 1c054f0bc6..eb08de2814 100644 --- a/include/configs/TQM850L.h +++ b/include/configs/TQM850L.h @@ -320,6 +320,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/TQM850M.h b/include/configs/TQM850M.h index 46066dfb4c..bf3a76ca8c 100644 --- a/include/configs/TQM850M.h +++ b/include/configs/TQM850M.h @@ -322,6 +322,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/TQM855L.h b/include/configs/TQM855L.h index dd2da9410c..43dd64356c 100644 --- a/include/configs/TQM855L.h +++ b/include/configs/TQM855L.h @@ -324,6 +324,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/TQM855M.h b/include/configs/TQM855M.h index 95bc4d964c..e7fd2db28e 100644 --- a/include/configs/TQM855M.h +++ b/include/configs/TQM855M.h @@ -359,6 +359,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/TQM860L.h b/include/configs/TQM860L.h index 487666ce55..81e1b91ee7 100644 --- a/include/configs/TQM860L.h +++ b/include/configs/TQM860L.h @@ -323,6 +323,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/TQM860M.h b/include/configs/TQM860M.h index e8b77ea71a..ed496a1825 100644 --- a/include/configs/TQM860M.h +++ b/include/configs/TQM860M.h @@ -324,6 +324,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/TQM862L.h b/include/configs/TQM862L.h index 334b7ecc17..1559336ec1 100644 --- a/include/configs/TQM862L.h +++ b/include/configs/TQM862L.h @@ -327,6 +327,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/TQM862M.h b/include/configs/TQM862M.h index 1e2ad40d91..61dcf627d7 100644 --- a/include/configs/TQM862M.h +++ b/include/configs/TQM862M.h @@ -328,6 +328,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h index a13c16aa5a..7d0ae99cb1 100644 --- a/include/configs/TQM866M.h +++ b/include/configs/TQM866M.h @@ -356,6 +356,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/TQM885D.h b/include/configs/TQM885D.h index 7df76fbf02..7941631b51 100644 --- a/include/configs/TQM885D.h +++ b/include/configs/TQM885D.h @@ -341,6 +341,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/atc.h b/include/configs/atc.h index 75f950b94c..538a167528 100644 --- a/include/configs/atc.h +++ b/include/configs/atc.h @@ -482,6 +482,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/c2mon.h b/include/configs/c2mon.h index 566c42b6be..41ff00847a 100644 --- a/include/configs/c2mon.h +++ b/include/configs/c2mon.h @@ -302,6 +302,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index 3a882e396b..4898fb60f4 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -154,16 +154,20 @@ /* I2C */ #define CONFIG_CMD_I2C #define CONFIG_SH_I2C 1 +#define CONFIG_SH_I2C_8BIT #define CONFIG_HARD_I2C #define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_MAX_I2C_BUS (2) +#define CONFIG_SYS_MAX_I2C_BUS (5) #define CONFIG_SYS_I2C_MODULE #define CONFIG_SYS_I2C_SPEED (100000) /* 100 kHz */ #define CONFIG_SYS_I2C_SLAVE (0x7F) #define CONFIG_SH_I2C_DATA_HIGH (4) #define CONFIG_SH_I2C_DATA_LOW (5) -#define CONFIG_SH_I2C_CLOCK (41666666) +#define CONFIG_SH_I2C_CLOCK (104000000) /* 104 MHz */ #define CONFIG_SH_I2C_BASE0 (0xE6820000) #define CONFIG_SH_I2C_BASE1 (0xE6822000) +#define CONFIG_SH_I2C_BASE2 (0xE6824000) +#define CONFIG_SH_I2C_BASE3 (0xE6826000) +#define CONFIG_SH_I2C_BASE4 (0xE6828000) #endif /* __KZM9G_H */ diff --git a/include/configs/lwmon.h b/include/configs/lwmon.h index ab86053039..df4978161e 100644 --- a/include/configs/lwmon.h +++ b/include/configs/lwmon.h @@ -494,6 +494,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index b8b970504f..5bc7b0d1d5 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -28,14 +28,10 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_MIPS32 1 /* MIPS32 CPU core */ -#define CONFIG_QEMU_MIPS 1 +#define CONFIG_MIPS32 /* MIPS32 CPU core */ +#define CONFIG_QEMU_MIPS #define CONFIG_MISC_INIT_R -/*IP address is default used by Qemu*/ -#define CONFIG_IPADDR 10.0.2.15 /* Our IP address */ -#define CONFIG_SERVERIP 10.0.2.2 /* Server IP address */ - #define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */ #define CONFIG_BAUDRATE 115200 @@ -74,31 +70,31 @@ #define CONFIG_CMD_DHCP #define CONFIG_DRIVER_NE2000 -#define CONFIG_DRIVER_NE2000_BASE (0xb4000300) +#define CONFIG_DRIVER_NE2000_BASE 0xb4000300 #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK 115200 -#define CONFIG_SYS_NS16550_COM1 (0xb40003f8) -#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550_COM1 0xb40003f8 +#define CONFIG_CONS_INDEX 1 #define CONFIG_CMD_IDE #define CONFIG_DOS_PARTITION #define CONFIG_SYS_IDE_MAXBUS 2 -#define CONFIG_SYS_ATA_IDE0_OFFSET (0x1f0) -#define CONFIG_SYS_ATA_IDE1_OFFSET (0x170) -#define CONFIG_SYS_ATA_DATA_OFFSET (0) -#define CONFIG_SYS_ATA_REG_OFFSET (0) -#define CONFIG_SYS_ATA_BASE_ADDR (0xb4000000) +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0 +#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170 +#define CONFIG_SYS_ATA_DATA_OFFSET 0 +#define CONFIG_SYS_ATA_REG_OFFSET 0 +#define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000 -#define CONFIG_SYS_IDE_MAXDEVICE (4) +#define CONFIG_SYS_IDE_MAXDEVICE 4 /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ /* Monitor Command Prompt */ #if defined(CONFIG_SYS_LITTLE_ENDIAN) @@ -111,9 +107,12 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 256 +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_MALLOC_LEN 128*1024 @@ -125,9 +124,11 @@ #define CONFIG_SYS_HZ 1000 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */ +/* Cached addr */ +#define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */ +/* default load address */ +#define CONFIG_SYS_LOAD_ADDR 0x81000000 #define CONFIG_SYS_MEMTEST_START 0x80100000 #define CONFIG_SYS_MEMTEST_END 0x80800000 @@ -135,8 +136,8 @@ /*----------------------------------------------------------------------- * FLASH and environment organization */ - /* The following #defines are needed to get flash environment right */ +#define CONFIG_SYS_TEXT_BASE 0xbfc00000 /* Rom version */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) @@ -146,11 +147,11 @@ #define CONFIG_SYS_FLASH_BASE 0xbfc00000 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 128 -#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) /* Address and size of Primary Environment Sector */ @@ -160,8 +161,6 @@ #define MEM_SIZE 128 -#undef CONFIG_MEMSIZE_IN_BYTES - #define CONFIG_LZMA /*----------------------------------------------------------------------- diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h new file mode 100644 index 0000000000..82647e2b1f --- /dev/null +++ b/include/configs/qemu-mips64.h @@ -0,0 +1,175 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * This file contains the configuration parameters for qemu-mips64 target. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_MIPS64 /* MIPS64 CPU core */ +#define CONFIG_QEMU_MIPS +#define CONFIG_MISC_INIT_R + +#define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */ + +#define CONFIG_BAUDRATE 115200 + +#define CONFIG_TIMESTAMP /* Print image info with timestamp */ +#undef CONFIG_BOOTARGS + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "addmisc=setenv bootargs ${bootargs} " \ + "console=ttyS0,${baudrate} " \ + "panic=1\0" \ + "bootfile=/tftpboot/vmlinux\0" \ + "load=tftp ffffffff80500000 ${u-boot}\0" \ + "" + +#define CONFIG_BOOTCOMMAND "bootp;bootelf" + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 +#undef CONFIG_CMD_LOADB +#undef CONFIG_CMD_LOADS +#define CONFIG_CMD_DHCP + +#define CONFIG_DRIVER_NE2000 +#define CONFIG_DRIVER_NE2000_BASE 0xffffffffb4000300 + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK 115200 +#define CONFIG_SYS_NS16550_COM1 0xffffffffb40003f8 +#define CONFIG_CONS_INDEX 1 + +#define CONFIG_CMD_IDE +#define CONFIG_DOS_PARTITION + +#define CONFIG_SYS_IDE_MAXBUS 2 +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0 +#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170 +#define CONFIG_SYS_ATA_DATA_OFFSET 0 +#define CONFIG_SYS_ATA_REG_OFFSET 0 +#define CONFIG_SYS_ATA_BASE_ADDR 0xffffffffb4000000 + +#define CONFIG_SYS_IDE_MAXDEVICE 4 + +#define CONFIG_CMD_RARP + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ + +/* Monitor Command Prompt */ +#if defined(CONFIG_SYS_LITTLE_ENDIAN) +#define CONFIG_SYS_PROMPT "qemu-mips64el # " +#else +#define CONFIG_SYS_PROMPT "qemu-mips64 # " +#endif + +#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_HUSH_PARSER + +/* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 256 +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 16 + +#define CONFIG_SYS_MALLOC_LEN 128*1024 + +#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 + +#define CONFIG_SYS_MHZ 132 + +#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) + +#define CONFIG_SYS_HZ 1000 + +/* Cached addr */ +#define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 + +/* default load address */ +#define CONFIG_SYS_LOAD_ADDR 0xffffffff81000000 + +#define CONFIG_SYS_MEMTEST_START 0xffffffff80100000 +#define CONFIG_SYS_MEMTEST_END 0xffffffff80800000 + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +/* The following #defines are needed to get flash environment right */ +#define CONFIG_SYS_TEXT_BASE 0xffffffffbfc00000 /* Rom version */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (192 << 10) + +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 + +/* We boot from this flash, selected with dip switch */ +#define CONFIG_SYS_FLASH_BASE 0xffffffffbfc00000 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 128 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE + +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) + +/* Address and size of Primary Environment Sector */ +#define CONFIG_ENV_SIZE 0x8000 + +#define CONFIG_ENV_OVERWRITE 1 + +#define MEM_SIZE 128 + +#define CONFIG_LZMA + +/*----------------------------------------------------------------------- + * Cache Configuration + */ +#define CONFIG_SYS_DCACHE_SIZE 16384 +#define CONFIG_SYS_ICACHE_SIZE 16384 +#define CONFIG_SYS_CACHELINE_SIZE 32 + +#endif /* __CONFIG_H */ diff --git a/include/configs/quantum.h b/include/configs/quantum.h index 4f246510fe..072bd9c7ee 100644 --- a/include/configs/quantum.h +++ b/include/configs/quantum.h @@ -317,6 +317,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h deleted file mode 100644 index 46d60985d3..0000000000 --- a/include/configs/sbc8560.h +++ /dev/null @@ -1,459 +0,0 @@ -/* - * (C) Copyright 2002,2003 Motorola,Inc. - * Xianghua Xiao <X.Xiao@motorola.com> - * - * (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>. - * Added support for Wind River SBC8560 board - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * sbc8560 board configuration file. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Top level Makefile configuration choices - */ -#ifdef CONFIG_66 -#define CONFIG_PCI_66 -#endif - -/* - * High Level Configuration Options - */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ -#define CONFIG_MPC85xx_REV1 1 /* MPC85xx Rev 1.0 chip */ - -#define CONFIG_SYS_TEXT_BASE 0xfffc0000 - - -#define CONFIG_CPM2 1 /* has CPM2 */ -#define CONFIG_SBC8560 1 /* configuration for SBC8560 board */ -#define CONFIG_MPC8560 1 - -/* XXX flagging this as something I might want to delete */ -#define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific */ - -#define CONFIG_TSEC_ENET /* tsec ethernet support */ -#undef CONFIG_PCI /* pci ethernet support */ -#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ - -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ - -#define CONFIG_ENV_OVERWRITE - -/* Using Localbus SDRAM to emulate flash before we can program the flash, - * normally you need a flash-boot image(u-boot.bin), if so undef this. - */ -#undef CONFIG_RAM_AS_FLASH - -#if defined(CONFIG_PCI_66) /* some PCI card is 33Mhz only */ - #define CONFIG_SYS_CLK_FREQ 66000000/* sysclk for MPC85xx */ -#else - #define CONFIG_SYS_CLK_FREQ 33000000/* most pci cards are 33Mhz */ -#endif - -/* below can be toggled for performance analysis. otherwise use default */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ -#undef CONFIG_BTB /* toggle branch predition */ - -#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ -#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */ - -#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - -#if (defined(CONFIG_PCI) && defined(CONFIG_TSEC_ENET) || \ - defined(CONFIG_PCI) && defined(CONFIG_ETHER_ON_FCC) || \ - defined(CONFIG_TSEC_ENET) && defined(CONFIG_ETHER_ON_FCC)) -#error "You can only use ONE of PCI Ethernet Card or TSEC Ethernet or CPM FCC." -#endif - -#define CONFIG_SYS_SDRAM_SIZE 512 /* DDR is 512MB */ - -/* DDR Setup */ -#define CONFIG_FSL_DDR1 -#undef CONFIG_FSL_DDR_INTERACTIVE -#undef CONFIG_DDR_ECC /* only for ECC DDR module */ -#undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ -#undef CONFIG_DDR_SPD - -#if defined(CONFIG_MPC85xx_REV1) -#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN /* possible DLL fix needed */ -#endif - -#undef CONFIG_DDR_ECC /* only for ECC DDR module */ -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_VERY_BIG_RAM - -#define CONFIG_NUM_DDR_CONTROLLERS 1 -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 2 - -/* I2C addresses of SPD EEPROMs */ -#define SPD_EEPROM_ADDRESS 0x55 /* CTLR 0 DIMM 0 */ - -#undef CONFIG_CLOCKS_IN_MHZ - -#if defined(CONFIG_RAM_AS_FLASH) - #define CONFIG_SYS_LBC_SDRAM_BASE 0xfc000000 /* Localbus SDRAM */ - #define CONFIG_SYS_FLASH_BASE 0xf8000000 /* start of FLASH 8M */ - #define CONFIG_SYS_BR0_PRELIM 0xf8000801 /* port size 8bit */ - #define CONFIG_SYS_OR0_PRELIM 0xf8000ff7 /* 8MB Flash */ -#else /* Boot from real Flash */ - #define CONFIG_SYS_LBC_SDRAM_BASE 0xf8000000 /* Localbus SDRAM */ - #define CONFIG_SYS_FLASH_BASE 0xff800000 /* start of FLASH 8M */ - #define CONFIG_SYS_BR0_PRELIM 0xff800801 /* port size 8bit */ - #define CONFIG_SYS_OR0_PRELIM 0xff800ff7 /* 8MB Flash */ -#endif -#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */ - -/* local bus definitions */ -#define CONFIG_SYS_BR1_PRELIM 0xe4001801 /* 64M, 32-bit flash */ -#define CONFIG_SYS_OR1_PRELIM 0xfc000ff7 - -#define CONFIG_SYS_BR2_PRELIM 0x00000000 /* CS2 not used */ -#define CONFIG_SYS_OR2_PRELIM 0x00000000 - -#define CONFIG_SYS_BR3_PRELIM 0xf0001861 /* 64MB localbus SDRAM */ -#define CONFIG_SYS_OR3_PRELIM 0xfc000cc1 - -#if defined(CONFIG_RAM_AS_FLASH) - #define CONFIG_SYS_BR4_PRELIM 0xf4001861 /* 64M localbus SDRAM */ -#else - #define CONFIG_SYS_BR4_PRELIM 0xf8001861 /* 64M localbus SDRAM */ -#endif -#define CONFIG_SYS_OR4_PRELIM 0xfc000cc1 - -#define CONFIG_SYS_BR5_PRELIM 0xfc000801 /* 16M CS5 misc devices */ -#if 1 - #define CONFIG_SYS_OR5_PRELIM 0xff000ff7 -#else - #define CONFIG_SYS_OR5_PRELIM 0xff0000f0 -#endif - -#define CONFIG_SYS_BR6_PRELIM 0xe0001801 /* 64M, 32-bit flash */ -#define CONFIG_SYS_OR6_PRELIM 0xfc000ff7 -#define CONFIG_SYS_LBC_LCRR 0x00030002 /* local bus freq */ -#define CONFIG_SYS_LBC_LBCR 0x00000000 -#define CONFIG_SYS_LBC_LSRT 0x20000000 -#define CONFIG_SYS_LBC_MRTPR 0x20000000 -#define CONFIG_SYS_LBC_LSDMR_1 0x2861b723 -#define CONFIG_SYS_LBC_LSDMR_2 0x0861b723 -#define CONFIG_SYS_LBC_LSDMR_3 0x0861b723 -#define CONFIG_SYS_LBC_LSDMR_4 0x1861b723 -#define CONFIG_SYS_LBC_LSDMR_5 0x4061b723 - -/* just hijack the MOT BCSR def for SBC8560 misc devices */ -#define CONFIG_SYS_BCSR ((CONFIG_SYS_BR5_PRELIM & 0xff000000)|0x00400000) -/* the size of CS5 needs to be >= 16M for TLB and LAW setups */ - -#define CONFIG_SYS_INIT_RAM_LOCK 1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ - -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ -#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */ - -/* Serial Port */ -#undef CONFIG_CONS_ON_SCC /* define if console on SCC */ -#undef CONFIG_CONS_NONE /* define if console on something else */ - -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK 1843200 /* get_bus_freq(0) */ -#define CONFIG_BAUDRATE 9600 - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} - -#define CONFIG_SYS_NS16550_COM1 ((CONFIG_SYS_BR5_PRELIM & 0xff000000)+0x00700000) -#define CONFIG_SYS_NS16550_COM2 ((CONFIG_SYS_BR5_PRELIM & 0xff000000)+0x00800000) - -/* Use the HUSH parser */ -#define CONFIG_SYS_HUSH_PARSER - -/* pass open firmware flat tree */ -#define CONFIG_OF_LIBFDT 1 -#define CONFIG_OF_BOARD_SETUP 1 -#define CONFIG_OF_STDOUT_VIA_ALIAS 1 - -/* - * I2C - */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 - -#define CONFIG_SYS_PCI_MEM_BASE 0xC0000000 -#define CONFIG_SYS_PCI_MEM_PHYS 0xC0000000 -#define CONFIG_SYS_PCI_MEM_SIZE 0x10000000 - -#ifdef CONFIG_TSEC_ENET - -#ifndef CONFIG_MII -#define CONFIG_MII 1 /* MII PHY management */ -#endif -#define CONFIG_TSEC1 1 -#define CONFIG_TSEC1_NAME "TSEC0" -#define CONFIG_TSEC2 1 -#define CONFIG_TSEC2_NAME "TSEC1" -#define TSEC1_PHY_ADDR 0x19 -#define TSEC2_PHY_ADDR 0x1a -#define TSEC1_PHYIDX 0 -#define TSEC2_PHYIDX 0 -#define TSEC1_FLAGS TSEC_GIGABIT -#define TSEC2_FLAGS TSEC_GIGABIT - -/* Options are: TSEC[0-1] */ -#define CONFIG_ETHPRIME "TSEC0" - -#elif defined(CONFIG_ETHER_ON_FCC) /* CPM FCC Ethernet */ - - #undef CONFIG_ETHER_NONE /* define if ether on something else */ - #define CONFIG_ETHER_ON_FCC2 /* cpm FCC ethernet support */ - #define CONFIG_ETHER_INDEX 2 /* which channel for ether */ - - #if (CONFIG_ETHER_INDEX == 2) - /* - * - Rx-CLK is CLK13 - * - Tx-CLK is CLK14 - * - Select bus for bd/buffers - * - Full duplex - */ - #define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) - #define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) - #define CONFIG_SYS_CPMFCR_RAMTYPE 0 - #define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE) - - #elif (CONFIG_ETHER_INDEX == 3) - /* need more definitions here for FE3 */ - #endif /* CONFIG_ETHER_INDEX */ - - #define CONFIG_MII /* MII PHY management */ - #define CONFIG_BITBANGMII /* bit-bang MII PHY management */ - /* - * GPIO pins used for bit-banged MII communications - */ - #define MDIO_PORT 2 /* Port C */ - #define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \ - (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT ) - #define MDC_DECLARE MDIO_DECLARE - - #define MDIO_ACTIVE (iop->pdir |= 0x00400000) - #define MDIO_TRISTATE (iop->pdir &= ~0x00400000) - #define MDIO_READ ((iop->pdat & 0x00400000) != 0) - - #define MDIO(bit) if(bit) iop->pdat |= 0x00400000; \ - else iop->pdat &= ~0x00400000 - - #define MDC(bit) if(bit) iop->pdat |= 0x00200000; \ - else iop->pdat &= ~0x00200000 - - #define MIIDELAY udelay(1) - -#endif - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */ -#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */ -#if 0 -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ -#define CONFIG_SYS_FLASH_PROTECTION /* use hardware protection */ -#endif -#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ - -#undef CONFIG_SYS_FLASH_CHECKSUM -#define CONFIG_SYS_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */ - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - -#if 0 -/* XXX This doesn't work and I don't want to fix it */ -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) - #define CONFIG_SYS_RAMBOOT -#else - #undef CONFIG_SYS_RAMBOOT -#endif -#endif - -/* Environment */ -#if !defined(CONFIG_SYS_RAMBOOT) - #if defined(CONFIG_RAM_AS_FLASH) - #define CONFIG_ENV_IS_NOWHERE - #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x100000) - #define CONFIG_ENV_SIZE 0x2000 - #else - #define CONFIG_ENV_IS_IN_FLASH 1 - #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ - #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) - #define CONFIG_ENV_SIZE 0x2000 /* CONFIG_ENV_SECT_SIZE */ - #endif -#else - #define CONFIG_SYS_NO_FLASH 1 /* Flash is not usable now */ - #define CONFIG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */ - #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) - #define CONFIG_ENV_SIZE 0x2000 -#endif - -#define CONFIG_BOOTARGS "root=/dev/nfs rw ip=dhcp console=ttyS0,9600" -/*#define CONFIG_BOOTARGS "root=/dev/ram rw console=ttyS0,115200"*/ -#define CONFIG_BOOTDELAY 5 /* -1 disable autoboot */ - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_PING -#define CONFIG_CMD_I2C -#define CONFIG_CMD_REGINFO - -#if defined(CONFIG_PCI) - #define CONFIG_CMD_PCI -#endif - -#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) - #define CONFIG_CMD_MII -#endif - -#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_RAM_AS_FLASH) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#endif - - -#undef CONFIG_WATCHDOG /* watchdog disabled */ - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "SBC8560=> " /* Monitor Command Prompt */ -#if defined(CONFIG_CMD_KGDB) - #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else - #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default load address */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 -#endif - -/* You can compile in a MAC address and your custom net settings by using - * the following syntax. Your board should be marked with the assigned - * MAC addresses directly on it. - * - * #define CONFIG_ETHADDR de:ad:be:ef:00:00 - * #define CONFIG_ETH1ADDR fa:ke:ad:dr:es:s! - * #define CONFIG_SERVERIP <server ip> - * #define CONFIG_IPADDR <board ip> - * #define CONFIG_GATEWAYIP <gateway ip> - * #define CONFIG_NETMASK <your netmask> - */ - -#define CONFIG_HOSTNAME SBC8560 -#define CONFIG_ROOTPATH "/home/ppc" -#define CONFIG_BOOTFILE "uImage" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "consoledev=ttyS0\0" \ - "ramdiskaddr=2000000\0" \ - "ramdiskfile=ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ - "fdtfile=sbc8560.dtb\0" - -#define CONFIG_NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - - -#define CONFIG_RAMBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND - -#endif /* __CONFIG_H */ diff --git a/include/configs/svm_sc8xx.h b/include/configs/svm_sc8xx.h index 91686d66a7..2b24997f80 100644 --- a/include/configs/svm_sc8xx.h +++ b/include/configs/svm_sc8xx.h @@ -359,6 +359,8 @@ #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ +#define CONFIG_IDE_INIT_POSTRESET 1 /* Use postreset IDE hook */ #define CONFIG_IDE_8xx_DIRECT 1 /* Direct IDE not supported */ #undef CONFIG_IDE_LED /* LED for ide not supported */ #undef CONFIG_IDE_RESET /* reset for ide not supported */ diff --git a/include/configs/uc100.h b/include/configs/uc100.h index 8c8fb5ae69..450c98bd3a 100644 --- a/include/configs/uc100.h +++ b/include/configs/uc100.h @@ -331,6 +331,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/configs/virtlab2.h b/include/configs/virtlab2.h index 4bb96cc1ab..c2c0d1d243 100644 --- a/include/configs/virtlab2.h +++ b/include/configs/virtlab2.h @@ -329,6 +329,7 @@ *----------------------------------------------------------------------- */ +#define CONFIG_IDE_PREINIT 1 /* Use preinit IDE hook */ #define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ diff --git a/include/env_default.h b/include/env_default.h new file mode 100644 index 0000000000..375e5ca15c --- /dev/null +++ b/include/env_default.h @@ -0,0 +1,135 @@ +/* + * (C) Copyright 2000-2010 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Andreas Heppel <aheppel@sysgo.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifdef DEFAULT_ENV_INSTANCE_EMBEDDED +env_t environment __PPCENV__ = { + ENV_CRC, /* CRC Sum */ +#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT + 1, /* Flags: valid */ +#endif + { +#elif defined(DEFAULT_ENV_INSTANCE_STATIC) +static char default_environment[] = { +#else +const uchar default_environment[] = { +#endif +#ifdef CONFIG_BOOTARGS + "bootargs=" CONFIG_BOOTARGS "\0" +#endif +#ifdef CONFIG_BOOTCOMMAND + "bootcmd=" CONFIG_BOOTCOMMAND "\0" +#endif +#ifdef CONFIG_RAMBOOTCOMMAND + "ramboot=" CONFIG_RAMBOOTCOMMAND "\0" +#endif +#ifdef CONFIG_NFSBOOTCOMMAND + "nfsboot=" CONFIG_NFSBOOTCOMMAND "\0" +#endif +#if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0) + "bootdelay=" __stringify(CONFIG_BOOTDELAY) "\0" +#endif +#if defined(CONFIG_BAUDRATE) && (CONFIG_BAUDRATE >= 0) + "baudrate=" __stringify(CONFIG_BAUDRATE) "\0" +#endif +#ifdef CONFIG_LOADS_ECHO + "loads_echo=" __stringify(CONFIG_LOADS_ECHO) "\0" +#endif +#ifdef CONFIG_ETHADDR + "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" +#endif +#ifdef CONFIG_ETH1ADDR + "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0" +#endif +#ifdef CONFIG_ETH2ADDR + "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0" +#endif +#ifdef CONFIG_ETH3ADDR + "eth3addr=" __stringify(CONFIG_ETH3ADDR) "\0" +#endif +#ifdef CONFIG_ETH4ADDR + "eth4addr=" __stringify(CONFIG_ETH4ADDR) "\0" +#endif +#ifdef CONFIG_ETH5ADDR + "eth5addr=" __stringify(CONFIG_ETH5ADDR) "\0" +#endif +#ifdef CONFIG_ETHPRIME + "ethprime=" CONFIG_ETHPRIME "\0" +#endif +#ifdef CONFIG_IPADDR + "ipaddr=" __stringify(CONFIG_IPADDR) "\0" +#endif +#ifdef CONFIG_SERVERIP + "serverip=" __stringify(CONFIG_SERVERIP) "\0" +#endif +#ifdef CONFIG_SYS_AUTOLOAD + "autoload=" CONFIG_SYS_AUTOLOAD "\0" +#endif +#ifdef CONFIG_PREBOOT + "preboot=" CONFIG_PREBOOT "\0" +#endif +#ifdef CONFIG_ROOTPATH + "rootpath=" CONFIG_ROOTPATH "\0" +#endif +#ifdef CONFIG_GATEWAYIP + "gatewayip=" __stringify(CONFIG_GATEWAYIP) "\0" +#endif +#ifdef CONFIG_NETMASK + "netmask=" __stringify(CONFIG_NETMASK) "\0" +#endif +#ifdef CONFIG_HOSTNAME + "hostname=" __stringify(CONFIG_HOSTNAME) "\0" +#endif +#ifdef CONFIG_BOOTFILE + "bootfile=" CONFIG_BOOTFILE "\0" +#endif +#ifdef CONFIG_LOADADDR + "loadaddr=" __stringify(CONFIG_LOADADDR) "\0" +#endif +#ifdef CONFIG_CLOCKS_IN_MHZ + "clocks_in_mhz=1\0" +#endif +#if defined(CONFIG_PCI_BOOTDELAY) && (CONFIG_PCI_BOOTDELAY > 0) + "pcidelay=" __stringify(CONFIG_PCI_BOOTDELAY)"\0" +#endif +#ifdef CONFIG_ENV_VARS_UBOOT_CONFIG + "arch=" CONFIG_SYS_ARCH "\0" + "cpu=" CONFIG_SYS_CPU "\0" + "board=" CONFIG_SYS_BOARD "\0" +#ifdef CONFIG_SYS_VENDOR + "vendor=" CONFIG_SYS_VENDOR "\0" +#endif +#ifdef CONFIG_SYS_SOC + "soc=" CONFIG_SYS_SOC "\0" +#endif +#endif +#ifdef CONFIG_EXTRA_ENV_SETTINGS + CONFIG_EXTRA_ENV_SETTINGS +#endif + "\0" +#ifdef DEFAULT_ENV_INSTANCE_EMBEDDED + } +#endif +}; diff --git a/include/i8042.h b/include/i8042.h index 13952899ba..c48c057374 100644 --- a/include/i8042.h +++ b/include/i8042.h @@ -39,6 +39,12 @@ #define I8042_STATUS_REG (CONFIG_SYS_ISA_IO + 0x0064) /* keyboard status read */ #define I8042_COMMAND_REG (CONFIG_SYS_ISA_IO + 0x0064) /* keyboard ctrl write */ +enum { + /* Output register (I8042_DATA_REG) has data for system */ + I8042_STATUS_OUT_DATA = 1 << 0, + I8042_STATUS_IN_DATA = 1 << 1, +}; + #define KBD_US 0 /* default US layout */ #define KBD_GER 1 /* german layout */ @@ -69,6 +75,19 @@ /* exports */ +/** + * Flush all buffer from keyboard controller to host. + */ +void i8042_flush(void); + +/** + * Disables the keyboard so that key strokes no longer generate scancodes to + * the host. + * + * @return 0 if ok, -1 if keyboard input was found while disabling + */ +int i8042_disable(void); + int i8042_kbd_init(void); int i8042_tstc(void); int i8042_getc(void); diff --git a/include/ide.h b/include/ide.h index 95dcbdd362..695d08eecc 100644 --- a/include/ide.h +++ b/include/ide.h @@ -27,6 +27,7 @@ #define IDE_BUS(dev) (dev / (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS)) #define ATA_CURR_BASE(dev) (CONFIG_SYS_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)]) +extern ulong ide_bus_offset[]; #ifdef CONFIG_IDE_LED @@ -54,6 +55,14 @@ void ide_init(void); ulong ide_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer); ulong ide_write(int device, ulong blknr, lbaint_t blkcnt, const void *buffer); +#ifdef CONFIG_IDE_PREINIT +int ide_preinit(void); +#endif + +#ifdef CONFIG_IDE_INIT_POSTRESET +int ide_init_postreset(void); +#endif + #if defined(CONFIG_OF_IDE_FIXUP) int ide_device_present(int dev); #endif @@ -64,4 +73,14 @@ void ide_write_register(int dev, unsigned int port, unsigned char val); void ide_read_data(int dev, ulong *sect_buf, int words); void ide_write_data(int dev, ulong *sect_buf, int words); #endif + +/* + * I/O function overrides + */ +void ide_input_swap_data(int dev, ulong *sect_buf, int words); +void ide_input_data(int dev, ulong *sect_buf, int words); +void ide_output_data(int dev, const ulong *sect_buf, int words); +void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts); +void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts); + #endif /* _IDE_H */ diff --git a/include/input.h b/include/input.h index 0f4acb27f8..e90bb0ba9c 100644 --- a/include/input.h +++ b/include/input.h @@ -84,6 +84,8 @@ struct stdio_dev; * @param config Input state * @param keycode List of key codes to examine * @param num_keycodes Number of key codes + * @return number of ascii characters sent, or 0 if none, or -1 for an + * internal error */ int input_send_keycodes(struct input_config *config, int keycode[], int count); diff --git a/include/serial.h b/include/serial.h index a8d23f519d..14f863ed20 100644 --- a/include/serial.h +++ b/include/serial.h @@ -20,6 +20,8 @@ struct serial_device { struct serial_device *next; }; +void default_serial_puts(const char *s); + extern struct serial_device serial_smc_device; extern struct serial_device serial_scc_device; extern struct serial_device *default_serial_console(void); diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c index ab8c15d30e..9b023e807b 100644 --- a/tools/env/fw_env.c +++ b/tools/env/fw_env.c @@ -119,102 +119,8 @@ static unsigned char active_flag = 1; /* obsolete_flag must be 0 to efficiently set it on NOR flash without erasing */ static unsigned char obsolete_flag = 0; - -static char default_environment[] = { -#if defined(CONFIG_BOOTARGS) - "bootargs=" CONFIG_BOOTARGS "\0" -#endif -#if defined(CONFIG_BOOTCOMMAND) - "bootcmd=" CONFIG_BOOTCOMMAND "\0" -#endif -#if defined(CONFIG_RAMBOOTCOMMAND) - "ramboot=" CONFIG_RAMBOOTCOMMAND "\0" -#endif -#if defined(CONFIG_NFSBOOTCOMMAND) - "nfsboot=" CONFIG_NFSBOOTCOMMAND "\0" -#endif -#if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0) - "bootdelay=" __stringify(CONFIG_BOOTDELAY) "\0" -#endif -#if defined(CONFIG_BAUDRATE) && (CONFIG_BAUDRATE >= 0) - "baudrate=" __stringify(CONFIG_BAUDRATE) "\0" -#endif -#ifdef CONFIG_LOADS_ECHO - "loads_echo=" __stringify(CONFIG_LOADS_ECHO) "\0" -#endif -#ifdef CONFIG_ETHADDR - "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" -#endif -#ifdef CONFIG_ETH1ADDR - "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0" -#endif -#ifdef CONFIG_ETH2ADDR - "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0" -#endif -#ifdef CONFIG_ETH3ADDR - "eth3addr=" __stringify(CONFIG_ETH3ADDR) "\0" -#endif -#ifdef CONFIG_ETH4ADDR - "eth4addr=" __stringify(CONFIG_ETH4ADDR) "\0" -#endif -#ifdef CONFIG_ETH5ADDR - "eth5addr=" __stringify(CONFIG_ETH5ADDR) "\0" -#endif -#ifdef CONFIG_ETHPRIME - "ethprime=" CONFIG_ETHPRIME "\0" -#endif -#ifdef CONFIG_IPADDR - "ipaddr=" __stringify(CONFIG_IPADDR) "\0" -#endif -#ifdef CONFIG_SERVERIP - "serverip=" __stringify(CONFIG_SERVERIP) "\0" -#endif -#ifdef CONFIG_SYS_AUTOLOAD - "autoload=" CONFIG_SYS_AUTOLOAD "\0" -#endif -#ifdef CONFIG_ROOTPATH - "rootpath=" CONFIG_ROOTPATH "\0" -#endif -#ifdef CONFIG_GATEWAYIP - "gatewayip=" __stringify(CONFIG_GATEWAYIP) "\0" -#endif -#ifdef CONFIG_NETMASK - "netmask=" __stringify(CONFIG_NETMASK) "\0" -#endif -#ifdef CONFIG_HOSTNAME - "hostname=" __stringify(CONFIG_HOSTNAME) "\0" -#endif -#ifdef CONFIG_BOOTFILE - "bootfile=" CONFIG_BOOTFILE "\0" -#endif -#ifdef CONFIG_LOADADDR - "loadaddr=" __stringify(CONFIG_LOADADDR) "\0" -#endif -#ifdef CONFIG_PREBOOT - "preboot=" CONFIG_PREBOOT "\0" -#endif -#ifdef CONFIG_CLOCKS_IN_MHZ - "clocks_in_mhz=" "1" "\0" -#endif -#if defined(CONFIG_PCI_BOOTDELAY) && (CONFIG_PCI_BOOTDELAY > 0) - "pcidelay=" __stringify(CONFIG_PCI_BOOTDELAY) "\0" -#endif -#ifdef CONFIG_ENV_VARS_UBOOT_CONFIG - "arch=" CONFIG_SYS_ARCH "\0" - "cpu=" CONFIG_SYS_CPU "\0" - "board=" CONFIG_SYS_BOARD "\0" -#ifdef CONFIG_SYS_VENDOR - "vendor=" CONFIG_SYS_VENDOR "\0" -#endif -#ifdef CONFIG_SYS_SOC - "soc=" CONFIG_SYS_SOC "\0" -#endif -#endif -#ifdef CONFIG_EXTRA_ENV_SETTINGS - CONFIG_EXTRA_ENV_SETTINGS -#endif - "\0" /* Termimate struct environment data with 2 NULs */ -}; +#define DEFAULT_ENV_INSTANCE_STATIC +#include <env_default.h> static int flash_io (int mode); static char *envmatch (char * s1, char * s2); @@ -494,6 +400,8 @@ int fw_setenv(int argc, char *argv[]) char *val = argv[i]; size_t val_len = strlen(val); + if (value) + value[len - 1] = ' '; value = realloc(value, len + val_len + 1); if (!value) { fprintf(stderr, @@ -504,9 +412,8 @@ int fw_setenv(int argc, char *argv[]) memcpy(value + len, val, val_len); len += val_len; - value[len++] = ' '; + value[len++] = '\0'; } - value[len - 1] = '\0'; fw_env_write(name, value); @@ -738,8 +645,8 @@ static int flash_read_buf (int dev, int fd, void *buf, size_t count, return -1; } #ifdef DEBUG - fprintf (stderr, "Read 0x%x bytes at 0x%llx\n", - rc, blockstart + block_seek); + fprintf(stderr, "Read 0x%x bytes at 0x%llx on %s\n", + rc, blockstart + block_seek, DEVNAME(dev)); #endif processed += readlen; readlen = min (blocklen, count - processed); @@ -818,6 +725,18 @@ static int flash_write_buf (int dev, int fd, void *buf, size_t count, if (write_total != rc) return -1; +#ifdef DEBUG + fprintf(stderr, "Preserving data "); + if (block_seek != 0) + fprintf(stderr, "0x%x - 0x%lx", 0, block_seek - 1); + if (block_seek + count != write_total) { + if (block_seek != 0) + fprintf(stderr, " and "); + fprintf(stderr, "0x%lx - 0x%x", + block_seek + count, write_total - 1); + } + fprintf(stderr, "\n"); +#endif /* Overwrite the old environment */ memcpy (data + block_seek, buf, count); } else { @@ -876,7 +795,8 @@ static int flash_write_buf (int dev, int fd, void *buf, size_t count, } #ifdef DEBUG - printf ("Write 0x%x bytes at 0x%llx\n", erasesize, blockstart); + fprintf(stderr, "Write 0x%x bytes at 0x%llx\n", erasesize, + blockstart); #endif if (write (fd, data + processed, erasesize) != erasesize) { fprintf (stderr, "Write error on %s: %s\n", @@ -943,7 +863,7 @@ static int flash_write (int fd_current, int fd_target, int dev_target) } #ifdef DEBUG - printf ("Writing new environment at 0x%lx on %s\n", + fprintf(stderr, "Writing new environment at 0x%lx on %s\n", DEVOFFSET (dev_target), DEVNAME (dev_target)); #endif rc = flash_write_buf(dev_target, fd_target, environment.image, @@ -957,7 +877,8 @@ static int flash_write (int fd_current, int fd_target, int dev_target) off_t offset = DEVOFFSET (dev_current) + offsetof (struct env_image_redundant, flags); #ifdef DEBUG - printf ("Setting obsolete flag in environment at 0x%lx on %s\n", + fprintf(stderr, + "Setting obsolete flag in environment at 0x%lx on %s\n", DEVOFFSET (dev_current), DEVNAME (dev_current)); #endif flash_flag_obsolete (dev_current, fd_current, offset); @@ -1224,6 +1145,9 @@ int fw_env_open(void) /* Other pointers are already set */ free (addr1); } +#ifdef DEBUG + fprintf(stderr, "Selected env in %s\n", DEVNAME(dev_current)); +#endif } return 0; } diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py index 59eca99341..72d37a0b04 100644 --- a/tools/patman/gitutil.py +++ b/tools/patman/gitutil.py @@ -38,7 +38,7 @@ def CountCommitsToBranch(): Return: Number of patches that exist on top of the branch """ - pipe = [['git', 'log', '--oneline', '@{upstream}..'], + pipe = [['git', 'log', '--no-color', '--oneline', '@{upstream}..'], ['wc', '-l']] stdout = command.RunPipe(pipe, capture=True, oneline=True) patch_count = int(stdout) diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py index 0503bac42e..ad280cc46c 100644 --- a/tools/patman/patchstream.py +++ b/tools/patman/patchstream.py @@ -344,7 +344,8 @@ def GetMetaData(start, count): start: Commit to start from: 0=HEAD, 1=next one, etc. count: Number of commits to list """ - pipe = [['git', 'log', '--reverse', 'HEAD~%d' % start, '-n%d' % count]] + pipe = [['git', 'log', '--no-color', '--reverse', 'HEAD~%d' % start, + '-n%d' % count]] stdout = command.RunPipe(pipe, capture=True) series = Series() ps = PatchStream(series, is_log=True) |
