diff options
| -rw-r--r-- | board/mpl/mip405/Makefile | 6 | ||||
| -rw-r--r-- | board/mpl/mip405/mip405.c | 22 | ||||
| -rw-r--r-- | include/configs/MIP405.h | 15 |
3 files changed, 36 insertions, 7 deletions
diff --git a/board/mpl/mip405/Makefile b/board/mpl/mip405/Makefile index 5dd0b2f8e5..9921545bfa 100644 --- a/board/mpl/mip405/Makefile +++ b/board/mpl/mip405/Makefile @@ -28,8 +28,10 @@ endif LIB = $(obj)lib$(BOARD).o -COBJS = $(BOARD).o ../common/flash.o cmd_mip405.o ../common/pci.o \ - ../common/usb_uhci.o ../common/common_util.o +COBJS = $(BOARD).o cmd_mip405.o \ + ../common/pci.o \ + ../common/usb_uhci.o \ + ../common/common_util.o SOBJS = init.o diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c index 9d0db64462..56a84e9afa 100644 --- a/board/mpl/mip405/mip405.c +++ b/board/mpl/mip405/mip405.c @@ -498,6 +498,27 @@ int board_early_init_f (void) return 0; } +int board_early_init_r(void) +{ + int mode; + + /* + * since we are relocated, we can finally enable i-cache + * and set up the flash CS correctly + */ + icache_enable(); + setup_cs_reloc(); + /* get and display boot mode */ + mode = get_boot_mode(); + if (mode & BOOT_PCI) + printf("PCI Boot %s Map\n", (mode & BOOT_MPS) ? + "MPS" : "Flash"); + else + printf("%s Boot\n", (mode & BOOT_MPS) ? + "MPS" : "Flash"); + + return 0; +} /* * Get some PLD Registers @@ -671,7 +692,6 @@ static int test_dram (unsigned long ramsize) /* used to check if the time in RTC is valid */ static unsigned long start; static struct rtc_time tm; -extern flash_info_t flash_info[]; /* info for FLASH chips */ int misc_init_r (void) { diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index 247cd2ff6e..9961fb55ca 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -239,11 +239,17 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ +#define CONFIG_SYS_UPDATE_FLASH_SIZE +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER + +#define CONFIG_FLASH_SHOW_PROGRESS 45 + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 256 /* * JFFS2 partitions @@ -291,6 +297,7 @@ #define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */ #define CONFIG_BOARD_EARLY_INIT_F 1 +#define CONFIG_BOARD_EARLY_INIT_R /* Peripheral Bus Mapping */ #define PER_PLD_ADDR 0xF4000000 /* smallest window is 1MByte 0x10 0000*/ |
