diff options
94 files changed, 4 insertions, 12143 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 5cbc845639..7a13d28df9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -842,22 +842,6 @@ Stefan Roese <sr@denx.de> vct_xxx MIPS32 4Kc ######################################################################### -# Nios-32 Systems: # -# # -# Maintainer Name, Email Address # -# Board CPU # -######################################################################### - -Stephan Linz <linz@li-pro.net> - - DK1S10 Nios-32 - ADNPESC1 Nios-32 - -Scott McNutt <smcnutt@psyent.com> - - DK1C20 Nios-32 - -######################################################################### # Nios-II Systems: # # # # Maintainer Name, Email Address # @@ -811,21 +811,6 @@ LIST_x86=" \ " ######################################################################### -## NIOS Systems -######################################################################### - -LIST_nios=" \ - ADNPESC1 \ - ADNPESC1_base_32 \ - ADNPESC1_DNPEVA2_base_32\ - DK1C20 \ - DK1C20_standard_32 \ - DK1S10 \ - DK1S10_standard_32 \ - DK1S10_mtx_ldk_20 \ -" - -######################################################################### ## Nios-II Systems ######################################################################### @@ -1017,7 +1002,7 @@ do |coldfire \ |microblaze \ |mips|mips_el \ - |nios|nios2 \ + |nios2 \ |ppc|powerpc|5xx|5xxx|512x|8xx|8220|824x|8260|83xx|85xx|86xx|4xx|7xx|74xx|TSEC \ |sh|sh2|sh3|sh4 \ |sparc \ @@ -3462,68 +3462,6 @@ purple_config : unconfig #======================================================================== # Nios #======================================================================== -######################################################################### -## Nios32 -######################################################################### - -ADNPESC1_DNPEVA2_base_32_config \ -ADNPESC1_base_32_config \ -ADNPESC1_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring _DNPEVA2,$@)" ] || \ - { echo "#define CONFIG_DNPEVA2 1" >>$(obj)include/config.h ; \ - $(XECHO) "... DNP/EVA2 configuration" ; \ - } - @[ -z "$(findstring _base_32,$@)" ] || \ - { echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \ - $(XECHO) "... NIOS 'base_32' configuration" ; \ - } - @[ -z "$(findstring ADNPESC1_config,$@)" ] || \ - { echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \ - $(XECHO) "... NIOS 'base_32' configuration (DEFAULT)" ; \ - } - @$(MKCONFIG) -a ADNPESC1 nios nios adnpesc1 ssv - -DK1C20_safe_32_config \ -DK1C20_standard_32_config \ -DK1C20_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring _safe_32,$@)" ] || \ - { echo "#define CONFIG_NIOS_SAFE_32 1" >>$(obj)include/config.h ; \ - $(XECHO) "... NIOS 'safe_32' configuration" ; \ - } - @[ -z "$(findstring _standard_32,$@)" ] || \ - { echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \ - $(XECHO) "... NIOS 'standard_32' configuration" ; \ - } - @[ -z "$(findstring DK1C20_config,$@)" ] || \ - { echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \ - $(XECHO) "... NIOS 'standard_32' configuration (DEFAULT)" ; \ - } - @$(MKCONFIG) -a DK1C20 nios nios dk1c20 altera - -DK1S10_safe_32_config \ -DK1S10_standard_32_config \ -DK1S10_mtx_ldk_20_config \ -DK1S10_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring _safe_32,$@)" ] || \ - { echo "#define CONFIG_NIOS_SAFE_32 1" >>$(obj)include/config.h ; \ - $(XECHO) "... NIOS 'safe_32' configuration" ; \ - } - @[ -z "$(findstring _standard_32,$@)" ] || \ - { echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \ - $(XECHO) "... NIOS 'standard_32' configuration" ; \ - } - @[ -z "$(findstring _mtx_ldk_20,$@)" ] || \ - { echo "#define CONFIG_NIOS_MTX_LDK_20 1" >>$(obj)include/config.h ; \ - $(XECHO) "... NIOS 'mtx_ldk_20' configuration" ; \ - } - @[ -z "$(findstring DK1S10_config,$@)" ] || \ - { echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \ - $(XECHO) "... NIOS 'standard_32' configuration (DEFAULT)" ; \ - } - @$(MKCONFIG) -a DK1S10 nios nios dk1s10 altera ######################################################################### ## Nios-II @@ -177,9 +177,6 @@ Directory Hierarchy: /mips Files generic to MIPS architecture /cpu CPU specific files /lib Architecture specific library files - /nios Files generic to Altera NIOS architecture - /cpu CPU specific files - /lib Architecture specific library files /nios2 Files generic to Altera NIOS2 architecture /cpu CPU specific files /lib Architecture specific library files @@ -3337,8 +3334,8 @@ details; basically, the header defines the following image properties: Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS, INTEGRITY). * Target CPU Architecture (Provisions for Alpha, ARM, AVR32, Intel x86, - IA64, MIPS, NIOS, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit; - Currently supported: ARM, AVR32, Intel x86, MIPS, NIOS, PowerPC). + IA64, MIPS, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit; + Currently supported: ARM, AVR32, Intel x86, MIPS, Nios II, PowerPC). * Compression Type (uncompressed, gzip, bzip2) * Load Address * Entry Point diff --git a/arch/nios/config.mk b/arch/nios/config.mk deleted file mode 100644 index e1b9f07bb3..0000000000 --- a/arch/nios/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2003 -# Psyent Corporation <www.psyent.com> -# Scott McNutt <smcnutt@psyent.com> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -CROSS_COMPILE ?= nios-elf- - -STANDALONE_LOAD_ADDR = 0x00800000 -L $(gcclibdir)/m32 - -PLATFORM_CPPFLAGS += -m32 -DCONFIG_NIOS -D__NIOS__ -ffixed-g7 -gstabs diff --git a/arch/nios/cpu/Makefile b/arch/nios/cpu/Makefile deleted file mode 100644 index ad1745608d..0000000000 --- a/arch/nios/cpu/Makefile +++ /dev/null @@ -1,48 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(CPU).a - -START = start.o -SOBJS = traps.o -COBJS = cpu.o interrupts.o serial.o asmi.o spi.o - -SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -START := $(addprefix $(obj),$(START)) - -all: $(obj).depend $(START) $(LIB) - -$(LIB): $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/arch/nios/cpu/asmi.c b/arch/nios/cpu/asmi.c deleted file mode 100644 index 33553b7ca6..0000000000 --- a/arch/nios/cpu/asmi.c +++ /dev/null @@ -1,695 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> - -#if defined(CONFIG_NIOS_ASMI) -#include <command.h> -#include <nios-io.h> - -#if !defined(CONFIG_SYS_NIOS_ASMIBASE) -#error "*** CONFIG_SYS_NIOS_ASMIBASE not defined ***" -#endif - -/*-----------------------------------------------------------------------*/ -#define SHORT_HELP\ - "asmi - read/write Cyclone ASMI configuration device.\n" - -#define LONG_HELP\ - "\n"\ - "asmi erase start [end]\n"\ - " - erase sector start or sectors start through end.\n"\ - "asmi info\n"\ - " - display ASMI device information.\n"\ - "asmi protect on | off\n"\ - " - turn device protection on or off.\n"\ - "asmi read addr offset count\n"\ - " - read count bytes from offset to addr.\n"\ - "asmi write addr offset count\n"\ - " - write count bytes to offset from addr.\n"\ - "asmi verify addr offset count\n"\ - " - verify count bytes at offset from addr." - - -/*-----------------------------------------------------------------------*/ -/* Operation codes for serial configuration devices - */ -#define ASMI_WRITE_ENA 0x06 /* Write enable */ -#define ASMI_WRITE_DIS 0x04 /* Write disable */ -#define ASMI_READ_STAT 0x05 /* Read status */ -#define ASMI_READ_BYTES 0x03 /* Read bytes */ -#define ASMI_READ_ID 0xab /* Read silicon id */ -#define ASMI_WRITE_STAT 0x01 /* Write status */ -#define ASMI_WRITE_BYTES 0x02 /* Write bytes */ -#define ASMI_ERASE_BULK 0xc7 /* Erase entire device */ -#define ASMI_ERASE_SECT 0xd8 /* Erase sector */ - -/* Device status register bits - */ -#define ASMI_STATUS_WIP (1<<0) /* Write in progress */ -#define ASMI_STATUS_WEL (1<<1) /* Write enable latch */ - -static nios_asmi_t *asmi = (nios_asmi_t *)CONFIG_SYS_NIOS_ASMIBASE; - -/*********************************************************************** - * Device access - ***********************************************************************/ -static void asmi_cs (int assert) -{ - if (assert) { - asmi->control |= NIOS_ASMI_SSO; - } else { - /* Let all bits shift out */ - while ((asmi->status & NIOS_ASMI_TMT) == 0) - ; - asmi->control &= ~NIOS_ASMI_SSO; - } -} - -static void asmi_tx (unsigned char c) -{ - while ((asmi->status & NIOS_ASMI_TRDY) == 0) - ; - asmi->txdata = c; -} - -static int asmi_rx (void) -{ - while ((asmi->status & NIOS_ASMI_RRDY) == 0) - ; - return (asmi->rxdata); -} - -static unsigned char bitrev[] = { - 0x00, 0x08, 0x04, 0x0c, 0x02, 0x0a, 0x06, 0x0e, - 0x01, 0x09, 0x05, 0x0d, 0x03, 0x0b, 0x07, 0x0f -}; - -static unsigned char asmi_bitrev( unsigned char c ) -{ - unsigned char val; - - val = bitrev[c>>4]; - val |= bitrev[c & 0x0f]<<4; - return (val); -} - -static void asmi_rcv (unsigned char *dst, int len) -{ - while (len--) { - asmi_tx (0); - *dst++ = asmi_rx (); - } -} - -static void asmi_rrcv (unsigned char *dst, int len) -{ - while (len--) { - asmi_tx (0); - *dst++ = asmi_bitrev (asmi_rx ()); - } -} - -static void asmi_snd (unsigned char *src, int len) -{ - while (len--) { - asmi_tx (*src++); - asmi_rx (); - } -} - -static void asmi_rsnd (unsigned char *src, int len) -{ - while (len--) { - asmi_tx (asmi_bitrev (*src++)); - asmi_rx (); - } -} - -static void asmi_wr_enable (void) -{ - asmi_cs (1); - asmi_tx (ASMI_WRITE_ENA); - asmi_rx (); - asmi_cs (0); -} - -static unsigned char asmi_status_rd (void) -{ - unsigned char status; - - asmi_cs (1); - asmi_tx (ASMI_READ_STAT); - asmi_rx (); - asmi_tx (0); - status = asmi_rx (); - asmi_cs (0); - return (status); -} - -static void asmi_status_wr (unsigned char status) -{ - asmi_wr_enable (); - asmi_cs (1); - asmi_tx (ASMI_WRITE_STAT); - asmi_rx (); - asmi_tx (status); - asmi_rx (); - asmi_cs (0); - return; -} - -/*********************************************************************** - * Device information - ***********************************************************************/ -typedef struct asmi_devinfo_t { - const char *name; /* Device name */ - unsigned char id; /* Device silicon id */ - unsigned char size; /* Total size log2(bytes)*/ - unsigned char num_sects; /* Number of sectors */ - unsigned char sz_sect; /* Sector size log2(bytes) */ - unsigned char sz_page; /* Page size log2(bytes) */ - unsigned char prot_mask; /* Protection mask */ -}asmi_devinfo_t; - -static struct asmi_devinfo_t devinfo[] = { - { "EPCS1 ", 0x10, 17, 4, 15, 8, 0x0c }, - { "EPCS4 ", 0x12, 19, 8, 16, 8, 0x1c }, - { 0, 0, 0, 0, 0, 0 } -}; - -static asmi_devinfo_t *asmi_dev_find (void) -{ - unsigned char buf[4]; - unsigned char id; - int i; - struct asmi_devinfo_t *dev = NULL; - - /* Read silicon id requires 3 "dummy bytes" before it's put - * on the wire. - */ - buf[0] = ASMI_READ_ID; - buf[1] = 0; - buf[2] = 0; - buf[3] = 0; - - asmi_cs (1); - asmi_snd (buf,4); - asmi_rcv (buf,1); - asmi_cs (0); - id = buf[0]; - - /* Find the info struct */ - i = 0; - while (devinfo[i].name) { - if (id == devinfo[i].id) { - dev = &devinfo[i]; - break; - } - i++; - } - - return (dev); -} - -/*********************************************************************** - * Misc Utilities - ***********************************************************************/ -static unsigned asmi_cfgsz (void) -{ - unsigned sz = 0; - unsigned char buf[128]; - unsigned char *p; - - /* Read in the first 128 bytes of the device */ - buf[0] = ASMI_READ_BYTES; - buf[1] = 0; - buf[2] = 0; - buf[3] = 0; - - asmi_cs (1); - asmi_snd (buf,4); - asmi_rrcv (buf, sizeof(buf)); - asmi_cs (0); - - /* Search for the starting 0x6a which is followed by the - * 4-byte 'register' and 4-byte bit-count. - */ - p = buf; - while (p < buf + sizeof(buf)-8) { - if ( *p == 0x6a ) { - /* Point to bit count and extract */ - p += 5; - sz = *p++; - sz |= *p++ << 8; - sz |= *p++ << 16; - sz |= *p++ << 24; - /* Convert to byte count */ - sz += 7; - sz >>= 3; - } else if (*p == 0xff) { - /* 0xff is ok ... just skip */ - p++; - continue; - } else { - /* Not 0xff or 0x6a ... something's not - * right ... report 'unknown' (sz=0). - */ - break; - } - } - return (sz); -} - -static int asmi_erase (unsigned start, unsigned end) -{ - unsigned off, sectsz; - unsigned char buf[4]; - struct asmi_devinfo_t *dev = asmi_dev_find (); - - if (!dev || (start>end)) - return (-1); - - /* Erase the requested sectors. An address is required - * that lies within the requested sector -- we'll just - * use the first address in the sector. - */ - printf ("asmi erasing sector %d ", start); - if (start != end) - printf ("to %d ", end); - sectsz = (1 << dev->sz_sect); - while (start <= end) { - off = start * sectsz; - start++; - - buf[0] = ASMI_ERASE_SECT; - buf[1] = off >> 16; - buf[2] = off >> 8; - buf[3] = off; - - asmi_wr_enable (); - asmi_cs (1); - asmi_snd (buf,4); - asmi_cs (0); - - printf ("."); /* Some user feedback */ - - /* Wait for erase to complete */ - while (asmi_status_rd() & ASMI_STATUS_WIP) - ; - } - printf (" done.\n"); - return (0); -} - -static int asmi_read (ulong addr, ulong off, ulong cnt) -{ - unsigned char buf[4]; - - buf[0] = ASMI_READ_BYTES; - buf[1] = off >> 16; - buf[2] = off >> 8; - buf[3] = off; - - asmi_cs (1); - asmi_snd (buf,4); - asmi_rrcv ((unsigned char *)addr, cnt); - asmi_cs (0); - - return (0); -} - -static -int asmi_write (ulong addr, ulong off, ulong cnt) -{ - ulong wrcnt; - unsigned pgsz; - unsigned char buf[4]; - struct asmi_devinfo_t *dev = asmi_dev_find (); - - if (!dev) - return (-1); - - pgsz = (1<<dev->sz_page); - while (cnt) { - if (off % pgsz) - wrcnt = pgsz - (off % pgsz); - else - wrcnt = pgsz; - wrcnt = (wrcnt > cnt) ? cnt : wrcnt; - - buf[0] = ASMI_WRITE_BYTES; - buf[1] = off >> 16; - buf[2] = off >> 8; - buf[3] = off; - - asmi_wr_enable (); - asmi_cs (1); - asmi_snd (buf,4); - asmi_rsnd ((unsigned char *)addr, wrcnt); - asmi_cs (0); - - /* Wait for write to complete */ - while (asmi_status_rd() & ASMI_STATUS_WIP) - ; - - cnt -= wrcnt; - off += wrcnt; - addr += wrcnt; - } - - return (0); -} - -static -int asmi_verify (ulong addr, ulong off, ulong cnt, ulong *err) -{ - ulong rdcnt; - unsigned char buf[256]; - unsigned char *start,*end; - int i; - - start = end = (unsigned char *)addr; - while (cnt) { - rdcnt = (cnt>sizeof(buf)) ? sizeof(buf) : cnt; - asmi_read ((ulong)buf, off, rdcnt); - for (i=0; i<rdcnt; i++) { - if (*end != buf[i]) { - *err = end - start; - return(-1); - } - end++; - } - cnt -= rdcnt; - off += rdcnt; - } - return (0); -} - -static int asmi_sect_erased (int sect, unsigned *offset, - struct asmi_devinfo_t *dev) -{ - unsigned char buf[128]; - unsigned off, end; - unsigned sectsz; - int i; - - sectsz = (1 << dev->sz_sect); - off = sectsz * sect; - end = off + sectsz; - - while (off < end) { - asmi_read ((ulong)buf, off, sizeof(buf)); - for (i=0; i < sizeof(buf); i++) { - if (buf[i] != 0xff) { - *offset = off + i; - return (0); - } - } - off += sizeof(buf); - } - return (1); -} - - -/*********************************************************************** - * Commands - ***********************************************************************/ -static -void do_asmi_info (struct asmi_devinfo_t *dev, int argc, char *argv[]) -{ - int i; - unsigned char stat; - unsigned tmp; - int erased; - - /* Basic device info */ - printf ("%s: %d kbytes (%d sectors x %d kbytes," - " %d bytes/page)\n", - dev->name, 1 << (dev->size-10), - dev->num_sects, 1 << (dev->sz_sect-10), - 1 << dev->sz_page ); - - /* Status -- for now protection is all-or-nothing */ - stat = asmi_status_rd(); - printf ("status: 0x%02x (WIP:%d, WEL:%d, PROT:%s)\n", - stat, - (stat & ASMI_STATUS_WIP) ? 1 : 0, - (stat & ASMI_STATUS_WEL) ? 1 : 0, - (stat & dev->prot_mask) ? "on" : "off" ); - - /* Configuration */ - tmp = asmi_cfgsz (); - if (tmp) { - printf ("config: 0x%06x (%d) bytes\n", tmp, tmp ); - } else { - printf ("config: unknown\n" ); - } - - /* Sector info */ - for (i=0; i<dev->num_sects; i++) { - erased = asmi_sect_erased (i, &tmp, dev); - printf (" %d: %06x ", - i, i*(1<<dev->sz_sect) ); - if (erased) - printf ("erased\n"); - else - printf ("data @ 0x%06x\n", tmp); - } - - return; -} - -static -void do_asmi_erase (struct asmi_devinfo_t *dev, int argc, char *argv[]) -{ - unsigned start,end; - - if ((argc < 3) || (argc > 4)) { - printf ("USAGE: asmi erase sect [end]\n"); - return; - } - if ((asmi_status_rd() & dev->prot_mask) != 0) { - printf ( "asmi: device protected.\n"); - return; - } - - start = simple_strtoul (argv[2], NULL, 10); - if (argc > 3) - end = simple_strtoul (argv[3], NULL, 10); - else - end = start; - if ((start >= dev->num_sects) || (start > end)) { - printf ("asmi: invalid sector range: [%d:%d]\n", - start, end ); - return; - } - - asmi_erase (start, end); - - return; -} - -static -void do_asmi_protect (struct asmi_devinfo_t *dev, int argc, char *argv[]) -{ - unsigned char stat; - - /* For now protection is all-or-nothing to keep things - * simple. The protection bits don't map in a linear - * fashion ... and we would rather protect the bottom - * of the device since it contains the config data and - * leave the top unprotected for app use. But unfortunately - * protection works from top-to-bottom so it does - * really help very much from a software app point-of-view. - */ - if (argc < 3) { - printf ("USAGE: asmi protect on | off\n"); - return; - } - if (!dev) - return; - - /* Protection on/off is just a matter of setting/clearing - * all protection bits in the status register. - */ - stat = asmi_status_rd (); - if (strcmp ("on", argv[2]) == 0) { - stat |= dev->prot_mask; - } else if (strcmp ("off", argv[2]) == 0 ) { - stat &= ~dev->prot_mask; - } else { - printf ("asmi: unknown protection: %s\n", argv[2]); - return; - } - asmi_status_wr (stat); - return; -} - -static -void do_asmi_read (struct asmi_devinfo_t *dev, int argc, char *argv[]) -{ - ulong addr,off,cnt; - ulong sz; - - if (argc < 5) { - printf ("USAGE: asmi read addr offset count\n"); - return; - } - - sz = 1 << dev->size; - addr = simple_strtoul (argv[2], NULL, 16); - off = simple_strtoul (argv[3], NULL, 16); - cnt = simple_strtoul (argv[4], NULL, 16); - if (off > sz) { - printf ("offset is greater than device size" - "... aborting.\n"); - return; - } - if ((off + cnt) > sz) { - printf ("request exceeds device size" - "... truncating.\n"); - cnt = sz - off; - } - printf ("asmi: read %08lx <- %06lx (0x%lx bytes)\n", - addr, off, cnt); - asmi_read (addr, off, cnt); - - return; -} - -static -void do_asmi_write (struct asmi_devinfo_t *dev, int argc, char *argv[]) -{ - ulong addr,off,cnt; - ulong sz; - ulong err; - - if (argc < 5) { - printf ("USAGE: asmi write addr offset count\n"); - return; - } - if ((asmi_status_rd() & dev->prot_mask) != 0) { - printf ( "asmi: device protected.\n"); - return; - } - - sz = 1 << dev->size; - addr = simple_strtoul (argv[2], NULL, 16); - off = simple_strtoul (argv[3], NULL, 16); - cnt = simple_strtoul (argv[4], NULL, 16); - if (off > sz) { - printf ("offset is greater than device size" - "... aborting.\n"); - return; - } - if ((off + cnt) > sz) { - printf ("request exceeds device size" - "... truncating.\n"); - cnt = sz - off; - } - printf ("asmi: write %08lx -> %06lx (0x%lx bytes)\n", - addr, off, cnt); - asmi_write (addr, off, cnt); - if (asmi_verify (addr, off, cnt, &err) != 0) - printf ("asmi: write error at offset %06lx\n", err); - - return; -} - -static -void do_asmi_verify (struct asmi_devinfo_t *dev, int argc, char *argv[]) -{ - ulong addr,off,cnt; - ulong sz; - ulong err; - - if (argc < 5) { - printf ("USAGE: asmi verify addr offset count\n"); - return; - } - - sz = 1 << dev->size; - addr = simple_strtoul (argv[2], NULL, 16); - off = simple_strtoul (argv[3], NULL, 16); - cnt = simple_strtoul (argv[4], NULL, 16); - if (off > sz) { - printf ("offset is greater than device size" - "... aborting.\n"); - return; - } - if ((off + cnt) > sz) { - printf ("request exceeds device size" - "... truncating.\n"); - cnt = sz - off; - } - printf ("asmi: verify %08lx -> %06lx (0x%lx bytes)\n", - addr, off, cnt); - if (asmi_verify (addr, off, cnt, &err) != 0) - printf ("asmi: verify error at offset %06lx\n", err); - - return; -} - -/*-----------------------------------------------------------------------*/ -int do_asmi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - int len; - struct asmi_devinfo_t *dev = asmi_dev_find (); - - if (argc < 2) { - printf ("Usage:%s", LONG_HELP); - return (0); - } - - if (!dev) { - printf ("asmi: device not found.\n"); - return (0); - } - - len = strlen (argv[1]); - if (strncmp ("info", argv[1], len) == 0) { - do_asmi_info ( dev, argc, argv); - } else if (strncmp ("erase", argv[1], len) == 0) { - do_asmi_erase (dev, argc, argv); - } else if (strncmp ("protect", argv[1], len) == 0) { - do_asmi_protect (dev, argc, argv); - } else if (strncmp ("read", argv[1], len) == 0) { - do_asmi_read (dev, argc, argv); - } else if (strncmp ("write", argv[1], len) == 0) { - do_asmi_write (dev, argc, argv); - } else if (strncmp ("verify", argv[1], len) == 0) { - do_asmi_verify (dev, argc, argv); - } else { - printf ("asmi: unknown operation: %s\n", argv[1]); - } - - return (0); -} - -/*-----------------------------------------------------------------------*/ - - -U_BOOT_CMD( asmi, 5, 0, do_asmi, SHORT_HELP, LONG_HELP ); - -#endif /* CONFIG_NIOS_ASMI */ diff --git a/arch/nios/cpu/config.mk b/arch/nios/cpu/config.mk deleted file mode 100644 index f228d7219a..0000000000 --- a/arch/nios/cpu/config.mk +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -PLATFORM_RELFLAGS += diff --git a/arch/nios/cpu/cpu.c b/arch/nios/cpu/cpu.c deleted file mode 100644 index 5519e82780..0000000000 --- a/arch/nios/cpu/cpu.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <nios.h> - - -int checkcpu (void) -{ - unsigned val; - unsigned rev_major; - unsigned rev_minor; - short nregs, hi_limit, lo_limit; - - /* Get cpu version info */ - val = rdctl (CTL_CPU_ID); - puts ("CPU: "); - printf ("%s", (val & 0x00008000) ? "Nios-16 " : "Nios-32 "); - rev_major = (val>>12) & 0x07; - rev_minor = (val>>4) & 0x0ff; - printf ("Rev. %d.%d (0x%04x)", rev_major, rev_minor, - val & 0xffff); - if (rev_major == 0x08) - printf (" [OpenCore (R) Plus]"); - printf ("\n"); - - /* Check register file */ - val = rdctl (CTL_WVALID); - lo_limit = val & 0x01f; - hi_limit = (val>>5) & 0x1f; - nregs = (hi_limit + 2) * 16; - printf ("Reg file size: %d LO_LIMIT/HI_LIMIT: %d/%d\n", - nregs, lo_limit, hi_limit); - - return (0); -} - - -int do_reset (void) -{ - /* trap 0 does the trick ... at least with the OCI debug - * present -- haven't tested without it yet (stm). - */ - disable_interrupts (); - ipri (1); - asm volatile ("trap 0\n"); - - /* No return ;-) */ - - return(0); -} - - -#if defined(CONFIG_WATCHDOG) -void watchdog_reset (void) -{ -} -#endif /* CONFIG_WATCHDOG */ diff --git a/arch/nios/cpu/interrupts.c b/arch/nios/cpu/interrupts.c deleted file mode 100644 index 55a5718574..0000000000 --- a/arch/nios/cpu/interrupts.c +++ /dev/null @@ -1,196 +0,0 @@ -/* - * (C) Copyright 2000-2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <nios.h> -#include <nios-io.h> -#include <asm/ptrace.h> -#include <common.h> -#include <command.h> -#include <watchdog.h> -#ifdef CONFIG_STATUS_LED -#include <status_led.h> -#endif - -/****************************************************************************/ - -struct irq_action { - interrupt_handler_t *handler; - void *arg; - int count; -}; - -static struct irq_action irq_vecs[64]; - -/*************************************************************************/ -volatile ulong timestamp = 0; - -void reset_timer (void) -{ - timestamp = 0; -} - -ulong get_timer (ulong base) -{ - WATCHDOG_RESET (); - return (timestamp - base); -} - -void set_timer (ulong t) -{ - timestamp = t; -} - - -/* The board must handle this interrupt if a timer is not - * provided. - */ -#if defined(CONFIG_SYS_NIOS_TMRBASE) -void timer_interrupt (struct pt_regs *regs) -{ - /* Interrupt is cleared by writing anything to the - * status register. - */ - nios_timer_t *tmr = (nios_timer_t *)CONFIG_SYS_NIOS_TMRBASE; - tmr->status = 0; - timestamp += CONFIG_SYS_NIOS_TMRMS; -#ifdef CONFIG_STATUS_LED - status_led_tick(timestamp); -#endif -} -#endif - -/*************************************************************************/ -int disable_interrupts (void) -{ - int val = 0; - - /* Writing anything to CLR_IE disables interrupts */ - val = rdctl (CTL_STATUS); - wrctl (CTL_CLR_IE, 0); - return (val & STATUS_IE); -} - -void enable_interrupts( void ) -{ - /* Writing anything SET_IE enables interrupts */ - wrctl (CTL_SET_IE, 0); -} - -void external_interrupt (struct pt_regs *regs) -{ - unsigned vec; - - vec = (regs->status & STATUS_IPRI) >> 9; /* ipri */ - - irq_vecs[vec].count++; - if (irq_vecs[vec].handler != NULL) { - (*irq_vecs[vec].handler)(irq_vecs[vec].arg); - } else { - /* A sad side-effect of masking a bogus interrupt is - * that lower priority interrupts will also be disabled. - * This is probably not what we want ... so hang insted. - */ - printf ("Unhandled interrupt: 0x%x\n", vec); - disable_interrupts (); - hang (); - } -} - -/*************************************************************************/ -int interrupt_init (void) -{ - int vec; - -#if defined(CONFIG_SYS_NIOS_TMRBASE) - nios_timer_t *tmr = (nios_timer_t *)CONFIG_SYS_NIOS_TMRBASE; - - tmr->control &= ~NIOS_TIMER_ITO; - tmr->control |= NIOS_TIMER_STOP; -#if defined(CONFIG_SYS_NIOS_TMRCNT) - tmr->periodl = CONFIG_SYS_NIOS_TMRCNT & 0xffff; - tmr->periodh = (CONFIG_SYS_NIOS_TMRCNT >> 16) & 0xffff; -#endif -#endif - - for (vec=0; vec<64; vec++ ) { - irq_vecs[vec].handler = NULL; - irq_vecs[vec].arg = NULL; - irq_vecs[vec].count = 0; - } - - /* Need timus interruptus -- start the lopri timer */ -#if defined(CONFIG_SYS_NIOS_TMRBASE) - tmr->control |= ( NIOS_TIMER_ITO | - NIOS_TIMER_CONT | - NIOS_TIMER_START ); - ipri (CONFIG_SYS_NIOS_TMRIRQ + 1); -#endif - enable_interrupts (); - return (0); -} - -void irq_install_handler (int vec, interrupt_handler_t *handler, void *arg) -{ - struct irq_action *irqa = irq_vecs; - int i = vec; - int flag; - - if (irqa[i].handler != NULL) { - printf ("Interrupt vector %d: handler 0x%x " - "replacing 0x%x\n", - vec, (uint)handler, (uint)irqa[i].handler); - } - - flag = disable_interrupts (); - irqa[i].handler = handler; - irqa[i].arg = arg; - if (flag ) - enable_interrupts (); -} - -/*************************************************************************/ -#if defined(CONFIG_CMD_IRQ) -int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - int vec; - - printf ("\nInterrupt-Information:\n"); - printf ("Nr Routine Arg Count\n"); - - for (vec=0; vec<64; vec++) { - if (irq_vecs[vec].handler != NULL) { - printf ("%02d %08lx %08lx %d\n", - vec, - (ulong)irq_vecs[vec].handler<<1, - (ulong)irq_vecs[vec].arg, - irq_vecs[vec].count); - } - } - - return (0); -} -#endif diff --git a/arch/nios/cpu/serial.c b/arch/nios/cpu/serial.c deleted file mode 100644 index 44aa6001f5..0000000000 --- a/arch/nios/cpu/serial.c +++ /dev/null @@ -1,135 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <common.h> -#include <watchdog.h> -#include <nios-io.h> - -DECLARE_GLOBAL_DATA_PTR; - -/*------------------------------------------------------------------ - * JTAG acts as the serial port - *-----------------------------------------------------------------*/ -#if defined(CONFIG_CONSOLE_JTAG) - -static nios_jtag_t *jtag = (nios_jtag_t *)CONFIG_SYS_NIOS_CONSOLE; - -void serial_setbrg( void ){ return; } -int serial_init( void ) { return(0);} - -void serial_putc (char c) -{ - while ((jtag->txcntl & NIOS_JTAG_TRDY) != 0) - WATCHDOG_RESET (); - jtag->txcntl = NIOS_JTAG_TRDY | (unsigned char)c; -} - -void serial_puts (const char *s) -{ - while (*s != 0) - serial_putc (*s++); -} - -int serial_tstc (void) -{ - return (jtag->rxcntl & NIOS_JTAG_RRDY); -} - -int serial_getc (void) -{ - int c; - while (serial_tstc() == 0) - WATCHDOG_RESET (); - c = jtag->rxcntl & 0x0ff; - jtag->rxcntl = 0; - return (c); -} - -/*------------------------------------------------------------------ - * UART the serial port - *-----------------------------------------------------------------*/ -#else - -static nios_uart_t *uart = (nios_uart_t *)CONFIG_SYS_NIOS_CONSOLE; - -#if defined(CONFIG_SYS_NIOS_FIXEDBAUD) - -/* Everything's already setup for fixed-baud PTF - * assignment - */ -void serial_setbrg (void){ return; } -int serial_init (void) { return (0);} - -#else - -void serial_setbrg (void) -{ - unsigned div; - - div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1; - uart->divisor = div; - return; -} - -int serial_init (void) -{ - serial_setbrg (); - return (0); -} - -#endif /* CONFIG_SYS_NIOS_FIXEDBAUD */ - - -/*----------------------------------------------------------------------- - * UART CONSOLE - *---------------------------------------------------------------------*/ -void serial_putc (char c) -{ - if (c == '\n') - serial_putc ('\r'); - while ((uart->status & NIOS_UART_TRDY) == 0) - WATCHDOG_RESET (); - uart->txdata = (unsigned char)c; -} - -void serial_puts (const char *s) -{ - while (*s != 0) { - serial_putc (*s++); - } -} - -int serial_tstc (void) -{ - return (uart->status & NIOS_UART_RRDY); -} - -int serial_getc (void) -{ - while (serial_tstc () == 0) - WATCHDOG_RESET (); - return( uart->rxdata & 0x00ff ); -} - -#endif /* CONFIG_JTAG_CONSOLE */ diff --git a/arch/nios/cpu/spi.c b/arch/nios/cpu/spi.c deleted file mode 100644 index 89f9797faa..0000000000 --- a/arch/nios/cpu/spi.c +++ /dev/null @@ -1,195 +0,0 @@ -/* - * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <linux/ctype.h> - -#if defined(CONFIG_NIOS_SPI) -#include <nios-io.h> -#include <spi.h> - -#if !defined(CONFIG_SYS_NIOS_SPIBASE) -#error "*** CONFIG_SYS_NIOS_SPIBASE not defined ***" -#endif - -#if !defined(CONFIG_SYS_NIOS_SPIBITS) -#error "*** CONFIG_SYS_NIOS_SPIBITS not defined ***" -#endif - -#if (CONFIG_SYS_NIOS_SPIBITS != 8) && (CONFIG_SYS_NIOS_SPIBITS != 16) -#error "*** CONFIG_SYS_NIOS_SPIBITS should be either 8 or 16 ***" -#endif - -static nios_spi_t *spi = (nios_spi_t *)CONFIG_SYS_NIOS_SPIBASE; - -/* Warning: - * You cannot enable DEBUG for early system initalization, i. e. when - * this driver is used to read environment parameters like "baudrate" - * from EEPROM which are used to initialize the serial port which is - * needed to print the debug messages... - */ -#undef DEBUG - -#ifdef DEBUG - -#define DPRINT(a) printf a; -/* ----------------------------------------------- - * Helper functions to peek into tx and rx buffers - * ----------------------------------------------- */ -static const char * const hex_digit = "0123456789ABCDEF"; - -static char quickhex (int i) -{ - return hex_digit[i]; -} - -static void memdump (const void *pv, int num) -{ - int i; - const unsigned char *pc = (const unsigned char *) pv; - - for (i = 0; i < num; i++) - printf ("%c%c ", quickhex (pc[i] >> 4), quickhex (pc[i] & 0x0f)); - printf ("\t"); - for (i = 0; i < num; i++) - printf ("%c", isprint (pc[i]) ? pc[i] : '.'); - printf ("\n"); -} -#else /* !DEBUG */ - -#define DPRINT(a) -#define memdump(p,n) - -#endif /* DEBUG */ - - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct spi_slave *slave; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - slave = malloc(sizeof(struct spi_slave)); - if (!slave) - return NULL; - - slave->bus = bus; - slave->cs = cs; - - /* TODO: Add support for different modes and speeds */ - - return slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - free(slave); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - -} - -/* - * SPI transfer: - * - * See include/spi.h and http://www.altera.com/literature/ds/ds_nios_spi.pdf - * for more informations. - */ -int spi_xfer(struct spi_slave *slave, int bitlen, const void *dout, - void *din, unsigned long flags) -{ - const u8 *txd = dout; - u8 *rxd = din; - int j; - - DPRINT(("spi_xfer: slave %u:%u dout %08X din %08X bitlen %d\n", - slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen)); - - memdump(dout, (bitlen + 7) / 8); - - if (flags & SPI_XFER_BEGIN) - spi_cs_activate(slave); - - if (!(flags & SPI_XFER_END) || bitlen > CONFIG_SYS_NIOS_SPIBITS) { - /* leave chip select active */ - spi->control |= NIOS_SPI_SSO; - } - - for ( j = 0; /* count each byte in */ - j < ((bitlen + 7) / 8); /* dout[] and din[] */ - -#if (CONFIG_SYS_NIOS_SPIBITS == 8) - j++) { - - while ((spi->status & NIOS_SPI_TRDY) == 0) - ; - spi->txdata = (unsigned)(txd[j]); - - while ((spi->status & NIOS_SPI_RRDY) == 0) - ; - rxd[j] = (unsigned char)(spi->rxdata & 0xff); - -#elif (CONFIG_SYS_NIOS_SPIBITS == 16) - j++, j++) { - - while ((spi->status & NIOS_SPI_TRDY) == 0) - ; - if ((j+1) < ((bitlen + 7) / 8)) - spi->txdata = (unsigned)((txd[j] << 8) | txd[j+1]); - else - spi->txdata = (unsigned)(txd[j] << 8); - - while ((spi->status & NIOS_SPI_RRDY) == 0) - ; - rxd[j] = (unsigned char)((spi->rxdata >> 8) & 0xff); - if ((j+1) < ((bitlen + 7) / 8)) - rxd[j+1] = (unsigned char)(spi->rxdata & 0xff); - -#else -#error "*** unsupported value of CONFIG_SYS_NIOS_SPIBITS ***" -#endif - - } - - if (bitlen > CONFIG_SYS_NIOS_SPIBITS && (flags & SPI_XFER_END)) { - spi->control &= ~NIOS_SPI_SSO; - } - - if (flags & SPI_XFER_END) - spi_cs_deactivate(slave); - - memdump(din, (bitlen + 7) / 8); - - return 0; -} - -#endif /* CONFIG_NIOS_SPI */ diff --git a/arch/nios/cpu/start.S b/arch/nios/cpu/start.S deleted file mode 100644 index 3578a04d51..0000000000 --- a/arch/nios/cpu/start.S +++ /dev/null @@ -1,238 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <config.h> -#include <timestamp.h> -#include <version.h> - -#if !defined(CONFIG_IDENT_STRING) -#define CONFIG_IDENT_STRING "" -#endif - -#define STATUS_INIT 0x8600 /* IE=1, IPRI=2 */ - -/************************************************************************* - * RESTART - ************************************************************************/ - - .text - .global _start - -_start: - bsr 0f - nop - .long _start - - /* GERMS -- The "standard-32" configuration GERMS monitor looks - * for the string "Nios" at flash_base + 0xc (actually it only - * tests for 'N', 'i'). You can leave support for this in place - * as it's only a few words. - */ - . = _start + 0x000c - .string "Nios" - - .align 4 -0: - /* - * Early setup -- set cwp = HI_LIMIT, IPRI = 2, IE = 1 to - * enable underflow exceptions. Disable cache. - * NOTE: %o7 has return addr -- save in %g7 use later. - */ - mov %g7, %o7 - - pfx 2 /* WVALID */ - rdctl %g0 - lsri %g0, 1 - pfx %hi(STATUS_INIT) - or %g0, %lo(STATUS_INIT) - wrctl %g0 /* update status */ - nop - - /* - * STACK - */ - pfx %hi(CONFIG_SYS_INIT_SP) - movi %sp, %lo(CONFIG_SYS_INIT_SP) - pfx %xhi(CONFIG_SYS_INIT_SP) - movhi %sp, %xlo(CONFIG_SYS_INIT_SP) - mov %fp, %sp - - pfx %hi(4*16) - subi %sp, %lo(4*16) /* Space for reg window mgmt */ - - /* - * RELOCATE -- %g7 has return addr from bsr at _start. - */ - pfx %hi(__u_boot_cmd_end) - movi %g5, %lo(__u_boot_cmd_end) - pfx %xhi(__u_boot_cmd_end) - movhi %g5, %xlo(__u_boot_cmd_end) /* %g5 <- end address */ - - lsli %g7, 1 /* mem = retaddr << 1 */ - mov %g6, %g7 - subi %g6, 4 /* %g6 <- src addr */ - ld %g7, [%g7] /* %g7 <- dst addr */ - - /* No need to move text sections if we're already located - * at the proper address. - */ - cmp %g7, %g6 - ifs cc_z - br reloc - nop /* delay slot */ - -1: cmp %g7, %g5 - skps cc_nz - br 2f - nop /* delay slot */ - - ld %g0, [%g6] - addi %g6, 4 /* src++ */ - st [%g7], %g0 - addi %g7, 4 /* dst++ */ - br 1b - nop /* delay slot */ -2: - - /* - * Jump to relocation address - */ - pfx %hi(reloc@h) - movi %g0, %lo(reloc@h) - pfx %xhi(reloc@h) - movhi %g0, %xlo(reloc@h) - jmp %g0 - nop /* delay slot */ -reloc: - - /* - * CLEAR BSS - */ - pfx %hi(__bss_end) - movi %g5, %lo(__bss_end) - pfx %xhi(__bss_end) - movhi %g5, %xlo(__bss_end) /* %g5 <- end address */ - pfx %hi(__bss_start) - movi %g7, %lo(__bss_start) - pfx %xhi(__bss_start) - movhi %g7, %xlo(__bss_start) /* %g7 <- end address */ - - movi %g0, 0 -3: cmp %g7, %g5 - skps cc_nz - br 4f - nop /* delay slot */ - - st [%g7], %g0 - addi %g7, 4 /* (delay slot) dst++ */ - br 3b - nop /* delay slot */ -4: - - /* - * INIT VECTOR TABLE - */ - pfx %hi(CONFIG_SYS_VECT_BASE) - movi %g0, %lo(CONFIG_SYS_VECT_BASE) - pfx %xhi(CONFIG_SYS_VECT_BASE) - movhi %g0, %xlo(CONFIG_SYS_VECT_BASE) /* dst */ - mov %l0, %g0 - - pfx %hi(_vectors) - movi %g1, %lo(_vectors) - pfx %xhi(_vectors) - movhi %g1, %xlo(_vectors) /* src */ - bgen %g2, 6 /* cnt = 64 */ - - ldp %g3, [%l0, 3] /* bkpt vector */ - ldp %g4, [%l0, 4] /* single step vector */ - -5: ld %g7, [%g1] - addi %g1, 4 /* src++ */ - st [%g0], %g7 - addi %g0, 4 /* dst++ */ - - subi %g2, 1 /* cnt-- */ - ifrnz %g2 - br 5b - nop /* delay slot */ - -#if defined(CONFIG_ROM_STUBS) - /* Restore the breakpoint and single step exception - * vectors to their original values. - */ - stp [%l0,3], %g3 /* breakpoint */ - stp [%l0,4], %g4 /* single step */ -#endif - - /* For debug startup convenience ... software breakpoints - * set prior to this point may not succeed ;-) - */ - .global __start -__start: - - /* - * Call board_init -- never returns - */ - pfx %hi(board_init@h) - movi %g1, %lo(board_init@h) - pfx %xhi(board_init@h) - movhi %g1, %xlo(board_init@h) - call %g1 - nop /* Delaly slot */ - /* NEVER RETURNS */ - -/* - * dly_clks -- Nios doesn't have a time/clk reference for simple - * delay loops, so we do our best by counting instruction cycles. - * A control register that counts system clock cycles would be - * a handy feature -- hint for Altera ;-) - */ - .globl dly_clks - /* Each loop is 4 instructions as delay slot is always - * executed. Each instruction is approximately 4 clocks - * (according to some lame info from Altera). So ... - * ... each loop is about 16 clocks. - */ - -dly_clks: - lsri %o0, 4 /* cnt/16 */ - -8: skprnz %o0 - br 9f - subi %o0, 1 /* cnt--, Delay slot */ - br 8b - nop - -9: lret - nop /* Delay slot */ - - - .data - .globl version_string - -version_string: - .ascii U_BOOT_VERSION - .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" - .ascii CONFIG_IDENT_STRING, "\0" diff --git a/arch/nios/cpu/traps.S b/arch/nios/cpu/traps.S deleted file mode 100644 index bc4d3f66da..0000000000 --- a/arch/nios/cpu/traps.S +++ /dev/null @@ -1,582 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> - -/************************************************************************* - * Register window underflow - * - * The register window underflow exception occurs whenever the lowest - * valid register window is in use (CWP=LO_LIMIT) and a save instruction - * is issued. The save moves CWP below LO_LIMIT, %sp is set as normal, - * then the exception is generated prior to executing the instruction - * after the save. - ************************************************************************/ - .text - .global _cwp_lolimit - .align 4 - -_cwp_lolimit: - - /* Sixteen words are always allocated by the compiler in every - * procedure's stack frame, always starting at %sp, for saving - * 'in' and 'local' registers on a window overflow. - * - * Save the 'global' and 'in' regs on stack. They are restored - * at cwp = HI_LIMIT. The 'local' regs aren't in-use at this point. - */ - sts [%sp,0], %g0 /* Save 'global' regs*/ - sts [%sp,1], %g1 - sts [%sp,2], %g2 - sts [%sp,3], %g3 - sts [%sp,4], %g4 - sts [%sp,5], %g5 - sts [%sp,6], %g6 - sts [%sp,7], %g7 - - sts [%sp,8], %i0 /* Save 'in' regs */ - sts [%sp,9], %i1 - sts [%sp,10], %i2 - sts [%sp,11], %i3 - sts [%sp,12], %i4 - sts [%sp,13], %i5 - sts [%sp,14], %i6 - sts [%sp,15], %i7 - - /* Save current %sp and return address in a global so they are - * available at cwp = HI_LIMIT ... where the 'global'/'in' regs - * are restored. NOTE: %sp changes with cwp. - */ - mov %g7, %o7 - mov %g6, %sp - - /* Get LO_LIMIT/HI_LIMIT to know where to start & stop. Note: in - * the underflow exception, cwp is __NOT__ guaranteed to be zero. - * If the OCI debug module is enabled the reset value for LO_LIMIT - * is 2, not 1 -- so cwp can be 1 or 0. - */ - pfx 2 /* WVALID */ - rdctl %g1 - mov %g2, %g1 - pfx 0 - and %g1, 0x1f /* g1 <- LO_LIMIT */ - lsri %g2, 5 - pfx 0 - and %g2,0x1f /* g2 <- HI_LIMIT */ - - /* Set istatus so cwp = HI_LIMIT after tret - */ - movi %g5, 0x1f - lsli %g5, 4 - not %g5 /* mask to clr cwp */ - pfx 1 /* istatus */ - rdctl %g0 - and %g0, %g5 /* clear cwp field */ - - mov %g4, %g2 - lsli %g4, 4 - or %g0, %g4 /* cwp = HI_LIMIT */ - pfx 1 - wrctl %g0 /* update istatus */ - - /* Now move up the register file, saving as we go. When loop - * is first entered, %g1 is at LO_LIMIT. - */ -0: - restore /* cwp++ */ - sts [%sp,0], %l0 /* Save "local" regs*/ - sts [%sp,1], %l1 - sts [%sp,2], %l2 - sts [%sp,3], %l3 - sts [%sp,4], %l4 - sts [%sp,5], %l5 - sts [%sp,6], %l6 - sts [%sp,7], %l7 - - sts [%sp,8], %i0 /* Save 'in' regs */ - sts [%sp,9], %i1 - sts [%sp,10], %i2 - sts [%sp,11], %i3 - sts [%sp,12], %i4 - sts [%sp,13], %i5 - sts [%sp,14], %i6 - sts [%sp,15], %i7 - - cmp %g1, %g2 /* cwp == HI_LIMIT ? */ - skps cc_ne /* if so, we're done */ - br 1f - nop /* delay slot */ - - inc %g1 /* g1 <- cwp++ */ - br 0b - nop /* delay slot */ - - /* At this point cwp = HI_LIMIT, so the global/in regs that were - * in place when the underflow occurred must be restored using - * the original stack pointer (saved in g6). - */ -1: - mov %o7, %g7 /* restore return addr */ - mov %sp, %g6 /* Restore original sp */ - - lds %g0, [%sp,0] /* Restore 'global' regs*/ - lds %g1, [%sp,1] - lds %g2, [%sp,2] - lds %g3, [%sp,3] - lds %g4, [%sp,4] - lds %g5, [%sp,5] - lds %g6, [%sp,6] - lds %g7, [%sp,7] - - lds %i0, [%sp,8] /* Restore 'in' regs*/ - lds %i1, [%sp,9] - lds %i2, [%sp,10] - lds %i3, [%sp,11] - lds %i4, [%sp,12] - lds %i5, [%sp,13] - lds %i6, [%sp,14] - lds %i7, [%sp,15] - - tret %o7 /* All done */ - -/************************************************************************* - * Register window overflow - * - * The register window overflow exception occurs whenever the highest - * valid register window is in use (cwp = HI_LIMIT) and a restore - * instruction is issued. Control is transferred to the overflow handler - * before the instruction following restore is executed. - * - * When a register window overflow exception is taken, the exception - * handler sees cwp at HI_LIMIT. - ************************************************************************/ - .text - .global _cwp_hilimit - .align 4 - -_cwp_hilimit: - - /* Save 'global'/'in' regs on the stack -- will restore when cwp - * is at LO_LIMIT. Locals don't need saving as they are going away. - */ - sts [%sp,0], %g0 /* Save "global" regs*/ - sts [%sp,1], %g1 - sts [%sp,2], %g2 - sts [%sp,3], %g3 - sts [%sp,4], %g4 - sts [%sp,5], %g5 - sts [%sp,6], %g6 - sts [%sp,7], %g7 - - sts [%sp,8], %i0 /* Save 'in' regs */ - sts [%sp,9], %i1 - sts [%sp,10], %i2 - sts [%sp,11], %i3 - sts [%sp,12], %i4 - sts [%sp,13], %i5 - sts [%sp,14], %i6 - sts [%sp,15], %i7 - - /* The current %sp must be available in global to restore regs - * saved on stack. Need return addr as well ;-) - */ - mov %g7, %o7 - mov %g6, %sp - - /* Get HI_LIMIT & LO_LIMIT - */ - pfx 2 /* WVALID */ - rdctl %g1 - mov %g2, %g1 - pfx 0 - and %g1, 0x1f /* g1 <- LO_LIMIT */ - lsri %g2, 5 - pfx 0 - and %g2,0x1f /* g2 <- HI_LIMIT */ - - /* Set istatus so cwp = LO_LIMIT after tret - */ - movi %g5, 0x1f - lsli %g5, 4 - not %g5 /* mask to clr cwp */ - pfx 1 /* istatus */ - rdctl %g0 - and %g0, %g5 /* clear cwp field */ - - mov %g4, %g1 /* g4 <- LO_LIMIT */ - lsli %g4, 4 - or %g0, %g4 /* cwp = LO_LIMIT */ - pfx 1 - wrctl %g0 /* update istatus */ - - /* Move to cwp = LO_LIMIT-1 and restore 'in' regs. - */ - subi %g4,(1 << 4) /* g4 <- LO_LIMIT - 1 */ - rdctl %g0 - and %g0, %g5 /* clear cwp field */ - or %g0, %g4 /* cwp = LO_LIMIT - 1 */ - wrctl %g0 /* update status */ - nop - - mov %sp, %g6 /* Restore sp */ - lds %i0, [%sp,8] /* Restore 'in' regs */ - lds %i1, [%sp,9] - lds %i2, [%sp,10] - lds %i3, [%sp,11] - lds %i4, [%sp,12] - lds %i5, [%sp,13] - lds %i6, [%sp,14] /* sp in next window */ - lds %i7, [%sp,15] - - /* Starting at LO_LIMIT-1, move up the register file, restoring - * along the way. - */ -0: - restore /* cwp++ */ - lds %l0, [%sp,0] /* Restore 'local' regs*/ - lds %l1, [%sp,1] - lds %l2, [%sp,2] - lds %l3, [%sp,3] - lds %l4, [%sp,4] - lds %l5, [%sp,5] - lds %l6, [%sp,6] - lds %l7, [%sp,7] - - lds %i0, [%sp,8] /* Restore 'in' regs */ - lds %i1, [%sp,9] - lds %i2, [%sp,10] - lds %i3, [%sp,11] - lds %i4, [%sp,12] - lds %i5, [%sp,13] - lds %i6, [%sp,14] /* sp in next window */ - lds %i7, [%sp,15] - - cmp %g1, %g2 /* cwp == HI_LIMIT ? */ - skps cc_ne /* if so, we're done */ - br 1f - nop /* delay slot */ - - inc %g1 /* cwp++ */ - br 0b - nop /* delay slot */ - - /* All windows have been updated at this point, but the globals - * still need to be restored. Go to cwp = LO_LIMIT-1 to get - * some registers to use. - */ -1: - rdctl %g0 - and %g0, %g5 /* clear cwp field */ - or %g0, %g4 /* cwp = LO_LIMIT - 1 */ - wrctl %g0 /* update status */ - nop - - /* Now there are some registers available to use in restoring - * the globals. - */ - mov %sp, %g6 - mov %o7, %g7 - - lds %g0, [%sp,0] /* Restore "global" regs*/ - lds %g1, [%sp,1] - lds %g2, [%sp,2] - lds %g3, [%sp,3] - lds %g4, [%sp,4] - lds %g5, [%sp,5] - lds %g6, [%sp,6] - lds %g7, [%sp,7] - - /* The tret moves istatus -> status. istatus was already set for - * cwp = LO_LIMIT. - */ - - tret %o7 /* done */ - -/************************************************************************* - * Default exception handler - * - * The default handler passes control to external_interrupt(). So trap - * or hardware interrupt hanlders can be installed using the familiar - * irq_install_handler(). - * - * Here, the stack is fixed-up and cwp is incremented prior to calling - * external_interrupt(). This lets the underflow and overflow handlers - * operate normally during the exception. - ************************************************************************/ - .text - .global _def_xhandler - .align 4 - -_def_xhandler: - - /* Allocate some stack space: 16 words at %sp to accomodate - * a reg window underflow, 8 words to save interrupted task's - * 'out' regs (which are now the 'in' regs), 8 words to preserve - * the 'global' regs and 3 words to save the return address, - * status and istatus. istatus must be saved in the event an - * underflow occurs in a dispatched handler. status is saved so - * a handler can access it on stack. - */ - pfx %hi((16+16+3) * 4) - subi %fp, %lo((16+16+3) * 4) - mov %sp, %fp - - /* Save the 'global' regs and the interrupted task's 'out' regs - * (our 'in' regs) along with the return addr, status & istatus. - * First 16 words are for underflow exception. - */ - rdctl %l0 /* status */ - pfx 1 /* istatus */ - rdctl %l1 - - sts [%sp,16+0], %g0 /* Save 'global' regs*/ - sts [%sp,16+1], %g1 - sts [%sp,16+2], %g2 - sts [%sp,16+3], %g3 - sts [%sp,16+4], %g4 - sts [%sp,16+5], %g5 - sts [%sp,16+6], %g6 - sts [%sp,16+7], %g7 - - sts [%sp,16+8], %i0 /* Save 'in' regs */ - sts [%sp,16+9], %i1 - sts [%sp,16+10], %i2 - sts [%sp,16+11], %i3 - sts [%sp,16+12], %i4 - sts [%sp,16+13], %i5 - sts [%sp,16+14], %i6 - sts [%sp,16+15], %i7 - - sts [%sp,16+16], %l0 /* status */ - sts [%sp,16+17], %l1 /* istatus */ - sts [%sp,16+18], %o7 /* return addr */ - - /* Move to cwp+1 ... this guarantees cwp is at or above LO_LIMIT. - * Need to set IPRI=3 and IE=1 to enable underflow exceptions. - * NOTE: only the 'out' regs have been saved ... can't touch - * the 'in' or 'local' here. - */ - restore /* cwp++ */ - rdctl %o0 /* o0 <- status */ - - pfx %hi(0x7e00) - movi %o1, %lo(0x7e00) - not %o1 - and %o0, %o1 /* clear IPRI */ - - pfx %hi(0x8600) - movi %o1, %lo(0x8600) - or %o0, %o1 /* IPRI=3, IE=1 */ - - wrctl %o0 /* o0 -> status */ - nop - - /* It's ok to call a C routine now since cwp >= LO_LIMIT, - * interrupt task's registers are/will be preserved, and - * underflow exceptions can be handled. - */ - pfx %hi(external_interrupt@h) - movi %o1, %lo(external_interrupt@h) - pfx %xhi(external_interrupt@h) - movhi %o1, %xlo(external_interrupt@h) - bgen %o0, 4+2 /* 16 * 4 */ - add %o0, %sp /* Ptr to regs */ - call %o1 - nop - - /* Move back to the exception register window, restore the 'out' - * registers, then return from exception. - */ - rdctl %o0 /* o0 <- status */ - subi %o0, 16 - wrctl %o0 /* cwp-- */ - nop - - mov %sp, %fp - lds %g0, [%sp,16+0] /* Restore 'global' regs*/ - lds %g1, [%sp,16+1] - lds %g2, [%sp,16+2] - lds %g3, [%sp,16+3] - lds %g4, [%sp,16+4] - lds %g5, [%sp,16+5] - lds %g6, [%sp,16+6] - lds %g7, [%sp,16+7] - - lds %i0, [%sp,16+8] /* Restore 'in' regs*/ - lds %i1, [%sp,16+9] - lds %i2, [%sp,16+10] - lds %i3, [%sp,16+11] - lds %i4, [%sp,16+12] - lds %i5, [%sp,16+13] - lds %i6, [%sp,16+14] - lds %i7, [%sp,16+15] - - lds %l0, [%sp,16+16] /* status */ - lds %l1, [%sp,16+17] /* istatus */ - lds %o7, [%sp,16+18] /* return addr */ - - pfx 1 - wrctl %l1 /* restore istatus */ - - pfx %hi((16+16+3) * 4) - addi %sp, %lo((16+16+3) * 4) - mov %fp, %sp - - tret %o7 /* Done */ - - -/************************************************************************* - * Timebase Timer Interrupt -- This has identical structure to above, - * but calls timer_interrupt(). Doing it this way keeps things similar - * to other architectures (e.g. ppc). - ************************************************************************/ - .text - .global _timebase_int - .align 4 - -_timebase_int: - - /* Allocate stack space. - */ - pfx %hi((16+16+3) * 4) - subi %fp, %lo((16+16+3) * 4) - mov %sp, %fp - - /* Save the 'global' regs & 'out' regs (our 'in' regs) - */ - rdctl %l0 /* status */ - pfx 1 /* istatus */ - rdctl %l1 - - sts [%sp,16+0], %g0 /* Save 'global' regs*/ - sts [%sp,16+1], %g1 - sts [%sp,16+2], %g2 - sts [%sp,16+3], %g3 - sts [%sp,16+4], %g4 - sts [%sp,16+5], %g5 - sts [%sp,16+6], %g6 - sts [%sp,16+7], %g7 - - sts [%sp,16+8], %i0 /* Save 'in' regs */ - sts [%sp,16+9], %i1 - sts [%sp,16+10], %i2 - sts [%sp,16+11], %i3 - sts [%sp,16+12], %i4 - sts [%sp,16+13], %i5 - sts [%sp,16+14], %i6 - sts [%sp,16+15], %i7 - - sts [%sp,16+16], %l0 /* status */ - sts [%sp,16+17], %l1 /* istatus */ - sts [%sp,16+18], %o7 /* return addr */ - - /* Move to cwp+1. - */ - restore /* cwp++ */ - rdctl %o0 /* o0 <- status */ - - pfx %hi(0x7e00) - movi %o1, %lo(0x7e00) - not %o1 - and %o0, %o1 /* clear IPRI */ - - pfx %hi(0x8600) - movi %o1, %lo(0x8600) - or %o0, %o1 /* IPRI=3, IE=1 */ - - wrctl %o0 /* o0 -> status */ - nop - - /* Call timer_interrupt() - */ - pfx %hi(timer_interrupt@h) - movi %o1, %lo(timer_interrupt@h) - pfx %xhi(timer_interrupt@h) - movhi %o1, %xlo(timer_interrupt@h) - bgen %o0, 4+2 /* 16 * 4 */ - add %o0, %sp /* Ptr to regs */ - call %o1 - nop - - /* Move back to the exception register window, restore the 'out' - * registers, then return from exception. - */ - rdctl %o0 /* o0 <- status */ - subi %o0, 16 - wrctl %o0 /* cwp-- */ - nop - - mov %sp, %fp - lds %g0, [%sp,16+0] /* Restore 'global' regs*/ - lds %g1, [%sp,16+1] - lds %g2, [%sp,16+2] - lds %g3, [%sp,16+3] - lds %g4, [%sp,16+4] - lds %g5, [%sp,16+5] - lds %g6, [%sp,16+6] - lds %g7, [%sp,16+7] - - lds %i0, [%sp,16+8] /* Restore 'in' regs*/ - lds %i1, [%sp,16+9] - lds %i2, [%sp,16+10] - lds %i3, [%sp,16+11] - lds %i4, [%sp,16+12] - lds %i5, [%sp,16+13] - lds %i6, [%sp,16+14] - lds %i7, [%sp,16+15] - - lds %l0, [%sp,16+16] /* status */ - lds %l1, [%sp,16+17] /* istatus */ - lds %o7, [%sp,16+18] /* return addr */ - - pfx 1 - wrctl %l1 /* restore istatus */ - - pfx %hi((16+16+3) * 4) - addi %sp, %lo((16+16+3) * 4) - mov %fp, %sp - - tret %o7 /* Done */ - -/************************************************************************* - * GDB stubs - ************************************************************************/ - .text - .global _brkpt_hw_int, _brkpt_sw_int - .align 4 - -_brkpt_hw_int: - movi %l1, 9 - pfx 3 - wrctl %l1 - pfx 4 - wrctl %l1 - -_brkpt_sw_int: - movi %l1, 9 - pfx 3 - wrctl %l1 - pfx 4 - wrctl %l1 - - tret %o7 diff --git a/arch/nios/include/asm/bitops.h b/arch/nios/include/asm/bitops.h deleted file mode 100644 index 0be74f42b8..0000000000 --- a/arch/nios/include/asm/bitops.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _ASM_NIOS_BITOPS_H_ -#define _ASM_NIOS_BITOPS_H_ - - -extern void set_bit(int nr, volatile void * a); -extern void clear_bit(int nr, volatile void * a); -extern int test_and_clear_bit(int nr, volatile void * a); -extern void change_bit(unsigned long nr, volatile void *addr); -extern int test_and_set_bit(int nr, volatile void * a); -extern int test_and_change_bit(int nr, volatile void * addr); -extern int test_bit(int nr, volatile void * a); -extern int ffs(int i); -#define PLATFORM_FFS - -#endif /* _ASM_NIOS_BITOPS_H */ diff --git a/arch/nios/include/asm/byteorder.h b/arch/nios/include/asm/byteorder.h deleted file mode 100644 index dc7102115f..0000000000 --- a/arch/nios/include/asm/byteorder.h +++ /dev/null @@ -1,30 +0,0 @@ -/* -* (C) Copyright 2003, Psyent Corporation <www.psyent.com> -* Scott McNutt <smcnutt@psyent.com> -* -* See file CREDITS for list of people who contributed to this -* project. -* -* This program is free software; you can redistribute it and/or -* modify it under the terms of the GNU General Public License as -* published by the Free Software Foundation; either version 2 of -* the License, or (at your option) any later version. -* -* This program is distributed in the hope that it will be useful, -* but WITHOUT ANY WARRANTY; without even the implied warranty of -* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -* GNU General Public License for more details. -* -* You should have received a copy of the GNU General Public License -* along with this program; if not, write to the Free Software -* Foundation, Inc., 59 Temple Place, Suite 330, Boston, -* MA 02111-1307 USA -*/ - -#ifndef __ASM_NIOS_BYTEORDER_H -#define __ASM_NIOS_BYTEORDER_H - -#include <asm/types.h> -#include <linux/byteorder/little_endian.h> - -#endif diff --git a/arch/nios/include/asm/cache.h b/arch/nios/include/asm/cache.h deleted file mode 100644 index 3cdb7039ff..0000000000 --- a/arch/nios/include/asm/cache.h +++ /dev/null @@ -1 +0,0 @@ -/*FIXME: Implement this! */ diff --git a/arch/nios/include/asm/config.h b/arch/nios/include/asm/config.h deleted file mode 100644 index 2efe898b35..0000000000 --- a/arch/nios/include/asm/config.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Copyright 2009 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef _ASM_CONFIG_H_ -#define _ASM_CONFIG_H_ - -/* Relocation to SDRAM works on all NIOS boards */ -#define CONFIG_RELOC_FIXUP_WORKS - -#endif diff --git a/arch/nios/include/asm/global_data.h b/arch/nios/include/asm/global_data.h deleted file mode 100644 index fa54ee4dd3..0000000000 --- a/arch/nios/include/asm/global_data.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_NIOS_GLOBALDATA_H -#define __ASM_NIOS_GLOBALDATA_H - -typedef struct global_data { - bd_t *bd; - unsigned long flags; - unsigned long baudrate; - unsigned long cpu_clk; /* CPU clock in Hz! */ - unsigned long have_console; /* serial_init() was called */ - phys_size_t ram_size; /* RAM size */ - unsigned long env_addr; /* Address of Environment struct */ - unsigned long env_valid; /* Checksum of Environment valid */ -#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) - unsigned long post_log_word; /* Record POST activities */ - unsigned long post_init_f_time; /* When post_init_f started */ -#endif - void **jt; /* Standalone app jump table */ -} gd_t; - -/* flags */ -#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ -#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ -#define GD_FLG_SILENT 0x00004 /* Silent mode */ -#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ -#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */ -#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */ -#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */ - -#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("%g7") - -#endif /* __ASM_NIOS_GLOBALDATA_H */ diff --git a/arch/nios/include/asm/io.h b/arch/nios/include/asm/io.h deleted file mode 100644 index 899682cc40..0000000000 --- a/arch/nios/include/asm/io.h +++ /dev/null @@ -1,141 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __ASM_NIOS_IO_H_ -#define __ASM_NIOS_IO_H_ - -#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) -#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) - -#define __raw_readb(a) (*(volatile unsigned char *)(a)) -#define __raw_readw(a) (*(volatile unsigned short *)(a)) -#define __raw_readl(a) (*(volatile unsigned int *)(a)) - -#define readb(addr)\ - ({unsigned char val;\ - asm volatile( " pfxio 0 \n"\ - " ld %0, [%1] \n"\ - " ext8d %0, %1 \n"\ - :"=r"(val) : "r" (addr)); val;}) - -#define readw(addr)\ - ({unsigned short val;\ - asm volatile( " pfxio 0 \n"\ - " ld %0, [%1] \n"\ - " ext16d %0, %1 \n"\ - :"=r"(val) : "r" (addr)); val;}) - -#define readl(addr)\ - ({unsigned long val;\ - asm volatile( " pfxio 0 \n"\ - " ld %0, [%1] \n"\ - :"=r"(val) : "r" (addr)); val;}) - -#define writeb(addr,val)\ - asm volatile ( " fill8 %%r0, %1 \n"\ - " st8d [%0], %%r0 \n"\ - : : "r" (addr), "r" (val) : "r0") - -#define writew(addr,val)\ - asm volatile ( " fill16 %%r0, %1 \n"\ - " st16d [%0], %%r0 \n"\ - : : "r" (addr), "r" (val) : "r0") - -#define writel(addr,val)\ - asm volatile ( " st [%0], %1 \n"\ - : : "r" (addr), "r" (val)) - -#define inb(addr) readb(addr) -#define inw(addr) readw(addr) -#define inl(addr) readl(addr) -#define outb(val,addr) writeb(addr,val) -#define outw(val,addr) writew(addr,val) -#define outl(val,addr) writel(addr,val) - -static inline void insb (unsigned long port, void *dst, unsigned long count) -{ - unsigned char *p = dst; - while (count--) *p++ = inb (port); -} -static inline void insw (unsigned long port, void *dst, unsigned long count) -{ - unsigned short *p = dst; - while (count--) *p++ = inw (port); -} -static inline void insl (unsigned long port, void *dst, unsigned long count) -{ - unsigned long *p = dst; - while (count--) *p++ = inl (port); -} - -static inline void outsb (unsigned long port, const void *src, unsigned long count) -{ - const unsigned char *p = src; - while (count--) outb (*p++, port); -} - -static inline void outsw (unsigned long port, const void *src, unsigned long count) -{ - const unsigned short *p = src; - while (count--) outw (*p++, port); -} -static inline void outsl (unsigned long port, const void *src, unsigned long count) -{ - const unsigned long *p = src; - while (count--) outl (*p++, port); -} - -static inline void sync(void) -{ -} - -/* - * Given a physical address and a length, return a virtual address - * that can be used to access the memory range with the caching - * properties specified by "flags". - */ -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) - -static inline void * -map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) -{ - return (void *)paddr; -} - -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long flags) -{ - -} - -static inline phys_addr_t virt_to_phys(void * vaddr) -{ - return (phys_addr_t)(vaddr); -} - -#endif /* __ASM_NIOS_IO_H_ */ diff --git a/arch/nios/include/asm/posix_types.h b/arch/nios/include/asm/posix_types.h deleted file mode 100644 index eb7421489f..0000000000 --- a/arch/nios/include/asm/posix_types.h +++ /dev/null @@ -1,63 +0,0 @@ -#ifndef __ASM_NIOS_POSIX_TYPES_H -#define __ASM_NIOS_POSIX_TYPES_H - -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned short __kernel_dev_t; -typedef unsigned long __kernel_ino_t; -typedef unsigned short __kernel_mode_t; -typedef unsigned short __kernel_nlink_t; -typedef long __kernel_off_t; -typedef int __kernel_pid_t; -typedef unsigned short __kernel_ipc_pid_t; -typedef unsigned short __kernel_uid_t; -typedef unsigned short __kernel_gid_t; -typedef unsigned long __kernel_size_t; -typedef int __kernel_ssize_t; -typedef int __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; -typedef int __kernel_daddr_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; -typedef unsigned int __kernel_uid32_t; -typedef unsigned int __kernel_gid32_t; - -typedef unsigned short __kernel_old_uid_t; -typedef unsigned short __kernel_old_gid_t; - -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif - -typedef struct { -#if defined(__KERNEL__) || defined(__USE_ALL) - int val[2]; -#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ - int __val[2]; -#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ -} __kernel_fsid_t; - -#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) - -#undef __FD_SET -#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d)) - -#undef __FD_CLR -#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d)) - -#undef __FD_ISSET -#define __FD_ISSET(d, set) ((set)->fds_bits[__FDELT(d)] & __FDMASK(d)) - -#undef __FD_ZERO -#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp))) - -#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ - -#endif diff --git a/arch/nios/include/asm/processor.h b/arch/nios/include/asm/processor.h deleted file mode 100644 index 78b8976ca3..0000000000 --- a/arch/nios/include/asm/processor.h +++ /dev/null @@ -1 +0,0 @@ -/* FIXME: Implement this! */ diff --git a/arch/nios/include/asm/psr.h b/arch/nios/include/asm/psr.h deleted file mode 100644 index 6e8eba8095..0000000000 --- a/arch/nios/include/asm/psr.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _NIOS_PSR_H -#define _NIOS_PSR_H - - -#endif /* _NIOS_PSR_H */ diff --git a/arch/nios/include/asm/ptrace.h b/arch/nios/include/asm/ptrace.h deleted file mode 100644 index 73754c8696..0000000000 --- a/arch/nios/include/asm/ptrace.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _NIOS_PTRACE_H -#define _NIOS_PTRACE_H - -struct pt_regs { - unsigned global[8]; - unsigned in[8]; - unsigned status; - unsigned istatus; - unsigned retaddr; -}; - - -#endif /* _NIOS_PTRACE_H */ diff --git a/arch/nios/include/asm/status_led.h b/arch/nios/include/asm/status_led.h deleted file mode 100644 index 241c917688..0000000000 --- a/arch/nios/include/asm/status_led.h +++ /dev/null @@ -1,132 +0,0 @@ -/* - * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * asm-nios/status_led.h - * - * NIOS PIO based status led support functions - */ - -#ifndef __ASM_STATUS_LED_H__ -#define __ASM_STATUS_LED_H__ - -#include <nios-io.h> - -/* led_id_t is unsigned int mask */ -typedef unsigned int led_id_t; - -#ifdef STATUS_LED_WRONLY /* emulate read access */ -static led_id_t __led_portval = 0; -#endif - -static inline void __led_init (led_id_t mask, int state) -{ - nios_pio_t *piop = (nios_pio_t*)STATUS_LED_BASE; - -#ifdef STATUS_LED_WRONLY /* emulate read access */ - -#if (STATUS_LED_ACTIVE == 0) - if (state == STATUS_LED_ON) - __led_portval &= ~mask; - else - __led_portval |= mask; -#else - if (state == STATUS_LED_ON) - __led_portval |= mask; - else - __led_portval &= ~mask; -#endif - - piop->data = __led_portval; - -#else /* !STATUS_LED_WRONLY */ - -#if (STATUS_LED_ACTIVE == 0) - if (state == STATUS_LED_ON) - piop->data &= ~mask; - else - piop->data |= mask; -#else - if (state == STATUS_LED_ON) - piop->data |= mask; - else - piop->data &= ~mask; -#endif - - piop->direction |= mask; - -#endif /* STATUS_LED_WRONLY */ -} - -static inline void __led_toggle (led_id_t mask) -{ - nios_pio_t *piop = (nios_pio_t*)STATUS_LED_BASE; - -#ifdef STATUS_LED_WRONLY /* emulate read access */ - - __led_portval ^= mask; - piop->data = __led_portval; - -#else /* !STATUS_LED_WRONLY */ - - piop->data ^= mask; - -#endif /* STATUS_LED_WRONLY */ -} - -static inline void __led_set (led_id_t mask, int state) -{ - nios_pio_t *piop = (nios_pio_t*)STATUS_LED_BASE; - -#ifdef STATUS_LED_WRONLY /* emulate read access */ - -#if (STATUS_LED_ACTIVE == 0) - if (state == STATUS_LED_ON) - __led_portval &= ~mask; - else - __led_portval |= mask; -#else - if (state == STATUS_LED_ON) - __led_portval |= mask; - else - __led_portval &= ~mask; -#endif - - piop->data = __led_portval; - -#else /* !STATUS_LED_WRONLY */ - -#if (STATUS_LED_ACTIVE == 0) - if (state == STATUS_LED_ON) - piop->data &= ~mask; - else - piop->data |= mask; -#else - if (state == STATUS_LED_ON) - piop->data |= mask; - else - piop->data &= ~mask; -#endif - -#endif /* STATUS_LED_WRONLY */ -} - -#endif /* __ASM_STATUS_LED_H__ */ diff --git a/arch/nios/include/asm/string.h b/arch/nios/include/asm/string.h deleted file mode 100644 index fa33275010..0000000000 --- a/arch/nios/include/asm/string.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef __ASM_NIOS_STRING_H -#define __ASM_NIOS_STRING_H - -#undef __HAVE_ARCH_STRRCHR -extern char * strrchr(const char * s, int c); - -#undef __HAVE_ARCH_STRCHR -extern char * strchr(const char * s, int c); - -#undef __HAVE_ARCH_MEMCPY -extern void * memcpy(void *, const void *, __kernel_size_t); - -#undef __HAVE_ARCH_MEMMOVE -extern void * memmove(void *, const void *, __kernel_size_t); - -#undef __HAVE_ARCH_MEMCHR -extern void * memchr(const void *, int, __kernel_size_t); - -#undef __HAVE_ARCH_MEMSET -extern void * memset(void *, int, __kernel_size_t); - -#undef __HAVE_ARCH_MEMZERO -extern void memzero(void *ptr, __kernel_size_t n); - -#endif diff --git a/arch/nios/include/asm/system.h b/arch/nios/include/asm/system.h deleted file mode 100644 index 9a9383d161..0000000000 --- a/arch/nios/include/asm/system.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef _ASM_NIOS_SYSTEM_H_ -#define _ASM_NIOS_SYSTEM_H_ - -#endif /* _ASM_NIOS_SYSTEM_H */ diff --git a/arch/nios/include/asm/types.h b/arch/nios/include/asm/types.h deleted file mode 100644 index 636e12fd38..0000000000 --- a/arch/nios/include/asm/types.h +++ /dev/null @@ -1,60 +0,0 @@ -#ifndef _NIOS_TYPES_H -#define _NIOS_TYPES_H - -/* - * This file is never included by application software unless - * explicitly requested (e.g., via linux/types.h) in which case the - * application is Linux specific so (user-) name space pollution is - * not a major issue. However, for interoperability, libraries still - * need to be careful to avoid a name clashes. - */ - -typedef unsigned short umode_t; - -/* - * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the - * header files exported to user space - */ - -typedef __signed__ char __s8; -typedef unsigned char __u8; - -typedef __signed__ short __s16; -typedef unsigned short __u16; - -typedef __signed__ int __s32; -typedef unsigned int __u32; - -#if defined(__GNUC__) -__extension__ typedef __signed__ long long __s64; -__extension__ typedef unsigned long long __u64; -#endif - -/* - * These aren't exported outside the kernel to avoid name space clashes - */ -#ifdef __KERNEL__ - -typedef signed char s8; -typedef unsigned char u8; - -typedef signed short s16; -typedef unsigned short u16; - -typedef signed int s32; -typedef unsigned int u32; - -typedef signed long long s64; -typedef unsigned long long u64; - -#define BITS_PER_LONG 32 - -/* Dma addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; - -typedef unsigned long phys_addr_t; -typedef unsigned long phys_size_t; -#endif /* __KERNEL__ */ - -#endif /* _NIOS_TYPES_H */ diff --git a/arch/nios/include/asm/u-boot.h b/arch/nios/include/asm/u-boot.h deleted file mode 100644 index bdb6cf21b6..0000000000 --- a/arch/nios/include/asm/u-boot.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * (C) Copyright 2003 - * Psyent Corporation - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - ******************************************************************** - * NOTE: This header file defines an interface to U-Boot. Including - * this (unmodified) header file in another file is considered normal - * use of U-Boot, and does *not* fall under the heading of "derived - * work". - ******************************************************************** - */ - -#ifndef _U_BOOT_H_ -#define _U_BOOT_H_ - -typedef struct bd_info { - unsigned long bi_memstart; /* start of DRAM memory */ - phys_size_t bi_memsize; /* size of DRAM memory in bytes */ - unsigned long bi_flashstart; /* start of FLASH memory */ - unsigned long bi_flashsize; /* size of FLASH memory */ - unsigned long bi_flashoffset; /* reserved area for startup monitor */ - unsigned long bi_sramstart; /* start of SRAM memory */ - unsigned long bi_sramsize; /* size of SRAM memory */ - unsigned long bi_ip_addr; /* IP Address */ - unsigned long bi_baudrate; /* Console Baudrate */ -} bd_t; - - -#endif /* _U_BOOT_H_ */ diff --git a/arch/nios/lib/Makefile b/arch/nios/lib/Makefile deleted file mode 100644 index f66e9893ab..0000000000 --- a/arch/nios/lib/Makefile +++ /dev/null @@ -1,50 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(ARCH).a - -SOBJS-y += - -COBJS-y += board.o -COBJS-y += bootm.o -COBJS-y += cache.o -COBJS-y += divmod.o -COBJS-y += mult.o -COBJS-y += time.o - -SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) -OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) - -$(LIB): $(obj).depend $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/arch/nios/lib/board.c b/arch/nios/lib/board.c deleted file mode 100644 index 5d2fb2ec4a..0000000000 --- a/arch/nios/lib/board.c +++ /dev/null @@ -1,168 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * (C) Copyright 2000-2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <stdio_dev.h> -#include <watchdog.h> -#include <malloc.h> -#include <net.h> -#ifdef CONFIG_STATUS_LED -#include <status_led.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -/* - * All attempts to come up with a "common" initialization sequence - * that works for all boards and architectures failed: some of the - * requirements are just _too_ different. To get rid of the resulting - * mess of board dependend #ifdef'ed code we now make the whole - * initialization sequence configurable to the user. - * - * The requirements for any new initalization function is simple: it - * receives a pointer to the "global data" structure as it's only - * argument, and returns an integer return code, where 0 means - * "continue" and != 0 means "fatal error, hang the system". - */ - - -typedef int (init_fnc_t) (void); - - -/************************************************************************ - * Initialization sequence * - ***********************************************************************/ - -init_fnc_t *init_sequence[] = { - -#if defined(CONFIG_BOARD_EARLY_INIT_F) - board_early_init_f, /* Call board-specific init code early.*/ -#endif - - env_init, - serial_init, - console_init_f, - display_options, - checkcpu, - checkboard, - NULL, /* Terminate this list */ -}; - - -/***********************************************************************/ -void board_init (void) -{ - bd_t *bd; - init_fnc_t **init_fnc_ptr; - char *s, *e; - int i; - - /* Pointer is writable since we allocated a register for it. - * Nios treats CONFIG_SYS_GBL_DATA_OFFSET as an address. - */ - gd = (gd_t *)CONFIG_SYS_GBL_DATA_OFFSET; - /* compiler optimization barrier needed for GCC >= 3.4 */ - __asm__ __volatile__("": : :"memory"); - - memset( gd, 0, CONFIG_SYS_GBL_DATA_SIZE ); - - gd->bd = (bd_t *)(gd+1); /* At end of global data */ - gd->baudrate = CONFIG_BAUDRATE; - gd->cpu_clk = CONFIG_SYS_CLK_FREQ; - - bd = gd->bd; - bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; - bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; -#if defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE) - bd->bi_sramstart= CONFIG_SYS_SRAM_BASE; - bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; -#endif - bd->bi_baudrate = CONFIG_BAUDRATE; - - for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { - WATCHDOG_RESET (); - if ((*init_fnc_ptr) () != 0) { - hang (); - } - } - - WATCHDOG_RESET (); - - /* The Malloc area is immediately below the monitor copy in RAM */ - mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN); - - WATCHDOG_RESET (); - bd->bi_flashsize = flash_init(); - - WATCHDOG_RESET (); - env_relocate(); - - bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); - - WATCHDOG_RESET (); - stdio_init(); - jumptable_init(); - console_init_r(); - /* - */ - - WATCHDOG_RESET (); - interrupt_init (); - -#ifdef CONFIG_STATUS_LED - status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING); -#endif - - /* main_loop */ - for (;;) { - WATCHDOG_RESET (); - main_loop (); - } -} - - -/***********************************************************************/ - -void hang (void) -{ -#ifdef CONFIG_STATUS_LED - status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF); - status_led_set(STATUS_LED_RED, STATUS_LED_BLINKING); -#endif - puts("### ERROR ### Please reset board ###\n"); - for (;;); -} - -unsigned long do_go_exec (ulong (*entry)(int, char *[]), int argc, char *argv[]) -{ - /* - * x86 does not use a dedicated register to pass the pointer - * to the global_data - */ - argv[-1] = (char *)gd; - return entry (argc, argv); -} diff --git a/arch/nios/lib/bootm.c b/arch/nios/lib/bootm.c deleted file mode 100644 index b0d5b82574..0000000000 --- a/arch/nios/lib/bootm.c +++ /dev/null @@ -1,34 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <command.h> - -/* FIXME: Once we find a stable version of uC-linux for nios - * we can get this working. ;-) - * - */ -int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) -{ - return 1; -} diff --git a/arch/nios/lib/cache.c b/arch/nios/lib/cache.c deleted file mode 100644 index 87dbab1734..0000000000 --- a/arch/nios/lib/cache.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> - - -void flush_cache (ulong addr, ulong size) -{ - /* Nios cache is write-thru -- nothing to do here. - */ - return; -} diff --git a/arch/nios/lib/divmod.c b/arch/nios/lib/divmod.c deleted file mode 100644 index 3c7e71e975..0000000000 --- a/arch/nios/lib/divmod.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * This file is part of GNU CC. - * - * GNU CC is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published - * by the Free Software Foundation; either version 2, or (at your - * option) any later version. - * - * GNU CC is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with GNU CC; see the file COPYING. If not, write - * to the Free Software Foundation, 59 Temple Place - Suite 330, - * Boston, MA 02111-1307, USA. - */ - - -#include "math.h" - -USItype udivmodsi4 (USItype num, USItype den, word_type modwanted) -{ - USItype bit = 1; - USItype res = 0; - - while (den < num && bit && !(den & (1L << 31))) { - den <<= 1; - bit <<= 1; - } - while (bit) { - if (num >= den) { - num -= den; - res |= bit; - } - bit >>= 1; - den >>= 1; - } - if (modwanted) - return num; - return res; -} - - -SItype __divsi3 (SItype a, SItype b) -{ - word_type neg = 0; - SItype res; - - if (a < 0) { - a = -a; - neg = !neg; - } - - if (b < 0) { - b = -b; - neg = !neg; - } - - res = udivmodsi4 (a, b, 0); - - if (neg) - res = -res; - - return res; -} - - -SItype __modsi3 (SItype a, SItype b) -{ - word_type neg = 0; - SItype res; - - if (a < 0) { - a = -a; - neg = 1; - } - - if (b < 0) - b = -b; - - res = udivmodsi4 (a, b, 1); - - if (neg) - res = -res; - - return res; -} - - -SItype __udivsi3 (SItype a, SItype b) -{ - return udivmodsi4 (a, b, 0); -} - - -SItype __umodsi3 (SItype a, SItype b) -{ - return udivmodsi4 (a, b, 1); -} diff --git a/arch/nios/lib/math.h b/arch/nios/lib/math.h deleted file mode 100644 index f0aed8edc3..0000000000 --- a/arch/nios/lib/math.h +++ /dev/null @@ -1,16 +0,0 @@ -#define BITS_PER_UNIT 8 - -typedef int HItype __attribute__ ((mode (HI))); -typedef unsigned int UHItype __attribute__ ((mode (HI))); - -typedef int SItype __attribute__ ((mode (SI))); -typedef unsigned int USItype __attribute__ ((mode (SI))); - -typedef int word_type __attribute__ ((mode (__word__))); - -struct SIstruct {HItype low, high;}; - -typedef union { - struct SIstruct s; - SItype ll; -} SIunion; diff --git a/arch/nios/lib/mult.c b/arch/nios/lib/mult.c deleted file mode 100644 index ec8139ed5a..0000000000 --- a/arch/nios/lib/mult.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * This file is part of GNU CC. - * - * GNU CC is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published - * by the Free Software Foundation; either version 2, or (at your - * option) any later version. - * - * GNU CC is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with GNU CC; see the file COPYING. If not, write - * to the Free Software Foundation, 59 Temple Place - Suite 330, - * Boston, MA 02111-1307, USA. - */ - - -#include <common.h> - -#if !defined(CONFIG_SYS_NIOS_MULT_HW) && !defined(CONFIG_SYS_NIOS_MULT_MSTEP) - -#include "math.h" - -USItype __mulsi3 (USItype a, USItype b) -{ - USItype c = 0; - - while (a != 0) { - if (a & 1) - c += b; - a >>= 1; - b <<= 1; - } - - return c; -} - - -UHItype __mulhi3 (UHItype a, UHItype b) -{ - UHItype c = 0; - - while (a != 0) { - if (a & 1) - c += b; - a >>= 1; - b <<= 1; - } - - return c; -} - -#endif /*!defined(CONFIG_SYS_NIOS_MULT_HW) && !defined(CONFIG_SYS_NIOS_MULT_MSTEP) */ diff --git a/arch/nios/lib/time.c b/arch/nios/lib/time.c deleted file mode 100644 index d5096ee129..0000000000 --- a/arch/nios/lib/time.c +++ /dev/null @@ -1,38 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <watchdog.h> - - -extern void dly_clks( unsigned long ticks ); - -void __udelay(unsigned long usec) -{ - /* The Nios core doesn't have a timebase, so we do our - * best for now and call a low-level loop that counts - * cpu clocks. - */ - unsigned long cnt = (CONFIG_SYS_CLK_FREQ/1000000) * usec; - dly_clks (cnt); -} diff --git a/board/altera/dk1c20/Makefile b/board/altera/dk1c20/Makefile deleted file mode 100644 index 60ac6e6b70..0000000000 --- a/board/altera/dk1c20/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2001-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).a - -COBJS := $(BOARD).o flash.o misc.o -SOBJS = vectors.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/altera/dk1c20/config.mk b/board/altera/dk1c20/config.mk deleted file mode 100644 index d200715f5f..0000000000 --- a/board/altera/dk1c20/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2003 -# Psyent Corporation -# Scott McNutt <smcnutt@psyent.com> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0x018c0000 - -ifeq ($(debug),1) -PLATFORM_CPPFLAGS += -DDEBUG -endif diff --git a/board/altera/dk1c20/dk1c20.c b/board/altera/dk1c20/dk1c20.c deleted file mode 100644 index 0bcaa4fd14..0000000000 --- a/board/altera/dk1c20/dk1c20.c +++ /dev/null @@ -1,93 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * CompactFlash/IDE: - * (C) Copyright 2004, Shlomo Kut <skut@vyyo.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <netdev.h> -#include <nios-io.h> -#if defined(CONFIG_SEVENSEG) -#include "../common/sevenseg.h" -#endif - -void _default_hdlr (void) -{ - printf ("default_hdlr\n"); -} - -int board_early_init_f (void) -{ -#if defined(CONFIG_SEVENSEG) - /* init seven segment led display and switch off */ - sevenseg_set(SEVENSEG_OFF); -#endif - return 0; -} - -int checkboard (void) -{ - puts ("Board: Altera Nios 1C20 Development Kit\n"); - return 0; -} - -phys_size_t initdram (int board_type) -{ - return (0); -} - -#if defined(CONFIG_CMD_IDE) -int ide_preinit (void) -{ - nios_pio_t *present = (nios_pio_t *) CONFIG_SYS_CF_PRESENT; - nios_pio_t *power = (nios_pio_t *) CONFIG_SYS_CF_POWER; - nios_pio_t *atasel = (nios_pio_t *) CONFIG_SYS_CF_ATASEL; - - /* setup data direction registers */ - present->direction = NIOS_PIO_IN; - power->direction = NIOS_PIO_OUT; - atasel->direction = NIOS_PIO_OUT; - - /* Check for presence of card */ - if (present->data) - return 1; - printf ("Ok\n"); - - /* Finish setup */ - power->data = 1; /* Turn on power FET */ - atasel->data = 0; /* Put in ATA mode */ - - return 0; -} -#endif - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_CS8900 - rc = cs8900_initialize(0, CONFIG_CS8900_BASE); -#endif - return rc; -} -#endif diff --git a/board/altera/dk1c20/flash.c b/board/altera/dk1c20/flash.c deleted file mode 100644 index 8bddd38e16..0000000000 --- a/board/altera/dk1c20/flash.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <common.h> -#include <nios.h> - -/* - * include common flash code (for altera boards) - */ -#include "../common/flash.c" - -/*----------------------------------------------------------------------*/ -#define BANKSZ CONFIG_SYS_FLASH_SIZE -#define SECTSZ (64 * 1024) -#define USERFLASH (2 * 1024 * 1024) /* bottom 2 MB for user */ - -/*----------------------------------------------------------------------*/ -unsigned long flash_init (void) -{ - int i; - unsigned long addr; - flash_info_t *fli = &flash_info[0]; - - fli->size = BANKSZ; - fli->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - fli->flash_id = FLASH_MAN_AMD + FLASH_AMDLV065D; - - addr = CONFIG_SYS_FLASH_BASE; - for (i = 0; i < fli->sector_count; ++i) { - fli->start[i] = addr; - addr += SECTSZ; - - /* Protect all but 2 MByte user area */ - if (addr < (CONFIG_SYS_FLASH_BASE + USERFLASH)) - fli->protect[i] = 0; - else - fli->protect[i] = 1; - } - - return (BANKSZ); -} diff --git a/board/altera/dk1c20/misc.c b/board/altera/dk1c20/misc.c deleted file mode 100644 index f25cdebd74..0000000000 --- a/board/altera/dk1c20/misc.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * board/altera/dk1s10/misc.c - * - * miscellaneous board interfaces / drivers - */ - -#include <common.h> - -#if defined(CONFIG_SEVENSEG) -#include "../common/sevenseg.h" -#include "../common/sevenseg.c" -#endif diff --git a/board/altera/dk1c20/u-boot.lds b/board/altera/dk1c20/u-boot.lds deleted file mode 100644 index 50c3fe75a0..0000000000 --- a/board/altera/dk1c20/u-boot.lds +++ /dev/null @@ -1,70 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -OUTPUT_FORMAT("elf32-nios") -OUTPUT_ARCH(nios) -ENTRY(_start) - -SECTIONS -{ - .text : - { - arch/nios/cpu/start.o (.text) - *(.text) - } - __text_end = .; - - . = ALIGN(4); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - __rodata_end = .; - - . = ALIGN(4); - .data : - { - *(.data) - } - . = ALIGN(4); - __data_end = .; - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : - { - *(.u_boot_cmd) - } - . = ALIGN(4); - __u_boot_cmd_end = .; - - __bss_start = .; - . = ALIGN(4); - .bss (NOLOAD) : - { - *(.bss) - } - . = ALIGN(4); - __bss_end = .; -} diff --git a/board/altera/dk1c20/vectors.S b/board/altera/dk1c20/vectors.S deleted file mode 100644 index c83c0e70e1..0000000000 --- a/board/altera/dk1c20/vectors.S +++ /dev/null @@ -1,123 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -/************************************************************************* - * Exception Vector Table - * - * This could have gone in the cpu soure tree, but the whole point of - * Nios is customization -- and polluting the cpu source tree with - * board-specific ifdef's really defeats the purpose, no? With this in - * the board-specific tree, each board has the freedom to organize - * vectors/traps, etc anyway it wants. The init code copies this table - * to the proper location. - * - * Each board can do what it likes here. But there are four "standard" - * handlers availble: - * - * _cwp_lolimit -Handles register window underflows. - * _cwp_hilimit -Handles register window overflows. - * _timebase_int -Increments the timebase. - * _brkpt_hw_int -Hardware breakpoint handler. - * _brkpt_sw_int -Software breakpoint handler. - * _def_xhandler -Default exception handler. - * - * _timebase_int handles a Nios Timer interrupt and increments the - * timestamp used for the get_timer(), reset_timer(), etc. routines. It - * expects the timer to be configured like the standard-32 low priority - * timer. - * - * _def_xhandler dispatches exceptions/traps via the external_interrupt() - * routine. This lets you use the irq_install_handler() and handle your - * interrupts/traps with code written in C. - ************************************************************************/ - - .data - .global _vectors - .align 4 -_vectors: - - .long _def_xhandler@h /* Vector 0 - NMI */ - .long _cwp_lolimit@h /* Vector 1 - underflow */ - .long _cwp_hilimit@h /* Vector 2 - overflow */ - .long _brkpt_hw_int@h /* Vector 3 - Breakpoint */ - .long _brkpt_sw_int@h /* Vector 4 - Single step*/ - .long _def_xhandler@h /* Vector 5 - GNUPro debug */ - .long _def_xhandler@h /* Vector 6 - future reserved */ - .long _def_xhandler@h /* Vector 7 - future reserved */ - .long _def_xhandler@h /* Vector 8 - future reserved */ - .long _def_xhandler@h /* Vector 9 - future reserved */ - .long _def_xhandler@h /* Vector 10 - future reserved */ - .long _def_xhandler@h /* Vector 11 - future reserved */ - .long _def_xhandler@h /* Vector 12 - future reserved */ - .long _def_xhandler@h /* Vector 13 - future reserved */ - .long _def_xhandler@h /* Vector 14 - future reserved */ - .long _def_xhandler@h /* Vector 15 - future reserved */ - .long _def_xhandler@h /* Vector 16 */ - .long _def_xhandler@h /* Vector 17 */ - .long _def_xhandler@h /* Vector 18 */ - .long _def_xhandler@h /* Vector 19 */ - .long _def_xhandler@h /* Vector 20 */ - .long _def_xhandler@h /* Vector 21 */ - .long _def_xhandler@h /* Vector 22 */ - .long _def_xhandler@h /* Vector 23 */ - .long _def_xhandler@h /* Vector 24 */ - .long _def_xhandler@h /* Vector 25 */ - .long _def_xhandler@h /* Vector 26 */ - .long _def_xhandler@h /* Vector 27 */ - .long _def_xhandler@h /* Vector 28 */ - .long _def_xhandler@h /* Vector 29 */ - .long _def_xhandler@h /* Vector 30 */ - .long _def_xhandler@h /* Vector 31 */ - .long _def_xhandler@h /* Vector 32 */ - .long _def_xhandler@h /* Vector 33 */ - .long _def_xhandler@h /* Vector 34 */ - .long _def_xhandler@h /* Vector 35 */ - .long _def_xhandler@h /* Vector 36 */ - .long _def_xhandler@h /* Vector 37 */ - .long _def_xhandler@h /* Vector 38 */ - .long _def_xhandler@h /* Vector 39 */ - .long _def_xhandler@h /* Vector 40 */ - .long _def_xhandler@h /* Vector 41 */ - .long _def_xhandler@h /* Vector 42 */ - .long _def_xhandler@h /* Vector 43 */ - .long _def_xhandler@h /* Vector 44 */ - .long _def_xhandler@h /* Vector 45 */ - .long _def_xhandler@h /* Vector 46 */ - .long _def_xhandler@h /* Vector 47 */ - .long _def_xhandler@h /* Vector 48 */ - .long _def_xhandler@h /* Vector 49 */ - .long _timebase_int@h /* Vector 50 - lopri timer*/ - .long _def_xhandler@h /* Vector 51 */ - .long _def_xhandler@h /* Vector 52 */ - .long _def_xhandler@h /* Vector 53 */ - .long _def_xhandler@h /* Vector 54 */ - .long _def_xhandler@h /* Vector 55 */ - .long _def_xhandler@h /* Vector 56 */ - .long _def_xhandler@h /* Vector 57 */ - .long _def_xhandler@h /* Vector 58 */ - .long _def_xhandler@h /* Vector 59 */ - .long _def_xhandler@h /* Vector 60 */ - .long _def_xhandler@h /* Vector 61 */ - .long _def_xhandler@h /* Vector 62 */ - .long _def_xhandler@h /* Vector 63 */ diff --git a/board/altera/dk1s10/Makefile b/board/altera/dk1s10/Makefile deleted file mode 100644 index 60ac6e6b70..0000000000 --- a/board/altera/dk1s10/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2001-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).a - -COBJS := $(BOARD).o flash.o misc.o -SOBJS = vectors.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/altera/dk1s10/config.mk b/board/altera/dk1s10/config.mk deleted file mode 100644 index d200715f5f..0000000000 --- a/board/altera/dk1s10/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2003 -# Psyent Corporation -# Scott McNutt <smcnutt@psyent.com> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0x018c0000 - -ifeq ($(debug),1) -PLATFORM_CPPFLAGS += -DDEBUG -endif diff --git a/board/altera/dk1s10/dk1s10.c b/board/altera/dk1s10/dk1s10.c deleted file mode 100644 index fb96501da2..0000000000 --- a/board/altera/dk1s10/dk1s10.c +++ /dev/null @@ -1,72 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <netdev.h> -#if defined(CONFIG_SEVENSEG) -#include "../common/sevenseg.h" -#endif - -void _default_hdlr (void) -{ - printf ("default_hdlr\n"); -} - -int board_early_init_f (void) -{ -#if defined(CONFIG_SEVENSEG) - /* init seven segment led display and switch off */ - sevenseg_set(SEVENSEG_OFF); -#endif - return 0; -} - -int checkboard (void) -{ - puts ("Board: Altera Nios 1S10 Development Kit\n"); -#if defined(CONFIG_NIOS_SAFE_32) - puts ("Conf.: Altera Safe 32 (safe_32)\n"); -#elif defined(CONFIG_NIOS_STANDARD_32) - puts ("Conf.: Altera Standard 32 (standard_32)\n"); -#elif defined(CONFIG_NIOS_MTX_LDK_20) - puts ("Conf.: Microtronix LDK 2.0 (LDK2)\n"); -#endif - - return 0; -} - -phys_size_t initdram (int board_type) -{ - return (0); -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_CS8900 - rc = cs8900_initialize(0, CONFIG_CS8900_BASE); -#endif - return rc; -} -#endif diff --git a/board/altera/dk1s10/flash.c b/board/altera/dk1s10/flash.c deleted file mode 100644 index d1f2db13b0..0000000000 --- a/board/altera/dk1s10/flash.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <common.h> -#include <nios.h> - -/* - * include common flash code (for altera boards) - */ -#include "../common/flash.c" - -/*---------------------------------------------------------------------*/ -#define BANKSZ (8 * 1024 * 1024) -#define SECTSZ (64 * 1024) -#define USERFLASH (2 * 1024 * 1024) /* bottom 2 MB for user */ - -/*---------------------------------------------------------------------*/ -unsigned long flash_init (void) -{ - int i; - unsigned long addr; - flash_info_t *fli = &flash_info[0]; - - fli->size = BANKSZ; - fli->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - fli->flash_id = FLASH_MAN_AMD + FLASH_AMDLV065D; - - addr = CONFIG_SYS_FLASH_BASE; - for (i = 0; i < fli->sector_count; ++i) { - fli->start[i] = addr; - addr += SECTSZ; - - /* Protect all but 2 MByte user area */ - if (addr < (CONFIG_SYS_FLASH_BASE + USERFLASH)) - fli->protect[i] = 0; - else - fli->protect[i] = 1; - } - - return (BANKSZ); -} diff --git a/board/altera/dk1s10/misc.c b/board/altera/dk1s10/misc.c deleted file mode 100644 index f25cdebd74..0000000000 --- a/board/altera/dk1s10/misc.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * board/altera/dk1s10/misc.c - * - * miscellaneous board interfaces / drivers - */ - -#include <common.h> - -#if defined(CONFIG_SEVENSEG) -#include "../common/sevenseg.h" -#include "../common/sevenseg.c" -#endif diff --git a/board/altera/dk1s10/u-boot.lds b/board/altera/dk1s10/u-boot.lds deleted file mode 100644 index 50c3fe75a0..0000000000 --- a/board/altera/dk1s10/u-boot.lds +++ /dev/null @@ -1,70 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -OUTPUT_FORMAT("elf32-nios") -OUTPUT_ARCH(nios) -ENTRY(_start) - -SECTIONS -{ - .text : - { - arch/nios/cpu/start.o (.text) - *(.text) - } - __text_end = .; - - . = ALIGN(4); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - __rodata_end = .; - - . = ALIGN(4); - .data : - { - *(.data) - } - . = ALIGN(4); - __data_end = .; - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : - { - *(.u_boot_cmd) - } - . = ALIGN(4); - __u_boot_cmd_end = .; - - __bss_start = .; - . = ALIGN(4); - .bss (NOLOAD) : - { - *(.bss) - } - . = ALIGN(4); - __bss_end = .; -} diff --git a/board/altera/dk1s10/vectors.S b/board/altera/dk1s10/vectors.S deleted file mode 100644 index 226f65bb53..0000000000 --- a/board/altera/dk1s10/vectors.S +++ /dev/null @@ -1,139 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> - - -/************************************************************************* - * Exception Vector Table - * - * This could have gone in the cpu soure tree, but the whole point of - * Nios is customization -- and polluting the cpu source tree with - * board-specific ifdef's really defeats the purpose, no? With this in - * the board-specific tree, each board has the freedom to organize - * vectors/traps, etc anyway it wants. The init code copies this table - * to the proper location. - * - * Each board can do what it likes here. But there are four "standard" - * handlers availble: - * - * _cwp_lolimit -Handles register window underflows. - * _cwp_hilimit -Handles register window overflows. - * _timebase_int -Increments the timebase. - * _def_xhandler -Default exception handler. - * - * _timebase_int handles a Nios Timer interrupt and increments the - * timestamp used for the get_timer(), reset_timer(), etc. routines. It - * expects the timer to be configured like the standard-32 low priority - * timer. - * - * _def_xhandler dispatches exceptions/traps via the external_interrupt() - * routine. This lets you use the irq_install_handler() and handle your - * interrupts/traps with code written in C. - ************************************************************************/ - - .data - .global _vectors - .align 4 -_vectors: - -#if defined(CONFIG_SYS_NIOS_CPU_OCI_BASE) - /* OCI does the reset job */ - .long _def_xhandler@h /* Vector 0 - NMI / Reset */ -#else - /* there is no OCI, so we have to do a direct reset jump here */ - .long CONFIG_SYS_NIOS_CPU_RST_VECT /* Vector 0 - Reset to GERMS */ -#endif - .long _cwp_lolimit@h /* Vector 1 - underflow */ - .long _cwp_hilimit@h /* Vector 2 - overflow */ - - .long _def_xhandler@h /* Vector 3 - GNUPro debug */ - .long _def_xhandler@h /* Vector 4 - GNUPro debug */ - .long _def_xhandler@h /* Vector 5 - GNUPro debug */ - .long _def_xhandler@h /* Vector 6 - future reserved */ - .long _def_xhandler@h /* Vector 7 - future reserved */ - .long _def_xhandler@h /* Vector 8 - future reserved */ - .long _def_xhandler@h /* Vector 9 - future reserved */ - .long _def_xhandler@h /* Vector 10 - future reserved */ - .long _def_xhandler@h /* Vector 11 - future reserved */ - .long _def_xhandler@h /* Vector 12 - future reserved */ - .long _def_xhandler@h /* Vector 13 - future reserved */ - .long _def_xhandler@h /* Vector 14 - future reserved */ - .long _def_xhandler@h /* Vector 15 - future reserved */ -#if (CONFIG_SYS_NIOS_TMRIRQ == 16) - .long _timebase_int@h /* Vector 16 - lopri timer*/ -#else - .long _def_xhandler@h /* Vector 16 */ -#endif - .long _def_xhandler@h /* Vector 17 */ - .long _def_xhandler@h /* Vector 18 */ - .long _def_xhandler@h /* Vector 19 */ - .long _def_xhandler@h /* Vector 20 */ - .long _def_xhandler@h /* Vector 21 */ - .long _def_xhandler@h /* Vector 22 */ - .long _def_xhandler@h /* Vector 23 */ - .long _def_xhandler@h /* Vector 24 */ - .long _def_xhandler@h /* Vector 25 */ - .long _def_xhandler@h /* Vector 26 */ - .long _def_xhandler@h /* Vector 27 */ - .long _def_xhandler@h /* Vector 28 */ - .long _def_xhandler@h /* Vector 29 */ - .long _def_xhandler@h /* Vector 30 */ - .long _def_xhandler@h /* Vector 31 */ - .long _def_xhandler@h /* Vector 32 */ - .long _def_xhandler@h /* Vector 33 */ - .long _def_xhandler@h /* Vector 34 */ - .long _def_xhandler@h /* Vector 35 */ - .long _def_xhandler@h /* Vector 36 */ - .long _def_xhandler@h /* Vector 37 */ - .long _def_xhandler@h /* Vector 38 */ - .long _def_xhandler@h /* Vector 39 */ - .long _def_xhandler@h /* Vector 40 */ - .long _def_xhandler@h /* Vector 41 */ - .long _def_xhandler@h /* Vector 42 */ - .long _def_xhandler@h /* Vector 43 */ - .long _def_xhandler@h /* Vector 44 */ - .long _def_xhandler@h /* Vector 45 */ - .long _def_xhandler@h /* Vector 46 */ - .long _def_xhandler@h /* Vector 47 */ - .long _def_xhandler@h /* Vector 48 */ - .long _def_xhandler@h /* Vector 49 */ -#if (CONFIG_SYS_NIOS_TMRIRQ == 50) - .long _timebase_int@h /* Vector 50 - lopri timer*/ -#else - .long _def_xhandler@h /* Vector 50 */ -#endif - .long _def_xhandler@h /* Vector 51 */ - .long _def_xhandler@h /* Vector 52 */ - .long _def_xhandler@h /* Vector 53 */ - .long _def_xhandler@h /* Vector 54 */ - .long _def_xhandler@h /* Vector 55 */ - .long _def_xhandler@h /* Vector 56 */ - .long _def_xhandler@h /* Vector 57 */ - .long _def_xhandler@h /* Vector 58 */ - .long _def_xhandler@h /* Vector 59 */ - .long _def_xhandler@h /* Vector 60 */ - .long _def_xhandler@h /* Vector 61 */ - .long _def_xhandler@h /* Vector 62 */ - .long _def_xhandler@h /* Vector 63 */ diff --git a/board/ssv/adnpesc1/Makefile b/board/ssv/adnpesc1/Makefile deleted file mode 100644 index 40f04b81f0..0000000000 --- a/board/ssv/adnpesc1/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2001-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).a - -COBJS := $(BOARD).o flash.o misc.o -SOBJS := vectors.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/ssv/adnpesc1/adnpesc1.c b/board/ssv/adnpesc1/adnpesc1.c deleted file mode 100644 index 802bfba1ab..0000000000 --- a/board/ssv/adnpesc1/adnpesc1.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <netdev.h> -#include <nios-io.h> -#include <spi.h> - -#if defined(CONFIG_HW_WATCHDOG) -extern void ssv_wd_pio_init(void); /* comes from ../common/wd_pio.c - included by ./misc.c */ -#endif - -void _default_hdlr (void) -{ - printf ("default_hdlr\n"); -} - -int board_early_init_f (void) -{ -#if defined(CONFIG_HW_WATCHDOG) - ssv_wd_pio_init(); -#endif - return 0; -} - -int checkboard (void) -{ - puts ( "Board: SSV DilNetPC ADNP/ESC1" -#if defined(CONFIG_DNPEVA2) - " on DNP/EVA2" -#endif - "\n"); -#if defined(CONFIG_NIOS_BASE_32) - puts ("Conf.: SSV Base 32 (nios_32)\n"); -#endif - - return 0; -} - -phys_size_t initdram (int board_type) -{ - return (0); -} - -/* - * The following are used to control the SPI chip selects for the SPI command. - */ -#if defined(CONFIG_CMD_SPI) && CONFIG_NIOS_SPI - -#define SPI_RTC_CS_MASK 0x00000001 - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - return bus == 0 && cs == 0; -} - -void spi_cs_activate(struct spi_slave *slave) -{ - nios_spi_t *spi = (nios_spi_t *)CONFIG_SYS_NIOS_SPIBASE; - - spi->slaveselect = SPI_RTC_CS_MASK; /* activate (1) */ -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - nios_spi_t *spi = (nios_spi_t *)CONFIG_SYS_NIOS_SPIBASE; - - spi->slaveselect = 0; /* deactivate (0) */ -} - -#endif - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_CS8900 - rc = cs8900_initialize(0, CONFIG_CS8900_BASE); -#endif - return rc; -} -#endif diff --git a/board/ssv/adnpesc1/config.mk b/board/ssv/adnpesc1/config.mk deleted file mode 100644 index cf05445722..0000000000 --- a/board/ssv/adnpesc1/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2004 -# Li-Pro.Net <www.li-pro.net> -# Stephan Linz <linz@li-pro.net> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -TEXT_BASE = 0x02fc0000 # ATTENTION: notice your CONFIG_SYS_MONITOR_LEN setting - -ifeq ($(debug),1) -PLATFORM_CPPFLAGS += -DDEBUG -endif diff --git a/board/ssv/adnpesc1/flash.c b/board/ssv/adnpesc1/flash.c deleted file mode 100644 index 882630c582..0000000000 --- a/board/ssv/adnpesc1/flash.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <common.h> -#include <nios.h> - -/* - * include common flash code (for ssv boards) - */ -#include "../common/flash.c" - -/*---------------------------------------------------------------------*/ -#define BANKSZ (8 * 1024 * 1024) -#define SECTSZ (64 * 1024) -#define UBOOTSECS ((CONFIG_SYS_MONITOR_LEN + CONFIG_ENV_SIZE) / SECTSZ) -#define UBOOTAREA (UBOOTSECS * 64 * 1024) /* monitor / env area */ - -/*---------------------------------------------------------------------*/ -unsigned long flash_init (void) -{ - int i; - unsigned long addr; - flash_info_t *fli = &flash_info[0]; - - fli->size = BANKSZ; - fli->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - fli->flash_id = FLASH_MAN_AMD + FLASH_AMLV640U; - - addr = CONFIG_SYS_FLASH_BASE; - for (i = 0; i < fli->sector_count; ++i) { - fli->start[i] = addr; - addr += SECTSZ; - - /* Protect monitor / environment area */ - if (addr <= (CONFIG_SYS_FLASH_BASE + UBOOTAREA)) - fli->protect[i] = 1; - else - fli->protect[i] = 0; - } - - return (BANKSZ); -} diff --git a/board/ssv/adnpesc1/misc.c b/board/ssv/adnpesc1/misc.c deleted file mode 100644 index 1c5fcb9fca..0000000000 --- a/board/ssv/adnpesc1/misc.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * board/ssv/adnpesc1/misc.c - * - * miscellaneous board interfaces / drivers - */ - -#include <common.h> - -#if defined(CONFIG_STATUS_LED) -#include "../common/cmd_sled.c" -#endif - -#if defined(CONFIG_HW_WATCHDOG) -#include "../common/wd_pio.c" -#endif - -#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) -#include "../common/post.c" -#endif diff --git a/board/ssv/adnpesc1/u-boot.lds b/board/ssv/adnpesc1/u-boot.lds deleted file mode 100644 index 50c3fe75a0..0000000000 --- a/board/ssv/adnpesc1/u-boot.lds +++ /dev/null @@ -1,70 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -OUTPUT_FORMAT("elf32-nios") -OUTPUT_ARCH(nios) -ENTRY(_start) - -SECTIONS -{ - .text : - { - arch/nios/cpu/start.o (.text) - *(.text) - } - __text_end = .; - - . = ALIGN(4); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - __rodata_end = .; - - . = ALIGN(4); - .data : - { - *(.data) - } - . = ALIGN(4); - __data_end = .; - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : - { - *(.u_boot_cmd) - } - . = ALIGN(4); - __u_boot_cmd_end = .; - - __bss_start = .; - . = ALIGN(4); - .bss (NOLOAD) : - { - *(.bss) - } - . = ALIGN(4); - __bss_end = .; -} diff --git a/board/ssv/adnpesc1/vectors.S b/board/ssv/adnpesc1/vectors.S deleted file mode 100644 index 8b2da2fed3..0000000000 --- a/board/ssv/adnpesc1/vectors.S +++ /dev/null @@ -1,138 +0,0 @@ -/* - * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> - - -/************************************************************************* - * Exception Vector Table - * - * This could have gone in the cpu soure tree, but the whole point of - * Nios is customization -- and polluting the cpu source tree with - * board-specific ifdef's really defeats the purpose, no? With this in - * the board-specific tree, each board has the freedom to organize - * vectors/traps, etc anyway it wants. The init code copies this table - * to the proper location. - * - * Each board can do what it likes here. But there are four "standard" - * handlers availble: - * - * _cwp_lolimit -Handles register window underflows. - * _cwp_hilimit -Handles register window overflows. - * _timebase_int -Increments the timebase. - * _def_xhandler -Default exception handler. - * - * _timebase_int handles a Nios Timer interrupt and increments the - * timestamp used for the get_timer(), reset_timer(), etc. routines. It - * expects the timer to be configured like the standard-32 low priority - * timer. - * - * _def_xhandler dispatches exceptions/traps via the external_interrupt() - * routine. This lets you use the irq_install_handler() and handle your - * interrupts/traps with code written in C. - ************************************************************************/ - - .data - .global _vectors - .align 4 -_vectors: - -#if defined(CONFIG_SYS_NIOS_CPU_OCI_BASE) - /* OCI does the reset job */ - .long _def_xhandler@h /* Vector 0 - NMI / Reset */ -#else - /* there is no OCI, so we have to do a direct reset jump here */ - .long CONFIG_SYS_NIOS_CPU_RST_VECT /* Vector 0 - Reset to GERMS */ -#endif - .long _cwp_lolimit@h /* Vector 1 - underflow */ - .long _cwp_hilimit@h /* Vector 2 - overflow */ - - .long _def_xhandler@h /* Vector 3 - GNUPro debug */ - .long _def_xhandler@h /* Vector 4 - GNUPro debug */ - .long _def_xhandler@h /* Vector 5 - GNUPro debug */ - .long _def_xhandler@h /* Vector 6 - future reserved */ - .long _def_xhandler@h /* Vector 7 - future reserved */ - .long _def_xhandler@h /* Vector 8 - future reserved */ - .long _def_xhandler@h /* Vector 9 - future reserved */ - .long _def_xhandler@h /* Vector 10 - future reserved */ - .long _def_xhandler@h /* Vector 11 - future reserved */ - .long _def_xhandler@h /* Vector 12 - future reserved */ - .long _def_xhandler@h /* Vector 13 - future reserved */ - .long _def_xhandler@h /* Vector 14 - future reserved */ - .long _def_xhandler@h /* Vector 15 - future reserved */ -#if (CONFIG_SYS_NIOS_TMRIRQ == 16) - .long _timebase_int@h /* Vector 16 - lopri timer*/ -#else - .long _def_xhandler@h /* Vector 16 */ -#endif - .long _def_xhandler@h /* Vector 17 */ - .long _def_xhandler@h /* Vector 18 */ - .long _def_xhandler@h /* Vector 19 */ - .long _def_xhandler@h /* Vector 20 */ - .long _def_xhandler@h /* Vector 21 */ - .long _def_xhandler@h /* Vector 22 */ - .long _def_xhandler@h /* Vector 23 */ - .long _def_xhandler@h /* Vector 24 */ - .long _def_xhandler@h /* Vector 25 */ - .long _def_xhandler@h /* Vector 26 */ - .long _def_xhandler@h /* Vector 27 */ - .long _def_xhandler@h /* Vector 28 */ - .long _def_xhandler@h /* Vector 29 */ - .long _def_xhandler@h /* Vector 30 */ - .long _def_xhandler@h /* Vector 31 */ - .long _def_xhandler@h /* Vector 32 */ - .long _def_xhandler@h /* Vector 33 */ - .long _def_xhandler@h /* Vector 34 */ - .long _def_xhandler@h /* Vector 35 */ - .long _def_xhandler@h /* Vector 36 */ - .long _def_xhandler@h /* Vector 37 */ - .long _def_xhandler@h /* Vector 38 */ - .long _def_xhandler@h /* Vector 39 */ - .long _def_xhandler@h /* Vector 40 */ - .long _def_xhandler@h /* Vector 41 */ - .long _def_xhandler@h /* Vector 42 */ - .long _def_xhandler@h /* Vector 43 */ - .long _def_xhandler@h /* Vector 44 */ - .long _def_xhandler@h /* Vector 45 */ - .long _def_xhandler@h /* Vector 46 */ - .long _def_xhandler@h /* Vector 47 */ - .long _def_xhandler@h /* Vector 48 */ - .long _def_xhandler@h /* Vector 49 */ -#if (CONFIG_SYS_NIOS_TMRIRQ == 50) - .long _timebase_int@h /* Vector 50 - lopri timer*/ -#else - .long _def_xhandler@h /* Vector 50 */ -#endif - .long _def_xhandler@h /* Vector 51 */ - .long _def_xhandler@h /* Vector 52 */ - .long _def_xhandler@h /* Vector 53 */ - .long _def_xhandler@h /* Vector 54 */ - .long _def_xhandler@h /* Vector 55 */ - .long _def_xhandler@h /* Vector 56 */ - .long _def_xhandler@h /* Vector 57 */ - .long _def_xhandler@h /* Vector 58 */ - .long _def_xhandler@h /* Vector 59 */ - .long _def_xhandler@h /* Vector 60 */ - .long _def_xhandler@h /* Vector 61 */ - .long _def_xhandler@h /* Vector 62 */ - .long _def_xhandler@h /* Vector 63 */ diff --git a/board/ssv/common/cmd_sled.c b/board/ssv/common/cmd_sled.c deleted file mode 100644 index 449c1a4994..0000000000 --- a/board/ssv/common/cmd_sled.c +++ /dev/null @@ -1,162 +0,0 @@ -/* - * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <command.h> -#include <status_led.h> - -#if defined(CONFIG_STATUS_LED) - -/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * !!!!! Q u i c k & D i r t y H a c k !!!!! - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * !!!!! !!!!! - * !!!!! Next type definition was coming from original !!!!! - * !!!!! status LED driver drivers/misc/status_led.c !!!!! - * !!!!! and should be exported for using it here. !!!!! - * !!!!! !!!!! - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */ - -typedef struct { - led_id_t mask; - int state; - int period; - int cnt; -} led_dev_t; - -extern led_dev_t led_dev[]; - -#if defined(CONFIG_CMD_BSP) -int do_sled (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -{ - int led_id = 0; - - if (argc > 1) { -#ifdef STATUS_LED_BOOT - if (!strcmp (argv[1], "boot")) { - led_id = STATUS_LED_BOOT + 1; - } -#endif -#ifdef STATUS_LED_RED - if (!strcmp (argv[1], "red")) { - led_id = STATUS_LED_RED + 1; - } -#endif -#ifdef STATUS_LED_YELLOW - if (!strcmp (argv[1], "yellow")) { - led_id = STATUS_LED_YELLOW + 1; - } -#endif -#ifdef STATUS_LED_GREEN - if (!strcmp (argv[1], "green")) { - led_id = STATUS_LED_GREEN + 1; - } -#endif - } - - switch (argc) { - case 1: -#if (STATUS_LED_BITS > 3) - for (; led_id < 4; led_id++) -#elif (STATUS_LED_BITS > 2) - for (; led_id < 3; led_id++) -#elif (STATUS_LED_BITS > 1) - for (; led_id < 2; led_id++) -#elif (STATUS_LED_BITS > 0) - for (; led_id < 1; led_id++) -#else -#error "*** STATUS_LED_BITS not correct defined ***" -#endif - { - printf ("Status LED '%s' is %s\n", - led_id == STATUS_LED_BOOT ? "boot" - : led_id == STATUS_LED_RED ? "red" - : led_id == STATUS_LED_YELLOW ? "yellow" - : led_id == - STATUS_LED_GREEN ? "green" : "unknown", - led_dev[led_id].state == - STATUS_LED_ON ? "on" : led_dev[led_id]. - state == - STATUS_LED_OFF ? "off" : led_dev[led_id]. - state == - STATUS_LED_BLINKING ? "blinking" : "unknown"); - } - return 0; - case 2: - if (led_id) { - printf ("Status LED '%s' is %s\n", argv[1], - led_dev[led_id - 1].state == - STATUS_LED_ON ? "on" : led_dev[led_id - - 1].state == - STATUS_LED_OFF ? "off" : led_dev[led_id - - 1].state == - STATUS_LED_BLINKING ? "blinking" : "unknown"); - return 0; - } else - break; - case 3: - if (led_id) { - if (!strcmp (argv[2], "on")) { - status_led_set (led_id - 1, STATUS_LED_ON); - return 0; - } else if (!strcmp (argv[2], "off")) { - status_led_set (led_id - 1, STATUS_LED_OFF); - return 0; - } else if (!strcmp (argv[2], "blink")) { - status_led_set (led_id - 1, - STATUS_LED_BLINKING); - return 0; - } else - break; - } else - break; - default: - break; - } - cmd_usage(cmdtp); - return 1; -} - -#ifdef STATUS_LED_BOOT -#ifdef STATUS_LED_RED -#ifdef STATUS_LED_YELLOW -#ifdef STATUS_LED_GREEN -#define __NAME_STR " - name: boot|red|yellow|green\n" -#else -#define __NAME_STR " - name: boot|red|yellow\n" -#endif -#else -#define __NAME_STR " - name: boot|red\n" -#endif -#else -#define __NAME_STR " - name: boot\n" -#endif -#else -#define __NAME_STR " - name: (no such defined)\n" -#endif - -U_BOOT_CMD (sled, 3, 0, do_sled, - "check and set status led", - "sled [name [state]]\n" __NAME_STR " - state: on|off|blink"); -#endif -#endif /* CONFIG_STATUS_LED */ diff --git a/board/ssv/common/flash.c b/board/ssv/common/flash.c deleted file mode 100644 index 70bf9d678a..0000000000 --- a/board/ssv/common/flash.c +++ /dev/null @@ -1,207 +0,0 @@ -/* - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <common.h> -#include <watchdog.h> -#include <nios.h> - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; - -/*--------------------------------------------------------------------*/ -void flash_print_info (flash_info_t * info) -{ - int i, k; - unsigned long size; - int erased; - volatile unsigned char *flash; - - printf (" Size: %ld KB in %d Sectors\n", - info->size >> 10, info->sector_count); - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; ++i) { - - /* Check if whole sector is erased */ - if (i != (info->sector_count - 1)) - size = info->start[i + 1] - info->start[i]; - else - size = info->start[0] + info->size - info->start[i]; - erased = 1; - flash = (volatile unsigned char *) info->start[i]; - for (k = 0; k < size; k++) { - if (*flash++ != 0xff) { - erased = 0; - break; - } - } - - /* Print the info */ - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s%s", info->start[i], erased ? " E" : " ", - info->protect[i] ? "RO " : " "); - } - printf ("\n"); -} - -/*-------------------------------------------------------------------*/ - - -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]); - volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2; - int prot, sect, wait; - unsigned oldpri; - ulong start; - - /* Some sanity checking */ - if ((s_first < 0) || (s_first > s_last)) { - printf ("- no sectors to erase\n"); - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - -#ifdef DEBUG - for (sect = s_first; sect <= s_last; sect++) { - printf("- Erase: Sect: %i @ 0x%08x\n", sect, info->start[sect]); - } -#endif - - /* NOTE: disabling interrupts on Nios can be very bad since it - * also disables the LO_LIMIT exception. It's better here to - * set the interrupt priority to 3 & restore it when we're done. - */ - oldpri = ipri (3); - - /* It's ok to erase multiple sectors provided we don't delay more - * than 50 usec between cmds ... at which point the erase time-out - * occurs. So don't go and put printf() calls in the loop ... it - * won't be very helpful ;-) - */ - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]); - *addr = 0xf0; - *(addr+0xAAA/2) = 0xaa; - *(addr+0x554/2) = 0x55; - *(addr+0xAAA/2) = 0x80; - *(addr+0xAAA/2) = 0xaa; - *(addr+0x554/2) = 0x55; - *addr2 = 0x30; - /* Now just wait for 0xffff & provide some user - * feedback while we wait. Here we have to grant - * timer interrupts. Otherwise get_timer() can't - * work right. */ - ipri(oldpri); - start = get_timer (0); - while (*addr2 != 0xffff) { - for (wait = 8; wait; wait--) { - udelay (125 * 1000); - } - putc ('.'); - if (get_timer (start) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("timeout\n"); - return 1; - } - } - oldpri = ipri (3); /* disallow non important irqs again */ - } - } - - printf ("\n"); - *addr = 0xf0; - - /* Restore interrupt priority */ - ipri (oldpri); - - return 0; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ - -int write_buff (flash_info_t * info, uchar * srcbuffer, ulong addr, ulong cnt) -{ - - volatile CONFIG_SYS_FLASH_WORD_SIZE *cmd = (vu_short *) info->start[0]; - volatile CONFIG_SYS_FLASH_WORD_SIZE *dst = (vu_short *) addr; - CONFIG_SYS_FLASH_WORD_SIZE *src = (void *) srcbuffer; - CONFIG_SYS_FLASH_WORD_SIZE b; - unsigned oldpri; - ulong start; - - cnt /= sizeof(CONFIG_SYS_FLASH_WORD_SIZE); - while (cnt) { - /* Check for sufficient erase */ - b = *src; - if ((*dst & b) != b) { - printf ("%02x : %02x\n", *dst, b); - return (2); - } - - /* Disable interrupts other than window underflow - * (interrupt priority 2) - */ - oldpri = ipri (3); - *(cmd+0xAAA/2) = 0xaa; - *(cmd+0x554/2) = 0x55; - *(cmd+0xAAA/2) = 0xa0; - ipri (oldpri); - *dst = b; - - /* Verify write */ - start = get_timer (0); - while (*dst != b) { - if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - *cmd = 0xf0; - return 1; - } - } - dst++; - src++; - cnt--; - } - - *cmd = 0xf0; - return (0); -} diff --git a/board/ssv/common/post.c b/board/ssv/common/post.c deleted file mode 100644 index c7a9ccc89e..0000000000 --- a/board/ssv/common/post.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> - -#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) - -#if !defined(CONFIG_SYS_NIOS_POST_WORD_ADDR) -#error "*** CONFIG_SYS_NIOS_POST_WORD_ADDR not defined ***" -#endif - -void post_word_store (ulong a) -{ - volatile void *save_addr = (void *)(CONFIG_SYS_NIOS_POST_WORD_ADDR); - *(volatile ulong *) save_addr = a; -} - -ulong post_word_load (void) -{ - volatile void *save_addr = (void *)(CONFIG_SYS_NIOS_POST_WORD_ADDR); - return *(volatile ulong *) save_addr; -} - -#endif /* CONFIG_POST || CONFIG_LOGBUFFER*/ diff --git a/board/ssv/common/wd_pio.c b/board/ssv/common/wd_pio.c deleted file mode 100644 index eaf1d2526c..0000000000 --- a/board/ssv/common/wd_pio.c +++ /dev/null @@ -1,160 +0,0 @@ -/* - * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <command.h> -#include <nios.h> -#include <nios-io.h> - -#if defined(CONFIG_HW_WATCHDOG) - -#if !defined(CONFIG_HW_WDENA_BASE) -#error "*** CONFIG_HW_WDENA_BASE not defined ***" -#if !defined(CONFIG_HW_WDENA_BIT) -#error "*** CONFIG_HW_WDENA_BIT not defined ***" -#endif -#endif - -#if !defined(CONFIG_HW_WDTOG_BASE) -#error "*** CONFIG_HW_WDTOG_BASE not defined ***" -#if !defined(CONFIG_HW_WDTOG_BIT) -#error "*** CONFIG_HW_WDTOG_BIT not defined ***" -#endif -#endif - -#ifdef CONFIG_HW_WDPORT_WRONLY /* emulate read access */ -static unsigned __wd_ena_pio_portval = 0; -#endif - -#define WD_PIO_INIT_DONE(V) ((V) & (1 << CONFIG_HW_WDENA_BIT)) - -void ssv_wd_pio_init(void) -{ - nios_pio_t *ena_piop = (nios_pio_t*)CONFIG_HW_WDENA_BASE; - nios_pio_t *trg_piop = (nios_pio_t*)CONFIG_HW_WDTOG_BASE; - - trg_piop->data &= ~(1 << CONFIG_HW_WDTOG_BIT); - -#ifdef CONFIG_HW_WDPORT_WRONLY /* emulate read access */ - - __wd_ena_pio_portval |= (1 << CONFIG_HW_WDENA_BIT); - ena_piop->data = __wd_ena_pio_portval; - -#else /* !CONFIG_HW_WDPORT_WRONLY */ - - trg_piop->direction |= (1 << CONFIG_HW_WDTOG_BIT); - - ena_piop->data |= (1 << CONFIG_HW_WDENA_BIT); - ena_piop->direction |= (1 << CONFIG_HW_WDENA_BIT); - -#endif /* CONFIG_HW_WDPORT_WRONLY */ -} - -void ssv_wd_pio_done(void) -{ - nios_pio_t *piop = (nios_pio_t*)CONFIG_HW_WDENA_BASE; - -#ifdef CONFIG_HW_WDPORT_WRONLY /* emulate read access */ - - __wd_ena_pio_portval &= ~(1 << CONFIG_HW_WDENA_BIT); - piop->data = __wd_ena_pio_portval; - -#else /* !CONFIG_HW_WDPORT_WRONLY */ - - piop->data &= ~(1 << CONFIG_HW_WDENA_BIT); - -#endif /* CONFIG_HW_WDPORT_WRONLY */ -} - -void ssv_wd_pio_reset(void) -{ - nios_pio_t *trg_piop = (nios_pio_t*)CONFIG_HW_WDTOG_BASE; - -#ifdef CONFIG_HW_WDPORT_WRONLY - if (WD_PIO_INIT_DONE(__wd_ena_pio_portval)) -#else - nios_pio_t *ena_piop = (nios_pio_t*)CONFIG_HW_WDENA_BASE; - - if (WD_PIO_INIT_DONE(ena_piop->data)) -#endif - { - trg_piop->data |= (1 << CONFIG_HW_WDTOG_BIT); - trg_piop->data &= ~(1 << CONFIG_HW_WDTOG_BIT); - } -} - -void hw_watchdog_reset(void) -{ - int re_enable = disable_interrupts (); - - ssv_wd_pio_reset(); - if (re_enable) - enable_interrupts (); -} - -#if defined(CONFIG_CMD_BSP) -int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - nios_pio_t *ena_piop = (nios_pio_t*)CONFIG_HW_WDENA_BASE; - - switch (argc) - { - case 1: - printf ("Watchdog timer status is %s\n", -#ifdef CONFIG_HW_WDPORT_WRONLY - WD_PIO_INIT_DONE(__wd_ena_pio_portval) -#else - WD_PIO_INIT_DONE(ena_piop->data) -#endif - ? "on" : "off"); - return 0; - case 2: - if (!strcmp(argv[1],"on")) - { - ssv_wd_pio_init(); - printf("Watchdog timer now is on\n"); - return 0; - } - else if (!strcmp(argv[1],"off")) - { - ssv_wd_pio_done(); - printf("Watchdog timer now is off\n"); - return 0; - } - break; - default: - break; - } - cmd_usage(cmdtp); - return 1; -} - -U_BOOT_CMD( - wd, 2, 1, do_wd, - "check and set watchdog", - "on - switch watchDog on\n" - "wd off - switch watchdog off\n" - "wd - print current status" -); -#endif -#endif /* CONFIG_HW_WATCHDOG */ diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index d22eb6634a..a0f7998f61 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -119,25 +119,6 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) return 0; } -#elif defined(CONFIG_NIOS) /* NIOS*/ - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - bd_t *bd = gd->bd; - - print_num ("memstart", (ulong)bd->bi_memstart); - print_lnum ("memsize", (u64)bd->bi_memsize); - print_num ("flashstart", (ulong)bd->bi_flashstart); - print_num ("flashsize", (ulong)bd->bi_flashsize); - print_num ("flashoffset", (ulong)bd->bi_flashoffset); - - print_eth(0); - printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); - printf ("baudrate = %ld bps\n", bd->bi_baudrate); - - return 0; -} - #elif defined(CONFIG_NIOS2) /* Nios-II */ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index da060098af..880320211e 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -174,8 +174,6 @@ void arch_preboot_os(void) __attribute__((weak, alias("__arch_preboot_os"))); #define IH_INITRD_ARCH IH_ARCH_MICROBLAZE #elif defined(__mips__) #define IH_INITRD_ARCH IH_ARCH_MIPS -#elif defined(__nios__) - #define IH_INITRD_ARCH IH_ARCH_NIOS #elif defined(__nios2__) #define IH_INITRD_ARCH IH_ARCH_NIOS2 #elif defined(__PPC__) diff --git a/common/image.c b/common/image.c index 8d4be140f6..2b6007e9c6 100644 --- a/common/image.c +++ b/common/image.c @@ -84,7 +84,6 @@ static table_entry_t uimage_arch[] = { { IH_ARCH_MICROBLAZE, "microblaze", "MicroBlaze", }, { IH_ARCH_MIPS, "mips", "MIPS", }, { IH_ARCH_MIPS64, "mips64", "MIPS 64 Bit", }, - { IH_ARCH_NIOS, "nios", "NIOS", }, { IH_ARCH_NIOS2, "nios2", "NIOS II", }, { IH_ARCH_PPC, "powerpc", "PowerPC", }, { IH_ARCH_PPC, "ppc", "PowerPC", }, @@ -191,14 +191,6 @@ endif CFLAGS += $(call cc-option,-fno-stack-protector) -# avoid trigraph warnings while parsing pci.h (produced by NIOS gcc-2.9) -# this option have to be placed behind -Wall -- that's why it is here -ifeq ($(ARCH),nios) -ifeq ($(findstring 2.9,$(shell $(CC) --version)),2.9) -CFLAGS := $(CPPFLAGS) -Wall -Wno-trigraphs -endif -endif - # $(CPPFLAGS) sets -g, which causes gcc to pass a suitable -g<format> # option to the assembler. AFLAGS_DEBUG := diff --git a/doc/README.adnpesc1 b/doc/README.adnpesc1 deleted file mode 100644 index f9566b8ee8..0000000000 --- a/doc/README.adnpesc1 +++ /dev/null @@ -1,235 +0,0 @@ - - SSV ADNP/ESC1 Embedded Softcore Computing - Nios Softcore, Altera Cyclone FPGA - - Last Update: February 27, 2004 -==================================================================== - -This file contains information regarding U-Boot and the SSV Embedded -Nios Softcore Computing platform ADNP/ESC1. For general Nios -information see doc/README.nios. - -Most stuff of this file was borrowed and based on README.dk1s10, -the Altera DK-1S10 related information file. - -For those interested in contributing ... see HELP WANTED section -in doc/README.nios. - -Contents: - - 1. Files - 2. Memory Organization - 3. CPU Variations - 4. Examples - 5. Programming U-Boot into FLASH with GERMS - 6. Autoboot - 7. U-Boot environment convention and update philosophy - -==================================================================== - -1. Files -========= - board/ssv/adnpesc1/* - include/configs/ADNPESC1.h - include/configs/ADNPESC1_base_32.h - - -2. Memory Organization -======================= - -For the most part, you can put things pretty much anywhere. -This is pretty flexible for Nios. So here we make some arbitrary -choices & assume that the monitor is placed at the end of a memory -resource. So you must make sure TEXT_BASE is chosen appropriately. -This is very important if you plan to move your memory to another -place as configured at this time! - - -The heap is placed below the monitor (U-Boot code). - -Global data is placed below the heap. - -The stack is placed below global data (&grows down). - -(see doc/README.adnpesc1_base32 too) - - -3. CPU Variations -================= - -There are more than one NIOS CPU variation for the ADNP/ESC1 possible. -U-Boot supports the following CPU configurations: - - - SSV Basis 32 (make ADNPESC1_base_32_config) - - SSV Basis 32 at DNP evaluation base board 2 - (make ADNPESC1_DNPEVA2_base_32_config) - - -4. Examples -============ - -The hello_world example works fine. To try out you have to change -the default load address from 0x0100_0000 to 0x0204_0000 in -examples/Makefile (the real SDRAM for default board configuration). - - -5. Programming U-Boot into FLASH with GERMS -============================================ - -The current version of the ADNP/ESC1 port with the default -configuration settings occupies about 97 KBytes of flash. -A minimal configuration occupies less than 70 KByte -(network, SPI, POST and board command support disabled). You -can save more memory by deactivating the Hu-Shell support and -long command help (CONFIG_SYS_HUSH_PARSER, CONFIG_SYS_LONGHELP). - -To program U-Boot into the ADNP/ESC1 flash using GERMS do the -following: - -1. Download U-Boot to its target run space in SDRAM: - - a. Close jumper RCM_EN# and push the reset button. - - b. From the command line, download U-Boot using the - nios-run: - - $ nios-run -r u-boot.srec - - NOTE: In some cases this want fail. I don't know why, - but try again. - -This takes about 1 minute (GERMS is not very speedy here). -After u-boot is downloaded it will be executed. You should -see the following: - - U-Boot 1.0.2 (Jan 30 2004 - 12:59:15) - - CPU: Nios-32 Rev. 3.3 (0x3038) - Reg file size: 512 LO_LIMIT/HI_LIMIT: 1/30 - Board: SSV DilNetPC ADNP/ESC1 - Conf.: SSV Base 32 (nios_32) - In: serial - Out: serial - Err: serial - ADNPESC1 > - - -2. Quit nios-run and start your terminal application (e.g. start - Hyperterminal or minicom). - -3. Download the u-boot code to RAM. When using Hyperterminal, do the - following: - - a. From the u-boot command prompt start a binary download to SDRAM: - - at the SSV Basis 32 to SDRAM: - - ==> loadb 2000100 - - b. Download u-boot.bin using kermit. - -4. From the U-Boot command prompt, erase flash: - - at the SSV Basis 32 from 0x1000000 to 0x103ffff: - - ==> protect off 1:0-3 - ==> erase 1:0-3 - -5. Copy the binary image from SDRAM to flash: - - at the SSV Basis 32 from SDRAM: - - ==> cp.b 2000100 1000000 $filesize - -U-Boot will now automatically start when the board is powered on or -reset using the SSV Basis 32 configuration without closed RCM jumper. -To start U-Boot with closed RCM Jumper, enter the following GERMS -command: - - + g 1000000 - - -6. Autoboot -=========== - -U-Boot will try to boot a valid Nios application from Flash. For this -it will use the deposited Hu-Shell script in environment variable -'bootcmd' which is looking for a valid Nios application identifier -string in Flash and go on at even its entry address. For more -information see the next chapter. - - -7. U-Boot environment convention and update philosophy -====================================================== - -U-Boot for the SSV ADNP/ESC1 target knows about many environment -variables used to control the startup process, update process for -raw Nios applications, and optionally file system image updates. -In default configuration there are two Hu-Shell scripts to update -the Nios application and/or the file system image: - -1. Update Nios application (ex. the uCLinux kernel): - - run 'appl_update' - -2. Update optional file system image (ex. RomFS image used by uCLinux): - - run 'fs_update' - -The Nios application can be any programm code generated in relation -to the Nios application identifier -- the string "Nios" at offset -address 0x0c. To use the scripts like described above in a secure way -you have to check-up the next environment variables: - -1. update_allowed - - - Update switch -- must be set to '1' (one) to allow any update - - default is '0' (zero) - - NOTE: You should avoid to save this variable with non zero - value to Flash. Otherwise it would be allow any - update process at any time! - -2. appl_entry_addr - - - Nios application area start address (usually in Flash) - - this is the startup address for autoboot - - each Nios application code we want to update will be copied - to this address - - default is CONFIG_SYS_ADNPESC1_NIOS_APPL_ENTRY - -3. appl_end_addr - - - Nios application area end address (usually in Flash) - - will be used to unprotect/erase the Flash area while updating - - default is CONFIG_SYS_ADNPESC1_NIOS_APPL_END - -4. appl_ident_addr - - - address of the Nios application identification string - - this is the address checked-up by autoboot - - default is CONFIG_SYS_ADNPESC1_NIOS_APPL_IDENT - -5. appl_ident_str - - - the Nios application identification string itself - - default is CONFIG_SYS_ADNPESC1_NIOS_IDENTIFIER - -6. appl_name - - - name of file we have to download/update - - default is ADNPESC1/base32/linux.bin - -7. fs_base_addr - - - optionally file system area start address (usually in Flash) - - each file system we want to update will be copied to this address - - default is CONFIG_SYS_ADNPESC1_FILESYSTEM_BASE - -8. fs_end_addr - - - optionally file system area end address (usually in Flash) - - will be used to unprotect/erase the Flash area while updating - - default is CONFIG_SYS_ADNPESC1_FILESYSTEM_END - -9. fs_name - - - name of file we have to download/update - - default is ADNPESC1/base32/romfs.img diff --git a/doc/README.adnpesc1_base32 b/doc/README.adnpesc1_base32 deleted file mode 100644 index e6fb7a47df..0000000000 --- a/doc/README.adnpesc1_base32 +++ /dev/null @@ -1,469 +0,0 @@ - -TODO: specify IDE i/f - - -=============================================================================== - C P U , M E M O R Y , I N / O U T C O M P O N E N T S -=============================================================================== -see also [1]-[5] - -CPU: "DNP_ESC1" - 32 bit NIOS for 50 MHz - 512 Byte for register file (30 levels) - with out instruction cache - with out data cache - 2 KByte On Chip ROM with GERMS boot monitor - with out On Chip RAM - MSTEP multiplier - no Debug Core - no On Chip Instrumentation (OCI) - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_CLK = 50000000 - CONFIG_SYS_NIOS_CPU_ICACHE = (not present) - CONFIG_SYS_NIOS_CPU_DCACHE = (not present) - CONFIG_SYS_NIOS_CPU_REG_NUMS = 512 - CONFIG_SYS_NIOS_CPU_MUL = 0 - CONFIG_SYS_NIOS_CPU_MSTEP = 1 - CONFIG_SYS_NIOS_CPU_DBG_CORE = 0 - -IRQ: Nr. | used by - ------+-------------------------------------------------------- - 16 | TIMER0 | CONFIG_SYS_NIOS_CPU_TIMER0_IRQ = 16 - 17 | UART0 | CONFIG_SYS_NIOS_CPU_UART0_IRQ = 17 - 18 | UART1 | CONFIG_SYS_NIOS_CPU_UART1_IRQ = 18 - 20 | LAN91C111 | CONFIG_SYS_NIOS_CPU_LAN0_IRQ = - | PIO6 | CONFIG_SYS_NIOS_CPU_PIO6_IRQ = 20 - 25 | SPI0 | CONFIG_SYS_NIOS_CPU_SPI0_IRQ = 25 - 31 | PIO7 | CONFIG_SYS_NIOS_CPU_PIO7_IRQ = 31 - 32 | PIO8 | CONFIG_SYS_NIOS_CPU_PIO8_IRQ = 32 - 33 | PIO9 | CONFIG_SYS_NIOS_CPU_PIO9_IRQ = 33 - 34 | PIO10 | CONFIG_SYS_NIOS_CPU_PIO10_IRQ = 34 - 35 | PIO11 | CONFIG_SYS_NIOS_CPU_PIO11_IRQ = 35 - 36 | PIO12 | CONFIG_SYS_NIOS_CPU_PIO12_IRQ = - | IDE0 | CONFIG_SYS_NIOS_CPU_IDE0_IRQ = 36 - 37 | PIO13 | CONFIG_SYS_NIOS_CPU_PIO13_IRQ = - | IDE1 | CONFIG_SYS_NIOS_CPU_IDE1_IRQ = 37 - -MEMORY: 8 MByte Flash - 16 MByte SDRAM - -Timer: TIMER0: high priority programmable timer (IRQ16) - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_TICK_TIMER = 0 - CONFIG_SYS_NIOS_CPU_USER_TIMER = (not present) - -PIO: Nr. | description - ------+-------------------------------------------------------- - PIO0 | PORTA: 8 in/outputs for general purpose usage - PIO1 | PORTB: 8 in/outputs for general purpose usage - PIO2 | PORTC: 4 in/outputs for general purpose usage - PIO3 | RCM: 1 input for RCM_EN# jumper (Req.Conf.Mon.) - PIO4 | WDTENA: 1 output to enable the on-board watchdog - PIO5 | WDTTRIG: 1 output to trigger the on-board watchdog - PIO6 | LAN0INT: 1 input for LAN91C111 irq input (IRQ20) - PIO7 | INT1: 1 input for general purpose irq (IRQ31) - PIO8 | INT2: 1 input for general purpose irq (IRQ32) - PIO9 | INT3: 1 input for general purpose irq (IRQ33) - PIO10| INT4: 1 input for general purpose irq (IRQ34) - PIO11| INT5: 1 input for general purpose irq (IRQ35) - PIO12| INT6: 1 input for general purpose irq (IRQ36) - | IDE0INT: (same) for IDE0 irq input - PIO13| INT7: 1 input for general purpose irq (IRQ37) - | IDE1INT: (same) for IDE1 irq input - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_PORTA_PIO = 0 - CONFIG_SYS_NIOS_CPU_PORTB_PIO = 1 - CONFIG_SYS_NIOS_CPU_PORTC_PIO = 2 - CONFIG_SYS_NIOS_CPU_RCM_PIO = 3 - CONFIG_SYS_NIOS_CPU_WDTENA_PIO = 4 - CONFIG_SYS_NIOS_CPU_WDTTRIG_PIO = 5 - CONFIG_SYS_NIOS_CPU_LED_PIO = (not present) - -UART: UART0: fixed baudrate of 115200, fixed protocol 8N1, RTS/CTS (IRQ17) - UART1: fixed baudrate of 115200, fixed protocol 8N1, - without handshake RTS/CTS (IRQ18) - -SPI: SPI0: master capable, 1 slave selectable, 250kHz target clock, - 2 usec targets delay between slave select and clock, - data is transferred MSB-first / LSB-last (IRQ25) - -LAN: SMsC LAN91C111 with: - - without offset - - data bus width 16 bit (on-board hard wired at 32 bit bus) - - !!! 32 bit bus access --> each address * 2 !!! - -IDE: (TODO) - - -=============================================================================== - M E M O R Y M A P -=============================================================================== - -- - - - - - - - - - - external extension - - - - - - - - - - - - - - - - - - - - - 0x44000000 ---32-----------16|15------------0- - | | | \ - : (real size : : | - EXT3 (CS4) : and content : : > CONFIG_SYS_NIOS_CPU_CS3_SIZE - : unknown) : : | = 0x01000000 - | | | / - 0x43000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_CS3_BASE - | | | \ - : (real size : : | - EXT2 (CS3) : and content : : > CONFIG_SYS_NIOS_CPU_CS2_SIZE - : unknown) : : | = 0x01000000 - | | | / - 0x42000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_CS2_BASE - | | | \ - : (real size : : | - EXT1 (CS2) : and content : : > CONFIG_SYS_NIOS_CPU_CS1_SIZE - : unknown) : : | = 0x01000000 - | | | / - 0x41000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_CS1_BASE - | | | \ - : (real size : : | - EXT0 (CS1) : and content : : > CONFIG_SYS_NIOS_CPU_CS0_SIZE - : unknown) : : | = 0x01000000 - | | | / - 0x40000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_CS0_BASE - | | - : gap : - : : - -- - - - - - - - - - - external memory - - - - - - - - - - - - - - - - - - - - - : : - : gap : - | | - 0x03000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_STACK - | . | \ - | . | | (U-Boot run-time system) - | . | | - | . | > CONFIG_SYS_MONITOR_LEN - | . | | = 0x00040000 - | . | | - | . | / - 0x02fc0000 --+32-----------16|15------------0+ TEXT_BASE - | . | \ - | . | > CONFIG_SYS_MALLOC_LEN (heap) - | . | / - --+32-----------16|15------------0+ - | . | \ - | . | > CONFIG_SYS_GBL_DATA_SIZE (global) - | . | / - --+32-----------16|15------------0+ CONFIG_SYS_INIT_SP (u-boot stack) - | . | \ \ - | . | | | - | . | | > stack area - | . | | | - | . | | V - | . | | - | . | | - SDRAM | . | > CONFIG_SYS_NIOS_CPU_SDRAM_SIZE - | . | | = 0x01000000 - | . | | - 0x02000100 |- - - - - - - - - - - - - - - -+-|- - | . | | \ - | . | | | - | . | | > CONFIG_SYS_NIOS_CPU_VEC_SIZE - | . | | | = 0x00000100 - | | / / - 0x02000000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_VEC_BASE - 0x02000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SDRAM_BASE - | | \ - : gap : > (space for 2nd Flash) - | | / - 0x01800000 ---32-----------16|15------------0- - | sector 127 | \ - + 0x7f0000 |- - - - - - - - - - - - - - - -| | - | : | | - Flash |- - - - : - - - -| > CONFIG_SYS_NIOS_CPU_FLASH_SIZE - | sector 1 : | | = 0x00800000 - + 0x010000 |- - - - - - - - - - - - - - - -| | - | sector 0 (size = 0x10000) | / - 0x01000000 ---8-------------4|3-------------0- CONFIG_SYS_NIOS_CPU_FLASH_BASE - | | - : gap : - : : - -- - - - - - - - - - - external i/o - - - - - - - - - - - - - - - - - - - - - : : - : gap : - | | - 0x00010020 ---32-----------16|15------------0- - | | \ - | register bank | | - | size = (real_size << 1) | | - | real_size = 0x10 | | - | +--------.---.---.--- | | - | | bank 0 \ 1 \ 2 \ 3 \ | | - | |---------------------------+ | | - LAN91C111 | | BANK | RESERVED | | > na_enet_size - | |- - - - - - -|- - - - - - -| | | = 0x00000020 - | | RPCR | MIR | | | - | |- - - - - - -|- - - - - - -| | | - | | COUNTER | RCR | | | - | |- - - - - - -|- - - - - - -| | | - | | EPH STATUS | TCR | | | - | +---------------------------+ | / - 0x00010000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_LAN0_BASE - | | - : gap : - : : - -- - - - - - - - - - - on chip i/o - - - - - - - - - - - - - - - - - - - - - : : - : gap : - | | - 0x00001040 ---32-----------16|15------------0- - | | | \ - : : : | - IDE1 i/f : : : > 0x00000020 - [5] : : : | - | | | / - 0x00001020 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_IDE1 - | | | \ - : : : | - IDE0 i/f : : : > 0x00000020 - [5] : : : | - | | | / - 0x00001000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_IDE0 - | | - : gap : - | | - 0x00000980 ---32-----------16|15------------0- - | edgecapture (1 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO13 | interruptmask (1 bit) (rw) | | - [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (ro) | / - 0x00000970 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO13 - | edgecapture (1 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO12 | interruptmask (1 bit) (rw) | | - [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (ro) | / - 0x00000960 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO12 - | edgecapture (1 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO11 | interruptmask (1 bit) (rw) | | - [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (ro) | / - 0x00000950 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO11 - | edgecapture (1 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO10 | interruptmask (1 bit) (rw) | | - [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (ro) | / - 0x00000940 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO10 - | edgecapture (1 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO9 | interruptmask (1 bit) (rw) | | - [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (ro) | / - 0x00000930 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO9 - | edgecapture (1 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO8 | interruptmask (1 bit) (rw) | | - [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (ro) | / - 0x00000920 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO8 - | edgecapture (1 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO7 | interruptmask (1 bit) (rw) | | - [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (ro) | / - 0x00000910 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO7 - | edgecapture (1 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO6 | interruptmask (1 bit) (rw) | | - [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (ro) | / - 0x00000900 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO6 - | | - : gap : - | | - 0x000008e0 ---32-----------16|15------------0- - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | endofpacket (16 bit) (rw) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | slaveselect (1 bit) (rw) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - SPI0 | (reserved) | | - [4] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020 - | control (11 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | status (9 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | txdata (16 bit) (wo) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | rxdata (16 bit) (ro) | / - 0x000008c0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SPI0 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO5 | (unused) | | - [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (wo) | / - 0x000008b0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO5 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO4 | (unused) | | - [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (wo) | / - 0x000008a0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO4 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO3 | (unused) | | - [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (ro) | / - 0x00000890 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO3 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO2 | (unused) | | - [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | direction (4 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (4 bit) (rw) | / - 0x00000880 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO2 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO1 | (unused) | | - [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | direction (8 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (8 bit) (rw) | / - 0x00000870 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO1 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO0 | (unused) | | - [3] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | direction (8 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (8 bit) (rw) | / - 0x00000860 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO0 - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | snaph (16 bit) (rw) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - TIMER0 | snapl (16 bit) (rw) | | - [2] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020 - | periodh (16 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | periodl (16 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | control (4 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | status (2 bit) (rw) | / - 0x00000840 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER0 - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - UART1 | (unused) | > 0x00000020 - [1] + 0x10 |- - - - - - - - - - - - - - - -| | - | control (10 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | status (10 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | txdata (8 bit) (wo) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | rxdata (8 bit) (ro) | / - 0x00000820 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART1 - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - UART0 | (unused) | > 0x00000020 - [1] + 0x10 |- - - - - - - - - - - - - - - -| | - | control (10 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | status (10 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | txdata (8 bit) (wo) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | rxdata (8 bit) (ro) | / - 0x00000800 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART0 - -- - - - - - - - - - - on chip memory 1 - - - - - - - - - - - - - 0x00000800 ---32-----------16|15------------0- - | : | \ - | : | | - GERMS | : | > CONFIG_SYS_NIOS_CPU_ROM_SIZE - | : | | = 0x00000800 - | : | / - 0x00000000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_RST_VECT - 0x00000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_ROM_BASE - - -=============================================================================== - F L A S H M E M O R Y A L L O C A T I O N -=============================================================================== - - 0x01800000 ---8-------------4|3-------------0- - | : | \ - | : | | - | : | > 6 MByte ROM FS - | : | | - | : | / - 0x01200000 --+- - - - - - - -:- - - - - - - -+- - file system image(s) - | : | \ - | : | | - | : | > 1728 kByte ucLinux - | : | | - | : | / - 0x01050000 --+- - - - - - - -:- - - - - - - -+- - os image(s) - | : | \ - 0x01040000 --+- - - - - - - -:- - - - - - - -+-|- u-boot environment - | : | | - | : | > 320 kByte U-Boot - | : | | - | : | | - | : | / - 0x01000000 --+- - - - - - - -:- - - - - - - -+- - u-boot _start() - 0x01000000 ---8-------------4|3-------------0- - - -=============================================================================== - R E F E R E N C E S -=============================================================================== -[1] http://www.altera.com/literature/ds/ds_nios_uart.pdf -[2] http://www.altera.com/literature/ds/ds_nios_timer.pdf -[3] http://www.altera.com/literature/ds/ds_nios_pio.pdf -[4] http://www.altera.com/literature/ds/ds_nios_spi.pdf -[5] http://www.t13.org/index.html - - -=============================================================================== -Stephan Linz <linz@li-pro.net> diff --git a/doc/README.dk1c20 b/doc/README.dk1c20 deleted file mode 100644 index 3c0e41bf7d..0000000000 --- a/doc/README.dk1c20 +++ /dev/null @@ -1,153 +0,0 @@ - - Nios Development Kit - Cyclone Editions - - Last Update: January 2, 2004 -==================================================================== - -This file contains information regarding U-Boot and the Altera -Nios Development Kit, Cyclone Edition (DK-1C20). For general Nios -information see doc/README.nios. - -For those interested in contributing ... see HELP WANTED section -in doc/README.nios. - -Contents: - - 1. Files - 2. Memory Organization - 3. Examples - 4. Programming U-Boot into FLASH with GERMS - 5. Active Serial Memory Interface (ASMI) Support - -==================================================================== - -1. Files -========= - board/altera/dk1c20/* - include/configs/DK1C20.h - -2. Memory Organization -======================= - - -The heap is placed below the monitor (U-Boot code). - -Global data is placed below the heap. - -The stack is placed below global data (&grows down). - -3. Examples -============ - -The hello_world example works fine. The default load address -is 0x0100_0000 (the start of SDRAM). - - -4. Programming U-Boot into FLASH with GERMS -============================================ -The current version of the DK-1C20 port with the default -configuration settings occupies about 81 KBytes of flash. -A minimal configuration occupies less than 60 KByte (asmi -and network support disabled). - -To program U-Boot into the DK-1C20 flash using GERMS do the -following: - -1. From the command line, download U-Boot using the nios-run: - - $ nios-run -r u-boot.srec - -This takes about 45 seconds (GERMS is not very speedy here). -After u-boot is downloaded it will be executed. You should -see the following: - - U-Boot 1.0.0-pre (Oct 4 2003 - 07:39:24) - - CPU: Nios-32 Rev. 3.3 (0x3038) - Reg file size: 256 LO_LIMIT/HI_LIMIT: 2/14 - Board: Altera Nios 1C20 Development Kit - In: serial - Out: serial - Err: serial - ==> - - -2. Quit nios-run and start your terminal application (e.g. start -Hyperterminal or minicom). - -3. Download the u-boot code to RAM. When using Hyperterminal, do the -following: - - a. From the u-boot command prompt start a binary download to SRAM: - - ==> loadb 800000 - - b. Download u-boot.bin using kermit. - -4. From the U-Boot command prompt, erase flash 0x40000 to 0x5ffff: - - ==> erase 1:4-5 - -5. Copy the binary image from SRAM to flash: - - ==> cp.b 800000 40000 10000 - -U-Boot will now automatically start when the board is powered on or -reset using the Standard-32 configuration. To start U-Boot with the -Safe-32 configuration, enter the following GERMS command: - - + g 40000 - -5. Active Serial Memory Interface (ASMI) Support -================================================ -ASMI is fully supported in U-Boot. Please note that ASMI is supported -only on Cyclone devices. Do not expect ASMI to work with Stratix or -APEX devices. - - ************* IMPORTANT ************* - =================================================== - IN ORDER FOR THE NIOS ASMI TO OPERATE PROPERLY, THE - CYCLONE DEVICE MUST BE CONFIGURED USING JTAG OR ASMI. - -There are two techniques you can use to bootstrap the ASMI. The -first is to use the program_epcs utility that is part of Altera's SDK. -But I've found program_epcs to be slow and cumbersome at best. - -An undocumented alternative is to use the Quartus device programing -interface: - - 1. Select "Active Serial" mode. - - 2. Choose the xxx.pof file. For example, for the standard_32 - configuration use the "standard_32.pof" file. - - 3. Attach your ByteBlaster to J28. Make sure you have the - cable attached properly -- the orientation of J28 is - different than J24 (the JTAG header). On J28, pin 1 is on - the bottom row, left-most pin. - - 4. Press and hold the "Power-On Reset" switch (SW10). You will - see the green "Loading" and red "Error" LEDs (LED3 and LED4) - in the on state. - - 5. While holding down the "Power-On Reset" switch, start the - programming sequence. This only takes about 10 seconds. - - 6. After programming is complete, release the "Power-On Reset" - switch. The Cyclone device should now load its configuration - from the EPCS4 (U59). The green "User" LED (LED 1) should be - blinking if the device was successfully loaded via ASMI. - - 7. Remove the ByteBlaster cable. The cable must be removed to - allow the Nios ASMI access to the EPCS4 device. - -After you have successfully programmed a configuration into the -EPCS4, the ASMI will be used to load the Cyclone configuration -unless the "Force Safe" switch (SW9) is pressed. - -NOTE: To maximize the amount of space available for program use, -you can enable configuration compression in Quartus. With compression -enabled, the size of the standard_32 configuration data is -approximately 192 KBytes. - -To use the U-Boot ASMI commands, try typing "help asmi" at the -command prompt. The command "asmi info" will show the current -status of the ASMI. diff --git a/doc/README.dk1c20_std32 b/doc/README.dk1c20_std32 deleted file mode 100644 index 2be12998d3..0000000000 --- a/doc/README.dk1c20_std32 +++ /dev/null @@ -1,366 +0,0 @@ - -TODO: specify IDE i/f - specify ASMI i/f - specify OCI - - -=============================================================================== - C P U , M E M O R Y , I N / O U T C O M P O N E N T S -=============================================================================== -see also [1]-[6] - -CPU: "standard_32" - 32 bit NIOS for 50 MHz - 256 Byte for register file (15 levels) - 4 KByte instruction cache (2 bytes in each cache line) - 4 KByte data cache (4 bytes in each cache line) - 2 KByte On Chip ROM with GERMS boot monitor - no On Chip RAM - MSTEP multiplier - no Debug Core - On Chip Instrumentation (OCI) enabled - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_CLK = 50000000 - CONFIG_SYS_NIOS_CPU_ICACHE = 4096 - CONFIG_SYS_NIOS_CPU_DCACHE = 4096 - CONFIG_SYS_NIOS_CPU_REG_NUMS = 256 - CONFIG_SYS_NIOS_CPU_MUL = 0 - CONFIG_SYS_NIOS_CPU_MSTEP = 1 - CONFIG_SYS_NIOS_CPU_DBG_CORE = 0 - -OCI: (TODO) - -IRQ: Nr. | used by - ------+-------------------------------------------------------- - 16 | TIMER0 | CONFIG_SYS_NIOS_CPU_TIMER0_IRQ = 16 - 25 | UART0 | CONFIG_SYS_NIOS_CPU_UART0_IRQ = 25 - 30 | LAN91C111 | CONFIG_SYS_NIOS_CPU_LAN0_IRQ = 30 - 35 | PIO5 | CONFIG_SYS_NIOS_CPU_PIO5_IRQ = 35 - 40 | PIO0 | CONFIG_SYS_NIOS_CPU_PIO0_IRQ = 40 - 45 | ASMI | CONFIG_SYS_NIOS_CPU_ASMI0_IRQ = 45 - 50 | TIMER1 | CONFIG_SYS_NIOS_CPU_TIMER1_IRQ = 50 - -MEMORY: 8 MByte Flash - 1 MByte SRAM - 16 MByte SDRAM - -ASMI: (TODO) <-- ASMI part is 4M bits - -Timer: TIMER0: high priority programmable timer (IRQ16) - TIMER1: low priority fixed timer for 10 ms @ 50 MHz (IRQ50) - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_TICK_TIMER = 1 - CONFIG_SYS_NIOS_CPU_USER_TIMER = 0 - -PIO: Nr. | description - ------+-------------------------------------------------------- - PIO0 | BUTTON: 4 inputs for user push buttons (IRQ40) - PIO1 | LCD: 11 in/outputs for ASCII LCD - PIO2 | LED: 8 outputs for user LEDs - PIO3 | SEVENSEG: 16 outputs for user seven segment display - PIO4 | RECONF: 1 in/output for . . . . . . . . . . . . - PIO5 | CFPRESENT: 1 input for CF present event (IRQ35) - PIO6 | CFPOWER: 1 output to controll CF power supply - PIO7 | CFATASEL: 1 output to controll CF ATA card select - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_BUTTON_PIO = 0 - CONFIG_SYS_NIOS_CPU_LCD_PIO = 1 - CONFIG_SYS_NIOS_CPU_LED_PIO = 2 - CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO = 3 - CONFIG_SYS_NIOS_CPU_RECONF_PIO = 4 - CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO = 5 - CONFIG_SYS_NIOS_CPU_CFPOWER_PIO = 6 - CONFIG_SYS_NIOS_CPU_CFATASEL_PIO = 7 - -UART: UART0: fixed baudrate of 115200, fixed protocol 8N1, - without handshake RTS/CTS (IRQ25) - -LAN: SMsC LAN91C111 with: - - offset 0x300 (LAN91C111_REGISTERS_OFFSET) - - data bus width 32 bit (LAN91C111_DATA_BUS_WIDTH) - -IDE: (TODO) - - -=============================================================================== - M E M O R Y M A P -=============================================================================== - -- - - - - - - - - - - external memory 2 - - - - - - - - - - - - - - - - - - - - - 0x02000000 ---32-----------16|15------------0- - | : | \ - | : | | - SDRAM | : | > CONFIG_SYS_NIOS_CPU_SDRAM_SIZE - | : | | = 0x01000000 - | : | / - 0x01000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SDRAM_BASE - | | - : gap : - : : - -- - - - - - - - - - - on chip i/o - - - - - - - - - - - - - - - - - - - - - : : - : gap : - | | - 0x________ ---32-----------16|15------------0- - | | | \ - : (real size : : | - ASMI i/f : and content : : > 0x________ - [5] : unknown) : : | - | | | / - 0x00920b00 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_ASMI0 - | | - : gap : - | | - 0x00920a80 ---32-----------16|15------------0- - | | | \ - : (real size : : | - IDE i/f : and content : : > 0x00000080 - [6] : unknown) : : | - | | | / - 0x00920a00 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_IDE0 - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - TIMER1 | (unused) | | - [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020 - | (unused) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | control (1 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | status (2 bit) (rw) | / - 0x009209e0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER1 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO7 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (wo) | / - 0x009209d0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO7 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO6 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (wo) | / - 0x009209c0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO6 - | edgecapture (1 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO5 | interruptmask (1 bit) (rw) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (ro) | / - 0x009209b0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO5 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO4 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | direction (1 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (rw) | / - 0x009209a0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO4 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO3 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (16 bit) (wo) | / - 0x00920990 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO3 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO2 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (8 bit) (wo) | / - 0x00920980 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO2 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO1 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | direction (11 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (11 bit) (rw) | / - 0x00920970 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO1 - | edgecapture (4 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO0 | interruptmask (4 bit) (rw) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (4 bit) (ro) | / - 0x00920960 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO0 - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | snaph (16 bit) (rw) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - TIMER0 | snapl (16 bit) (rw) | | - [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020 - | periodh (16 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | periodl (16 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | control (4 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | status (2 bit) (rw) | / - 0x00920940 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER0 - | | \ - : gap : > (space for UART1) - | | / - 0x00920920 ---32-----------16|15------------0- - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - UART0 | (unused) | > 0x00000020 - [2] + 0x10 |- - - - - - - - - - - - - - - -| | - | control (10 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | status (10 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | txdata (8 bit) (wo) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | rxdata (8 bit) (ro) | / - 0x00920900 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART0 - -- - - - - - - - - - - on chip debugging - - - - - - - - - - - - - - - - - - - - - 0x00920900 ----------------------------------- - | | \ - : (real size : | - OCI Debug : and content : > CONFIG_SYS_NIOS_CPU_OCI_SIZE - : unknown) : | = 0x00000100 - | | / - 0x00920800 ----------------------------------- CONFIG_SYS_NIOS_CPU_OCI_BASE - -- - - - - - - - - - - on chip memory - - - - - - - - - - - - - 0x00920800 ---32-----------16|15------------0- - | : | \ - | : | | - GERMS | : | > CONFIG_SYS_NIOS_CPU_ROM_SIZE - | : | | = 0x00000800 - | : | / - 0x00920000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_RST_VECT - 0x00920000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_ROM_BASE - -- - - - - - - - - - - external i/o - - - - - - - - - - - - - - - - - - - - - 0x00920000 ---32-----------16|15------------0- - | gap | \ - 0x00910310 --+-------------------------------| | - | | | - | register bank (size = 0x10) | | - | +--------.---.---.--- | | - | | bank 0 \ 1 \ 2 \ 3 \ | | - | |---------------------------+ | | - LAN91C111 | | BANK | RESERVED | | | - | |- - - - - - -|- - - - - - -| | > na_lan91c111_size - | | RPCR | MIR | | | = 0x00010000 - | |- - - - - - -|- - - - - - -| | | - | | COUNTER | RCR | | | - | |- - - - - - -|- - - - - - -| | | - | | EPH STATUS | TCR | | | - | +---------------------------+ | | - 0x00910300 --+--LAN91C111_REGISTERS_OFFSET---| | - | gap | / - 0x00910000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_LAN0_BASE - | | - : gap : - : : - -- - - - - - - - - - - external memory 1 - - - - - - - - - - - - - - - - - - - - - : : - : gap : - | | - 0x00900000 ---32-----------16|15------------0- - 0x00900000 --+32-----------16|15------------0+ - | : | \ \ - | : | | | - | : | | > CONFIG_SYS_NIOS_CPU_VEC_SIZE - | : | | | = 0x00000100 - | : | | / - 0x008fff00 |- - - - - - - -:- - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_VEC_BASE - 0x008fff00 |- - - - - - - -:- - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_STACK - | : | | \ - | : | | | - | : | | > stack area - | : | | | - | : | | V - | : | | - SRAM | : | > CONFIG_SYS_NIOS_CPU_SRAM_SIZE - | : | | = 0x00100000 - | : | / - 0x00800000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SRAM_BASE - 0x00800000 ---8-------------4|3-------------0- - | sector 127 | \ - + 0x7f0000 |- - - - - - - - - - - - - - - -| | - | : | | - Flash |- - - - : - - - -| > CONFIG_SYS_NIOS_CPU_FLASH_SIZE - | sector 1 : | | = 0x00800000 - + 0x010000 |- - - - - - - - - - - - - - - -| | - | sector 0 (size = 0x10000) | / - 0x00000000 ---8-------------4|3-------------0- CONFIG_SYS_NIOS_CPU_FLASH_BASE - - -=============================================================================== - F L A S H M E M O R Y A L L O C A T I O N -=============================================================================== - - 0x00800000 ---8-------------4|3-------------0- - | : | \ - SAFE | : | > 1 MByte - FPGA conf. | : | / (NOT usable by software) - 0x00700000 --+- - - - - - - -:- - - - - - - -+- - | : | \ - USER | : | > 1 MByte - FPGA conf. | : | / (NOT usable by software) - 0x00600000 --+- - - - - - - -:- - - - - - - -+- - | : | \ - | : | | - WEB pages | : | > 2 MByte - | : | | (provisory usable) - | : | / - 0x00400000 --+- - - - - - - -:- - - - - - - -+- - | : | \ - | : | | - | : | | - | : | > 4 MByte free for use - | : | | - 0x00040000 --+- - - - - - - -:- - - - - - - -+-|- u-boot _start() - | : | / - 0x00000000 |- - - - - - - -:- - - - - - - -+- - u-boot environment - 0x00000000 ---8-------------4|3-------------0- - - -=============================================================================== - R E F E R E N C E S -=============================================================================== -[1] http://www.altera.com/literature/manual/mnl_nios_board_cyclone_1c20.pdf -[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf -[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf -[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf -[5] http://www.altera.com/literature/ds/ds_nios_asmi.pdf - http://www.altera.com/literature/wp/wp_epcs_cyc.pdf -[6] http://www.opencores.org/projects/ata/ - http://www.t13.org/index.html - - -=============================================================================== -Stephan Linz <linz@li-pro.net> diff --git a/doc/README.dk1s10 b/doc/README.dk1s10 deleted file mode 100644 index 622bef5374..0000000000 --- a/doc/README.dk1s10 +++ /dev/null @@ -1,131 +0,0 @@ - - Nios Development Kit - Startix Editions - - Last Update: January 28, 2004 -==================================================================== - -This file contains information regarding U-Boot and the Altera -Nios Development Kit, Startix Edition (DK-1S10). For general Nios -information see doc/README.nios. - -Most stuff of this file was borrowed and based on README.dk1c20, -the DK-1C20 related information file. - -For those interested in contributing ... see HELP WANTED section -in doc/README.nios. - -Contents: - - 1. Files - 2. Memory Organization - 3. CPU Variations - 4. Examples - 5. Programming U-Boot into FLASH with GERMS - -==================================================================== - -1. Files -========= - board/altera/dk1s10/* - include/configs/DK1S10.h - -2. Memory Organization -======================= - - -The heap is placed below the monitor (U-Boot code). - -Global data is placed below the heap. - -The stack is placed below global data (&grows down). - -3. CPU Variations -================= - -There are more than one NIOS CPU variation for the DK-1S10. U-Boot -supports the following CPU configurations: - - - Altera Standard 32 (make DK1S10_standard_32_config) - - Microtronix LDK 2.0 (make DK1S10_mtx_ldk_20_config) - -4. Examples -============ - -The hello_world example was never tested on DK-1S10. Neverthelse -it should work as far as possible, because the DK-1S10 port is -more than ninetieth percents equal to the DK-1C20 port and at -this platform the hello_world example was already tested -successfully (see README.dk1c20). - - -5. Programming U-Boot into FLASH with GERMS -============================================ -The current version of the DK-1S10 port with the default -configuration settings occupies about 78 KBytes of flash. -A minimal configuration occupies less than 60 KByte -(network support disabled). - -To program U-Boot into the DK-1S10 flash using GERMS do the -following: - -1. From the command line, download U-Boot using the nios-run: - - $ nios-run -r u-boot.srec - -This takes about 45 seconds (GERMS is not very speedy here). -After u-boot is downloaded it will be executed. You should -see the following: - - U-Boot 1.0.2 (Jan 28 2004 - 19:02:30) - - CPU: Nios-32 Rev. 3.3 (0x3038) - Reg file size: 256 LO_LIMIT/HI_LIMIT: 2/14 - Board: Altera Nios 1S10 Development Kit - In: serial - Out: serial - Err: serial - DK1S10 > - - -2. Quit nios-run and start your terminal application (e.g. start - Hyperterminal or minicom). - -3. Download the u-boot code to RAM. When using Hyperterminal, do the - following: - - a. From the u-boot command prompt start a binary download to - SRAM / SDRAM: - - at the Altera Standard 32 to SRAM: - - ==> loadb 800000 - - at the Microtronix LDK 2.0 to SDRAM: - - ==> loadb 1010000 - - b. Download u-boot.bin using kermit. - -4. From the U-Boot command prompt, erase flash: - - at the Altera Standard 32 from 0x40000 to 0x5ffff: - - ==> erase 1:4-5 - - at the Microtronix LDK 2.0 from 0x8000000 to 0x81ffff: - - ==> erase 1:0-1 - -5. Copy the binary image from SRAM / SDRAM to flash: - - at the Altera Standard 32 to SRAM: - - ==> cp.b 800000 40000 ${filesize} - - at the Microtronix LDK 2.0 to SDRAM: - - ==> cp.b 1010000 8000000 ${filesize} - -U-Boot will now automatically start when the board is powered on or -reset using the Standard-32 configuration. To start U-Boot with the -Safe-32 configuration, enter the following GERMS command: - - + g 40000 diff --git a/doc/README.dk1s10_mldk20 b/doc/README.dk1s10_mldk20 deleted file mode 100644 index 74e07a93d1..0000000000 --- a/doc/README.dk1s10_mldk20 +++ /dev/null @@ -1,286 +0,0 @@ - -TODO: specify IDE i/f - - -=============================================================================== - C P U , M E M O R Y , I N / O U T C O M P O N E N T S -=============================================================================== -see also [1]-[5] - -CPU: "LDK2" - 32 bit NIOS for 75 MHz - 512 Byte for register file (30 levels) - with out instruction cache - with out data cache - 2 KByte On Chip ROM with GERMS boot monitor - with out On Chip RAM - MSTEP multiplier - no Debug Core - no On Chip Instrumentation (OCI) - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_CLK = 75000000 - CONFIG_SYS_NIOS_CPU_ICACHE = (not present) - CONFIG_SYS_NIOS_CPU_DCACHE = (not present) - CONFIG_SYS_NIOS_CPU_REG_NUMS = 512 - CONFIG_SYS_NIOS_CPU_MUL = 0 - CONFIG_SYS_NIOS_CPU_MSTEP = 1 - CONFIG_SYS_NIOS_CPU_DBG_CORE = 0 - -IRQ: Nr. | used by - ------+-------------------------------------------------------- - 16 | TIMER0 | CONFIG_SYS_NIOS_CPU_TIMER0_IRQ = 16 - 17 | UART0 | CONFIG_SYS_NIOS_CPU_UART0_IRQ = 17 - 18 | UART1 | CONFIG_SYS_NIOS_CPU_UART1_IRQ = 18 - 20 | LAN91C111 | CONFIG_SYS_NIOS_CPU_LAN0_IRQ = 20 - 25 | IDE0 | CONFIG_SYS_NIOS_CPU_IDE0_IRQ = 25 - -MEMORY: 8 MByte Flash - 16 MByte SDRAM - -Timer: TIMER0: high priority programmable timer (IRQ16) - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_TICK_TIMER = 0 - CONFIG_SYS_NIOS_CPU_USER_TIMER = (not present) - -PIO: Nr. | description - ------+-------------------------------------------------------- - PIO0 | CFPOWER: 1 output to controll CF power supply - PIO1 | BUTTON: 4 inputs for user push buttons (no IRQ) - ------+-------------------------------------------------------- - not | LCD: 11 in/outputs for ASCII LCD - pres.| LED: 8 outputs for user LEDs - | SEVENSEG: 16 outputs for user seven segment display - | RECONF: 1 in/output for . . . . . . . . . . . . - | CFPRESENT: 1 input for CF present event (IRQ35) - | CFATASEL: 1 output to controll CF ATA card select - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_BUTTON_PIO = 1 - CONFIG_SYS_NIOS_CPU_LCD_PIO = (not present) - CONFIG_SYS_NIOS_CPU_LED_PIO = (not present) - CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO = (not present) - CONFIG_SYS_NIOS_CPU_RECONF_PIO = (not present) - CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO = (not present) - CONFIG_SYS_NIOS_CPU_CFPOWER_PIO = 0 - CONFIG_SYS_NIOS_CPU_CFATASEL_PIO = (not present) - -UART: UART0: fixed baudrate of 115200, fixed protocol 8N2, - without handshake RTS/CTS (IRQ17) - UART1: fixed baudrate of 115200, fixed protocol 8N1, - without handshake RTS/CTS (IRQ18) - -LAN: SMsC LAN91C111 with: - - offset 0x300 (LAN91C111_REGISTERS_OFFSET) - - data bus width 32 bit (LAN91C111_DATA_BUS_WIDTH) - -IDE: (TODO) - - -=============================================================================== - M E M O R Y M A P -=============================================================================== - -- - - - - - - - - - - external memory - - - - - - - - - - - - - - - - - - - - - 0x02000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_STACK - 0x02000000 --+32-----------16|15------------0+ - | . | \ \ - | . | | | - | . | | > stack area - | . | | | - | . | | V - | . | | - | . | | - SDRAM | . | > CONFIG_SYS_NIOS_CPU_SDRAM_SIZE - | . | | = 0x01000000 - | . | | - 0x01000100 |- - - - - - - - - - - - - - - -+-|- - | . | | \ - | . | | | - | . | | > CONFIG_SYS_NIOS_CPU_VEC_SIZE - | . | | | = 0x00000100 - | | / / - 0x01000000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_VEC_BASE - 0x01000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SDRAM_BASE - | sector 127 | \ - + 0x7f0000 |- - - - - - - - - - - - - - - -| | - | : | | - Flash |- - - - : - - - -| > CONFIG_SYS_NIOS_CPU_FLASH_SIZE - | sector 1 : | | = 0x00800000 - + 0x010000 |- - - - - - - - - - - - - - - -| | - | sector 0 (size = 0x10000) | / - 0x00800000 ---8-------------4|3-------------0- CONFIG_SYS_NIOS_CPU_FLASH_BASE - | | - : gap : - : : - -- - - - - - - - - - - external i/o - - - - - - - - - - - - - - - - - - - - - : : - : gap : - | | - 0x00020000 ---32-----------16|15------------0- - | gap | \ - 0x00010310 --+-------------------------------| | - | | | - | register bank (size = 0x10) | | - | +--------.---.---.--- | | - | | bank 0 \ 1 \ 2 \ 3 \ | | - | |---------------------------+ | | - LAN91C111 | | BANK | RESERVED | | | - | |- - - - - - -|- - - - - - -| | > na_enet_size - | | RPCR | MIR | | | = 0x00010000 - | |- - - - - - -|- - - - - - -| | | - | | COUNTER | RCR | | | - | |- - - - - - -|- - - - - - -| | | - | | EPH STATUS | TCR | | | - | +---------------------------+ | | - 0x00010300 --+--LAN91C111_REGISTERS_OFFSET---| | - | gap | / - 0x00010000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_LAN0_BASE - | | - : gap : - : : - -- - - - - - - - - - - on chip i/o - - - - - - - - - - - - - - - - - - - - - : : - : gap : - | | - 0x00000980 ---32-----------16|15------------0- - | | | \ - : (real size : : | - IDE i/f : and content : : > 0x00000080 - [5] : unknown) : : | - | | | / - 0x00000900 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_IDE0 - | | \ - : gap : > (space for PIO4..7) - | | / - 0x000008c0 ---32-----------16|15------------0- - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - UART1 | (unused) | > 0x00000020 - [2] + 0x10 |- - - - - - - - - - - - - - - -| | - | control (10 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | status (10 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | txdata (8 bit) (wo) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | rxdata (8 bit) (ro) | / - 0x000008a0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART1 - | | \ - : gap : > (space for PIO2..3) - | | / - 0x00000880 ---32-----------16|15------------0- - | edgecapture (4 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO1 | interruptmask (4 bit) (rw) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (4 bit) (ro) | / - 0x00000870 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO1 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO0 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (wo) | / - 0x00000860 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO0 - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | snaph (16 bit) (rw) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - TIMER0 | snapl (16 bit) (rw) | | - [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020 - | periodh (16 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | periodl (16 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | control (4 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | status (2 bit) (rw) | / - 0x00000840 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER0 - | | \ - : gap : > (space for UART2) - | | / - 0x00000820 ---32-----------16|15------------0- - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - UART0 | (unused) | > 0x00000020 - [2] + 0x10 |- - - - - - - - - - - - - - - -| | - | control (10 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | status (10 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | txdata (8 bit) (wo) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | rxdata (8 bit) (ro) | / - 0x00000800 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART0 - -- - - - - - - - - - - on chip memory 1 - - - - - - - - - - - - - 0x00000800 ---32-----------16|15------------0- - | : | \ - | : | | - GERMS | : | > CONFIG_SYS_NIOS_CPU_ROM_SIZE - | : | | = 0x00000800 - | : | / - 0x00000000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_RST_VECT - 0x00000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_ROM_BASE - -=============================================================================== - F L A S H M E M O R Y A L L O C A T I O N -=============================================================================== - - 0x01000000 ---8-------------4|3-------------0- - | : | \ - SAFE | : | > 1 MByte - FPGA conf. | : | / (NOT usable by software) - 0x00f00000 --+- - - - - - - -:- - - - - - - -+- - | : | \ - USER | : | > 1 MByte - FPGA conf. | : | / (NOT usable by software) - 0x00e00000 --+- - - - - - - -:- - - - - - - -+- - | : | \ - | : | | - WEB pages | : | > 2 MByte - | : | | (provisory usable) - | : | / - 0x00c00000 --+- - - - - - - -:- - - - - - - -+- - | : | \ - | : | | - | : | | - | : | > 4 MByte free for use - | : | | - 0x00840000 --+- - - - - - - -:- - - - - - - -+-|- u-boot environment - | : | / - 0x00800000 |- - - - - - - -:- - - - - - - -+- - u-boot _start() - 0x00800000 ---8-------------4|3-------------0- - - -=============================================================================== - R E F E R E N C E S -=============================================================================== -[1] http://www.altera.com/literature/manual/mnl_nios_board_stratix_1s10.pdf -[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf -[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf -[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf -[5] http://www.opencores.org/projects/ata/ - http://www.t13.org/index.html - - -=============================================================================== -Stephan Linz <linz@li-pro.net> diff --git a/doc/README.dk1s10_std32 b/doc/README.dk1s10_std32 deleted file mode 100644 index 622b2b9c83..0000000000 --- a/doc/README.dk1s10_std32 +++ /dev/null @@ -1,354 +0,0 @@ - -TODO: specify IDE i/f - specify OCI - - -=============================================================================== - C P U , M E M O R Y , I N / O U T C O M P O N E N T S -=============================================================================== -see also [1]-[5] - -CPU: "standard_32" - 32 bit NIOS for 50 MHz - 256 Byte for register file (15 levels) - 4 KByte instruction cache (4 bytes in each cache line) - 4 KByte data cache (4 bytes in each cache line) - 2 KByte On Chip ROM with GERMS boot monitor - 64 KByte On Chip RAM - MSTEP multiplier - no Debug Core - On Chip Instrumentation (OCI) enabled - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_CLK = 50000000 - CONFIG_SYS_NIOS_CPU_ICACHE = 4096 - CONFIG_SYS_NIOS_CPU_DCACHE = 4096 - CONFIG_SYS_NIOS_CPU_REG_NUMS = 256 - CONFIG_SYS_NIOS_CPU_MUL = 0 - CONFIG_SYS_NIOS_CPU_MSTEP = 1 - CONFIG_SYS_NIOS_CPU_DBG_CORE = 0 - -OCI: (TODO) - -IRQ: Nr. | used by - ------+-------------------------------------------------------- - 16 | TIMER0 | CONFIG_SYS_NIOS_CPU_TIMER0_IRQ = 16 - 25 | UART0 | CONFIG_SYS_NIOS_CPU_UART0_IRQ = 25 - 30 | LAN91C111 | CONFIG_SYS_NIOS_CPU_LAN0_IRQ = 30 - 35 | PIO5 | CONFIG_SYS_NIOS_CPU_PIO5_IRQ = 35 - 40 | PIO0 | CONFIG_SYS_NIOS_CPU_PIO0_IRQ = 40 - 50 | TIMER1 | CONFIG_SYS_NIOS_CPU_TIMER1_IRQ = 50 - -MEMORY: 8 MByte Flash - 1 MByte SRAM - 16 MByte SDRAM - -Timer: TIMER0: high priority programmable timer (IRQ16) - TIMER1: low priority fixed timer for 10 ms @ 50 MHz (IRQ50) - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_TICK_TIMER = 1 - CONFIG_SYS_NIOS_CPU_USER_TIMER = 0 - -PIO: Nr. | description - ------+-------------------------------------------------------- - PIO0 | BUTTON: 4 inputs for user push buttons (IRQ40) - PIO1 | LCD: 11 in/outputs for ASCII LCD - PIO2 | LED: 8 outputs for user LEDs - PIO3 | SEVENSEG: 16 outputs for user seven segment display - PIO4 | RECONF: 1 in/output for . . . . . . . . . . . . - PIO5 | CFPRESENT: 1 input for CF present event (IRQ35) - PIO6 | CFPOWER: 1 output to controll CF power supply - PIO7 | CFATASEL: 1 output to controll CF ATA card select - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_BUTTON_PIO = 0 - CONFIG_SYS_NIOS_CPU_LCD_PIO = 1 - CONFIG_SYS_NIOS_CPU_LED_PIO = 2 - CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO = 3 - CONFIG_SYS_NIOS_CPU_RECONF_PIO = 4 - CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO = 5 - CONFIG_SYS_NIOS_CPU_CFPOWER_PIO = 6 - CONFIG_SYS_NIOS_CPU_CFATASEL_PIO = 7 - -UART: UART0: fixed baudrate of 115200, fixed protocol 8N1, - without handshake RTS/CTS (IRQ25) - -LAN: SMsC LAN91C111 with: - - offset 0x300 (LAN91C111_REGISTERS_OFFSET) - - data bus width 32 bit (LAN91C111_DATA_BUS_WIDTH) - -IDE: (TODO) - - -=============================================================================== - M E M O R Y M A P -=============================================================================== - -- - - - - - - - - - - external memory 2 - - - - - - - - - - - - - - - - - - - - - 0x02000000 ---32-----------16|15------------0- - | : | \ - | : | | - SDRAM | : | > CONFIG_SYS_NIOS_CPU_SDRAM_SIZE - | : | | = 0x01000000 - | : | / - 0x01000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SDRAM_BASE - | | - : gap : - : : - -- - - - - - - - - - - on chip i/o - - - - - - - - - - - - - - - - - - - - - : : - : gap : - | | - 0x00920a80 ---32-----------16|15------------0- - | | | \ - : (real size : : | - IDE i/f : and content : : > 0x00000080 - [5] : unknown) : : | - | | | / - 0x00920a00 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_IDE0 - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - TIMER1 | (unused) | | - [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020 - | (unused) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | control (1 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | status (2 bit) (rw) | / - 0x009209e0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER1 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO7 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (wo) | / - 0x009209d0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO7 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO6 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (wo) | / - 0x009209c0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO6 - | edgecapture (1 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO5 | interruptmask (1 bit) (rw) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (ro) | / - 0x009209b0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO5 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO4 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | direction (1 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (rw) | / - 0x009209a0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO4 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO3 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (16 bit) (wo) | / - 0x00920990 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO3 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO2 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (8 bit) (wo) | / - 0x00920980 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO2 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO1 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | direction (11 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (11 bit) (rw) | / - 0x00920970 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO1 - | edgecapture (4 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO0 | interruptmask (4 bit) (rw) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (4 bit) (ro) | / - 0x00920960 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO0 - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | snaph (16 bit) (rw) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - TIMER0 | snapl (16 bit) (rw) | | - [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020 - | periodh (16 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | periodl (16 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | control (4 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | status (2 bit) (rw) | / - 0x00920940 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER0 - | | \ - : gap : > (space for UART1) - | | / - 0x00920920 ---32-----------16|15------------0- - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - UART0 | (unused) | > 0x00000020 - [2] + 0x10 |- - - - - - - - - - - - - - - -| | - | control (10 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | status (10 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | txdata (8 bit) (wo) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | rxdata (8 bit) (ro) | / - 0x00920900 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART0 - -- - - - - - - - - - - on chip debugging - - - - - - - - - - - - - - - - - - - - - 0x00920900 ----------------------------------- - | | \ - : (real size : | - OCI Debug : and content : > CONFIG_SYS_NIOS_CPU_OCI_SIZE - : unknown) : | = 0x00000100 - | | / - 0x00920800 ----------------------------------- CONFIG_SYS_NIOS_CPU_OCI_BASE - -- - - - - - - - - - - on chip memory 2 - - - - - - - - - - - - - 0x00920800 ---32-----------16|15------------0- - | : | \ - | : | | - GERMS | : | > CONFIG_SYS_NIOS_CPU_ROM_SIZE - | : | | = 0x00000800 - | : | / - 0x00920000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_RST_VECT - 0x00920000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_ROM_BASE - -- - - - - - - - - - - external i/o - - - - - - - - - - - - - - - - - - - - - 0x00920000 ---32-----------16|15------------0- - | gap | \ - 0x00910310 --+-------------------------------| | - | | | - | register bank (size = 0x10) | | - | +--------.---.---.--- | | - | | bank 0 \ 1 \ 2 \ 3 \ | | - | |---------------------------+ | | - LAN91C111 | | BANK | RESERVED | | | - | |- - - - - - -|- - - - - - -| | > na_lan91c111_size - | | RPCR | MIR | | | = 0x00010000 - | |- - - - - - -|- - - - - - -| | | - | | COUNTER | RCR | | | - | |- - - - - - -|- - - - - - -| | | - | | EPH STATUS | TCR | | | - | +---------------------------+ | | - 0x00910300 --+--LAN91C111_REGISTERS_OFFSET---| | - | gap | / - 0x00910000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_LAN0_BASE - -- - - - - - - - - - - on chip memory 1 - - - - - - - - - - - - - 0x00910000 ---32-----------16|15------------0- - | : | \ - | : | | - onchip RAM | : | > CONFIG_SYS_NIOS_CPU_RAM_SIZE - | : | | = 0x00010000 - | : | / - 0x00900000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_RAM_BASE - -- - - - - - - - - - - external memory 1 - - - - - - - - - - - - - - - - - - - - - 0x00900000 ---32-----------16|15------------0- - 0x00900000 --+32-----------16|15------------0+ - | . | \ \ - | . | | | - | . | | > CONFIG_SYS_NIOS_CPU_VEC_SIZE - | . | | | = 0x00000100 - | . | | / - 0x008fff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_VEC_BASE - 0x008fff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_STACK - | . | | \ - | . | | | - | . | | > stack area - | . | | | - | . | | V - | . | | - SRAM | . | > CONFIG_SYS_NIOS_CPU_SRAM_SIZE - | . | | = 0x00100000 - | | / - 0x00800000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SRAM_BASE - 0x00800000 ---8-------------4|3-------------0- - | sector 127 | \ - + 0x7f0000 |- - - - - - - - - - - - - - - -| | - | : | | - Flash |- - - - : - - - -| > CONFIG_SYS_NIOS_CPU_FLASH_SIZE - | sector 1 : | | = 0x00800000 - + 0x010000 |- - - - - - - - - - - - - - - -| | - | sector 0 (size = 0x10000) | / - 0x00000000 ---8-------------4|3-------------0- CONFIG_SYS_NIOS_CPU_FLASH_BASE - - -=============================================================================== - F L A S H M E M O R Y A L L O C A T I O N -=============================================================================== - - 0x00800000 ---8-------------4|3-------------0- - | : | \ - SAFE | : | > 1 MByte - FPGA conf. | : | / (NOT usable by software) - 0x00700000 --+- - - - - - - -:- - - - - - - -+- - | : | \ - USER | : | > 1 MByte - FPGA conf. | : | / (NOT usable by software) - 0x00600000 --+- - - - - - - -:- - - - - - - -+- - | : | \ - | : | | - WEB pages | : | > 2 MByte - | : | | (provisory usable) - | : | / - 0x00400000 --+- - - - - - - -:- - - - - - - -+- - | : | \ - | : | | - | : | | - | : | > 4 MByte free for use - | : | | - 0x00040000 --+- - - - - - - -:- - - - - - - -+-|- u-boot _start() - | : | / - 0x00000000 |- - - - - - - -:- - - - - - - -+- - u-boot environment - 0x00000000 ---8-------------4|3-------------0- - - -=============================================================================== - R E F E R E N C E S -=============================================================================== -[1] http://www.altera.com/literature/manual/mnl_nios_board_stratix_1s10.pdf -[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf -[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf -[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf -[5] http://www.opencores.org/projects/ata/ - http://www.t13.org/index.html - - -=============================================================================== -Stephan Linz <linz@li-pro.net> diff --git a/doc/README.dk1s40_std32 b/doc/README.dk1s40_std32 deleted file mode 100644 index 9a0ea060c7..0000000000 --- a/doc/README.dk1s40_std32 +++ /dev/null @@ -1,355 +0,0 @@ - -TODO: specify IDE i/f - specify OCI - - -=============================================================================== - C P U , M E M O R Y , I N / O U T C O M P O N E N T S -=============================================================================== -see also [1]-[5] - -CPU: "standard_32" - 32 bit NIOS for 50 MHz - 256 Byte for register file (15 levels) - 4 KByte instruction cache (4 bytes in each cache line) - 4 KByte data cache (4 bytes in each cache line) - 2 KByte On Chip ROM with GERMS boot monitor - 64 KByte On Chip RAM - MSTEP multiplier - no Debug Core - On Chip Instrumentation (OCI) enabled - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_CLK = 50000000 - CONFIG_SYS_NIOS_CPU_ICACHE = 4096 - CONFIG_SYS_NIOS_CPU_DCACHE = 4096 - CONFIG_SYS_NIOS_CPU_REG_NUMS = 256 - CONFIG_SYS_NIOS_CPU_MUL = 0 - CONFIG_SYS_NIOS_CPU_MSTEP = 1 - CONFIG_SYS_NIOS_CPU_DBG_CORE = 0 - -OCI: (TODO) - -IRQ: Nr. | used by - ------+-------------------------------------------------------- - 16 | TIMER0 | CONFIG_SYS_NIOS_CPU_TIMER0_IRQ = 16 - 25 | UART0 | CONFIG_SYS_NIOS_CPU_UART0_IRQ = 25 - 30 | LAN91C111 | CONFIG_SYS_NIOS_CPU_LAN0_IRQ = 30 - 35 | PIO5 | CONFIG_SYS_NIOS_CPU_PIO5_IRQ = 35 - 40 | PIO0 | CONFIG_SYS_NIOS_CPU_PIO0_IRQ = 40 - 50 | TIMER1 | CONFIG_SYS_NIOS_CPU_TIMER1_IRQ = 50 - -MEMORY: 8 MByte Flash - 1 MByte SRAM - 16 MByte SDRAM - -Timer: TIMER0: high priority programmable timer (IRQ16) - TIMER1: low priority fixed timer for 10 ms @ 50 MHz (IRQ50) - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_TICK_TIMER = 1 - CONFIG_SYS_NIOS_CPU_USER_TIMER = 0 - -PIO: Nr. | description - ------+-------------------------------------------------------- - PIO0 | BUTTON: 4 inputs for user push buttons (IRQ40) - PIO1 | LCD: 11 in/outputs for ASCII LCD - PIO2 | LED: 8 outputs for user LEDs - PIO3 | SEVENSEG: 16 outputs for user seven segment display - PIO4 | RECONF: 1 in/output for . . . . . . . . . . . . - PIO5 | CFPRESENT: 1 input for CF present event (IRQ35) - PIO6 | CFPOWER: 1 output to controll CF power supply - PIO7 | CFATASEL: 1 output to controll CF ATA card select - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_BUTTON_PIO = 0 - CONFIG_SYS_NIOS_CPU_LCD_PIO = 1 - CONFIG_SYS_NIOS_CPU_LED_PIO = 2 - CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO = 3 - CONFIG_SYS_NIOS_CPU_RECONF_PIO = 4 - CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO = 5 - CONFIG_SYS_NIOS_CPU_CFPOWER_PIO = 6 - CONFIG_SYS_NIOS_CPU_CFATASEL_PIO = 7 - -UART: UART0: fixed baudrate of 115200, fixed protocol 8N1, - without handshake RTS/CTS (IRQ25) - -LAN: SMsC LAN91C111 with: - - offset 0x300 (LAN91C111_REGISTERS_OFFSET) - - data bus width 32 bit (LAN91C111_DATA_BUS_WIDTH) - -IDE: (TODO) - - -=============================================================================== - M E M O R Y M A P -=============================================================================== - -- - - - - - - - - - - external memory 2 - - - - - - - - - - - - - - - - - - - - - 0x02000000 ---32-----------16|15------------0- - | : | \ - | : | | - SDRAM | : | > CONFIG_SYS_NIOS_CPU_SRAM_SIZE - | : | | = 0x01000000 - | : | / - 0x01000000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SRAM_BASE - | | - : gap : - : : - -- - - - - - - - - - - on chip i/o - - - - - - - - - - - - - - - - - - - - - : : - : gap : - | | - 0x00920a80 ---32-----------16|15------------0- - | | | \ - : (real size : : | - IDE i/f : and content : : > 0x00000080 - [5] : unknown) : : | - | | | / - 0x00920a00 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_IDE0 - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - TIMER1 | (unused) | | - [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020 - | (unused) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | control (1 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | status (2 bit) (rw) | / - 0x009209e0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER1 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO7 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (wo) | / - 0x009209d0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO7 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO6 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (wo) | / - 0x009209c0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO6 - | edgecapture (1 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO5 | interruptmask (1 bit) (rw) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (ro) | / - 0x009209b0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO5 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO4 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | direction (1 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (1 bit) (rw) | / - 0x009209a0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO4 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO3 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (16 bit) (wo) | / - 0x00920990 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO3 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO2 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (8 bit) (wo) | / - 0x00920980 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO2 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO1 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | direction (11 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (11 bit) (rw) | / - 0x00920970 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO1 - | edgecapture (4 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO0 | interruptmask (4 bit) (rw) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (4 bit) (ro) | / - 0x00920960 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO0 - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | snaph (16 bit) (rw) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - TIMER0 | snapl (16 bit) (rw) | | - [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020 - | periodh (16 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | periodl (16 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | control (4 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | status (2 bit) (rw) | / - 0x00920940 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER0 - | | \ - : gap : > (space for UART1) - | | / - 0x00920920 ---32-----------16|15------------0- - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - UART0 | (unused) | > 0x00000020 - [2] + 0x10 |- - - - - - - - - - - - - - - -| | - | control (10 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | status (10 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | txdata (8 bit) (wo) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | rxdata (8 bit) (ro) | / - 0x00920900 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART0 - -- - - - - - - - - - - on chip debugging - - - - - - - - - - - - - - - - - - - - - 0x00920900 ----------------------------------- - | | \ - : (real size : | - OCI Debug : and content : > CONFIG_SYS_NIOS_CPU_OCI_SIZE - : unknown) : | = 0x00000100 - | | / - 0x00920800 ----------------------------------- CONFIG_SYS_NIOS_CPU_OCI_BASE - -- - - - - - - - - - - on chip memory 2 - - - - - - - - - - - - - 0x00920800 ---32-----------16|15------------0- - | : | \ - | : | | - GERMS | : | > CONFIG_SYS_NIOS_CPU_ROM_SIZE - | : | | = 0x00000800 - | : | / - 0x00920000 |- - - - - - - - - - - - - - - -+- - CONFIG_SYS_NIOS_CPU_RST_VECT - 0x00920000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_ROM_BASE - -- - - - - - - - - - - external i/o - - - - - - - - - - - - - - - - - - - - - 0x00920000 ---32-----------16|15------------0- - | gap | \ - 0x00910310 --+-------------------------------| | - | | | - | register bank (size = 0x10) | | - | +--------.---.---.--- | | - | | bank 0 \ 1 \ 2 \ 3 \ | | - | |---------------------------+ | | - LAN91C111 | | BANK | RESERVED | | | - | |- - - - - - -|- - - - - - -| | > na_lan91c111_size - | | RPCR | MIR | | | = 0x00010000 - | |- - - - - - -|- - - - - - -| | | - | | COUNTER | RCR | | | - | |- - - - - - -|- - - - - - -| | | - | | EPH STATUS | TCR | | | - | +---------------------------+ | | - 0x00910300 --+--LAN91C111_REGISTERS_OFFSET---| | - | gap | / - 0x00910000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_LAN0_BASE - -- - - - - - - - - - - on chip memory 1 - - - - - - - - - - - - - 0x00910000 ---32-----------16|15------------0- - | : | \ - | : | | - onchip RAM | : | > CONFIG_SYS_NIOS_CPU_RAM_SIZE - | : | | = 0x00010000 - | : | / - 0x00900000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_RAM_BASE - -- - - - - - - - - - - external memory 1 - - - - - - - - - - - - - - - - - - - - - 0x00900000 ---32-----------16|15------------0- - 0x00900000 --+32-----------16|15------------0+ - | . | \ \ - | . | | | - | . | | > CONFIG_SYS_NIOS_CPU_VEC_SIZE - | . | | | = 0x00000100 - | . | | / - 0x008fff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_VEC_BASE - 0x008fff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_STACK - | . | | \ - | . | | | - | . | | > stack area - | . | | | - | . | | V - | . | | - SRAM | . | > CONFIG_SYS_NIOS_CPU_SRAM_SIZE - | . | | = 0x00100000 - | | / - 0x00800000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SRAM_BASE - 0x00800000 ---8-------------4|3-------------0- - | sector 127 | \ - + 0x7f0000 |- - - - - - - - - - - - - - - -| | - | : | | - Flash |- - - - : - - - -| > CONFIG_SYS_NIOS_CPU_FLASH_SIZE - | sector 1 : | | = 0x00800000 - + 0x010000 |- - - - - - - - - - - - - - - -| | - | sector 0 (size = 0x10000) | / - 0x00000000 ---8-------------4|3-------------0- CONFIG_SYS_NIOS_CPU_FLASH_BASE - - -=============================================================================== - F L A S H M E M O R Y A L L O C A T I O N -=============================================================================== - - 0x00800000 ---8-------------4|3-------------0- - | : | \ - | : | | - SAFE | : | > 2 MByte - FPGA conf. | : | | (NOT usable by software) - | : | / - 0x00600000 --+- - - - - - - -:- - - - - - - -+- - | : | \ - | : | | - USER | : | > 2 MByte - FPGA conf. | : | | (NOT usable by software) - | : | / - 0x00400000 --+- - - - - - - -:- - - - - - - -+- - | : | \ - | : | | - WEB pages | : | > 2 MByte - | : | | (provisory usable) - | : | / - 0x00200000 --+- - - - - - - -:- - - - - - - -+- - | : | \ - | : | | - | : | > 2 MByte free for use - 0x00040000 --+- - - - - - - -:- - - - - - - -+-|- u-boot _start() - | : | / - 0x00000000 ---8-------------4|3-------------0- - - -=============================================================================== - R E F E R E N C E S -=============================================================================== -[1] http://www.altera.com/literature/manual/mnl_nios_board_stratix_1s40.pdf -[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf -[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf -[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf -[5] http://www.opencores.org/projects/ata/ - http://www.t13.org/index.html - - -=============================================================================== -Stephan Linz <linz@li-pro.net> diff --git a/doc/README.dk20k200_std32 b/doc/README.dk20k200_std32 deleted file mode 100644 index fc2d2a3874..0000000000 --- a/doc/README.dk20k200_std32 +++ /dev/null @@ -1,242 +0,0 @@ - -=============================================================================== - C P U , M E M O R Y , I N / O U T C O M P O N E N T S -=============================================================================== -see also [1]-[4] - -CPU: "standard_32" - 32 bit NIOS for 33.333 MHz (nasys_clock_freq = 33333000) - 256 Byte for register file (15 levels) - no instruction cache - no data cache - 1 KByte On Chip ROM with GERMS boot monitor - no On Chip RAM - MSTEP multiplier - no Debug Core - no On Chip Instrumentation (OCI) enabled - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_CLK = 50000000 - CONFIG_SYS_NIOS_CPU_ICACHE = 0 - CONFIG_SYS_NIOS_CPU_DCACHE = 0 - CONFIG_SYS_NIOS_CPU_REG_NUMS = 256 - CONFIG_SYS_NIOS_CPU_MUL = 0 - CONFIG_SYS_NIOS_CPU_MSTEP = 1 - CONFIG_SYS_NIOS_CPU_DBG_CORE = 0 - -IRQ: Nr. | used by - ------+-------------------------------------------------------- - 25 | TIMER0 | CONFIG_SYS_NIOS_CPU_TIMER0_IRQ = 25 - 26 | UART0 | CONFIG_SYS_NIOS_CPU_UART0_IRQ = 26 - 27 | PIO2 | CONFIG_SYS_NIOS_CPU_PIO2_IRQ = 27 - 28 | UART1 | CONFIG_SYS_NIOS_CPU_UART1_IRQ = 28 (debug) - -MEMORY: 1 MByte Flash - 256 KByte SRAM - (SDRAM with standard SODIMM only) - -Timer: TIMER0: high priority programmable timer (IRQ25) - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_TICK_TIMER = 0 - -PIO: Nr. | description - ------+-------------------------------------------------------- - PIO0 | SEVENSEG: 16 outputs for user seven segment display - PIO1 | LED: 8 outputs for user LEDs - PIO2 | BUTTON: 4 inputs for user push buttons (IRQ27) - PIO3 | LCD: 11 in/outputs for ASCII LCD - - U-Boot CFG: CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO = 0 - CONFIG_SYS_NIOS_CPU_LED_PIO = 1 - CONFIG_SYS_NIOS_CPU_BUTTON_PIO = 2 - CONFIG_SYS_NIOS_CPU_LCD_PIO = 3 - -UART: UART0: fixed baudrate of 115200, fixed protocol 8N2, - without handshake RTS/CTS (IRQ26) - UART1: fixed baudrate of 115200, fixed protocol 8N1, - without handshake RTS/CTS (IRQ28) - - -=============================================================================== - M E M O R Y M A P -=============================================================================== - -- - - - - - - - - - - external memory - - - - - - - - - - - - - - - - - - - - - 0x00200000 ---15------------8|7-------------0- - | sector 18 | \ - + 0x0f0000 |- - - - - - - - - - - - - - - -| | - | : | | - Flash |- - - - : - - - -| | - | sector 5 : | | - + 0x020000 |- - - - - - - - -| | - | sector 4 (size = 0x10000) | | - + 0x010000 |- - - - - - - - - - - - - - - -| > CONFIG_SYS_NIOS_CPU_FLASH_SIZE - | sector 3 (size = 0x08000) | | = 0x00100000 - + 0x008000 |- - - - - - - - - - - - - - - -| | - | sector 2 (size = 0x02000) | | - + 0x006000 |- - - - - - - - - - - - - - - -| | - | sector 1 (size = 0x02000) | | - + 0x004000 |- - - - - - - - - - - - - - - -| | - | sector 0 (size = 0x04000) | / - 0x00100000 ---15------------8|7-------------0- CONFIG_SYS_NIOS_CPU_FLASH_BASE - | | - : gap : - | | - 0x00080000 ---32-----------16|15------------0- - 0x00080000 --+32-----------16|15------------0+ - | . | \ \ - | . | | | - | . | | > CONFIG_SYS_NIOS_CPU_VEC_SIZE - | . | | | = 0x00000100 - | . | | / - 0x0007ff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_VEC_BASE - 0x0007ff00 |- - - - - - - - - - - - - - - -+-|- CONFIG_SYS_NIOS_CPU_STACK - | . | | \ - | . | | | - | . | | > stack area - | . | | | - | . | | V - | . | | - SRAM | . | > CONFIG_SYS_NIOS_CPU_SRAM_SIZE - | . | | = 0x00040000 - | | / - 0x00040000 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_SRAM_BASE - | | - : gap : - : : - -- - - - - - - - - - - on chip i/o - - - - - - - - - - - - - - - - - - - - - : : - : gap : - | | - 0x00000400 ---32-----------16|15------------0- - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - UART1 | (unused) | > 0x00000020 - [2] + 0x10 |- - - - - - - - - - - - - - - -| | - | control (10 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | status (10 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | txdata (8 bit) (wo) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | rxdata (8 bit) (ro) | / - 0x000004c0 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART1 - | | - : gap : - | | - 0x00000490 ---32-----------16|15------------0- - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO3 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | direction (11 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (11 bit) (rw) | / - 0x00000480 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO3 - | edgecapture (12 bit) (rw) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO2 | interruptmask (12 bit) (rw) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (12 bit) (ro) | / - 0x00000470 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO2 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO1 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | direction (2 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (2 bit) (rw) | / - 0x00000460 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO1 - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | snaph (16 bit) (rw) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - TIMER0 | snapl (16 bit) (rw) | | - [3] + 0x10 |- - - - - - - - - - - - - - - -| > 0x00000020 - | periodh (16 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | periodl (16 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | control (4 bit) (rw) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | status (2 bit) (rw) | / - 0x00000440 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_TIMER0 - | (unused) | \ - + 0x0c |- - - - - - - - - - - - - - - -| | - PIO0 | (unused) | | - [4] + 0x08 |- - - - - - - - - - - - - - - -| > 0x00000010 - | (unused) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | data (16 bit) (wo) | / - 0x00000420 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_PIO0 - | (unused) | \ - + 0x1c |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x18 |- - - - - - - - - - - - - - - -| | - | (unused) | | - + 0x14 |- - - - - - - - - - - - - - - -| | - UART0 | (unused) | > 0x00000020 - [2] + 0x10 |- - - - - - - - - - - - - - - -| | - | control (10 bit) (rw) | | - + 0x0c |- - - - - - - - - - - - - - - -| | - | status (10 bit) (rw) | | - + 0x08 |- - - - - - - - - - - - - - - -| | - | txdata (8 bit) (wo) | | - + 0x04 |- - - - - - - - - - - - - - - -| | - | rxdata (8 bit) (ro) | / - 0x00000400 ---32-----------16|15------------0- CONFIG_SYS_NIOS_CPU_UART0 - -- - - - - - - - - - - on chip memory - - - - - - - - - - - - - 0x00000400 ---32-----------16|15------------0- - | : | \ - | : | | - GERMS | : | > na_boot_monitor_rom_size - | : | | = 0x00000400 - | : | / - 0x00000000 |- - - - - - - - - - - - - - - -+- - nasys_reset_address - 0x00000000 ---32-----------16|15------------0- na_boot_monitor_rom - - -=============================================================================== - F L A S H M E M O R Y A L L O C A T I O N -=============================================================================== - - 0x00200000 ---15------------8|7-------------0- - | : | \ - SAFE | : | > 256 KByte - FPGA conf. | : | / (NOT usable by software) - 0x001c0000 --+- - - - - - - -:- - - - - - - -+- - | : | \ - USER | : | > 256 KByte - FPGA conf. | : | / (NOT usable by software) - 0x00180000 --+- - - - - - - -:- - - - - - - -+- - | : | \ - | : | | - | : | > 512 KByte free for use - 0x00140000 --+- - - - - - - -:- - - - - - - -+-|- u-boot _start() - | : | / - 0x00100000 ---15------------8|7-------------0- - - -=============================================================================== - R E F E R E N C E S -=============================================================================== -[1] http://www.altera.com/literature/ds/ds_nios_board_apex_20k200e.pdf -[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf -[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf -[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf - - -=============================================================================== -Stephan Linz <linz@li-pro.net> diff --git a/doc/README.nios b/doc/README.nios deleted file mode 100644 index 5628144600..0000000000 --- a/doc/README.nios +++ /dev/null @@ -1,366 +0,0 @@ - - U-Boot for Nios-32 - - Last Update: February 1, 2004 -==================================================================== - -This file contains information regarding U-Boot and the Altera -Nios CPU. For information regarding U-Boot and the Nios Development -Kits see: - - * Cyclone Edition (DK-1C20), see doc/README.dk1c20 - * Stratix Edition (DK-1S10), see doc/README.dk1s10 (TODO) - * Stratix Edition (DK-1S40), see doc/README.dk1s40 (TODO) - * Stratix Edition (DK-20K200), see doc/README.dk20k200 (TODO) - -For informations regarding Nios Development Kit hardware overview -and the NIOS CPU standard configuration of all known boards made by -Altera see: - - * Development Kit (DK) hardware overview, see doc/README.nios_DK - * NIOS CPU standard_32 at DK-1C20, see doc/README.dk1c20_std32 - * NIOS CPU standard_32 at DK-1S10, see doc/README.dk1s10_std32 - * NIOS CPU standard_32 at DK-1S40, see doc/README.dk1s40_std32 - * NIOS CPU standard_32 at DK-20K200, see doc/README.dk20k200_std32 - -For those interested in contributing ... see HELP WANTED below. - - -1. OVERVIEW ------------- - -U-Boot has been successfully tested on the Nios Cyclone development -board using both the 'safe' and 'standard 32' configurations with -Nios CPU revision 3.1 (CPU_ID = 0x3018). U-Boot can be used with -or without the GERMS monitor. The initial version of U-Boot for the -Cyclone development kit is about 60 Kbyte and will fit in a single -sector of on-board FLASH. Only the Nios 32-bit CPU is supported. - -1.1 GERMS Monitor ------------------- -If GERMS is just not enough, then U-Boot is a great antibiotic. -You will be very pleased with its high degree of configurability -and its rich feature set. - -A few of the most obvious limitations of GERMS are overcome by -using U-Boot (See 'Brain Damage'). Most notably, you can use -minicom or Hyperterminal (duh). - -1.2 Altera Source Code ------------------------ -The Nios port does NOT include ANY sources that Altera has the -copyright. This was a conscious decision ... not an accident. -The Altera license is not clear in terms of distributing Altera -sources (when altera silicon is not involved). This isn't really -a problem as little, if any, of the Altera source contains -features that are not already available in U-Boot. - -1.3 Debugging via OCI ---------------------- -The Nios port supports debugging with gdb and/or nios-console -via the JTAG port. Stubs for debugging with gdb via the serial -port are not currently implemented. - - -2. CONFIGURATION OPTIONS/SETTINGS ----------------------------------- - -2.1 Nios-specific Options/Settings ------------------------------------ -All configuration options/settings that are specific to Nios begin -with "CONFIG_NIOS_", "CONFIG_SYS_NIOS_", or "CONFIG_SYS_NIOS_CPU_". - -The configuration follows a two-stage process. In the first stage -the NIOS CPU core will defined like defined in Alteras SOPC Builder. -At this point we use the "CONFIG_SYS_NIOS_CPU_" defines exclusively. For -more informations about all the definitions you have to setup see -into current board configurations and doc/README.nios_CFG_NIOS_CPU. - -In second stage we bring the NIOS CPU configuration in relation to -U-Boot configuration options/settings. The following is a list of -currently defined Nios-specific options/parameters used inside of -U-Boot. If any options are related to Standard-32 Nios SDK -excalibur.h definitions, the related definition follows the -description). - -CONFIG_NIOS -- defined for all Nios-32 boards. - -CONFIG_SYS_NIOS_CONSOLE -- the base address of the console UART or the JTAG - stdio port. To enable a console via JTAG, define - CONFIG_CONSOLE_JTAG and set CGF_NIOS_CONSOLE to the base address - of the JTAG stdio port (normally OCI base + 0x00fa). Then - run nios-console with the -w option. - (standard-32: nasys_uart_0 resp. na_uart1_base). - -CONFIG_SYS_NIOS_FIXEDBAUD -- defined if the console UART PTF fixed_baud - parameter is set to '1'. - -CONFIG_SYS_NIOS_MULT_HW -- use full hardware multiply (not yet implemented). - -CONFIG_SYS_NIOS_MULT_MSTEP -- use hardware assisted multiply using the - MSTEP instruction (not yet implemented). - -CONFIG_SYS_NIOS_TMRBASE -- the base address of the timer used to support - xxx_timer routines (e.g. set_timer(), get_timer(), etc.). - (standard-32: nasys_timer_1 resp. na_lo_priority_timer2_base). - -CONFIG_SYS_NIOS_TMRIRQ -- the interrupt request (vector number) assigned to - the timer. (standard-32: nasys_timer_1_irq resp. - na_low_priority_timer2_irq). - -CONFIG_SYS_NIOS_TMRMS -- the period of the timer in milliseconds. - -CONFIG_SYS_NIOS_TMRCNT -- the preloadable counter value for the timer if it has - no fixed period. - -CONFIG_SYS_NIOS_ASMIBASE -- the base address of the ASMI peripheral. - (standard-32: na_asmi_base). - -CONFIG_SYS_NIOS_SPIBASE -- the base address of the SPI master (!) peripheral. - (nasys_spi_0) - -CONFIG_SYS_NIOS_SPIBITS -- the amount of configured SPI data bits in PTF. - This value can be 8 or 16 only! (PTF: databits) - - -2.2 Differences in U-Boot Options/Settings -------------------------------------------- -Some 'standard' U-Boot options/settings are treated differently in -the Nios port. These are described below. - -CONFIG_SYS_GBL_DATA_OFFSET -- in the Nios port, this is the offset of the - global data structure in the Nios memory space. More simply, - the address of global data. - - -3. ASSEMBLY CODING -------------------- - -In browsing the assembly source files, you may notice the absence -of the 'magic macros' (e.g. MOVIA, MOVIP, ADDIP etc.). This is -deliberate. The documentation for the magic macros is scant and -it is hard to find ... it does not appear in the Nios programmer's -manual, nor does it appear in the assembler manual. Regardless, -the macros actually do very little to improve readability anyway. - -With this in mind, all assembler modules use only instructions that -appear in the Nios programmer's manual OR are directly supported -by the nios-elf toolchain. For example, the 'dec %rB' instruction -is an alias for 'subi %rB,1' that is supported by the assembler -but does not appear in the programmer's manual. - - -4. BOOT PROCESS ---------------- - -4.1 Boot process over GERMS ---------------------------- -When the NIOS CPU catch a reset signal it will begin to be running -code from CONFIG_SYS_NIOS_CPU_RST_VECT. Normally at this place it will -find the GERMS monitor. That's the case for the generic NIOS CPU -configuration "standard_32". When the GERMS monitor starts running, -it performs important system initializations and then looks for -executable code in flash, using the following steps: - - 1. Examining the two bytes at CONFIG_SYS_NIOS_CPU_FLASH_BASE + 0x04000C. - 2. Examining the button 0 on the PIO CONFIG_SYS_NIOS_CPU_BUTTON_PIO. - 3. If the button is not pressed and the two bytes contain 'N' - and 'i', the monitor executes a CALL to location - CONFIG_SYS_NIOS_CPU_FLASH_BASE + 0x040000. - 4. If the code is not executed in step 3 or the code returns, - then prints an 8-digit version number to STDOUT and waits for - user commands from STDIN. - -In normal case, for "standard_32", STDIN and STDOUT are the first -serial port. - -4.2 Return to GERMS command line --------------------------------- -During the boot process, the GERMS monitor checks for the existence -of application software in flash memory. If found, the processor -immediately executes the code. To return program execution to the -GERMS monitor (that is, avoid running code stored in flash memory): - - 1. Hold down CONFIG_SYS_NIOS_CPU_BUTTON_PIO, button number 0. - 2. Press then release the CPU reset button. - 3. Release CONFIG_SYS_NIOS_CPU_BUTTON_PIO, button number 0. - - -5. DEBUGGING WITH GDB ---------------------- - -Debug sessions using gdb are currently supported only via JTAG. The -stubs for debugging via a serial port are not implemented. To enable -the gdb JTAG stubs, simply reference _brkpt_hw_int and _brkpt_sw_int -at vector table offsets 3 and 4, respectively. For an example, see -board/altera/dk1c20/vectors.S. - -5.1 Vector Table Initialization and ROM Stubs ---------------------------------------------- -If CONFIG_ROM_STUBS is defined, the debug breakpoint and single step -entries in the vector table are restored to their initial values -immediately _after_ initializing the vector table. Defining this macro -is useful when ROM-based stubs are implemented. - -NOTE: The default GERMS monitor does NOT implement gdb stubs, nor does -it initialize the vector table. Therefore, when debugging U-Boot, you -should NOT set a software breakpoint prior to vector table initialization. - -5.2 Starting a Debug Session ----------------------------- -If you're not familiar with gdb, you follow these step-by-step instructions. -These instructions are NOT the only way to start a debug session, but they -cover most of the individual functions to get you started. - - 1. Start the JTAG gdb server. Open a Nios shell window and start - the server. When the server is started you must provide the base - address of the OCI core. For example, when using the Cyclone - development kit (DK1C20): - - $ nios-gdb-server --ocibase=0x00920800 --tcpport=2342 - - 2. Start gdb. Open a Nios shell window, change to the top-level - U-Boot directory and start gdb, specifying the u-boot elf file: - - $ nios-elf-gdb u-boot - - 3. Update target settings. From the file menu, select - "Target Settings ..." and select the following, then click 'Ok': - - Target: Remote/TCP - Port : 2342 (same as in step 1) - Display download dialog: checked - All other check boxes: unchecked - - 4. Connect to the target. Select menu: 'Run->Connect to target'. - You should see a dialog box indicating the you successfully connected - to the target. - - 5. Download U-Boot. Select menu: 'Run->Download'. - - 6. Open a gdb console window and set the source directory paths. - Select menu: 'View->Console'. In the console window, enter the - following commands, then close the console window: - - (gdb) directory common - (gdb) directory arch/nios/cpu - (gdb) directory arch/nios/lib - (gdb) directory board/altera/dk1c20 - - Note that the last command is for the DK1C20 board only. If you - are using another board, specify that board's directory. - - 7. Open the file board.c (using the file menu in the lower - left hand corner). Scroll to the board_init() routine and set - a breakpoint. - - 8. Run U-Boot. Just click on the run icon, or select menu: - 'Run->Run'. U-Boot should start running, then break at your - breakpoint. - - 9. Have fun & start learning more about gdb. - - -5.3 For advanced Users ----------------------- -A few notes for those more familiar with gdb. - - -Serial port stubs are not implemented. Sorry, but it's just not - worth _my_ effort. The JTAG stubs work great and are ridiculously - simple to implement. - - -If you need to debug the early startup code (prior to the vector - table initialization), use the nios-console debugger. - - - Connect, download & run -- there are some problems here. Connect - download and run seperately to avoid trouble. - -6. BRAIN DAMAGE ----------------- - -This section describes some of the unfortunate and avoidable aspects -of working with the Nios CPU ... and some things you can do to -reduce your pain. - -6.1 GERMS doesn't work with Hyperterminal ------------------------------------------- -GERMS doesn't do CR/LF mapping that is compatible with Hyperterminal -(or minicom) -- geez. Regardless of you opion of Hyperterminal, this -sad design decision is remedied by using U-Boot. - -6.2 cygwin Incompatibility ---------------------------- -The version of cygwin distributed with the nios GNUPro toolchain is -out-of-date and incompatible with the latest cygwin distributions. -In addition, many of the standard utilities are very dated as well. -If you try to download and build the lastest version of grep for -example, you'll quickly realize that a native gcc is not available -(the next topic) which leads to U-Boot build problems (following -topic). - -The solution ... well, you can wait for Altera ... or build as -set of tools for linux. - -6.3 No native gcc ------------------- -I'm not sure how this one slipped through the cracks ... but it is -a real pain. Basically, if you want to build anything for the native -environment -- forget it! A native (cygwin) gcc is not distributed, -and the old version of cygwin makes locating one challenging. - -The solution ... same as above. Just download the gcc source from -Altera and build up a set of cross tools for your favorite linux -distro. Anybody who wants to use an already precompiled NIOS cross -toolchain can it found in the CDK4NIOS project hosted by Source -Forge at http://cdk4nios.sourceforge.net. - -6.4 Can't build default U-Boot -------------------------------- -By default, when you build U-Boot you will be building some native -tools along with the target elf, bin, and srec files. Without a -native gcc, this (obviously) causes problems. - -For developers using the Altera cygwin tools you can remove the -'tools' directory from SUBDIRS in the top-level Makefile. You will -also have to edit common/Makefile: - -Replace: -env_embedded.o: env_embedded.c ../tools/envcrc - $(CC) $(AFLAGS) -Wa,--no-warn \ - -DENV_CRC=$(shell ../tools/envcrc) \ - -c -o $@ env_embedded.c - -With: -env_embedded.o: env_embedded.c - $(CC) $(AFLAGS) -Wa,--no-warn \ - -DENV_CRC=0 \ - -c -o $@ env_embedded.c - -BTW, thats a 'zero' ... not the letter 'O'. And not that the -"../tools/envcrc" dependency is removed. - - -7. HELP WANTED ---------------- - -There are plenty of areas where help is needed. Here's are some ideas -for those interested in contributing: - --CompactFlash. Port & test CF/FAT. - --Bedbug. Develop bedbug for Nios ... or at least provide a disassemble - command. - --Add boot support for ucLinux (niosnommu). - --Implement (don't copy Altera code) the __mulxx routines using the - MSTEP and MUL instructions (e.g. CONFIG_SYS_NIOS_MULT_HW and CONFIG_SYS_NIOS_MULT_MSTEP). - - -Regards, - ---Scott -<smcnutt@psyent.com> - ---Stephan -<linz@li-pro.net> diff --git a/doc/README.nios_CONFIG_SYS_NIOS_CPU b/doc/README.nios_CONFIG_SYS_NIOS_CPU deleted file mode 100644 index 3547c343bd..0000000000 --- a/doc/README.nios_CONFIG_SYS_NIOS_CPU +++ /dev/null @@ -1,140 +0,0 @@ - -=============================================================================== - C F G _ N I O S _ C P U _ * v s . N I O S S D K -=============================================================================== - -When ever you have to make a new NIOS CPU configuration you can use this table -as a reference list to the original NIOS SDK symbols made by Alteras SOPC -Builder. Look into excalibur.h and excalibur.s in your SDK path cpu_sdk/inc. -Symbols beginning with a '[ptf]:' are coming from your SOPC sytem description -(PTF file) in sections WIZARD_SCRIPT_ARGUMENTS or SYSTEM_BUILDER_INFO. - -C O R E N I O S S D K [1],[7] -------------------------------------------------------------------------------- -CONFIG_SYS_NIOS_CPU_CLK nasys_clock_freq -CONFIG_SYS_NIOS_CPU_ICACHE nasys_icache_size -CONFIG_SYS_NIOS_CPU_DCACHE nasys_dcache_size -CONFIG_SYS_NIOS_CPU_REG_NUMS nasys_nios_num_regs -CONFIG_SYS_NIOS_CPU_MUL __nios_use_multiply__ -CONFIG_SYS_NIOS_CPU_MSTEP __nios_use_mstep__ -CONFIG_SYS_NIOS_CPU_STACK nasys_stack_top -CONFIG_SYS_NIOS_CPU_VEC_BASE nasys_vector_table -CONFIG_SYS_NIOS_CPU_VEC_SIZE nasys_vector_table_size -CONFIG_SYS_NIOS_CPU_VEC_NUMS -CONFIG_SYS_NIOS_CPU_RST_VECT nasys_reset_address -CONFIG_SYS_NIOS_CPU_DBG_CORE nasys_debug_core -CONFIG_SYS_NIOS_CPU_RAM_BASE na_onchip_ram_64_kbytes -CONFIG_SYS_NIOS_CPU_RAM_SIZE na_onchip_ram_64_kbytes_size -CONFIG_SYS_NIOS_CPU_ROM_BASE na_boot_monitor_rom -CONFIG_SYS_NIOS_CPU_ROM_SIZE na_boot_monitor_rom_size -CONFIG_SYS_NIOS_CPU_OCI_BASE nasys_oci_core -CONFIG_SYS_NIOS_CPU_OCI_SIZE -CONFIG_SYS_NIOS_CPU_SRAM_BASE na_ext_ram nasys_program_mem - nasys_data_mem -CONFIG_SYS_NIOS_CPU_SRAM_SIZE na_ext_ram_size nasys_program_mem_size - nasys_data_mem_size -CONFIG_SYS_NIOS_CPU_SDRAM_BASE na_sdram -CONFIG_SYS_NIOS_CPU_SDRAM_SIZE na_sdram_size -CONFIG_SYS_NIOS_CPU_FLASH_BASE na_ext_flash nasys_main_flash - nasys_am29lv065d_flash_0 - nasys_flash_0 -CONFIG_SYS_NIOS_CPU_FLASH_SIZE na_ext_flash_size nasys_main_flash_size - -T I M E R N I O S S D K [3] -------------------------------------------------------------------------------- -CONFIG_SYS_NIOS_CPU_TIMER_NUMS nasys_timer_count -CONFIG_SYS_NIOS_CPU_TIMER[0-9] nasys_timer_[0-9] -CONFIG_SYS_NIOS_CPU_TIMER[0-9]_IRQ nasys_timer_[0-9]_irq -CONFIG_SYS_NIOS_CPU_TIMER[0-9]_PER [ptf]:period - [ptf]:period_units - [ptf]:mult -CONFIG_SYS_NIOS_CPU_TIMER[0-9]_AR [ptf]:always_run -CONFIG_SYS_NIOS_CPU_TIMER[0-9]_FP [ptf]:fixed_period -CONFIG_SYS_NIOS_CPU_TIMER[0-9]_SS [ptf]:snapshot - -U A R T N I O S S D K [2] -------------------------------------------------------------------------------- -CONFIG_SYS_NIOS_CPU_UART_NUMS nasys_uart_count -CONFIG_SYS_NIOS_CPU_UART[0-9] nasys_uart_[0-9] -CONFIG_SYS_NIOS_CPU_UART[0-9]_IRQ nasys_uart_[0-9]_irq -CONFIG_SYS_NIOS_CPU_UART[0-9]_BR [ptf]:baud -CONFIG_SYS_NIOS_CPU_UART[0-9]_DB [ptf]:data_bits -CONFIG_SYS_NIOS_CPU_UART[0-9]_SB [ptf]:stop_bits -CONFIG_SYS_NIOS_CPU_UART[0-9]_PA [ptf]:parity -CONFIG_SYS_NIOS_CPU_UART[0-9]_HS [ptf]:use_cts_rts -CONFIG_SYS_NIOS_CPU_UART[0-9]_EOP [ptf]:use_eop_register - -P I O N I O S S D K [4] -------------------------------------------------------------------------------- -CONFIG_SYS_NIOS_CPU_PIO_NUMS nasys_pio_count -CONFIG_SYS_NIOS_CPU_PIO[0-9] nasys_pio_[0-9] -CONFIG_SYS_NIOS_CPU_PIO[0-9]_IRQ nasys_pio_[0-9]_irq -CONFIG_SYS_NIOS_CPU_PIO[0-9]_BITS [ptf]:Data_Width -CONFIG_SYS_NIOS_CPU_PIO[0-9]_TYPE [ptf]:has_tri - [ptf]:has_out - [ptf]:has_in -CONFIG_SYS_NIOS_CPU_PIO[0-9]_CAP [ptf]:capture -CONFIG_SYS_NIOS_CPU_PIO[0-9]_EDGE [ptf]:edge_type -CONFIG_SYS_NIOS_CPU_PIO[0-9]_ITYPE [ptf]:irq_type - -S P I N I O S S D K [6] -------------------------------------------------------------------------------- -CONFIG_SYS_NIOS_CPU_SPI_NUMS nasys_spi_count -CONFIG_SYS_NIOS_CPU_SPI[0-9] nasys_spi_[0-9] -CONFIG_SYS_NIOS_CPU_SPI[0-9]_IRQ nasys_spi_[0-9]_irq -CONFIG_SYS_NIOS_CPU_SPI[0-9]_BITS [ptf]:databits -CONFIG_SYS_NIOS_CPU_SPI[0-9]_MA [ptf]:ismaster -CONFIG_SYS_NIOS_CPU_SPI[0-9]_SLN [ptf]:numslaves -CONFIG_SYS_NIOS_CPU_SPI[0-9]_TCLK [ptf]:targetclock -CONFIG_SYS_NIOS_CPU_SPI[0-9]_TDELAY [ptf]:targetdelay -CONFIG_SYS_NIOS_CPU_SPI[0-9]_* [ptf]:* - -I D E N I O S S D K -------------------------------------------------------------------------------- -CONFIG_SYS_NIOS_CPU_IDE_NUMS nasys_usersocket_count -CONFIG_SYS_NIOS_CPU_IDE[0-9] nasys_usersocket_[0-9] - -A S M I N I O S S D K [5] -------------------------------------------------------------------------------- -CONFIG_SYS_NIOS_CPU_ASMI_NUMS nasys_asmi_count -CONFIG_SYS_NIOS_CPU_ASMI[0-9] nasys_asmi_[0-9] -CONFIG_SYS_NIOS_CPU_ASMI[0-9]_IRQ nasys_asmi_[0-9]_irq - -E t h e r n e t ( L A N ) N I O S S D K -------------------------------------------------------------------------------- -CONFIG_SYS_NIOS_CPU_LAN_NUMS -CONFIG_SYS_NIOS_CPU_LAN[0-9]_BASE na_lan91c111 -CONFIG_SYS_NIOS_CPU_LAN[0-9]_OFFS LAN91C111_REGISTERS_OFFSET -CONFIG_SYS_NIOS_CPU_LAN[0-9]_IRQ na_lan91c111_irq -CONFIG_SYS_NIOS_CPU_LAN[0-9]_BUSW LAN91C111_DATA_BUS_WIDTH -CONFIG_SYS_NIOS_CPU_LAN[0-9]_TYPE - -s y s t e m c o m p o s i n g N I O S S D K -------------------------------------------------------------------------------- -CONFIG_SYS_NIOS_CPU_TICK_TIMER (na_low_priority_timer2) -CONFIG_SYS_NIOS_CPU_USER_TIMER (na_timer1) -CONFIG_SYS_NIOS_CPU_BUTTON_PIO (na_button_pio) -CONFIG_SYS_NIOS_CPU_LCD_PIO (na_lcd_pio) -CONFIG_SYS_NIOS_CPU_LED_PIO (na_led_pio) -CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO (na_seven_seg_pio) -CONFIG_SYS_NIOS_CPU_RECONF_PIO (na_reconfig_request_pio) -CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO (na_cf_present_pio) -CONFIG_SYS_NIOS_CPU_CFPOWER_PIO (na_cf_power_pio) -CONFIG_SYS_NIOS_CPU_CFATASEL_PIO (na_cf_ata_select_pio) -CONFIG_SYS_NIOS_CPU_USER_SPI (na_spi) - - -=============================================================================== - R E F E R E N C E S -=============================================================================== -[1] http://www.altera.com/literature/ds/ds_nioscpu.pdf -[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf -[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf -[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf -[5] http://www.altera.com/literature/ds/ds_nios_asmi.pdf -[6] http://www.altera.com/literature/ds/ds_nios_spi.pdf -[7] http://www.altera.com/literature/ds/ds_legacy_sdram_ctrl.pdf - - -=============================================================================== -Stephan Linz <linz@li-pro.net> diff --git a/doc/README.nios_DK b/doc/README.nios_DK deleted file mode 100644 index b119d76682..0000000000 --- a/doc/README.nios_DK +++ /dev/null @@ -1,192 +0,0 @@ - -=============================================================================== - H A R D W A R E O V E R V I E W -=============================================================================== -===============|===============|===============|===============|=============== - | DK20K200 | DK1C20 | DK1S10 | DK1S40 ----------------|---------------|---------------|---------------|--------------- - | | | | - Schem. Nr. | Nios Dev.Brd. | P06-08713-00 | P06-08468-01 | P06-09178-00 - Rev. | pilot. | 01 | 01 | 00 - Date | 2001/02/06 | 2003/02/20 | 2003/02/14 | 2003/05/14 -[1] | | | | -===============|===============|===============|===============|=============== - | | | | - FPGA | "APEX" | "Cyclon" | "Stratix" | "Stratix" - | EP20K200E | EP1C20 | EP1S10 | EP1S40 - | | | - | (484 FBGA) | (400 FBGA) | (780 FBGA) -[2],[3],[4] | | | ----------------|---------------|---------------|---------------|--------------- - | | - Clock (OSC) | 33.333 MHz | 50 MHz - | | (with ext. supply) - | - | PI49FCT3805 -[5] | ----------------|---------------|---------------|---------------|--------------- - | | - Flash | 1 MByte | 8 MByte - | | - | AM29LV800BB | AM29LV065DU120REI - | 8/16 bit bus | 8 bit bus - | 1 chip | 1 chip -[6],[7] | | ----------------|---------------|---------------|---------------|--------------- - | | | - serial | no such | 4 MBits | no such - Flash | | | - | | EPCS4SI8 | -[8] | | | ----------------|---------------|---------------|---------------|--------------- - | | - Compact | no such, as | see below: prototype adapter - Flash (CF) | module only | - | | ----------------|---------------|---------------|---------------|--------------- - | | - SRAM | 256 KByte | 1 MByte - | | - | IDT71V016S | IDT71V416S10PH - | 32 bit bus | 32 bit bus - | 2 chips | 2 chips - | interlaced | interlaced -[9],[10] | | ----------------|---------------|---------------|---------------|--------------- - | | - SDRAM | SODIMM only | 16 MByte - | | - | | MT48LC4M32B2TG-7 - | 64 bit bus | 32 bit bus - | | 1 chip -[11] | | -===============|===============|===============|===============|=============== - | | - serial I/O | 1 RS232 | 2 RS232 - | | - | LTC1386 | MAX3237CAI - | | - | port 1: | port 1: - | RxD / TxD, | RxD / TxD, - | RTS / CTS | RTS / CTS, DTR / DSR, DCD, RI - | | - | ! ! ! ! ! ! | port 2: | port 2: - | RTS/CTS can | RxD / TxD | RxD / TxD - | be RxD/TxD | | RTS / CTS, DTR / DSR - | of 2nd port | | DCD, RI -[12],[13] | ! ! ! ! ! ! | | ----------------|---------------|---------------|---------------|--------------- - | | - Ethernet | no such, as | 1 10BaseT / 100BaseT - | module only | - | | LAN91C111-NE - | | 32 bit bus - | | no external EEPROM - | | LEDA# for link - | | LEDB# for Rx / Tx -[14] | | -===============|===============|===============|===============|=============== - | | - user | 8 | no such - switches | SW[7..0] | - | | ----------------|---------------|---------------|---------------|--------------- - | - user push | 4 - buttons | PB[3..0] - | ----------------|---------------|---------------|---------------|--------------- - | | - user LEDs | 2 | 8 - | LED[1..0] | LED[7..0] - | | ----------------|---------------|---------------|---------------|--------------- - | - user seven | 2 - segment | HEX[1..0][G..A,DP] - | -===============|===============|===============|===============|=============== - | | - 3.3V proto- | w/o level | no such -- only 5V - type adapter | shift buffer | - | | - | 40 I/O pins | - | 1 card sel. | - | 1 reset out. | - | 1 OSC clock | - | 1 CPU clock | - | 1 clock out. | - | | ----------------|---------------|---------------|---------------|--------------- - | | - 5V prototype | with level | 2 ports -- both card ports supplied with its - adapter | shift buffer | own level shift buffer - | | - | 40 I/O pins | port 1 & 2: - | 1 card sel. | 41 I/O pins - | 1 Vee ? ? ? | 1 card select - | 1 reset out. | 1 reset output (from dev/board) - | 1 OSC clock | 1 OSC clock (from dev/board) - | 1 CPU clock | 1 CPU clock (from dev/board) - | 1 clock inp. | 1 clock input (to dev/board) - | | - | | (special) port 1: - | | 1 CF select - | | 1 CF present - | | 1 CF ATA select - | | 1 CF power - | | - | | NOTE: Both card ports are prepared for raw - | | IDE working. You can connect such - | | devices directly to the 40 pin header. - | | The signal PDIAG (passed diagnostic) - | | is not connected to any I/O signal. - | | Card port 1 is hard wired to the on - | | board Copact Flash adapter together - | | with all other signals needed by CF - | | cards. Hot plug should be working too. -[15],[16] | | -===============|===============|===============|===============|=============== - | | - config. CPLD | EPM7064 | EPM7128 - | | - (alternative | decition by | decision by - FPGA conf.) | jumper | push button - | | - | FPGA config. | FPGA config. | FPGA config. - | from Flash | from Flash | from Flash - | only | and EPCS4 | only - | | | -===============|===============|===============|===============|=============== -=============================================================================== - - -=============================================================================== - R E F E R E N C E S -=============================================================================== -[1] http://www.altera.com/literature/lit-nio.jsp -[2] http://www.altera.com/literature/lit-apx.jsp -[3] http://www.altera.com/literature/lit-cyc.jsp -[4] http://www.altera.com/literature/lit-stx.jsp -[5] http://www.pericom.com/pdf/datasheets/PI49FCT3805.pdf - http://www.pericom.com/products/clock/psempart.php?productID=PI49FCT3805 -[6] http://www.amd.com/us-en/FlashMemory/ProductInformation/0,,37_1447_1623_1468^1532,00.html - http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/21490.pdf -[7] http://www.amd.com/us-en/FlashMemory/ProductInformation/0,,37_1447_1623_1468^1596,00.html - http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/23544b.pdf -[8] http://www.altera.com/literature/lit-config.html - http://preview.altera.com/literature/ds/micron.pdf -[9] http://www.idt.com/products/pages/Asynchronous_SRAMs-71V016SA.html -[10] http://www.idt.com/products/pages/Asynchronous_SRAMs-71V416SL.html -[11] http://www.micron.com/products/dram/sdram/part.aspx?part=MT48LC4M32B2TG-7 -[12] http://www.linear.com/prod/datasheet.html?datasheet=33 - http://www.linear.com/pdf/1386fa.pdf -[13] http://www.maxim-ic.com/quick_view2.cfm/qv_pk/1068/ln/en - http://pdfserv.maxim-ic.com/en/ds/MAX3222-MAX3241.pdf -[14] http://www.smsc.com/main/catalog/lan91c111.html -[15] http://www.t13.org/index.html -[16] http://www.compactflash.org/faqs/faq.htm - - -=============================================================================== -Stephan Linz <linz@li-pro.net> diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt index 157936ed53..6d2070758d 100644 --- a/doc/uImage.FIT/source_file_format.txt +++ b/doc/uImage.FIT/source_file_format.txt @@ -173,8 +173,7 @@ the '/images' node should have the following layout: - arch : Architecture name, mandatory for types: "standalone", "kernel", "firmware", "ramdisk" and "fdt". Valid architecture names are: "alpha", "arm", "i386", "ia64", "mips", "mips64", "ppc", "s390", "sh", "sparc", - "sparc64", "m68k", "nios", "microblaze", "nios2", "blackfin", "avr32", - "st200". + "sparc64", "m68k", "microblaze", "nios2", "blackfin", "avr32", "st200". - entry : entry point address, address size is determined by '#address-cells' property of the root node. Mandatory for for types: "standalone" and "kernel". diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c index 0187708e0b..f3e1ab5c6a 100644 --- a/examples/standalone/stubs.c +++ b/examples/standalone/stubs.c @@ -65,23 +65,6 @@ gd_t *global_data; " lw $25, %1($25)\n" \ " jr $25\n" \ : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "t9"); -#elif defined(CONFIG_NIOS) -/* - * %g7 holds the pointer to the global_data. %g0 is call clobbered. - */ -#define EXPORT_FUNC(x) \ - asm volatile ( \ -" .globl " #x "\n" \ -#x ":\n" \ -" pfx %%hi(%0)\n" \ -" movi %%g0, %%lo(%0)\n" \ -" add %%g0, %%g7\n" \ -" ld %%g0, [%%g0]\n" \ -" pfx %1\n" \ -" ld %%g0, [%%g0]\n" \ -" jmp %%g0\n" \ -" nop \n" \ - : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x) : "r0"); #elif defined(CONFIG_NIOS2) /* * gp holds the pointer to the global_data, r8 is call-clobbered diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 2445f1e784..6b3a2742e2 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -708,9 +708,6 @@ long do_fat_read (const char *filename, void *buffer, unsigned long maxsize, int dols) { -#if CONFIG_NIOS /* NIOS CPU cannot access big automatic arrays */ - static -#endif char fnamecopy[2048]; boot_sector bs; volume_info volinfo; diff --git a/include/configs/ADNPESC1.h b/include/configs/ADNPESC1.h deleted file mode 100644 index 2d4fc77915..0000000000 --- a/include/configs/ADNPESC1.h +++ /dev/null @@ -1,689 +0,0 @@ -/* - * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/*********************************************************************** - * Include the whole NIOS CPU configuration. - * - * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!! - * - ***********************************************************************/ - -#if defined(CONFIG_NIOS_BASE_32) -#include <configs/ADNPESC1_base_32.h> -#else -#error *** CONFIG_SYS_ERROR: you have to setup right NIOS CPU configuration -#endif - -/*------------------------------------------------------------------------ - * BOARD/CPU -- TOP-LEVEL - *----------------------------------------------------------------------*/ -#define CONFIG_NIOS 1 /* NIOS-32 core */ -#define CONFIG_ADNPESC1 1 /* SSV ADNP/ESC1 board */ -#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */ -#define CONFIG_SYS_HZ 1000 /* 1 msec time tick */ -#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ - -/*------------------------------------------------------------------------ - * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM) - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_SDRAM_SIZE != 0) - -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_NIOS_CPU_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_NIOS_CPU_SDRAM_SIZE - -#else -#error *** CONFIG_SYS_ERROR: you have to setup any SDRAM in NIOS CPU config -#endif - -#if defined(CONFIG_SYS_NIOS_CPU_SRAM_BASE) && defined(CONFIG_SYS_NIOS_CPU_SRAM_SIZE) - -#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_NIOS_CPU_SRAM_BASE -#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_NIOS_CPU_SRAM_SIZE - -#else - -#undef CONFIG_SYS_SRAM_BASE -#undef CONFIG_SYS_SRAM_SIZE - -#endif - -#define CONFIG_SYS_VECT_BASE CONFIG_SYS_NIOS_CPU_VEC_BASE - -/*------------------------------------------------------------------------ - * MEMORY ORGANIZATION - For the most part, you can put things pretty - * much anywhere. This is pretty flexible for Nios. So here we make some - * arbitrary choices & assume that the monitor is placed at the end of - * a memory resource (so you must make sure TEXT_BASE is chosen - * appropriately -- this is very important if you plan to move your - * memory to another place as configured at this time !!!). - * - * -The heap is placed below the monitor. - * -Global data is placed below the heap. - * -The stack is placed below global data (&grows down). - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256k */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET - -/*------------------------------------------------------------------------ - * FLASH (AM29LV065D) - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0) - -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_NIOS_CPU_FLASH_BASE -#define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_NIOS_CPU_FLASH_SIZE -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */ -#define CONFIG_SYS_FLASH_WORD_SIZE unsigned short /* flash word size */ - -#else -#error *** CONFIG_SYS_ERROR: you have to setup any Flash memory in NIOS CPU config -#endif - -/*------------------------------------------------------------------------ - * ENVIRONMENT - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0) - -#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */ - -/* Mem addr of environment */ -#if defined(CONFIG_NIOS_BASE_32) -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) -#else -#error *** CONFIG_SYS_ERROR: you have to setup the environment base address CONFIG_ENV_ADDR -#endif - -#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */ -#define CONFIG_ENV_OVERWRITE /* Serial/eth change Ok */ - -#else -#define CONFIG_ENV_IS_NOWHERE 1 /* NO Environment */ -#endif - -/*------------------------------------------------------------------------ - * NIOS APPLICATION CODE BASE AREA - *----------------------------------------------------------------------*/ -#if ((CONFIG_ENV_ADDR + CONFIG_ENV_SIZE) == 0x1050000) -#define CONFIG_SYS_ADNPESC1_UPDATE_LOAD_ADDR "0x2000100" -#define CONFIG_SYS_ADNPESC1_NIOS_APPL_ENTRY "0x1050000" -#define CONFIG_SYS_ADNPESC1_NIOS_APPL_IDENT "0x105000c" -#define CONFIG_SYS_ADNPESC1_NIOS_APPL_END "0x11fffff" -#define CONFIG_SYS_ADNPESC1_FILESYSTEM_BASE "0x1200000" -#define CONFIG_SYS_ADNPESC1_FILESYSTEM_END "0x17fffff" -#else -#error *** CONFIG_SYS_ERROR: missing right appl.code base configuration, expand your config.h -#endif -#define CONFIG_SYS_ADNPESC1_NIOS_IDENTIFIER "Nios" - -/*------------------------------------------------------------------------ - * BOOT ENVIRONMENT - *----------------------------------------------------------------------*/ -#ifdef CONFIG_DNPEVA2 /* DNP/EVA2 base board */ -#define CONFIG_SYS_ADNPESC1_SLED_BOOT_OFF "sled boot off; " -#define CONFIG_SYS_ADNPESC1_SLED_RED_BLINK "sled red blink; " -#else -#define CONFIG_SYS_ADNPESC1_SLED_BOOT_OFF -#define CONFIG_SYS_ADNPESC1_SLED_RED_BLINK -#endif - -#define CONFIG_BOOTDELAY 5 -#define CONFIG_BOOTCOMMAND \ - "if itest.s *$appl_ident_addr == \"$appl_ident_str\"; " \ - "then " \ - "wd off; " \ - CONFIG_SYS_ADNPESC1_SLED_BOOT_OFF \ - "go $appl_entry_addr; " \ - "else " \ - CONFIG_SYS_ADNPESC1_SLED_RED_BLINK \ - "echo *** missing \"$appl_ident_str\" at $appl_ident_addr; "\ - "echo *** invalid application at $appl_entry_addr; " \ - "echo *** stop bootup...; " \ - "fi" - -/*------------------------------------------------------------------------ - * EXTRA ENVIRONMENT - *----------------------------------------------------------------------*/ -#ifdef CONFIG_DNPEVA2 /* DNP/EVA2 base board */ -#define CONFIG_SYS_ADNPESC1_SLED_YELLO_ON "sled yellow on; " -#define CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF "sled yellow off; " -#else -#define CONFIG_SYS_ADNPESC1_SLED_YELLO_ON -#define CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "update_allowed=0\0" \ - "update_load_addr=" CONFIG_SYS_ADNPESC1_UPDATE_LOAD_ADDR "\0" \ - "appl_entry_addr=" CONFIG_SYS_ADNPESC1_NIOS_APPL_ENTRY "\0" \ - "appl_end_addr=" CONFIG_SYS_ADNPESC1_NIOS_APPL_END "\0" \ - "appl_ident_addr=" CONFIG_SYS_ADNPESC1_NIOS_APPL_IDENT "\0" \ - "appl_ident_str=" CONFIG_SYS_ADNPESC1_NIOS_IDENTIFIER "\0" \ - "appl_name=ADNPESC1/base32/linux.bin\0" \ - "appl_update=" \ - "if itest.b $update_allowed != 0; " \ - "then " \ - CONFIG_SYS_ADNPESC1_SLED_YELLO_ON \ - "tftp $update_load_addr $appl_name; " \ - "protect off $appl_entry_addr $appl_end_addr; " \ - "era $appl_entry_addr $appl_end_addr; " \ - "cp.b $update_load_addr $appl_entry_addr $filesize; "\ - CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF \ - "else " \ - "echo *** update not allowed (update_allowed=$update_allowed); "\ - "fi\0" \ - "fs_base_addr=" CONFIG_SYS_ADNPESC1_FILESYSTEM_BASE "\0" \ - "fs_end_addr=" CONFIG_SYS_ADNPESC1_FILESYSTEM_END "\0" \ - "fs_name=ADNPESC1/base32/romfs.img\0" \ - "fs_update=" \ - "if itest.b $update_allowed != 0; " \ - "then " \ - CONFIG_SYS_ADNPESC1_SLED_YELLO_ON \ - "tftp $update_load_addr $fs_name; " \ - "protect off $fs_base_addr $fs_end_addr; " \ - "era $fs_base_addr $fs_end_addr; " \ - "cp.b $update_load_addr $fs_base_addr $filesize; "\ - CONFIG_SYS_ADNPESC1_SLED_YELLO_OFF \ - "else " \ - "echo *** update not allowed (update_allowed=$update_allowed); "\ - "fi\0" \ - "uboot_name=ADNPESC1/base32/u-boot.bin\0" \ - "uboot_loadnrun=" \ - "if ping $serverip; " \ - "then " \ - CONFIG_SYS_ADNPESC1_SLED_YELLO_ON \ - "tftp $update_load_addr $uboot_name; " \ - "wd off; " \ - "go $update_load_addr; " \ - "else " \ - "echo *** missing connection to $serverip; " \ - "echo *** check your network and try again...; "\ - "fi\0" - -/*------------------------------------------------------------------------ - * CONSOLE - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_UART_NUMS != 0) - -#define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_NIOS_CPU_UART0 /* 1st UART is Cons. */ - -#if (CONFIG_SYS_NIOS_CPU_UART0_BR != 0) -#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */ -#define CONFIG_BAUDRATE CONFIG_SYS_NIOS_CPU_UART0_BR -#else -#undef CONFIG_SYS_NIOS_FIXEDBAUD -#define CONFIG_BAUDRATE 115200 -#endif - -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -#else -#error *** CONFIG_SYS_ERROR: you have to setup at least one UART in NIOS CPU config -#endif - -/*------------------------------------------------------------------------ - * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc PIT, - * so an avalon bus timer is required. - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_TIMER_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_TICK_TIMER) - -#if (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 0) - -#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER0 /* TIMER0 as tick */ -#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER0_IRQ - -#if (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 1) /* fixed period */ - -#if (CONFIG_SYS_NIOS_CPU_TIMER0_PER >= CONFIG_SYS_HZ) -#define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER0_PER / CONFIG_SYS_HZ) -#else -#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ -#endif - -#undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */ - -#elif (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 0) /* variable period */ - -#if (CONFIG_SYS_HZ <= 1000) -#define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ) -#else -#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000 -#endif - -#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) - -#else -#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER0_FP correct -#endif - -#elif (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 1) - -#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER1 /* TIMER1 as tick */ -#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER1_IRQ - -#if (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 1) /* fixed period */ - -#if (CONFIG_SYS_NIOS_CPU_TIMER1_PER >= CONFIG_SYS_HZ) -#define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER1_PER / CONFIG_SYS_HZ) -#else -#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ -#endif - -#undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */ - -#elif (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 0) /* variable period */ - -#if (CONFIG_SYS_HZ <= 1000) -#define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ) -#else -#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000 -#endif - -#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) - -#else -#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER1_FP correct -#endif - -#endif /* CONFIG_SYS_NIOS_CPU_TICK_TIMER */ - -#else -#error *** CONFIG_SYS_ERROR: you have to setup at least one TIMER in NIOS CPU config -#endif - -/*------------------------------------------------------------------------ - * WATCHDOG (or better MAX823 supervisory circuite access) - *----------------------------------------------------------------------*/ -#define CONFIG_HW_WATCHDOG 1 /* board specific WD */ - -#ifdef CONFIG_HW_WATCHDOG - -/* MAX823 supervisor -- watchdog enable port at: */ -#if (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 0) -#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO0 /* PIO0 */ -#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 1) -#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO1 /* PIO1 */ -#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 2) -#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO2 /* PIO2 */ -#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 3) -#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO3 /* PIO3 */ -#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 4) -#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO4 /* PIO4 */ -#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 5) -#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO5 /* PIO5 */ -#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 6) -#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO6 /* PIO6 */ -#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 7) -#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO7 /* PIO7 */ -#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 8) -#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO8 /* PIO8 */ -#elif (CONFIG_SYS_NIOS_CPU_WDENA_PIO == 9) -#define CONFIG_HW_WDENA_BASE CONFIG_SYS_NIOS_CPU_PIO9 /* PIO9 */ -#else -#error *** CONFIG_SYS_ERROR: you have to setup at least one WDENA_PIO in NIOS CPU config -#endif - -/* MAX823 supervisor -- watchdog trigger port at: */ -#if (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 0) -#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO0 /* PIO0 */ -#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 1) -#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO1 /* PIO1 */ -#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 2) -#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO2 /* PIO2 */ -#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 3) -#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO3 /* PIO3 */ -#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 4) -#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO4 /* PIO4 */ -#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 5) -#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO5 /* PIO5 */ -#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 6) -#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO6 /* PIO6 */ -#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 7) -#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO7 /* PIO7 */ -#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 8) -#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO8 /* PIO8 */ -#elif (CONFIG_SYS_NIOS_CPU_WDTOG_PIO == 9) -#define CONFIG_HW_WDTOG_BASE CONFIG_SYS_NIOS_CPU_PIO9 /* PIO9 */ -#else -#error *** CONFIG_SYS_ERROR: you have to setup at least one WDTOG_PIO in NIOS CPU config -#endif - -#if defined(CONFIG_NIOS_BASE_32) /* NIOS CPU specifics */ -#define CONFIG_HW_WDENA_BIT 0 /* WD enable @ Bit 0 */ -#define CONFIG_HW_WDTOG_BIT 0 /* WD trigger @ Bit 0 */ -#define CONFIG_HW_WDPORT_WRONLY 1 /* each WD port wr/only*/ -#else -#error *** CONFIG_SYS_ERROR: missing watchdog bit configuration, expand your config.h -#endif - -#endif /* CONFIG_HW_WATCHDOG */ - -/*------------------------------------------------------------------------ - * SERIAL PERIPHAREL INTERFACE - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_SPI_NUMS == 1) - -#define CONFIG_NIOS_SPI 1 /* SPI support active */ -#define CONFIG_SYS_NIOS_SPIBASE CONFIG_SYS_NIOS_CPU_SPI0 -#define CONFIG_SYS_NIOS_SPIBITS CONFIG_SYS_NIOS_CPU_SPI0_BITS - -#define CONFIG_RTC_DS1306 1 /* Dallas 1306 real time clock */ -#define CONFIG_SYS_SPI_RTC_DEVID 0 /* as 1st SPI device */ - -#else -#undef CONFIG_NIOS_SPI /* NO SPI support */ -#endif - -/*------------------------------------------------------------------------ - * Ethernet -- needs work! - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_LAN_NUMS == 1) - -#if (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 0) /* LAN91C111 */ - -#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ -#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ -#define CONFIG_SMC91111_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS) - -#if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32) -#define CONFIG_SMC_USE_32_BIT 1 -#else /* no */ -#undef CONFIG_SMC_USE_32_BIT -#endif - -#elif (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 1) /* CS8900A */ - - /********************************************/ - /* !!! CS8900 is __not__ tested on NIOS !!! */ - /********************************************/ -#define CONFIG_NET_MULTI -#define CONFIG_CS8900 /* Using CS8900 */ -#define CONFIG_CS8900_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + \ - CONFIG_SYS_NIOS_CPU_LAN0_OFFS) - -#if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32) -#undef CONFIG_CS8900_BUS16 -#define CONFIG_CS8900_BUS32 -#else /* no */ -#define CONFIG_CS8900_BUS16 -#undef CONFIG_CS8900_BUS32 -#endif - -#else -#error *** CONFIG_SYS_ERROR: invalid LAN0 chip type, check your NIOS CPU config -#endif - -#define CONFIG_ETHADDR 02:80:ae:20:60:6f -#define CONFIG_NETMASK 255.255.255.248 -#define CONFIG_IPADDR 192.168.161.84 -#define CONFIG_SERVERIP 192.168.161.85 - -#else -#error *** CONFIG_SYS_ERROR: you have to setup just one LAN only or expand your config.h -#endif - -/*------------------------------------------------------------------------ - * STATUS LEDs - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_LED_PIO) - -#if (CONFIG_SYS_NIOS_CPU_LED_PIO == 0) - -#define STATUS_LED_BASE CONFIG_SYS_NIOS_CPU_PIO0 -#define STATUS_LED_BITS CONFIG_SYS_NIOS_CPU_PIO0_BITS -#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */ - -#if (CONFIG_SYS_NIOS_CPU_PIO0_TYPE == 1) -#define STATUS_LED_WRONLY 1 -#else -#undef STATUS_LED_WRONLY -#endif - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 1) - -#define STATUS_LED_BASE CONFIG_SYS_NIOS_CPU_PIO1 -#define STATUS_LED_BITS CONFIG_SYS_NIOS_CPU_PIO1_BITS -#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */ - -#if (CONFIG_SYS_NIOS_CPU_PIO1_TYPE == 1) -#define STATUS_LED_WRONLY 1 -#else -#undef STATUS_LED_WRONLY -#endif - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 2) - -#define STATUS_LED_BASE CONFIG_SYS_NIOS_CPU_PIO2 -#define STATUS_LED_BITS CONFIG_SYS_NIOS_CPU_PIO2_BITS -#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */ - -#if (CONFIG_SYS_NIOS_CPU_PIO2_TYPE == 1) -#define STATUS_LED_WRONLY 1 -#else -#undef STATUS_LED_WRONLY -#endif - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 3) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO3 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 4) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO4 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 5) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO5 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 6) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO6 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 7) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO7 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 8) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO8 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 9) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO9 not supported, expand your config.h - -#else -#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_LED_PIO in right case -#endif - -#define CONFIG_STATUS_LED 1 /* enable status led driver */ - -#define STATUS_LED_BIT (1 << 0) /* LED[0] */ -#define STATUS_LED_STATE STATUS_LED_BLINKING -#define STATUS_LED_BOOT_STATE STATUS_LED_OFF -#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) /* ca. 1 Hz */ -#define STATUS_LED_BOOT 0 /* boot LED */ - -#if (STATUS_LED_BITS > 1) -#define STATUS_LED_BIT1 (1 << 1) /* LED[1] */ -#define STATUS_LED_STATE1 STATUS_LED_OFF -#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 10) /* ca. 5 Hz */ -#define STATUS_LED_RED 1 /* fail LED */ -#endif - -#if (STATUS_LED_BITS > 2) -#define STATUS_LED_BIT2 (1 << 2) /* LED[2] */ -#define STATUS_LED_STATE2 STATUS_LED_OFF -#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2) /* ca. 1 Hz */ -#define STATUS_LED_YELLOW 2 /* info LED */ -#endif - -#if (STATUS_LED_BITS > 3) -#define STATUS_LED_BIT3 (1 << 3) /* LED[3] */ -#define STATUS_LED_STATE3 STATUS_LED_OFF -#define STATUS_LED_PERIOD3 (CONFIG_SYS_HZ / 2) /* ca. 1 Hz */ -#define STATUS_LED_GREEN 3 /* info LED */ -#endif - -#define STATUS_LED_PAR 1 /* makes status_led.h happy */ - -#endif /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */ - -/*------------------------------------------------------------------------ - * Diagnostics / Power On Self Tests - *----------------------------------------------------------------------*/ -#define CONFIG_POST CONFIG_SYS_POST_RTC -#define CONFIG_SYS_NIOS_POST_WORD_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_BSP -#define CONFIG_CMD_CDP -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_DISPLAY -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_IMMAP -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_PING -#define CONFIG_CMD_PORTIO -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_REISER -#define CONFIG_CMD_SAVES -#define CONFIG_CMD_SDRAM -#define CONFIG_CMD_SNTP - -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_XIMG - -#if (CONFIG_SYS_NIOS_CPU_SPI_NUMS == 1) -#define CONFIG_CMD_DATE -#define CONFIG_CMD_SPI -#endif - -/*------------------------------------------------------------------------ - * KGDB - *----------------------------------------------------------------------*/ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 9600 -#endif - -/*------------------------------------------------------------------------ - * MISC - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser - undef to save memory */ -#define CONFIG_SYS_PROMPT "ADNPESC1 > " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 64 /* max number of command args*/ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#ifdef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "[]> " -#endif - -/* Default load address */ -#if (CONFIG_SYS_SRAM_SIZE != 0) - -/* default in SRAM */ -#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SRAM_BASE - -#elif (CONFIG_SYS_SDRAM_SIZE != 0) - -/* default in SDRAM */ -#if (CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE) -#if 1 -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE) -#else -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x400000) -#endif -#else -#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE -#endif - -#else -#undef CONFIG_SYS_LOAD_ADDR /* force error break */ -#endif - -/* MEM test area */ -#if (CONFIG_SYS_SDRAM_SIZE != 0) - -/* SDRAM begin to stack area (1MB stack) */ -#if (CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE) -#if 0 -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE) -#else -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x400000) -#endif -#else -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#endif - -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - (1024 * 1024)) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - (1024 * 1024)) - -#else -#undef CONFIG_SYS_MEMTEST_START /* force error break */ -#undef CONFIG_SYS_MEMTEST_END -#endif - -/* - * JFFS2 partitions - * - */ -/* No command line, one static partition */ -#undef CONFIG_CMD_MTDPARTS -#define CONFIG_JFFS2_DEV "nor" -#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF -#define CONFIG_JFFS2_PART_OFFSET 0x00000000 - -/* mtdparts command line support */ -/* -#define CONFIG_CMD_MTDPARTS -#define MTDIDS_DEFAULT "" -#define MTDPARTS_DEFAULT "" -*/ - -#endif /* __CONFIG_H */ diff --git a/include/configs/ADNPESC1_base_32.h b/include/configs/ADNPESC1_base_32.h deleted file mode 100644 index 1fe8d095be..0000000000 --- a/include/configs/ADNPESC1_base_32.h +++ /dev/null @@ -1,431 +0,0 @@ -/* - * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_ADNPESC1_BASE_32_H -#define __CONFIG_ADNPESC1_BASE_32_H - -/* - * NIOS CPU configuration. (PART OF configs/ADNPESC1.h) - * - * Here we must define CPU dependencies. Any unsupported option have to - * be undefined or defined with zero, example CPU without data cache / OCI: - * - * #define CONFIG_SYS_NIOS_CPU_ICACHE 4096 - * #define CONFIG_SYS_NIOS_CPU_DCACHE 0 - * #undef CONFIG_SYS_NIOS_CPU_OCI_BASE - * #undef CONFIG_SYS_NIOS_CPU_OCI_SIZE - */ - -/* CPU core */ -#define CONFIG_SYS_NIOS_CPU_CLK 50000000 /* NIOS CPU clock */ -#define CONFIG_SYS_NIOS_CPU_ICACHE (0) /* instruction cache */ -#define CONFIG_SYS_NIOS_CPU_DCACHE (0) /* data cache */ -#define CONFIG_SYS_NIOS_CPU_REG_NUMS 512 /* number of register */ -#define CONFIG_SYS_NIOS_CPU_MUL 0 /* 16x16 MUL: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_MSTEP 1 /* 16x16 MSTEP: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_STACK 0x03000000 /* stack top addr */ -#define CONFIG_SYS_NIOS_CPU_VEC_BASE 0x02000000 /* IRQ vectors addr */ -#define CONFIG_SYS_NIOS_CPU_VEC_SIZE 256 /* size */ -#define CONFIG_SYS_NIOS_CPU_VEC_NUMS 64 /* numbers */ -#define CONFIG_SYS_NIOS_CPU_RST_VECT 0x00000000 /* RESET vector addr */ -#define CONFIG_SYS_NIOS_CPU_DBG_CORE 0 /* CPU debug: no(0) */ - /* yes(1) */ - -/* The offset address in flash to check for the Nios signature "Ni". - * (see GM_FlashExec in germs_monitor.s) */ -#define CONFIG_SYS_NIOS_CPU_EXES_OFFS 0x0C - -/* on-chip extensions */ -#undef CONFIG_SYS_NIOS_CPU_RAM_BASE /* on chip RAM addr */ -#undef CONFIG_SYS_NIOS_CPU_RAM_SIZE /* 64 KB size */ - -#define CONFIG_SYS_NIOS_CPU_ROM_BASE 0x00000000 /* on chip ROM addr */ -#define CONFIG_SYS_NIOS_CPU_ROM_SIZE (2 * 1024) /* 2 KB size */ - -#undef CONFIG_SYS_NIOS_CPU_OCI_BASE /* OCI core addr */ -#undef CONFIG_SYS_NIOS_CPU_OCI_SIZE /* size */ - -/* timer */ -#define CONFIG_SYS_NIOS_CPU_TIMER_NUMS 1 /* number of timer */ - -#define CONFIG_SYS_NIOS_CPU_TIMER0 0x00000840 /* TIMER0 addr */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_IRQ 16 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_PER 1000 /* periode usec */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_AR 0 /* always run: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_FP 0 /* fixed per: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_SS 1 /* snaphot: no(0) */ - /* yes(1) */ - -/* serial i/o */ -#define CONFIG_SYS_NIOS_CPU_UART_NUMS 2 /* number of uarts */ - -#define CONFIG_SYS_NIOS_CPU_UART0 0x00000800 /* UART0 addr */ -#define CONFIG_SYS_NIOS_CPU_UART0_IRQ 17 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_UART0_BR 115200 /* baudrate var(0) */ -#define CONFIG_SYS_NIOS_CPU_UART0_DB 8 /* data bit */ -#define CONFIG_SYS_NIOS_CPU_UART0_SB 1 /* stop bit */ -#define CONFIG_SYS_NIOS_CPU_UART0_PA 0 /* parity none(0) */ - /* odd(1) */ - /* even(2) */ -#define CONFIG_SYS_NIOS_CPU_UART0_HS 1 /* handshake: no(0) */ - /* crts(1) */ -#define CONFIG_SYS_NIOS_CPU_UART0_EOP 0 /* eop reg: no(0) */ - /* yes(1) */ - -#define CONFIG_SYS_NIOS_CPU_UART1 0x00000820 /* UART1 addr */ -#define CONFIG_SYS_NIOS_CPU_UART1_IRQ 18 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_UART1_BR 115200 /* baudrate var(0) */ -#define CONFIG_SYS_NIOS_CPU_UART1_DB 8 /* data bit */ -#define CONFIG_SYS_NIOS_CPU_UART1_SB 1 /* stop bit */ -#define CONFIG_SYS_NIOS_CPU_UART1_PA 0 /* parity none(0) */ - /* odd(1) */ - /* even(2) */ -#define CONFIG_SYS_NIOS_CPU_UART1_HS 0 /* handshake: no(0) */ - /* crts(1) */ -#define CONFIG_SYS_NIOS_CPU_UART1_EOP 0 /* eop reg: no(0) */ - /* yes(1) */ - -/* serial peripheral i/o */ -#define CONFIG_SYS_NIOS_CPU_SPI_NUMS 1 /* number of spis */ - -#define CONFIG_SYS_NIOS_CPU_SPI0 0x000008c0 /* SPI0 addr */ -#define CONFIG_SYS_NIOS_CPU_SPI0_IRQ 25 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_SPI0_BITS 16 /* data bit */ -#define CONFIG_SYS_NIOS_CPU_SPI0_MA 1 /* is master: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_SPI0_SLN 1 /* num slaves */ -#define CONFIG_SYS_NIOS_CPU_SPI0_TCLK 250000 /* clock (Hz) */ -#define CONFIG_SYS_NIOS_CPU_SPI0_TDELAY 2 /* delay (usec) */ -#define CONFIG_SYS_NIOS_CPU_SPI0_FB 0 /* first bit msb(0) */ - /* lsb(1) */ - -/* parallel i/o */ -#define CONFIG_SYS_NIOS_CPU_PIO_NUMS 14 /* number of parports */ - -#define CONFIG_SYS_NIOS_CPU_PIO0 0x00000860 /* PIO0 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO0_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO0_BITS 8 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO0_TYPE 0 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO0_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO0_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO0_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO1 0x00000870 /* PIO1 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO1_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO1_BITS 8 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO1_TYPE 0 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO1_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO1_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO1_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO2 0x00000880 /* PIO2 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO2_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO2_BITS 4 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO2_TYPE 0 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO2_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO2_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO2_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO3 0x00000890 /* PIO3 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO3_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO3_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO3_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO3_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO3_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO3_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO3 0x00000890 /* PIO3 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO3_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO3_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO3_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO3_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO3_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO3_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO4 0x000008a0 /* PIO4 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO4_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO4_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO4_TYPE 1 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO4_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO4_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO4_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO5 0x000008b0 /* PIO5 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO5_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO5_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO5_TYPE 1 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO5_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO5_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO5_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO6 0x00000900 /* PIO6 addr */ -#define CONFIG_SYS_NIOS_CPU_PIO6_IRQ 20 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO6_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO6_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO6_CAP 1 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO6_EDGE 2 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO6_ITYPE 1 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO7 0x00000910 /* PIO7 addr */ -#define CONFIG_SYS_NIOS_CPU_PIO7_IRQ 31 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO7_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO7_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO7_CAP 1 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO7_EDGE 2 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO7_ITYPE 1 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO8 0x00000920 /* PIO8 addr */ -#define CONFIG_SYS_NIOS_CPU_PIO8_IRQ 32 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO8_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO8_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO8_CAP 1 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO8_EDGE 2 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO8_ITYPE 1 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO9 0x00000930 /* PIO9 addr */ -#define CONFIG_SYS_NIOS_CPU_PIO9_IRQ 33 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO9_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO9_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO9_CAP 1 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO9_EDGE 2 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO9_ITYPE 1 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO10 0x00000940 /* PIO10 addr */ -#define CONFIG_SYS_NIOS_CPU_PIO10_IRQ 34 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO10_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO10_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO10_CAP 1 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO10_EDGE 2 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO10_ITYPE 1 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO11 0x00000950 /* PIO11 addr */ -#define CONFIG_SYS_NIOS_CPU_PIO11_IRQ 35 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO11_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO11_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO11_CAP 1 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO11_EDGE 2 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO11_ITYPE 1 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO12 0x00000960 /* PIO12 addr */ -#define CONFIG_SYS_NIOS_CPU_PIO12_IRQ 36 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO12_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO12_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO12_CAP 1 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO12_EDGE 2 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO12_ITYPE 1 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO13 0x00000970 /* PIO113 addr */ -#define CONFIG_SYS_NIOS_CPU_PIO13_IRQ 37 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO13_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO13_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO13_CAP 1 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO13_EDGE 2 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO13_ITYPE 1 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -/* IDE i/f */ -#define CONFIG_SYS_NIOS_CPU_IDE_NUMS 2 /* number of IDE contr. */ - -#define CONFIG_SYS_NIOS_CPU_IDE0 0x00001000 /* IDE0 addr */ -#define CONFIG_SYS_NIOS_CPU_IDE0_IRQ 36 /* IRQ */ - -#define CONFIG_SYS_NIOS_CPU_IDE1 0x00001020 /* IDE1 addr */ -#define CONFIG_SYS_NIOS_CPU_IDE1_IRQ 37 /* IRQ */ - -/* memory accessibility */ -#undef CONFIG_SYS_NIOS_CPU_SRAM_BASE /* board SRAM addr */ -#undef CONFIG_SYS_NIOS_CPU_SRAM_SIZE /* 1 MB size */ - -#define CONFIG_SYS_NIOS_CPU_SDRAM_BASE 0x02000000 /* board SDRAM addr */ -#define CONFIG_SYS_NIOS_CPU_SDRAM_SIZE (16*1024*1024) /* 16 MB size */ - -#define CONFIG_SYS_NIOS_CPU_FLASH_BASE 0x01000000 /* board Flash addr */ -#define CONFIG_SYS_NIOS_CPU_FLASH_SIZE (8*1024*1024) /* 8 MB size */ - -/* LAN */ -#define CONFIG_SYS_NIOS_CPU_LAN_NUMS 1 /* number of LAN i/f */ - -#define CONFIG_SYS_NIOS_CPU_LAN0_BASE 0x00010000 /* LAN0 addr */ -#define CONFIG_SYS_NIOS_CPU_LAN0_OFFS (0) /* offset */ -#define CONFIG_SYS_NIOS_CPU_LAN0_IRQ 20 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_LAN0_BUSW 16 /* buswidth*/ -#define CONFIG_SYS_NIOS_CPU_LAN0_TYPE 0 /* smc91111(0) */ - /* cs8900(1) */ - /* ex: openmac(2) */ - /* ex: alteramac(3) */ - -/* external extension */ -#define CONFIG_SYS_NIOS_CPU_CS0_BASE 0x40000000 /* board EXT0 addr */ -#define CONFIG_SYS_NIOS_CPU_CS0_SIZE (16*1024*1024) /* max. 16 MB size */ - -#define CONFIG_SYS_NIOS_CPU_CS1_BASE 0x41000000 /* board EXT1 addr */ -#define CONFIG_SYS_NIOS_CPU_CS1_SIZE (16*1024*1024) /* max. 16 MB size */ - -#define CONFIG_SYS_NIOS_CPU_CS2_BASE 0x42000000 /* board EXT2 addr */ -#define CONFIG_SYS_NIOS_CPU_CS2_SIZE (16*1024*1024) /* max. 16 MB size */ - -#define CONFIG_SYS_NIOS_CPU_CS3_BASE 0x43000000 /* board EXT3 addr */ -#define CONFIG_SYS_NIOS_CPU_CS3_SIZE (16*1024*1024) /* max. 16 MB size */ - -/* symbolic redefinition (undef, if not present) */ -#define CONFIG_SYS_NIOS_CPU_TICK_TIMER 0 /* TIMER0: tick (needed)*/ -#undef CONFIG_SYS_NIOS_CPU_USER_TIMER /* TIMERx: users choice */ - -#define CONFIG_SYS_NIOS_CPU_PORTA_PIO 0 /* PIO0: Port A */ -#define CONFIG_SYS_NIOS_CPU_PORTB_PIO 1 /* PIO1: Port D */ -#define CONFIG_SYS_NIOS_CPU_PORTC_PIO 2 /* PIO2: Port C */ -#define CONFIG_SYS_NIOS_CPU_RCM_PIO 3 /* PIO3: RCM jumper */ -#define CONFIG_SYS_NIOS_CPU_WDENA_PIO 4 /* PIO4: watchdog enable*/ -#define CONFIG_SYS_NIOS_CPU_WDTOG_PIO 5 /* PIO5: watchdog trigg.*/ - -/* PIOx: LED bar */ -#ifdef CONFIG_DNPEVA2 /* DNP/EVA2 base board */ -#define CONFIG_SYS_NIOS_CPU_LED_PIO CONFIG_SYS_NIOS_CPU_PORTA_PIO -#else -#undef CONFIG_SYS_NIOS_CPU_LED_PIO /* no LED bar */ -#endif - -#endif /* __CONFIG_ADNPESC1_BASE_32_H */ diff --git a/include/configs/DK1C20.h b/include/configs/DK1C20.h deleted file mode 100644 index cdc488b38e..0000000000 --- a/include/configs/DK1C20.h +++ /dev/null @@ -1,555 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * Stephan Linz <linz@li-pro.net> - * - * CompactFlash/IDE: - * (C) Copyright 2004, Shlomo Kut <skut@vyyo.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/*********************************************************************** - * Include the whole NIOS CPU configuration. - * - * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!! - * - ***********************************************************************/ - -#if defined(CONFIG_NIOS_SAFE_32) -#include <configs/DK1C20_safe_32.h> -#elif defined(CONFIG_NIOS_STANDARD_32) -#include <configs/DK1C20_standard_32.h> -#else -#error *** CONFIG_SYS_ERROR: you have to setup right NIOS CPU configuration -#endif - -/*------------------------------------------------------------------------ - * BOARD/CPU -- TOP-LEVEL - *----------------------------------------------------------------------*/ -#define CONFIG_NIOS 1 /* NIOS-32 core */ -#define CONFIG_DK1C20 1 /* Cyclone DK-1C20 board*/ -#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */ -#define CONFIG_SYS_HZ 1000 /* 1 msec time tick */ -#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ - -/*------------------------------------------------------------------------ - * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM) - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_SDRAM_SIZE != 0) - -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_NIOS_CPU_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_NIOS_CPU_SDRAM_SIZE - -#else -#error *** CONFIG_SYS_ERROR: you have to setup any SDRAM in NIOS CPU config -#endif - -#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_NIOS_CPU_SRAM_BASE -#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_NIOS_CPU_SRAM_SIZE -#define CONFIG_SYS_VECT_BASE CONFIG_SYS_NIOS_CPU_VEC_BASE - -/*------------------------------------------------------------------------ - * MEMORY ORGANIZATION - For the most part, you can put things pretty - * much anywhere. This is pretty flexible for Nios. So here we make some - * arbitrary choices & assume that the monitor is placed at the end of - * a memory resource (so you must make sure TEXT_BASE is chosen - * appropriately). - * - * -The heap is placed below the monitor. - * -Global data is placed below the heap. - * -The stack is placed below global data (&grows down). - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256k */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET - -/*------------------------------------------------------------------------ - * FLASH (AM29LV065D) - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0) - -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_NIOS_CPU_FLASH_BASE -#define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_NIOS_CPU_FLASH_SIZE -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */ -#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size */ - -#else -#error *** CONFIG_SYS_ERROR: you have to setup any Flash memory in NIOS CPU config -#endif - -/*------------------------------------------------------------------------ - * ENVIRONMENT - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0) - -#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */ -#define CONFIG_ENV_ADDR CONFIG_SYS_FLASH_BASE /* Mem addr of env */ -#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */ -#define CONFIG_ENV_OVERWRITE /* Serial/eth change Ok */ - -#else -#define CONFIG_ENV_IS_NOWHERE 1 /* NO Environment */ -#endif - -/*------------------------------------------------------------------------ - * CONSOLE - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_UART_NUMS != 0) - -#define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_NIOS_CPU_UART0 /* 1st UART is Cons. */ - -#if (CONFIG_SYS_NIOS_CPU_UART0_BR != 0) -#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */ -#define CONFIG_BAUDRATE CONFIG_SYS_NIOS_CPU_UART0_BR -#else -#undef CONFIG_SYS_NIOS_FIXEDBAUD -#define CONFIG_BAUDRATE 115200 -#endif - -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -#else -#error *** CONFIG_SYS_ERROR: you have to setup at least one UART in NIOS CPU config -#endif - -/*------------------------------------------------------------------------ - * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc PIT, - * so an avalon bus timer is required. - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_TIMER_NUMS != 0) - -#if (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 0) - -#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER0 /* TIMER0 as tick */ -#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER0_IRQ - -#if (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 1) /* fixed period */ - -#if (CONFIG_SYS_NIOS_CPU_TIMER0_PER >= CONFIG_SYS_HZ) -#define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER0_PER / CONFIG_SYS_HZ) -#else -#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ -#endif - -#undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */ - -#elif (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 0) /* variable period */ - -#if (CONFIG_SYS_HZ <= 1000) -#define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ) -#else -#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000 -#endif - -#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) - -#else -#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER0_FP correct -#endif - -#elif (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 1) - -#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER1 /* TIMER1 as tick */ -#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER1_IRQ - -#if (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 1) /* fixed period */ - -#if (CONFIG_SYS_NIOS_CPU_TIMER1_PER >= CONFIG_SYS_HZ) -#define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER1_PER / CONFIG_SYS_HZ) -#else -#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ -#endif - -#undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */ - -#elif (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 0) /* variable period */ - -#if (CONFIG_SYS_HZ <= 1000) -#define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ) -#else -#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000 -#endif - -#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) - -#else -#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER1_FP correct -#endif - -#endif /* CONFIG_SYS_NIOS_CPU_TICK_TIMER */ - -#else -#error *** CONFIG_SYS_ERROR: you have to setup at least one TIMER in NIOS CPU config -#endif - -/*------------------------------------------------------------------------ - * Ethernet - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_LAN_NUMS == 1) - -#if (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 0) /* LAN91C111 */ - -#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ -#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ -#define CONFIG_SMC91111_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS) - -#if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32) -#define CONFIG_SMC_USE_32_BIT 1 -#else /* no */ -#undef CONFIG_SMC_USE_32_BIT -#endif - -#elif (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 1) /* CS8900A */ - - /********************************************/ - /* !!! CS8900 is __not__ tested on NIOS !!! */ - /********************************************/ -#define CONFIG_NET_MULTI -#define CONFIG_CS8900 /* Using CS8900 */ -#define CONFIG_CS8900_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + \ - CONFIG_SYS_NIOS_CPU_LAN0_OFFS) - -#if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32) -#undef CONFIG_CS8900_BUS16 -#define CONFIG_CS8900_BUS32 -#else /* no */ -#define CONFIG_CS8900_BUS16 -#undef CONFIG_CS8900_BUS32 -#endif - -#else -#error *** CONFIG_SYS_ERROR: invalid LAN0 chip type, check your NIOS CPU config -#endif - -#define CONFIG_ETHADDR 08:00:3e:26:0a:5b -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_IPADDR 192.168.2.21 -#define CONFIG_SERVERIP 192.168.2.16 - -#else -#error *** CONFIG_SYS_ERROR: you have to setup just one LAN only or expand your config.h -#endif - -/*------------------------------------------------------------------------ - * STATUS LEDs - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0) - -#if (CONFIG_SYS_NIOS_CPU_LED_PIO == 0) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO0 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 1) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO1 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 2) - -#define STATUS_LED_BASE CONFIG_SYS_NIOS_CPU_PIO2 -#define STATUS_LED_BITS CONFIG_SYS_NIOS_CPU_PIO2_BITS -#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */ - -#if (CONFIG_SYS_NIOS_CPU_PIO2_TYPE == 1) -#define STATUS_LED_WRONLY 1 -#else -#undef STATUS_LED_WRONLY -#endif - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 3) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO3 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 4) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO4 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 5) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO5 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 6) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO6 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 7) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO7 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 8) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO8 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 9) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO9 not supported, expand your config.h - -#else -#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_LED_PIO in right case -#endif - -#define CONFIG_STATUS_LED 1 /* enable status led driver */ - -#define STATUS_LED_BIT (1 << 0) /* LED[0] */ -#define STATUS_LED_STATE STATUS_LED_BLINKING -#define STATUS_LED_BOOT_STATE STATUS_LED_OFF -#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */ -#define STATUS_LED_BOOT 0 /* boot LED */ - -#if (STATUS_LED_BITS > 1) -#define STATUS_LED_BIT1 (1 << 1) /* LED[1] */ -#define STATUS_LED_STATE1 STATUS_LED_OFF -#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 50) /* ca. 5 Hz */ -#define STATUS_LED_RED 1 /* fail LED */ -#endif - -#if (STATUS_LED_BITS > 2) -#define STATUS_LED_BIT2 (1 << 2) /* LED[2] */ -#define STATUS_LED_STATE2 STATUS_LED_OFF -#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */ -#define STATUS_LED_YELLOW 2 /* info LED */ -#endif - -#if (STATUS_LED_BITS > 3) -#define STATUS_LED_BIT3 (1 << 3) /* LED[3] */ -#define STATUS_LED_STATE3 STATUS_LED_OFF -#define STATUS_LED_PERIOD3 (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */ -#define STATUS_LED_GREEN 3 /* info LED */ -#endif - -#define STATUS_LED_PAR 1 /* makes status_led.h happy */ - -#endif /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */ - -/*------------------------------------------------------------------------ - * SEVEN SEGMENT LED DISPLAY - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0) - -#if (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 0) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO0 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 1) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO1 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 2) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO2 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 3) - -#define SEVENSEG_BASE CONFIG_SYS_NIOS_CPU_PIO3 -#define SEVENSEG_BITS CONFIG_SYS_NIOS_CPU_PIO3_BITS -#define SEVENSEG_ACTIVE 0 /* LED on for bit == 1 */ - -#if (CONFIG_SYS_NIOS_CPU_PIO3_TYPE == 1) -#define SEVENSEG_WRONLY 1 -#else -#undef SEVENSEG_WRONLY -#endif - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 4) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO4 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 5) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO5 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 6) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO6 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 7) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO7 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 8) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO8 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 9) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO9 not supported, expand your config.h - -#else -#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO in right case -#endif - -#define CONFIG_SEVENSEG 1 /* enable seven segment led driver */ - -/* - * Dual 7-Segment Display pin assignment -- read more in your - * "Nios Development Board Reference Manual" - * - * - * (U8) HI:D[15..8] (U9) LO:D[7..0] - * ______ ______ - * | D14 | | D6 | - * | | | | - * D9| |D13 D1| |D5 - * |______| |______| ___ - * | D8 | | D0 | | A | - * | | | | F|___|B - * D10| |D12 D2| |D4 | G | - * |______| |______| E|___|C - * D11 * D3 * D * - * D15 D7 DP - * - */ -#define SEVENSEG_DIGIT_HI_LO_EQUAL 1 /* high nibble equal low nibble */ -#define SEVENSEG_DIGIT_A (1 << 6) /* bit 6 is segment A */ -#define SEVENSEG_DIGIT_B (1 << 5) /* bit 5 is segment B */ -#define SEVENSEG_DIGIT_C (1 << 4) /* bit 4 is segment C */ -#define SEVENSEG_DIGIT_D (1 << 3) /* bit 3 is segment D */ -#define SEVENSEG_DIGIT_E (1 << 2) /* bit 2 is segment E */ -#define SEVENSEG_DIGIT_F (1 << 1) /* bit 1 is segment F */ -#define SEVENSEG_DIGIT_G (1 << 0) /* bit 0 is segment G */ -#define SEVENSEG_DIGIT_DP (1 << 7) /* bit 7 is decimal point */ - -#endif /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */ - -/*------------------------------------------------------------------------ - * ASMI - Active Serial Memory Interface. - * - * ASMI is for Cyclone devices only and only works when the configuration - * is loaded via JTAG or ASMI. Please see doc/README.dk1c20 for details. - *----------------------------------------------------------------------*/ -#define CONFIG_NIOS_ASMI /* Enable ASMI */ -#define CONFIG_SYS_NIOS_ASMIBASE CONFIG_SYS_NIOS_CPU_ASMI0 /* ASMI base address */ - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_CDP -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_DISPLAY -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_IDE -#define CONFIG_CMD_IMMAP -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_PING -#define CONFIG_CMD_PORTIO -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_SAVES -#define CONFIG_CMD_SDRAM -#define CONFIG_CMD_SNTP - -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_XIMG - -/*------------------------------------------------------------------------ - * COMPACT FLASH - *----------------------------------------------------------------------*/ -#if defined(CONFIG_CMD_IDE) -#define CONFIG_IDE_PREINIT /* Implement id_preinit */ -#define CONFIG_SYS_IDE_MAXBUS 1 /* 1 IDE bus */ -#define CONFIG_SYS_IDE_MAXDEVICE 1 /* 1 drive per IDE bus */ - -#define CONFIG_SYS_ATA_BASE_ADDR 0x00920a00 /* IDE/ATA base addr */ -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 /* IDE0 offset */ -#define CONFIG_SYS_ATA_DATA_OFFSET 0x0040 /* Data IO offset */ -#define CONFIG_SYS_ATA_REG_OFFSET 0x0040 /* Register offset */ -#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 /* Alternate reg offset */ -#define CONFIG_SYS_ATA_STRIDE 4 /* Width betwix addrs */ -#define CONFIG_DOS_PARTITION - -/* Board-specific cf regs */ -#define CONFIG_SYS_CF_PRESENT 0x009209b0 /* CF Present PIO base */ -#define CONFIG_SYS_CF_POWER 0x009209c0 /* CF Power FET PIO base*/ -#define CONFIG_SYS_CF_ATASEL 0x009209d0 /* CF ATASEL PIO base */ - -#endif - -/*------------------------------------------------------------------------ - * KGDB - *----------------------------------------------------------------------*/ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 9600 -#endif - -/*------------------------------------------------------------------------ - * MISC - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "DK1C20 > " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#if (CONFIG_SYS_SRAM_SIZE != 0) -#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SRAM_BASE /* Default load address */ -#else -#undef CONFIG_SYS_LOAD_ADDR -#endif - -#if (CONFIG_SYS_SDRAM_SIZE != 0) -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* SDRAM til stack area */ -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - (1024 * 1024)) /* 1MB stack */ -#else -#undef CONFIG_SYS_MEMTEST_START -#undef CONFIG_SYS_MEMTEST_END -#endif - -/* - * JFFS2 partitions - * - */ -/* No command line, one static partition, whole device */ -#undef CONFIG_CMD_MTDPARTS -#define CONFIG_JFFS2_DEV "nor0" -#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF -#define CONFIG_JFFS2_PART_OFFSET 0x00000000 - -/* mtdparts command line support */ -/* -#define CONFIG_CMD_MTDPARTS -#define MTDIDS_DEFAULT "" -#define MTDPARTS_DEFAULT "" -*/ - -#endif /* __CONFIG_H */ diff --git a/include/configs/DK1C20_safe_32.h b/include/configs/DK1C20_safe_32.h deleted file mode 100644 index 86e4869f13..0000000000 --- a/include/configs/DK1C20_safe_32.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_DK1C20_SAFE_32_H -#define __CONFIG_DK1C20_SAFE_32_H - -/* - * NIOS CPU configuration. (PART OF configs/DK1C20.h) - * - * !!! TODO !!! TODO !!! - */ -#error *** CONFIG_SYS_ERROR: DK1C20_safe_32 have to be defined (use DK1C20_standard_32 as template) - -#endif /* __CONFIG_DK1C20_SAFE_32_H */ diff --git a/include/configs/DK1C20_standard_32.h b/include/configs/DK1C20_standard_32.h deleted file mode 100644 index c08aaae019..0000000000 --- a/include/configs/DK1C20_standard_32.h +++ /dev/null @@ -1,279 +0,0 @@ -/* - * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_DK1C20_STANDARD_32_H -#define __CONFIG_DK1C20_STANDARD_32_H - -/* - * NIOS CPU configuration. (PART OF configs/DK1C20.h) - * - * Here we must define CPU dependencies. Any unsupported option have to - * be defined with zero, example CPU without data cache / OCI: - * - * #define CONFIG_SYS_NIOS_CPU_ICACHE 4096 - * #define CONFIG_SYS_NIOS_CPU_DCACHE 0 - * #define CONFIG_SYS_NIOS_CPU_OCI_BASE 0 - * #define CONFIG_SYS_NIOS_CPU_OCI_SIZE 0 - */ - -/* CPU core */ -#define CONFIG_SYS_NIOS_CPU_CLK 50000000 /* NIOS CPU clock */ -#define CONFIG_SYS_NIOS_CPU_ICACHE (4 * 1024) /* instruction cache */ -#define CONFIG_SYS_NIOS_CPU_DCACHE (4 * 1024) /* data cache */ -#define CONFIG_SYS_NIOS_CPU_REG_NUMS 256 /* number of register */ -#define CONFIG_SYS_NIOS_CPU_MUL 0 /* 16x16 MUL: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_MSTEP 1 /* 16x16 MSTEP: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_STACK 0x008fff00 /* stack top addr */ -#define CONFIG_SYS_NIOS_CPU_VEC_BASE 0x008fff00 /* IRQ vectors addr */ -#define CONFIG_SYS_NIOS_CPU_VEC_SIZE 256 /* size */ -#define CONFIG_SYS_NIOS_CPU_VEC_NUMS 64 /* numbers */ -#define CONFIG_SYS_NIOS_CPU_RST_VECT 0x00920000 /* RESET vector addr */ -#define CONFIG_SYS_NIOS_CPU_DBG_CORE 0 /* CPU debug: no(0) */ - /* yes(1) */ - -/* on-chip extensions */ -#define CONFIG_SYS_NIOS_CPU_RAM_BASE 0 /* on chip RAM addr */ -#define CONFIG_SYS_NIOS_CPU_RAM_SIZE 0 /* size */ - -#define CONFIG_SYS_NIOS_CPU_ROM_BASE 0x00920000 /* on chip ROM addr */ -#define CONFIG_SYS_NIOS_CPU_ROM_SIZE (2 * 1024) /* 2 KB size */ - -#define CONFIG_SYS_NIOS_CPU_OCI_BASE 0x00920800 /* OCI core addr */ -#define CONFIG_SYS_NIOS_CPU_OCI_SIZE 256 /* size */ - -/* timer */ -#define CONFIG_SYS_NIOS_CPU_TIMER_NUMS 2 /* number of timer */ - -#define CONFIG_SYS_NIOS_CPU_TIMER0 0x00920940 /* TIMER0 addr */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_IRQ 16 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_PER 1000 /* periode usec */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_AR 0 /* always run: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_FP 0 /* fixed per: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_SS 1 /* snaphot: no(0) */ - /* yes(1) */ - -#define CONFIG_SYS_NIOS_CPU_TIMER1 0x009209e0 /* TIMER1 addr */ -#define CONFIG_SYS_NIOS_CPU_TIMER1_IRQ 50 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_TIMER1_PER 10000 /* periode usec */ -#define CONFIG_SYS_NIOS_CPU_TIMER1_AR 1 /* always run: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_TIMER1_FP 1 /* fixed per: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_TIMER1_SS 0 /* snaphot: no(0) */ - /* yes(1) */ - -/* serial i/o */ -#define CONFIG_SYS_NIOS_CPU_UART_NUMS 1 /* number of uarts */ - -#define CONFIG_SYS_NIOS_CPU_UART0 0x00920900 /* UART0 addr */ -#define CONFIG_SYS_NIOS_CPU_UART0_IRQ 25 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_UART0_BR 115200 /* baudrate var(0) */ -#define CONFIG_SYS_NIOS_CPU_UART0_DB 8 /* data bit */ -#define CONFIG_SYS_NIOS_CPU_UART0_SB 1 /* stop bit */ -#define CONFIG_SYS_NIOS_CPU_UART0_PA 0 /* parity none(0) */ - /* odd(1) */ - /* even(2) */ -#define CONFIG_SYS_NIOS_CPU_UART0_HS 0 /* handshake: no(0) */ - /* crts(1) */ -#define CONFIG_SYS_NIOS_CPU_UART0_EOP 0 /* eop reg: no(0) */ - /* yes(1) */ - -/* parallel i/o */ -#define CONFIG_SYS_NIOS_CPU_PIO_NUMS 8 /* number of parports */ - -#define CONFIG_SYS_NIOS_CPU_PIO0 0x00920960 /* PIO0 addr */ -#define CONFIG_SYS_NIOS_CPU_PIO0_IRQ 40 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO0_BITS 4 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO0_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO0_CAP 1 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO0_EDGE 3 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO0_ITYPE 2 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO1 0x00920970 /* PIO1 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO1_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO1_BITS 11 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO1_TYPE 0 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO1_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO1_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO1_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO2 0x00920980 /* PIO2 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO2_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO2_BITS 8 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO2_TYPE 1 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO2_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO2_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO2_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO3 0x00920990 /* PIO3 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO3_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO3_BITS 16 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO3_TYPE 1 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO3_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO3_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO3_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO4 0x009209a0 /* PIO4 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO4_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO4_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO4_TYPE 0 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO4_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO4_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO4_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO5 0x009209b0 /* PIO5 addr */ -#define CONFIG_SYS_NIOS_CPU_PIO5_IRQ 35 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO5_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO5_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO5_CAP 1 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO5_EDGE 3 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO5_ITYPE 2 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO6 0x009209c0 /* PIO6 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO6_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO6_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO6_TYPE 1 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO6_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO6_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO6_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO7 0x009209d0 /* PIO7 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO7_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO7_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO7_TYPE 1 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO7_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO7_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO7_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -/* IDE i/f */ -#define CONFIG_SYS_NIOS_CPU_IDE_NUMS 1 /* number of IDE contr. */ -#define CONFIG_SYS_NIOS_CPU_IDE0 0x00920a00 /* IDE0 addr */ - -/* active serial memory i/f */ -#define CONFIG_SYS_NIOS_CPU_ASMI_NUMS 1 /* number of ASMI */ -#define CONFIG_SYS_NIOS_CPU_ASMI0 0x00920b00 /* ASMI0 addr */ -#define CONFIG_SYS_NIOS_CPU_ASMI0_IRQ 45 /* IRQ */ - -/* memory accessibility */ -#define CONFIG_SYS_NIOS_CPU_SRAM_BASE 0x00800000 /* board SRAM addr */ -#define CONFIG_SYS_NIOS_CPU_SRAM_SIZE (1024 * 1024) /* 1 MB size */ - -#define CONFIG_SYS_NIOS_CPU_SDRAM_BASE 0x01000000 /* board SDRAM addr */ -#define CONFIG_SYS_NIOS_CPU_SDRAM_SIZE (16*1024*1024) /* 16 MB size */ - -#define CONFIG_SYS_NIOS_CPU_FLASH_BASE 0x00000000 /* board Flash addr */ -#define CONFIG_SYS_NIOS_CPU_FLASH_SIZE (8*1024*1024) /* 8 MB size */ - -/* LAN */ -#define CONFIG_SYS_NIOS_CPU_LAN_NUMS 1 /* number of LAN i/f */ - -#define CONFIG_SYS_NIOS_CPU_LAN0_BASE 0x00910000 /* LAN0 addr */ -#define CONFIG_SYS_NIOS_CPU_LAN0_OFFS 0x0300 /* offset */ -#define CONFIG_SYS_NIOS_CPU_LAN0_IRQ 30 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_LAN0_BUSW 32 /* buswidth*/ -#define CONFIG_SYS_NIOS_CPU_LAN0_TYPE 0 /* smc91111(0) */ - /* cs8900(1) */ - /* ex: alteramac(2) */ - -/* symbolic redefinition (undef, if not present) */ -#define CONFIG_SYS_NIOS_CPU_USER_TIMER 0 /* TIMER0: users choice */ -#define CONFIG_SYS_NIOS_CPU_TICK_TIMER 1 /* TIMER1: tick (needed)*/ - -#define CONFIG_SYS_NIOS_CPU_BUTTON_PIO 0 /* PIO0: buttons */ -#define CONFIG_SYS_NIOS_CPU_LCD_PIO 1 /* PIO1: ASCII LCD */ -#define CONFIG_SYS_NIOS_CPU_LED_PIO 2 /* PIO2: LED bar */ -#define CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO 3 /* PIO3: 7-seg. display */ -#define CONFIG_SYS_NIOS_CPU_RECONF_PIO 4 /* PIO4: reconf pin */ -#define CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO 5 /* PIO5: CF present IRQ */ -#define CONFIG_SYS_NIOS_CPU_CFPOWER_PIO 6 /* PIO6: CF power/sw. */ -#define CONFIG_SYS_NIOS_CPU_CFATASEL_PIO 7 /* PIO7: CF ATA select */ - -#endif /* __CONFIG_DK1C20_STANDARD_32_H */ diff --git a/include/configs/DK1S10.h b/include/configs/DK1S10.h deleted file mode 100644 index 6e788610fd..0000000000 --- a/include/configs/DK1S10.h +++ /dev/null @@ -1,561 +0,0 @@ -/* - * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/*********************************************************************** - * Include the whole NIOS CPU configuration. - * - * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!! - * - ***********************************************************************/ - -#if defined(CONFIG_NIOS_SAFE_32) -#include <configs/DK1S10_safe_32.h> -#elif defined(CONFIG_NIOS_STANDARD_32) -#include <configs/DK1S10_standard_32.h> -#elif defined(CONFIG_NIOS_MTX_LDK_20) -#include <configs/DK1S10_mtx_ldk_20.h> -#else -#error *** CONFIG_SYS_ERROR: you have to setup right NIOS CPU configuration -#endif - -/*------------------------------------------------------------------------ - * BOARD/CPU -- TOP-LEVEL - *----------------------------------------------------------------------*/ -#define CONFIG_NIOS 1 /* NIOS-32 core */ -#define CONFIG_DK1S10 1 /* Stratix DK-1S10 board*/ -#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */ -#define CONFIG_SYS_HZ 1000 /* 1 msec time tick */ -#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ - -/*------------------------------------------------------------------------ - * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM) - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_SDRAM_SIZE != 0) - -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_NIOS_CPU_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_NIOS_CPU_SDRAM_SIZE - -#else -#error *** CONFIG_SYS_ERROR: you have to setup any SDRAM in NIOS CPU config -#endif - -#if defined(CONFIG_SYS_NIOS_CPU_SRAM_BASE) && defined(CONFIG_SYS_NIOS_CPU_SRAM_SIZE) - -#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_NIOS_CPU_SRAM_BASE -#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_NIOS_CPU_SRAM_SIZE - -#else - -#undef CONFIG_SYS_SRAM_BASE -#undef CONFIG_SYS_SRAM_SIZE - -#endif - -#define CONFIG_SYS_VECT_BASE CONFIG_SYS_NIOS_CPU_VEC_BASE - -/*------------------------------------------------------------------------ - * MEMORY ORGANIZATION - For the most part, you can put things pretty - * much anywhere. This is pretty flexible for Nios. So here we make some - * arbitrary choices & assume that the monitor is placed at the end of - * a memory resource (so you must make sure TEXT_BASE is chosen - * appropriately). - * - * -The heap is placed below the monitor. - * -Global data is placed below the heap. - * -The stack is placed below global data (&grows down). - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256k */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET - -/*------------------------------------------------------------------------ - * FLASH (AM29LV065D) - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0) - -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_NIOS_CPU_FLASH_BASE -#define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_NIOS_CPU_FLASH_SIZE -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */ -#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size */ - -#else -#error *** CONFIG_SYS_ERROR: you have to setup any Flash memory in NIOS CPU config -#endif - -/*------------------------------------------------------------------------ - * ENVIRONMENT - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_FLASH_SIZE != 0) - -#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */ - -#if defined(CONFIG_NIOS_STANDARD_32) -#define CONFIG_ENV_ADDR CONFIG_SYS_FLASH_BASE /* Mem addr of env */ -#elif defined(CONFIG_NIOS_MTX_LDK_20) -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) -#else -#error *** CONFIG_SYS_ERROR: you have to setup the environment base address CONFIG_ENV_ADDR -#endif - -#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */ -#define CONFIG_ENV_OVERWRITE /* Serial/eth change Ok */ - -#else -#define CONFIG_ENV_IS_NOWHERE 1 /* NO Environment */ -#endif - -/*------------------------------------------------------------------------ - * CONSOLE - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_UART_NUMS != 0) - -#define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_NIOS_CPU_UART0 /* 1st UART is Cons. */ -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ - -#if (CONFIG_SYS_NIOS_CPU_UART0_BR != 0) -#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */ -#define CONFIG_BAUDRATE CONFIG_SYS_NIOS_CPU_UART0_BR -#else -#undef CONFIG_SYS_NIOS_FIXEDBAUD -#define CONFIG_BAUDRATE 115200 -#endif - -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -#else -#error *** CONFIG_SYS_ERROR: you have to setup at least one UART in NIOS CPU config -#endif - -/*------------------------------------------------------------------------ - * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc PIT, - * so an avalon bus timer is required. - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_TIMER_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_TICK_TIMER) - -#if (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 0) - -#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER0 /* TIMER0 as tick */ -#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER0_IRQ - -#if (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 1) /* fixed period */ - -#if (CONFIG_SYS_NIOS_CPU_TIMER0_PER >= CONFIG_SYS_HZ) -#define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER0_PER / CONFIG_SYS_HZ) -#else -#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ -#endif - -#undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */ - -#elif (CONFIG_SYS_NIOS_CPU_TIMER0_FP == 0) /* variable period */ - -#if (CONFIG_SYS_HZ <= 1000) -#define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ) -#else -#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000 -#endif - -#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) - -#else -#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER0_FP correct -#endif - -#elif (CONFIG_SYS_NIOS_CPU_TICK_TIMER == 1) - -#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_NIOS_CPU_TIMER1 /* TIMER1 as tick */ -#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_NIOS_CPU_TIMER1_IRQ - -#if (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 1) /* fixed period */ - -#if (CONFIG_SYS_NIOS_CPU_TIMER1_PER >= CONFIG_SYS_HZ) -#define CONFIG_SYS_NIOS_TMRMS (CONFIG_SYS_NIOS_CPU_TIMER1_PER / CONFIG_SYS_HZ) -#else -#error *** CONFIG_SYS_ERROR: you have to use a timer periode greater than CONFIG_SYS_HZ -#endif - -#undef CONFIG_SYS_NIOS_TMRCNT /* no preloadable counter value */ - -#elif (CONFIG_SYS_NIOS_CPU_TIMER1_FP == 0) /* variable period */ - -#if (CONFIG_SYS_HZ <= 1000) -#define CONFIG_SYS_NIOS_TMRMS (1000 / CONFIG_SYS_HZ) -#else -#error *** CONFIG_SYS_ERROR: sorry, CONFIG_SYS_HZ have to be less than 1000 -#endif - -#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) - -#else -#error *** CONFIG_SYS_ERROR: you have to define CONFIG_SYS_NIOS_CPU_TIMER1_FP correct -#endif - -#endif /* CONFIG_SYS_NIOS_CPU_TICK_TIMER */ - -#else -#error *** CONFIG_SYS_ERROR: you have to setup at least one TIMER in NIOS CPU config -#endif - -/*------------------------------------------------------------------------ - * Ethernet -- needs work! - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_LAN_NUMS == 1) - -#if (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 0) /* LAN91C111 */ - -#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */ -#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ -#define CONFIG_SMC91111_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + CONFIG_SYS_NIOS_CPU_LAN0_OFFS) - -#if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32) -#define CONFIG_SMC_USE_32_BIT 1 -#else /* no */ -#undef CONFIG_SMC_USE_32_BIT -#endif - -#elif (CONFIG_SYS_NIOS_CPU_LAN0_TYPE == 1) /* CS8900A */ - - /********************************************/ - /* !!! CS8900 is __not__ tested on NIOS !!! */ - /********************************************/ -#define CONFIG_NET_MULTI -#define CONFIG_CS8900 /* Using CS8900 */ -#define CONFIG_CS8900_BASE (CONFIG_SYS_NIOS_CPU_LAN0_BASE + \ - CONFIG_SYS_NIOS_CPU_LAN0_OFFS) - -#if (CONFIG_SYS_NIOS_CPU_LAN0_BUSW == 32) -#undef CONFIG_CS8900_BUS16 -#define CONFIG_CS8900_BUS32 -#else /* no */ -#define CONFIG_CS8900_BUS16 -#undef CONFIG_CS8900_BUS32 -#endif - -#else -#error *** CONFIG_SYS_ERROR: invalid LAN0 chip type, check your NIOS CPU config -#endif - -#define CONFIG_ETHADDR 08:00:3e:26:0a:5b -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_IPADDR 192.168.2.21 -#define CONFIG_SERVERIP 192.168.2.16 - -#else -#error *** CONFIG_SYS_ERROR: you have to setup just one LAN only or expand your config.h -#endif - -/*------------------------------------------------------------------------ - * STATUS LEDs - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_LED_PIO) - -#if (CONFIG_SYS_NIOS_CPU_LED_PIO == 0) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO0 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 1) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO1 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 2) - -#define STATUS_LED_BASE CONFIG_SYS_NIOS_CPU_PIO2 -#define STATUS_LED_BITS CONFIG_SYS_NIOS_CPU_PIO2_BITS -#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */ - -#if (CONFIG_SYS_NIOS_CPU_PIO2_TYPE == 1) -#define STATUS_LED_WRONLY 1 -#else -#undef STATUS_LED_WRONLY -#endif - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 3) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO3 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 4) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO4 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 5) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO5 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 6) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO6 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 7) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO7 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 8) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO8 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_LED_PIO == 9) - -#error *** CONFIG_SYS_ERROR: status LEDs at PIO9 not supported, expand your config.h - -#else -#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_LED_PIO in right case -#endif - -#define CONFIG_STATUS_LED 1 /* enable status led driver */ - -#define STATUS_LED_BIT (1 << 0) /* LED[0] */ -#define STATUS_LED_STATE STATUS_LED_BLINKING -#define STATUS_LED_BOOT_STATE STATUS_LED_OFF -#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */ -#define STATUS_LED_BOOT 0 /* boot LED */ - -#if (STATUS_LED_BITS > 1) -#define STATUS_LED_BIT1 (1 << 1) /* LED[1] */ -#define STATUS_LED_STATE1 STATUS_LED_OFF -#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 50) /* ca. 5 Hz */ -#define STATUS_LED_RED 1 /* fail LED */ -#endif - -#if (STATUS_LED_BITS > 2) -#define STATUS_LED_BIT2 (1 << 2) /* LED[2] */ -#define STATUS_LED_STATE2 STATUS_LED_OFF -#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */ -#define STATUS_LED_YELLOW 2 /* info LED */ -#endif - -#if (STATUS_LED_BITS > 3) -#define STATUS_LED_BIT3 (1 << 3) /* LED[3] */ -#define STATUS_LED_STATE3 STATUS_LED_OFF -#define STATUS_LED_PERIOD3 (CONFIG_SYS_HZ / 10) /* ca. 1 Hz */ -#define STATUS_LED_GREEN 3 /* info LED */ -#endif - -#define STATUS_LED_PAR 1 /* makes status_led.h happy */ - -#endif /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */ - -/*------------------------------------------------------------------------ - * SEVEN SEGMENT LED DISPLAY - *----------------------------------------------------------------------*/ -#if (CONFIG_SYS_NIOS_CPU_PIO_NUMS != 0) && defined(CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO) - -#if (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 0) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO0 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 1) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO1 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 2) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO2 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 3) - -#define SEVENSEG_BASE CONFIG_SYS_NIOS_CPU_PIO3 -#define SEVENSEG_BITS CONFIG_SYS_NIOS_CPU_PIO3_BITS -#define SEVENSEG_ACTIVE 0 /* LED on for bit == 1 */ - -#if (CONFIG_SYS_NIOS_CPU_PIO3_TYPE == 1) -#define SEVENSEG_WRONLY 1 -#else -#undef SEVENSEG_WRONLY -#endif - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 4) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO4 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 5) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO5 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 6) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO6 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 7) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO7 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 8) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO8 not supported, expand your config.h - -#elif (CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO == 9) - -#error *** CONFIG_SYS_ERROR: seven segment display at PIO9 not supported, expand your config.h - -#else -#error *** CONFIG_SYS_ERROR: you have to set CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO in right case -#endif - -#define CONFIG_SEVENSEG 1 /* enable seven segment led driver */ - -/* - * Dual 7-Segment Display pin assignment -- read more in your - * "Nios Development Board Reference Manual" - * - * - * (U8) HI:D[15..8] (U9) LO:D[7..0] - * ______ ______ - * | D14 | | D6 | - * | | | | - * D9| |D13 D1| |D5 - * |______| |______| ___ - * | D8 | | D0 | | A | - * | | | | F|___|B - * D10| |D12 D2| |D4 | G | - * |______| |______| E|___|C - * D11 * D3 * D * - * D15 D7 DP - * - */ -#define SEVENSEG_DIGIT_HI_LO_EQUAL 1 /* high nibble equal low nibble */ -#define SEVENSEG_DIGIT_A (1 << 6) /* bit 6 is segment A */ -#define SEVENSEG_DIGIT_B (1 << 5) /* bit 5 is segment B */ -#define SEVENSEG_DIGIT_C (1 << 4) /* bit 4 is segment C */ -#define SEVENSEG_DIGIT_D (1 << 3) /* bit 3 is segment D */ -#define SEVENSEG_DIGIT_E (1 << 2) /* bit 2 is segment E */ -#define SEVENSEG_DIGIT_F (1 << 1) /* bit 1 is segment F */ -#define SEVENSEG_DIGIT_G (1 << 0) /* bit 0 is segment G */ -#define SEVENSEG_DIGIT_DP (1 << 7) /* bit 7 is decimal point */ - -#endif /* CONFIG_SYS_NIOS_CPU_PIO_NUMS */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_CDP -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_DISPLAY -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_IMMAP -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_PING -#define CONFIG_CMD_PORTIO -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_REISER -#define CONFIG_CMD_SAVES -#define CONFIG_CMD_SDRAM -#define CONFIG_CMD_SNTP - -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_XIMG - -/*------------------------------------------------------------------------ - * KGDB - *----------------------------------------------------------------------*/ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 9600 -#endif - -/*------------------------------------------------------------------------ - * MISC - *----------------------------------------------------------------------*/ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "DK1S10 > " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -/* Default load address */ -#if (CONFIG_SYS_SRAM_SIZE != 0) - -/* default in SRAM */ -#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SRAM_BASE - -#elif (CONFIG_SYS_SDRAM_SIZE != 0) - -/* default in SDRAM */ -#if (CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE) -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE) -#else -#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE -#endif - -#else -#undef CONFIG_SYS_LOAD_ADDR /* force error break */ -#endif - - -/* MEM test area */ -#if (CONFIG_SYS_SDRAM_SIZE != 0) - -/* SDRAM begin to stack area (1MB stack) */ -#if (CONFIG_SYS_SDRAM_BASE == CONFIG_SYS_NIOS_CPU_VEC_BASE) -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_NIOS_CPU_VEC_SIZE) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - (1024 * 1024)) -#else -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - (1024 * 1024)) -#endif - -#else -#undef CONFIG_SYS_MEMTEST_START /* force error break */ -#undef CONFIG_SYS_MEMTEST_END -#endif - -/* - * JFFS2 partitions - * - */ -/* No command line, one static partition, whole device */ -#undef CONFIG_CMD_MTDPARTS -#define CONFIG_JFFS2_DEV "nor0" -#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF -#define CONFIG_JFFS2_PART_OFFSET 0x00000000 - -/* mtdparts command line support */ -/* -#define CONFIG_CMD_MTDPARTS -#define MTDIDS_DEFAULT "" -#define MTDPARTS_DEFAULT "" -*/ - -#endif /* __CONFIG_H */ diff --git a/include/configs/DK1S10_mtx_ldk_20.h b/include/configs/DK1S10_mtx_ldk_20.h deleted file mode 100644 index 87a8a54380..0000000000 --- a/include/configs/DK1S10_mtx_ldk_20.h +++ /dev/null @@ -1,187 +0,0 @@ -/* - * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_DK1S10_MTX_LDK_20_H -#define __CONFIG_DK1S10_MTX_LDK_20_H - -/* - * NIOS CPU configuration. (PART OF configs/DK1S10.h) - * - * Here we must define CPU dependencies. Any unsupported option have to - * be defined with zero, example CPU without data cache / OCI: - * - * #define CONFIG_SYS_NIOS_CPU_ICACHE 4096 - * #define CONFIG_SYS_NIOS_CPU_DCACHE 0 - * #define CONFIG_SYS_NIOS_CPU_OCI_BASE 0 - * #define CONFIG_SYS_NIOS_CPU_OCI_SIZE 0 - */ - -/* CPU core */ -#define CONFIG_SYS_NIOS_CPU_CLK 75000000 /* NIOS CPU clock */ -#define CONFIG_SYS_NIOS_CPU_ICACHE (0) /* instruction cache */ -#define CONFIG_SYS_NIOS_CPU_DCACHE (0) /* data cache */ -#define CONFIG_SYS_NIOS_CPU_REG_NUMS 512 /* number of register */ -#define CONFIG_SYS_NIOS_CPU_MUL 0 /* 16x16 MUL: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_MSTEP 1 /* 16x16 MSTEP: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_STACK 0x02000000 /* stack top addr */ -#define CONFIG_SYS_NIOS_CPU_VEC_BASE 0x01000000 /* IRQ vectors addr */ -#define CONFIG_SYS_NIOS_CPU_VEC_SIZE 256 /* size */ -#define CONFIG_SYS_NIOS_CPU_VEC_NUMS 64 /* numbers */ -#define CONFIG_SYS_NIOS_CPU_RST_VECT 0x00000000 /* RESET vector addr */ -#define CONFIG_SYS_NIOS_CPU_DBG_CORE 0 /* CPU debug: no(0) */ - /* yes(1) */ - -/* The offset address in flash to check for the Nios signature "Ni". - * (see GM_FlashExec in germs_monitor.s) */ -#define CONFIG_SYS_NIOS_CPU_EXES_OFFS 0x0C - -/* on-chip extensions */ -#undef CONFIG_SYS_NIOS_CPU_RAM_BASE /* on chip RAM addr */ -#undef CONFIG_SYS_NIOS_CPU_RAM_SIZE /* 64 KB size */ - -#define CONFIG_SYS_NIOS_CPU_ROM_BASE 0x00000000 /* on chip ROM addr */ -#define CONFIG_SYS_NIOS_CPU_ROM_SIZE (2 * 1024) /* 2 KB size */ - -#undef CONFIG_SYS_NIOS_CPU_OCI_BASE /* OCI core addr */ -#undef CONFIG_SYS_NIOS_CPU_OCI_SIZE /* size */ - -/* timer */ -#define CONFIG_SYS_NIOS_CPU_TIMER_NUMS 1 /* number of timer */ - -#define CONFIG_SYS_NIOS_CPU_TIMER0 0x00000840 /* TIMER0 addr */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_IRQ 16 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_PER 1000 /* periode usec */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_AR 0 /* always run: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_FP 0 /* fixed per: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_SS 1 /* snaphot: no(0) */ - /* yes(1) */ - -/* serial i/o */ -#define CONFIG_SYS_NIOS_CPU_UART_NUMS 2 /* number of uarts */ - -#define CONFIG_SYS_NIOS_CPU_UART0 0x00000800 /* UART0 addr */ -#define CONFIG_SYS_NIOS_CPU_UART0_IRQ 17 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_UART0_BR 115200 /* baudrate var(0) */ -#define CONFIG_SYS_NIOS_CPU_UART0_DB 8 /* data bit */ -#define CONFIG_SYS_NIOS_CPU_UART0_SB 2 /* stop bit */ -#define CONFIG_SYS_NIOS_CPU_UART0_PA 0 /* parity none(0) */ - /* odd(1) */ - /* even(2) */ -#define CONFIG_SYS_NIOS_CPU_UART0_HS 0 /* handshake: no(0) */ - /* crts(1) */ -#define CONFIG_SYS_NIOS_CPU_UART0_EOP 0 /* eop reg: no(0) */ - /* yes(1) */ - -#define CONFIG_SYS_NIOS_CPU_UART1 0x000008a0 /* UART1 addr */ -#define CONFIG_SYS_NIOS_CPU_UART1_IRQ 18 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_UART1_BR 115200 /* baudrate var(0) */ -#define CONFIG_SYS_NIOS_CPU_UART1_DB 8 /* data bit */ -#define CONFIG_SYS_NIOS_CPU_UART1_SB 1 /* stop bit */ -#define CONFIG_SYS_NIOS_CPU_UART1_PA 0 /* parity none(0) */ - /* odd(1) */ - /* even(2) */ -#define CONFIG_SYS_NIOS_CPU_UART1_HS 0 /* handshake: no(0) */ - /* crts(1) */ -#define CONFIG_SYS_NIOS_CPU_UART1_EOP 0 /* eop reg: no(0) */ - /* yes(1) */ - -/* parallel i/o */ -#define CONFIG_SYS_NIOS_CPU_PIO_NUMS 2 /* number of parports */ - -#define CONFIG_SYS_NIOS_CPU_PIO0 0x00000860 /* PIO0 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO0_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO0_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO0_TYPE 1 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO0_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO0_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO0_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO1 0x00000870 /* PIO1 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO1_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO1_BITS 4 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO1_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO1_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO1_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO1_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -/* IDE i/f */ -#define CONFIG_SYS_NIOS_CPU_IDE_NUMS 1 /* number of IDE contr. */ -#define CONFIG_SYS_NIOS_CPU_IDE0 0x00000900 /* IDE0 addr */ -#define CONFIG_SYS_NIOS_CPU_IDE0_IRQ 25 /* IRQ */ - -/* memory accessibility */ -#undef CONFIG_SYS_NIOS_CPU_SRAM_BASE /* board SRAM addr */ -#undef CONFIG_SYS_NIOS_CPU_SRAM_SIZE /* 1 MB size */ - -#define CONFIG_SYS_NIOS_CPU_SDRAM_BASE 0x01000000 /* board SDRAM addr */ -#define CONFIG_SYS_NIOS_CPU_SDRAM_SIZE (16*1024*1024) /* 16 MB size */ - -#define CONFIG_SYS_NIOS_CPU_FLASH_BASE 0x00800000 /* board Flash addr */ -#define CONFIG_SYS_NIOS_CPU_FLASH_SIZE (8*1024*1024) /* 8 MB size */ - -/* LAN */ -#define CONFIG_SYS_NIOS_CPU_LAN_NUMS 1 /* number of LAN i/f */ - -#define CONFIG_SYS_NIOS_CPU_LAN0_BASE 0x00010000 /* LAN0 addr */ -#define CONFIG_SYS_NIOS_CPU_LAN0_OFFS 0x0300 /* offset */ -#define CONFIG_SYS_NIOS_CPU_LAN0_IRQ 20 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_LAN0_BUSW 32 /* buswidth*/ -#define CONFIG_SYS_NIOS_CPU_LAN0_TYPE 0 /* smc91111(0) */ - /* cs8900(1) */ - /* ex: openmac(2) */ - /* ex: alteramac(3) */ - -/* symbolic redefinition (undef, if not present) */ -#define CONFIG_SYS_NIOS_CPU_TICK_TIMER 0 /* TIMER0: tick (needed)*/ -#undef CONFIG_SYS_NIOS_CPU_USER_TIMER /* TIMERx: users choice */ - -#define CONFIG_SYS_NIOS_CPU_CFPOWER_PIO 0 /* PIO0: CF power/sw. */ -#define CONFIG_SYS_NIOS_CPU_BUTTON_PIO 1 /* PIO1: buttons */ -#undef CONFIG_SYS_NIOS_CPU_LCD_PIO /* PIOx: ASCII LCD */ -#undef CONFIG_SYS_NIOS_CPU_LED_PIO /* PIOx: LED bar */ -#undef CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO /* PIOx: 7-seg. display */ -#undef CONFIG_SYS_NIOS_CPU_RECONF_PIO /* PIOx: reconf pin */ -#undef CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO /* PIOx: CF present IRQ */ -#undef CONFIG_SYS_NIOS_CPU_CFATASEL_PIO /* PIOx: CF ATA select */ - -#endif /* __CONFIG_DK1S10_MTX_LDK_20_H */ diff --git a/include/configs/DK1S10_safe_32.h b/include/configs/DK1S10_safe_32.h deleted file mode 100644 index ced4ef281c..0000000000 --- a/include/configs/DK1S10_safe_32.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_DK1S10_SAFE_32_H -#define __CONFIG_DK1S10_SAFE_32_H - -/* - * NIOS CPU configuration. (PART OF configs/DK1S10.h) - * - * !!! TODO !!! TODO !!! - */ -#error *** CONFIG_SYS_ERROR: DK1S10_safe_32 have to be defined (use DK1S10_standard_32 as template) - -#endif /* __CONFIG_DK1S10_SAFE_32_H */ diff --git a/include/configs/DK1S10_standard_32.h b/include/configs/DK1S10_standard_32.h deleted file mode 100644 index e6ccaf57ab..0000000000 --- a/include/configs/DK1S10_standard_32.h +++ /dev/null @@ -1,274 +0,0 @@ -/* - * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_DK1S10_STANDARD_32_H -#define __CONFIG_DK1S10_STANDARD_32_H - -/* - * NIOS CPU configuration. (PART OF configs/DK1S10.h) - * - * Here we must define CPU dependencies. Any unsupported option have to - * be defined with zero, example CPU without data cache / OCI: - * - * #define CONFIG_SYS_NIOS_CPU_ICACHE 4096 - * #define CONFIG_SYS_NIOS_CPU_DCACHE 0 - * #define CONFIG_SYS_NIOS_CPU_OCI_BASE 0 - * #define CONFIG_SYS_NIOS_CPU_OCI_SIZE 0 - */ - -/* CPU core */ -#define CONFIG_SYS_NIOS_CPU_CLK 50000000 /* NIOS CPU clock */ -#define CONFIG_SYS_NIOS_CPU_ICACHE (4 * 1024) /* instruction cache */ -#define CONFIG_SYS_NIOS_CPU_DCACHE (4 * 1024) /* data cache */ -#define CONFIG_SYS_NIOS_CPU_REG_NUMS 256 /* number of register */ -#define CONFIG_SYS_NIOS_CPU_MUL 0 /* 16x16 MUL: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_MSTEP 1 /* 16x16 MSTEP: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_STACK 0x008fff00 /* stack top addr */ -#define CONFIG_SYS_NIOS_CPU_VEC_BASE 0x008fff00 /* IRQ vectors addr */ -#define CONFIG_SYS_NIOS_CPU_VEC_SIZE 256 /* size */ -#define CONFIG_SYS_NIOS_CPU_VEC_NUMS 64 /* numbers */ -#define CONFIG_SYS_NIOS_CPU_RST_VECT 0x00920000 /* RESET vector addr */ -#define CONFIG_SYS_NIOS_CPU_DBG_CORE 0 /* CPU debug: no(0) */ - /* yes(1) */ - -/* on-chip extensions */ -#define CONFIG_SYS_NIOS_CPU_RAM_BASE 0x00900000 /* on chip RAM addr */ -#define CONFIG_SYS_NIOS_CPU_RAM_SIZE (64 * 1024) /* 64 KB size */ - -#define CONFIG_SYS_NIOS_CPU_ROM_BASE 0x00920000 /* on chip ROM addr */ -#define CONFIG_SYS_NIOS_CPU_ROM_SIZE (2 * 1024) /* 2 KB size */ - -#define CONFIG_SYS_NIOS_CPU_OCI_BASE 0x00920800 /* OCI core addr */ -#define CONFIG_SYS_NIOS_CPU_OCI_SIZE 256 /* size */ - -/* timer */ -#define CONFIG_SYS_NIOS_CPU_TIMER_NUMS 2 /* number of timer */ - -#define CONFIG_SYS_NIOS_CPU_TIMER0 0x00920940 /* TIMER0 addr */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_IRQ 16 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_PER 1000 /* periode usec */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_AR 0 /* always run: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_FP 0 /* fixed per: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_TIMER0_SS 1 /* snaphot: no(0) */ - /* yes(1) */ - -#define CONFIG_SYS_NIOS_CPU_TIMER1 0x009209e0 /* TIMER1 addr */ -#define CONFIG_SYS_NIOS_CPU_TIMER1_IRQ 50 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_TIMER1_PER 10000 /* periode usec */ -#define CONFIG_SYS_NIOS_CPU_TIMER1_AR 1 /* always run: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_TIMER1_FP 1 /* fixed per: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_TIMER1_SS 0 /* snaphot: no(0) */ - /* yes(1) */ - -/* serial i/o */ -#define CONFIG_SYS_NIOS_CPU_UART_NUMS 1 /* number of uarts */ - -#define CONFIG_SYS_NIOS_CPU_UART0 0x00920900 /* UART0 addr */ -#define CONFIG_SYS_NIOS_CPU_UART0_IRQ 25 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_UART0_BR 115200 /* baudrate var(0) */ -#define CONFIG_SYS_NIOS_CPU_UART0_DB 8 /* data bit */ -#define CONFIG_SYS_NIOS_CPU_UART0_SB 1 /* stop bit */ -#define CONFIG_SYS_NIOS_CPU_UART0_PA 0 /* parity none(0) */ - /* odd(1) */ - /* even(2) */ -#define CONFIG_SYS_NIOS_CPU_UART0_HS 0 /* handshake: no(0) */ - /* crts(1) */ -#define CONFIG_SYS_NIOS_CPU_UART0_EOP 0 /* eop reg: no(0) */ - /* yes(1) */ - -/* parallel i/o */ -#define CONFIG_SYS_NIOS_CPU_PIO_NUMS 8 /* number of parports */ - -#define CONFIG_SYS_NIOS_CPU_PIO0 0x00920960 /* PIO0 addr */ -#define CONFIG_SYS_NIOS_CPU_PIO0_IRQ 40 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO0_BITS 4 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO0_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO0_CAP 1 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO0_EDGE 3 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO0_ITYPE 2 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO1 0x00920970 /* PIO1 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO1_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO1_BITS 11 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO1_TYPE 0 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO1_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO1_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO1_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO2 0x00920980 /* PIO2 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO2_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO2_BITS 8 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO2_TYPE 1 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO2_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO2_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO2_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO3 0x00920990 /* PIO3 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO3_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO3_BITS 16 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO3_TYPE 1 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO3_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO3_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO3_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO4 0x009209a0 /* PIO4 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO4_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO4_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO4_TYPE 0 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO4_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO4_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO4_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO5 0x009209b0 /* PIO5 addr */ -#define CONFIG_SYS_NIOS_CPU_PIO5_IRQ 35 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO5_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO5_TYPE 2 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO5_CAP 1 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO5_EDGE 3 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO5_ITYPE 2 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO6 0x009209c0 /* PIO6 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO6_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO6_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO6_TYPE 1 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO6_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO6_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO6_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -#define CONFIG_SYS_NIOS_CPU_PIO7 0x009209d0 /* PIO7 addr */ -#undef CONFIG_SYS_NIOS_CPU_PIO7_IRQ /* w/o IRQ */ -#define CONFIG_SYS_NIOS_CPU_PIO7_BITS 1 /* number of bits */ -#define CONFIG_SYS_NIOS_CPU_PIO7_TYPE 1 /* io type: tris(0) */ - /* out(1) */ - /* in(2) */ -#define CONFIG_SYS_NIOS_CPU_PIO7_CAP 0 /* capture: no(0) */ - /* yes(1) */ -#define CONFIG_SYS_NIOS_CPU_PIO7_EDGE 0 /* edge type: none(0) */ - /* fall(1) */ - /* rise(2) */ - /* any(3) */ -#define CONFIG_SYS_NIOS_CPU_PIO7_ITYPE 0 /* IRQ type: none(0) */ - /* level(1)*/ - /* edge(2) */ - -/* IDE i/f */ -#define CONFIG_SYS_NIOS_CPU_IDE_NUMS 1 /* number of IDE contr. */ -#define CONFIG_SYS_NIOS_CPU_IDE0 0x00920a00 /* IDE0 addr */ - -/* memory accessibility */ -#define CONFIG_SYS_NIOS_CPU_SRAM_BASE 0x00800000 /* board SRAM addr */ -#define CONFIG_SYS_NIOS_CPU_SRAM_SIZE (1024 * 1024) /* 1 MB size */ - -#define CONFIG_SYS_NIOS_CPU_SDRAM_BASE 0x01000000 /* board SDRAM addr */ -#define CONFIG_SYS_NIOS_CPU_SDRAM_SIZE (16*1024*1024) /* 16 MB size */ - -#define CONFIG_SYS_NIOS_CPU_FLASH_BASE 0x00000000 /* board Flash addr */ -#define CONFIG_SYS_NIOS_CPU_FLASH_SIZE (8*1024*1024) /* 8 MB size */ - -/* LAN */ -#define CONFIG_SYS_NIOS_CPU_LAN_NUMS 1 /* number of LAN i/f */ - -#define CONFIG_SYS_NIOS_CPU_LAN0_BASE 0x00910000 /* LAN0 addr */ -#define CONFIG_SYS_NIOS_CPU_LAN0_OFFS 0x0300 /* offset */ -#define CONFIG_SYS_NIOS_CPU_LAN0_IRQ 30 /* IRQ */ -#define CONFIG_SYS_NIOS_CPU_LAN0_BUSW 32 /* buswidth*/ -#define CONFIG_SYS_NIOS_CPU_LAN0_TYPE 0 /* smc91111(0) */ - /* cs8900(1) */ - /* ex: alteramac(2) */ - -/* symbolic redefinition (undef, if not present) */ -#define CONFIG_SYS_NIOS_CPU_USER_TIMER 0 /* TIMER0: users choice */ -#define CONFIG_SYS_NIOS_CPU_TICK_TIMER 1 /* TIMER1: tick (needed)*/ - -#define CONFIG_SYS_NIOS_CPU_BUTTON_PIO 0 /* PIO0: buttons */ -#define CONFIG_SYS_NIOS_CPU_LCD_PIO 1 /* PIO1: ASCII LCD */ -#define CONFIG_SYS_NIOS_CPU_LED_PIO 2 /* PIO2: LED bar */ -#define CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO 3 /* PIO3: 7-seg. display */ -#define CONFIG_SYS_NIOS_CPU_RECONF_PIO 4 /* PIO4: reconf pin */ -#define CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO 5 /* PIO5: CF present IRQ */ -#define CONFIG_SYS_NIOS_CPU_CFPOWER_PIO 6 /* PIO6: CF power/sw. */ -#define CONFIG_SYS_NIOS_CPU_CFATASEL_PIO 7 /* PIO7: CF ATA select */ - -#endif /* __CONFIG_DK1S10_STANDARD_32_H */ diff --git a/include/image.h b/include/image.h index 541cac97fe..294eba5094 100644 --- a/include/image.h +++ b/include/image.h @@ -100,7 +100,6 @@ #define IH_ARCH_SPARC 10 /* Sparc */ #define IH_ARCH_SPARC64 11 /* Sparc 64 Bit */ #define IH_ARCH_M68K 12 /* M68K */ -#define IH_ARCH_NIOS 13 /* Nios-32 */ #define IH_ARCH_MICROBLAZE 14 /* MicroBlaze */ #define IH_ARCH_NIOS2 15 /* Nios-II */ #define IH_ARCH_BLACKFIN 16 /* Blackfin */ @@ -493,8 +492,6 @@ static inline int image_check_target_arch (const image_header_t *hdr) if (!image_check_arch (hdr, IH_ARCH_MICROBLAZE)) #elif defined(__mips__) if (!image_check_arch (hdr, IH_ARCH_MIPS)) -#elif defined(__nios__) - if (!image_check_arch (hdr, IH_ARCH_NIOS)) #elif defined(__nios2__) if (!image_check_arch (hdr, IH_ARCH_NIOS2)) #elif defined(__PPC__) @@ -647,8 +644,6 @@ static inline int fit_image_check_target_arch (const void *fdt, int node) if (!fit_image_check_arch (fdt, node, IH_ARCH_MICROBLAZE)) #elif defined(__mips__) if (!fit_image_check_arch (fdt, node, IH_ARCH_MIPS)) -#elif defined(__nios__) - if (!fit_image_check_arch (fdt, node, IH_ARCH_NIOS)) #elif defined(__nios2__) if (!fit_image_check_arch (fdt, node, IH_ARCH_NIOS2)) #elif defined(__PPC__) diff --git a/include/nios-io.h b/include/nios-io.h deleted file mode 100644 index dc7e127fe5..0000000000 --- a/include/nios-io.h +++ /dev/null @@ -1,183 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/************************************************************************* - * Altera Nios Standard Peripherals - ************************************************************************/ - -#ifndef __NIOSIO_H__ -#define __NIOSIO_H__ - -/*------------------------------------------------------------------------ - * UART (http://www.altera.com/literature/ds/ds_nios_uart.pdf) - *----------------------------------------------------------------------*/ -typedef volatile struct nios_uart_t { - unsigned rxdata; /* Rx data reg */ - unsigned txdata; /* Tx data reg */ - unsigned status; /* Status reg */ - unsigned control; /* Control reg */ - unsigned divisor; /* Baud rate divisor reg */ - unsigned endofpacket; /* End-of-packet reg */ -}nios_uart_t; - -/* status register */ -#define NIOS_UART_PE (1 << 0) /* parity error */ -#define NIOS_UART_FE (1 << 1) /* frame error */ -#define NIOS_UART_BRK (1 << 2) /* break detect */ -#define NIOS_UART_ROE (1 << 3) /* rx overrun */ -#define NIOS_UART_TOE (1 << 4) /* tx overrun */ -#define NIOS_UART_TMT (1 << 5) /* tx empty */ -#define NIOS_UART_TRDY (1 << 6) /* tx ready */ -#define NIOS_UART_RRDY (1 << 7) /* rx ready */ -#define NIOS_UART_E (1 << 8) /* exception */ -#define NIOS_UART_DCTS (1 << 10) /* cts change */ -#define NIOS_UART_CTS (1 << 11) /* cts */ -#define NIOS_UART_EOP (1 << 12) /* eop detected */ - -/* control register */ -#define NIOS_UART_IPE (1 << 0) /* parity error int ena*/ -#define NIOS_UART_IFE (1 << 1) /* frame error int ena */ -#define NIOS_UART_IBRK (1 << 2) /* break detect int ena */ -#define NIOS_UART_IROE (1 << 3) /* rx overrun int ena */ -#define NIOS_UART_ITOE (1 << 4) /* tx overrun int ena */ -#define NIOS_UART_ITMT (1 << 5) /* tx empty int ena */ -#define NIOS_UART_ITRDY (1 << 6) /* tx ready int ena */ -#define NIOS_UART_IRRDY (1 << 7) /* rx ready int ena */ -#define NIOS_UART_IE (1 << 8) /* exception int ena */ -#define NIOS_UART_TBRK (1 << 9) /* transmit break */ -#define NIOS_UART_IDCTS (1 << 10) /* cts change int ena */ -#define NIOS_UART_RTS (1 << 11) /* rts */ -#define NIOS_UART_IEOP (1 << 12) /* eop detected int ena */ - - -/*------------------------------------------------------------------------ - * TIMER (http://www.altera.com/literature/ds/ds_nios_timer.pdf) - *----------------------------------------------------------------------*/ -typedef volatile struct nios_timer_t { - unsigned status; /* Timer status reg */ - unsigned control; /* Timer control reg */ - unsigned periodl; /* Timeout period low */ - unsigned periodh; /* Timeout period high */ - unsigned snapl; /* Snapshot low */ - unsigned snaph; /* Snapshot high */ -}nios_timer_t; - -/* status register */ -#define NIOS_TIMER_TO (1 << 0) /* Timeout */ -#define NIOS_TIMER_RUN (1 << 1) /* Timer running */ - -/* control register */ -#define NIOS_TIMER_ITO (1 << 0) /* Timeout int ena */ -#define NIOS_TIMER_CONT (1 << 1) /* Continuous mode */ -#define NIOS_TIMER_START (1 << 2) /* Start timer */ -#define NIOS_TIMER_STOP (1 << 3) /* Stop timer */ - - -/*------------------------------------------------------------------------ - * PIO (http://www.altera.com/literature/ds/ds_nios_pio.pdf) - *----------------------------------------------------------------------*/ -typedef volatile struct nios_pio_t { - unsigned int data; /* Data value at each PIO in/out */ - unsigned int direction; /* Data direct. for each PIO bit */ - unsigned int interruptmask; /* Per-bit IRQ enable/disable */ - unsigned int edgecapture; /* Per-bit sync. edge detect & hold */ -}nios_pio_t; - -/* direction register */ -#define NIOS_PIO_OUT (1) /* PIO bit is output */ -#define NIOS_PIO_IN (0) /* PIO bit is input */ - - -/*------------------------------------------------------------------------ - * SPI (http://www.altera.com/literature/ds/ds_nios_spi.pdf) - *----------------------------------------------------------------------*/ -typedef volatile struct nios_spi_t { - unsigned rxdata; /* Rx data reg */ - unsigned txdata; /* Tx data reg */ - unsigned status; /* Status reg */ - unsigned control; /* Control reg */ - unsigned reserved; /* (master only) */ - unsigned slaveselect; /* SPI slave select mask (master only) */ -}nios_spi_t; - -/* status register */ -#define NIOS_SPI_ROE (1 << 3) /* rx overrun */ -#define NIOS_SPI_TOE (1 << 4) /* tx overrun */ -#define NIOS_SPI_TMT (1 << 5) /* tx empty */ -#define NIOS_SPI_TRDY (1 << 6) /* tx ready */ -#define NIOS_SPI_RRDY (1 << 7) /* rx ready */ -#define NIOS_SPI_E (1 << 8) /* exception */ - -/* control register */ -#define NIOS_SPI_IROE (1 << 3) /* rx overrun int ena */ -#define NIOS_SPI_ITOE (1 << 4) /* tx overrun int ena */ -#define NIOS_SPI_ITRDY (1 << 6) /* tx ready int ena */ -#define NIOS_SPI_IRRDY (1 << 7) /* rx ready int ena */ -#define NIOS_SPI_IE (1 << 8) /* exception int ena */ -#define NIOS_SPI_SSO (1 << 10) /* override SS_n output */ - -/*------------------------------------------------------------------------ - * ASMI - *----------------------------------------------------------------------*/ -typedef volatile struct nios_asmi_t { - unsigned rxdata; /* Rx data reg */ - unsigned txdata; /* Tx data reg */ - unsigned status; /* Status reg */ - unsigned control; /* Control reg */ - unsigned reserved; - unsigned slavesel; /* Slave select */ - unsigned endofpacket; /* End-of-packet reg */ -}nios_asmi_t; - -/* status register */ -#define NIOS_ASMI_ROE (1 << 3) /* rx overrun */ -#define NIOS_ASMI_TOE (1 << 4) /* tx overrun */ -#define NIOS_ASMI_TMT (1 << 5) /* tx empty */ -#define NIOS_ASMI_TRDY (1 << 6) /* tx ready */ -#define NIOS_ASMI_RRDY (1 << 7) /* rx ready */ -#define NIOS_ASMI_E (1 << 8) /* exception */ -#define NIOS_ASMI_EOP (1 << 9) /* eop detected */ - -/* control register */ -#define NIOS_ASMI_IROE (1 << 3) /* rx overrun int ena */ -#define NIOS_ASMI_ITOE (1 << 4) /* tx overrun int ena */ -#define NIOS_ASMI_ITRDY (1 << 6) /* tx ready int ena */ -#define NIOS_ASMI_IRRDY (1 << 7) /* rx ready int ena */ -#define NIOS_ASMI_IE (1 << 8) /* exception int ena */ -#define NIOS_ASMI_IEOP (1 << 9) /* rx eop int ena */ -#define NIOS_ASMI_SSO (1 << 10) /* slave select enable */ - -/*------------------------------------------------------------------------ - * JTAG UART - *----------------------------------------------------------------------*/ -typedef volatile struct nios_jtag_t { - unsigned short rxcntl; /* Rx data/cntl reg */ - unsigned short txcntl; /* Tx data/cntl reg */ - unsigned short errcntl; /* Err dta/cntl reg */ -}nios_jtag_t; - -/* status register */ -#define NIOS_JTAG_TRDY (1 << 8) /* tx ready bit */ -#define NIOS_JTAG_RRDY (1 << 8) /* rx ready bit */ - -#endif /* __NIOSIO_H__ */ diff --git a/include/nios.h b/include/nios.h deleted file mode 100644 index 46b685ab9d..0000000000 --- a/include/nios.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * (C) Copyright 2003, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __NIOS_H__ -#define __NIOS_H__ - -/*------------------------------------------------------------------------ - * Control registers -- use with wrctl() & rdctl() - *----------------------------------------------------------------------*/ -#define CTL_STATUS 0x00 /* Processor status */ -#define CTL_ISTATUS 0x01 /* Saved status (exception) */ -#define CTL_WVALID 0x02 /* Valid window limit */ -#define CTL_ICACHE 0x05 /* I-cache line-invalidate */ -#define CTL_CPU_ID 0x06 /* CPU version id */ -#define CTL_DCACHE 0x07 /* D-cache line-invalidate */ -#define CTL_CLR_IE 0x08 /* Interrupt clear (disable) */ -#define CTL_SET_IE 0x09 /* Interrupt set (enable) */ - -/*------------------------------------------------------------------------ - * Access to control regs - *----------------------------------------------------------------------*/ -#define _str_(s) #s - -#define rdctl(reg)\ - ({unsigned int val;\ - asm volatile( "pfx " _str_(reg) "\n\t rdctl %0"\ - : "=r" (val) ); val;}) - -#define wrctl(reg,val)\ - asm volatile( "pfx " _str_(reg) "\n\t wrctl %0 \n\t nop"\ - : : "r" (val)) - -/*------------------------------------------------------------------------ - * Control reg bit masks - *----------------------------------------------------------------------*/ -#define STATUS_DC (1<<17) /* Data cache enable */ -#define STATUS_IC (1<<16) /* Instruction cache enable */ -#define STATUS_IE (1<<15) /* Interrupt enable */ -#define STATUS_IPRI (0x3f<<9) /* Interrupt priority */ -#define STATUS_CWP (0x1f<<4) /* Current window pointer */ -#define STATUS_N (1<<3) /* Condition code: negative */ -#define STATUS_V (1<<2) /* Condition code: overflow */ -#define STATUS_Z (1<<1) /* Condition code: zero */ -#define STATUS_C (1<<0) /* Condition code: carry/borrow */ - -static inline unsigned ipri( unsigned prio ) -{ - unsigned tmp; - unsigned status = rdctl(CTL_STATUS); - prio = (prio << 9) & STATUS_IPRI; - tmp = (status & ~STATUS_IPRI) | prio; - wrctl(CTL_STATUS,tmp); - return( (status & STATUS_IPRI) >> 9); -} - - -#endif /* __NIOS_H__ */ diff --git a/include/watchdog.h b/include/watchdog.h index ef2f5aac9b..b9599143af 100644 --- a/include/watchdog.h +++ b/include/watchdog.h @@ -31,10 +31,6 @@ # error "Configuration error: CONFIG_HW_WATCHDOG and CONFIG_WATCHDOG can't be used together." #endif -#if defined(__ASSEMBLY__) && defined(__NIOS__) -# error "Configuration error: WATCHDOG_RESET inside assembler not supported for Nios platforms." -#endif - /* * Hardware watchdog */ |
