diff options
81 files changed, 1006 insertions, 609 deletions
@@ -2462,20 +2462,8 @@ versatileab_config \ versatilepb_config : unconfig @board/versatile/split_by_variant.sh $@ -voiceblue_smallflash_config \ voiceblue_config: unconfig - @mkdir -p $(obj)include - @mkdir -p $(obj)board/voiceblue - @if [ "$(findstring _smallflash_,$@)" ] ; then \ - $(XECHO) "... boot from lower flash bank" ; \ - echo "#define VOICEBLUE_SMALL_FLASH" >>$(obj)include/config.h ; \ - echo "VOICEBLUE_SMALL_FLASH=y" >$(obj)board/voiceblue/config.tmp ; \ - else \ - $(XECHO) "... boot from upper flash bank" ; \ - >$(obj)include/config.h ; \ - echo "VOICEBLUE_SMALL_FLASH=n" >$(obj)board/voiceblue/config.tmp ; \ - fi - @$(MKCONFIG) -a voiceblue arm arm925t voiceblue + @$(MKCONFIG) $(@:_config=) arm arm925t voiceblue cm4008_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695 diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c index 1582c22067..462f41d3d2 100644 --- a/board/ads5121/ads5121.c +++ b/board/ads5121/ads5121.c @@ -126,24 +126,24 @@ long int fixed_sdram (void) im->mddrc.prioman_config2 = CFG_MDDRCGRP_PM_CFG2; im->mddrc.hiprio_config = CFG_MDDRCGRP_HIPRIO_CFG; im->mddrc.lut_table0_main_upper = CFG_MDDRCGRP_LUT0_MU; - im->mddrc.lut_table1_main_upper = CFG_MDDRCGRP_LUT1_MU; - im->mddrc.lut_table2_main_upper = CFG_MDDRCGRP_LUT2_MU; - im->mddrc.lut_table3_main_upper = CFG_MDDRCGRP_LUT3_MU; - im->mddrc.lut_table4_main_upper = CFG_MDDRCGRP_LUT4_MU; im->mddrc.lut_table0_main_lower = CFG_MDDRCGRP_LUT0_ML; + im->mddrc.lut_table1_main_upper = CFG_MDDRCGRP_LUT1_MU; im->mddrc.lut_table1_main_lower = CFG_MDDRCGRP_LUT1_ML; + im->mddrc.lut_table2_main_upper = CFG_MDDRCGRP_LUT2_MU; im->mddrc.lut_table2_main_lower = CFG_MDDRCGRP_LUT2_ML; + im->mddrc.lut_table3_main_upper = CFG_MDDRCGRP_LUT3_MU; im->mddrc.lut_table3_main_lower = CFG_MDDRCGRP_LUT3_ML; + im->mddrc.lut_table4_main_upper = CFG_MDDRCGRP_LUT4_MU; im->mddrc.lut_table4_main_lower = CFG_MDDRCGRP_LUT4_ML; im->mddrc.lut_table0_alternate_upper = CFG_MDDRCGRP_LUT0_AU; - im->mddrc.lut_table1_alternate_upper = CFG_MDDRCGRP_LUT1_AU; - im->mddrc.lut_table2_alternate_upper = CFG_MDDRCGRP_LUT2_AU; - im->mddrc.lut_table3_alternate_upper = CFG_MDDRCGRP_LUT3_AU; - im->mddrc.lut_table4_alternate_upper = CFG_MDDRCGRP_LUT4_AU; im->mddrc.lut_table0_alternate_lower = CFG_MDDRCGRP_LUT0_AL; + im->mddrc.lut_table1_alternate_upper = CFG_MDDRCGRP_LUT1_AU; im->mddrc.lut_table1_alternate_lower = CFG_MDDRCGRP_LUT1_AL; + im->mddrc.lut_table2_alternate_upper = CFG_MDDRCGRP_LUT2_AU; im->mddrc.lut_table2_alternate_lower = CFG_MDDRCGRP_LUT2_AL; + im->mddrc.lut_table3_alternate_upper = CFG_MDDRCGRP_LUT3_AU; im->mddrc.lut_table3_alternate_lower = CFG_MDDRCGRP_LUT3_AL; + im->mddrc.lut_table4_alternate_upper = CFG_MDDRCGRP_LUT4_AU; im->mddrc.lut_table4_alternate_lower = CFG_MDDRCGRP_LUT4_AL; /* Initialize MDDRC */ @@ -157,18 +157,26 @@ long int fixed_sdram (void) im->mddrc.ddr_command = CFG_MICRON_NOP; im->mddrc.ddr_command = CFG_MICRON_PCHG_ALL; + im->mddrc.ddr_command = CFG_MICRON_NOP; + im->mddrc.ddr_command = CFG_MICRON_RFSH; + im->mddrc.ddr_command = CFG_MICRON_NOP; + im->mddrc.ddr_command = CFG_MICRON_RFSH; + im->mddrc.ddr_command = CFG_MICRON_NOP; + im->mddrc.ddr_command = CFG_MICRON_INIT_DEV_OP; + im->mddrc.ddr_command = CFG_MICRON_NOP; + im->mddrc.ddr_command = CFG_MICRON_EM2; + im->mddrc.ddr_command = CFG_MICRON_NOP; + im->mddrc.ddr_command = CFG_MICRON_PCHG_ALL; im->mddrc.ddr_command = CFG_MICRON_EM2; im->mddrc.ddr_command = CFG_MICRON_EM3; im->mddrc.ddr_command = CFG_MICRON_EN_DLL; - im->mddrc.ddr_command = CFG_MICRON_RST_DLL; + im->mddrc.ddr_command = CFG_MICRON_INIT_DEV_OP; im->mddrc.ddr_command = CFG_MICRON_PCHG_ALL; im->mddrc.ddr_command = CFG_MICRON_RFSH; im->mddrc.ddr_command = CFG_MICRON_INIT_DEV_OP; im->mddrc.ddr_command = CFG_MICRON_OCD_DEFAULT; - im->mddrc.ddr_command = CFG_MICRON_OCD_EXIT; - - for (i = 0; i < 10; i++) - im->mddrc.ddr_command = CFG_MICRON_NOP; + im->mddrc.ddr_command = CFG_MICRON_PCHG_ALL; + im->mddrc.ddr_command = CFG_MICRON_NOP; /* Start MDDRC */ im->mddrc.ddr_time_config0 = CFG_MDDRC_TIME_CFG0_RUN; diff --git a/board/voiceblue/Makefile b/board/voiceblue/Makefile index 5f340b47f0..9386bb0e7a 100644 --- a/board/voiceblue/Makefile +++ b/board/voiceblue/Makefile @@ -62,7 +62,7 @@ clean: distclean: clean - rm -f $(LIB) core config.tmp *.bak .depend + rm -f $(LIB) core *.bak .depend ######################################################################### diff --git a/board/voiceblue/config.mk b/board/voiceblue/config.mk index d55daa41d9..2cfc56ada5 100644 --- a/board/voiceblue/config.mk +++ b/board/voiceblue/config.mk @@ -1,16 +1 @@ -# -# Linux-Kernel is expected to be at 1000'8000, -# entry 1000'8000 (mem base + reserved) -# - -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifeq ($(VOICEBLUE_SMALL_FLASH),y) -# We load ourself to internal SRAM at 2001'2000 -# Check map file when changing TEXT_BASE. -# Everything has fit into 192kB internal SRAM! -TEXT_BASE = 0x20012000 -else -# Running in SDRAM... TEXT_BASE = 0x13FD0000 -endif diff --git a/board/voiceblue/setup.S b/board/voiceblue/setup.S index dcf37b5dce..78cd2b6bfe 100644 --- a/board/voiceblue/setup.S +++ b/board/voiceblue/setup.S @@ -77,7 +77,7 @@ MUX_CONFIG_VALUES: .word 0x00000000 @ FUNC_MUX_CTRL_3 .word 0x00000000 @ FUNC_MUX_CTRL_4 .word 0x12082480 @ FUNC_MUX_CTRL_5 - .word 0x00000004 @ FUNC_MUX_CTRL_6 + .word 0x0000001c @ FUNC_MUX_CTRL_6 .word 0x00000003 @ FUNC_MUX_CTRL_7 .word 0x10001200 @ FUNC_MUX_CTRL_8 .word 0x01201012 @ FUNC_MUX_CTRL_9 diff --git a/board/xsengine/xsengine.c b/board/xsengine/xsengine.c index 23d56c43ac..65923e92c5 100644 --- a/board/xsengine/xsengine.c +++ b/board/xsengine/xsengine.c @@ -47,7 +47,7 @@ int board_init (void) return 0; } -int board_post_init (void) +int board_late_init (void) { setenv ("stdout", "serial"); setenv ("stderr", "serial"); diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index c28a155453..4e7746120b 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -316,6 +316,7 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) print_num("-> size", bd->bi_dram[i].size); } +#if defined(CONFIG_CMD_NET) puts ("ethaddr ="); for (i=0; i<6; ++i) { printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); @@ -323,6 +324,7 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) puts ( "\n" "ip_addr = "); print_IPaddr (bd->bi_ip_addr); +#endif printf ("\n" "baudrate = %d bps\n", bd->bi_baudrate); diff --git a/common/cmd_net.c b/common/cmd_net.c index 56eb684d55..dbf6b861b1 100644 --- a/common/cmd_net.c +++ b/common/cmd_net.c @@ -51,7 +51,7 @@ int do_tftpb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) U_BOOT_CMD( tftpboot, 3, 1, do_tftpb, "tftpboot- boot image via network using TFTP protocol\n", - "[loadAddress] [bootfilename]\n" + "[loadAddress] [[hostIPaddr:]bootfilename]\n" ); int do_rarpb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) diff --git a/common/fdt_support.c b/common/fdt_support.c index a13c140cff..92f1c7f54f 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -30,9 +30,6 @@ #include <fdt_support.h> #include <exports.h> -#ifdef CONFIG_QE -#include "../drivers/qe/qe.h" -#endif /* * Global data (for the gd->bd) */ @@ -617,49 +614,4 @@ void fdt_fixup_ethernet(void *fdt, bd_t *bd) #endif } } - -#ifdef CONFIG_QE -/* - * If a QE firmware has been uploaded, then add the 'firmware' node under - * the 'qe' node. - */ -void fdt_fixup_qe_firmware(void *fdt) -{ - struct qe_firmware_info *qe_fw_info; - int node, ret; - - qe_fw_info = qe_get_firmware_info(); - if (!qe_fw_info) - return; - - node = fdt_path_offset(fdt, "/qe"); - if (node < 0) - return; - - /* We assume the node doesn't exist yet */ - node = fdt_add_subnode(fdt, node, "firmware"); - if (node < 0) - return; - - ret = fdt_setprop(fdt, node, "extended-modes", - &qe_fw_info->extended_modes, sizeof(u64)); - if (ret < 0) - goto error; - - ret = fdt_setprop_string(fdt, node, "id", qe_fw_info->id); - if (ret < 0) - goto error; - - ret = fdt_setprop(fdt, node, "virtual-traps", qe_fw_info->vtraps, - sizeof(qe_fw_info->vtraps)); - if (ret < 0) - goto error; - - return; - -error: - fdt_del_node(fdt, node); -} -#endif - #endif diff --git a/common/serial.c b/common/serial.c index 56010807be..bfda7ca551 100644 --- a/common/serial.c +++ b/common/serial.c @@ -60,6 +60,16 @@ struct serial_device *__default_serial_console (void) #else return &serial0_device; #endif +#elif defined(CONFIG_S3C2410) +#if defined(CONFIG_SERIAL1) + return &s3c24xx_serial0_device; +#elif defined(CONFIG_SERIAL2) + return &s3c24xx_serial1_device; +#elif defined(CONFIG_SERIAL3) + return &s3c24xx_serial2_device; +#else +#error "CONFIG_SERIAL? missing." +#endif #else #error No default console #endif @@ -123,6 +133,11 @@ void serial_initialize (void) #if defined (CONFIG_STUART) serial_register(&serial_stuart_device); #endif +#if defined(CONFIG_S3C2410) + serial_register(&s3c24xx_serial0_device); + serial_register(&s3c24xx_serial1_device); + serial_register(&s3c24xx_serial2_device); +#endif serial_assign (default_serial_console ()->name); } diff --git a/cpu/arm920t/interrupts.c b/cpu/arm920t/interrupts.c index a43a3ed4fe..0a6d94f74f 100644 --- a/cpu/arm920t/interrupts.c +++ b/cpu/arm920t/interrupts.c @@ -161,11 +161,16 @@ void do_fiq (struct pt_regs *pt_regs) void do_irq (struct pt_regs *pt_regs) { -#if defined (CONFIG_USE_IRQ) && defined (CONFIG_ARCH_INTEGRATOR) +#if defined (CONFIG_USE_IRQ) +#if defined (ARM920_IRQ_CALLBACK) + ARM920_IRQ_CALLBACK(); + return; +#elif defined (CONFIG_ARCH_INTEGRATOR) /* ASSUMED to be a timer interrupt */ /* Just clear it - count handled in */ /* integratorap.c */ *(volatile ulong *)(CFG_TIMERBASE + 0x0C) = 0; +#endif /* ARCH_INTEGRATOR */ #else printf ("interrupt request\n"); show_regs (pt_regs); diff --git a/cpu/arm920t/s3c24x0/Makefile b/cpu/arm920t/s3c24x0/Makefile index 1ed9bf307c..676492025a 100644 --- a/cpu/arm920t/s3c24x0/Makefile +++ b/cpu/arm920t/s3c24x0/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a COBJS = i2c.o interrupts.o serial.o speed.o \ - usb.o usb_ohci.o + usb.o usb_ohci.o nand.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/arm920t/s3c24x0/interrupts.c b/cpu/arm920t/s3c24x0/interrupts.c index 1b364123dc..7ad9fcbd5b 100644 --- a/cpu/arm920t/s3c24x0/interrupts.c +++ b/cpu/arm920t/s3c24x0/interrupts.c @@ -216,4 +216,13 @@ void reset_cpu (ulong ignored) /*NOTREACHED*/ } +#ifdef CONFIG_USE_IRQ +void s3c2410_irq(void) +{ + S3C24X0_INTERRUPT * irq = S3C24X0_GetBase_INTERRUPT(); + u_int32_t intpnd = irq->INTPND; + +} +#endif /* USE_IRQ */ + #endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */ diff --git a/cpu/arm920t/s3c24x0/nand.c b/cpu/arm920t/s3c24x0/nand.c new file mode 100644 index 0000000000..e1bf128157 --- /dev/null +++ b/cpu/arm920t/s3c24x0/nand.c @@ -0,0 +1,179 @@ +/* + * (C) Copyright 2006 OpenMoko, Inc. + * Author: Harald Welte <laforge@openmoko.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#if 0 +#define DEBUGN printf +#else +#define DEBUGN(x, args ...) {} +#endif + +#if defined(CONFIG_CMD_NAND) +#if !defined(CFG_NAND_LEGACY) + +#include <nand.h> +#include <s3c2410.h> + +#define __REGb(x) (*(volatile unsigned char *)(x)) +#define __REGi(x) (*(volatile unsigned int *)(x)) + +#define NF_BASE 0x4e000000 +#define NFCONF __REGi(NF_BASE + 0x0) +#define NFCMD __REGb(NF_BASE + 0x4) +#define NFADDR __REGb(NF_BASE + 0x8) +#define NFDATA __REGb(NF_BASE + 0xc) +#define NFSTAT __REGb(NF_BASE + 0x10) +#define NFECC0 __REGb(NF_BASE + 0x14) +#define NFECC1 __REGb(NF_BASE + 0x15) +#define NFECC2 __REGb(NF_BASE + 0x16) + +#define S3C2410_NFCONF_EN (1<<15) +#define S3C2410_NFCONF_512BYTE (1<<14) +#define S3C2410_NFCONF_4STEP (1<<13) +#define S3C2410_NFCONF_INITECC (1<<12) +#define S3C2410_NFCONF_nFCE (1<<11) +#define S3C2410_NFCONF_TACLS(x) ((x)<<8) +#define S3C2410_NFCONF_TWRPH0(x) ((x)<<4) +#define S3C2410_NFCONF_TWRPH1(x) ((x)<<0) + +static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *chip = mtd->priv; + + DEBUGN("hwcontrol(): 0x%02x: ", cmd); + + switch (cmd) { + case NAND_CTL_SETNCE: + NFCONF &= ~S3C2410_NFCONF_nFCE; + DEBUGN("NFCONF=0x%08x\n", NFCONF); + break; + case NAND_CTL_CLRNCE: + NFCONF |= S3C2410_NFCONF_nFCE; + DEBUGN("NFCONF=0x%08x\n", NFCONF); + break; + case NAND_CTL_SETALE: + chip->IO_ADDR_W = NF_BASE + 0x8; + DEBUGN("SETALE\n"); + break; + case NAND_CTL_SETCLE: + chip->IO_ADDR_W = NF_BASE + 0x4; + DEBUGN("SETCLE\n"); + break; + default: + chip->IO_ADDR_W = NF_BASE + 0xc; + break; + } + return; +} + +static int s3c2410_dev_ready(struct mtd_info *mtd) +{ + DEBUGN("dev_ready\n"); + return (NFSTAT & 0x01); +} + +#ifdef CONFIG_S3C2410_NAND_HWECC +void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) +{ + DEBUGN("s3c2410_nand_enable_hwecc(%p, %d)\n", mtd ,mode); + NFCONF |= S3C2410_NFCONF_INITECC; +} + +static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, + u_char *ecc_code) +{ + ecc_code[0] = NFECC0; + ecc_code[1] = NFECC1; + ecc_code[2] = NFECC2; + DEBUGN("s3c2410_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n", + mtd , ecc_code[0], ecc_code[1], ecc_code[2]); + + return 0; +} + +static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, + u_char *read_ecc, u_char *calc_ecc) +{ + if (read_ecc[0] == calc_ecc[0] && + read_ecc[1] == calc_ecc[1] && + read_ecc[2] == calc_ecc[2]) + return 0; + + printf("s3c2410_nand_correct_data: not implemented\n"); + return -1; +} +#endif + +int board_nand_init(struct nand_chip *nand) +{ + u_int32_t cfg; + u_int8_t tacls, twrph0, twrph1; + S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); + + DEBUGN("board_nand_init()\n"); + + clk_power->CLKCON |= (1 << 4); + + /* initialize hardware */ + twrph0 = 3; twrph1 = 0; tacls = 0; + + cfg = S3C2410_NFCONF_EN; + cfg |= S3C2410_NFCONF_TACLS(tacls - 1); + cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1); + cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1); + + NFCONF = cfg; + + /* initialize nand_chip data structure */ + nand->IO_ADDR_R = nand->IO_ADDR_W = 0x4e00000c; + + /* read_buf and write_buf are default */ + /* read_byte and write_byte are default */ + + /* hwcontrol always must be implemented */ + nand->hwcontrol = s3c2410_hwcontrol; + + nand->dev_ready = s3c2410_dev_ready; + +#ifdef CONFIG_S3C2410_NAND_HWECC + nand->enable_hwecc = s3c2410_nand_enable_hwecc; + nand->calculate_ecc = s3c2410_nand_calculate_ecc; + nand->correct_data = s3c2410_nand_correct_data; + nand->eccmode = NAND_ECC_HW3_512; +#else + nand->eccmode = NAND_ECC_SOFT; +#endif + +#ifdef CONFIG_S3C2410_NAND_BBT + nand->options = NAND_USE_FLASH_BBT; +#else + nand->options = 0; +#endif + + DEBUGN("end of nand_init\n"); + + return 0; +} + +#else + #error "U-Boot legacy NAND support not available for S3C2410" +#endif +#endif diff --git a/cpu/arm920t/s3c24x0/serial.c b/cpu/arm920t/s3c24x0/serial.c index 36851ad5ca..6e853b87ac 100644 --- a/cpu/arm920t/s3c24x0/serial.c +++ b/cpu/arm920t/s3c24x0/serial.c @@ -48,18 +48,74 @@ DECLARE_GLOBAL_DATA_PTR; #error "Bad: you didn't configure serial ..." #endif -void serial_setbrg (void) +#if defined(CONFIG_SERIAL_MULTI) +#include <serial.h> + +/* Multi serial device functions */ +#define DECLARE_S3C_SERIAL_FUNCTIONS(port) \ + int s3serial##port##_init (void) {\ + return serial_init_dev(port);}\ + void s3serial##port##_setbrg (void) {\ + serial_setbrg_dev(port);}\ + int s3serial##port##_getc (void) {\ + return serial_getc_dev(port);}\ + int s3serial##port##_tstc (void) {\ + return serial_tstc_dev(port);}\ + void s3serial##port##_putc (const char c) {\ + serial_putc_dev(port, c);}\ + void s3serial##port##_puts (const char *s) {\ + serial_puts_dev(port, s);} + +#define INIT_S3C_SERIAL_STRUCTURE(port,name,bus) {\ + name,\ + bus,\ + s3serial##port##_init,\ + s3serial##port##_setbrg,\ + s3serial##port##_getc,\ + s3serial##port##_tstc,\ + s3serial##port##_putc,\ + s3serial##port##_puts, } + +#endif /* CONFIG_SERIAL_MULTI */ + +void _serial_setbrg(const int dev_index) { - S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR); - int i; + S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); unsigned int reg = 0; + int i; /* value is calculated so : (int)(PCLK/16./baudrate) -1 */ reg = get_PCLK() / (16 * gd->baudrate) - 1; + uart->UBRDIV = reg; + for (i = 0; i < 100; i++); +} +#if defined(CONFIG_SERIAL_MULTI) +static inline void +serial_setbrg_dev(unsigned int dev_index) +{ + _serial_setbrg(dev_index); +} +#else +void serial_setbrg(void) +{ + _serial_setbrg(UART_NR); +} +#endif + + +/* Initialise the serial port. The settings are always 8 data bits, no parity, + * 1 stop bit, no start bits. + */ +static int serial_init_dev(const int dev_index) +{ + S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); + int i; + /* FIFO enable, Tx/Rx FIFO clear */ uart->UFCON = 0x07; uart->UMCON = 0x0; + /* Normal,No parity,1 stop,8 bit */ uart->ULCON = 0x3; /* @@ -67,40 +123,57 @@ void serial_setbrg (void) * normal,interrupt or polling */ uart->UCON = 0x245; - uart->UBRDIV = reg; #ifdef CONFIG_HWFLOW uart->UMCON = 0x1; /* RTS up */ #endif - for (i = 0; i < 100; i++); + + /* FIXME: This is sooooooooooooooooooo ugly */ +#if defined(CONFIG_ARCH_GTA02_v1) || defined(CONFIG_ARCH_GTA02_v2) + /* we need auto hw flow control on the gsm and gps port */ + if (dev_index == 0 || dev_index == 1) + uart->UMCON = 0x10; +#endif + _serial_setbrg(dev_index); + + return (0); } -/* - * Initialise the serial port with the given baudrate. The settings - * are always 8 data bits, no parity, 1 stop bit, no start bits. - * +#if !defined(CONFIG_SERIAL_MULTI) +/* Initialise the serial port. The settings are always 8 data bits, no parity, + * 1 stop bit, no start bits. */ int serial_init (void) { - serial_setbrg (); - - return (0); + return serial_init_dev(UART_NR); } +#endif /* * Read a single byte from the serial port. Returns 1 on success, 0 * otherwise. When the function is succesfull, the character read is * written into its argument c. */ -int serial_getc (void) +int _serial_getc (const int dev_index) { - S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR); + S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); /* wait for character to arrive */ while (!(uart->UTRSTAT & 0x1)); return uart->URXH & 0xff; } +#if defined(CONFIG_SERIAL_MULTI) +static inline int serial_getc_dev(unsigned int dev_index) +{ + return _serial_getc(dev_index); +} +#else +int serial_getc (void) +{ + return _serial_getc(UART_NR); +} +#endif #ifdef CONFIG_HWFLOW static int hwflow = 0; /* turned off by default */ @@ -138,9 +211,9 @@ void enable_putc(void) /* * Output a single byte to the serial port. */ -void serial_putc (const char c) +void _serial_putc (const char c, const int dev_index) { - S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR); + S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); #ifdef CONFIG_MODEM_SUPPORT if (be_quiet) return; @@ -161,23 +234,72 @@ void serial_putc (const char c) if (c == '\n') serial_putc ('\r'); } +#if defined(CONFIG_SERIAL_MULTI) +static inline void serial_putc_dev(unsigned int dev_index, const char c) +{ + _serial_putc(c, dev_index); +} +#else +void serial_putc(const char c) +{ + _serial_putc(c, UART_NR); +} +#endif + /* * Test whether a character is in the RX buffer */ -int serial_tstc (void) +int _serial_tstc(const int dev_index) { - S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR); + S3C24X0_UART * const uart = S3C24X0_GetBase_UART(dev_index); return uart->UTRSTAT & 0x1; } +#if defined(CONFIG_SERIAL_MULTI) +static inline int +serial_tstc_dev(unsigned int dev_index) +{ + return _serial_tstc(dev_index); +} +#else +int serial_tstc(void) +{ + return _serial_tstc(UART_NR); +} +#endif -void -serial_puts (const char *s) +void _serial_puts(const char *s, const int dev_index) { while (*s) { - serial_putc (*s++); + _serial_putc (*s++, dev_index); } } +#if defined(CONFIG_SERIAL_MULTI) +static inline void +serial_puts_dev(int dev_index, const char *s) +{ + _serial_puts(s, dev_index); +} +#else +void +serial_puts (const char *s) +{ + _serial_puts(s, UART_NR); +} +#endif + +#if defined(CONFIG_SERIAL_MULTI) +DECLARE_S3C_SERIAL_FUNCTIONS(0); +struct serial_device s3c24xx_serial0_device = + INIT_S3C_SERIAL_STRUCTURE(0, "s3ser0", "S3UART1"); +DECLARE_S3C_SERIAL_FUNCTIONS(1); +struct serial_device s3c24xx_serial1_device = + INIT_S3C_SERIAL_STRUCTURE(1, "s3ser1", "S3UART2"); +DECLARE_S3C_SERIAL_FUNCTIONS(2); +struct serial_device s3c24xx_serial2_device = + INIT_S3C_SERIAL_STRUCTURE(2, "s3ser2", "S3UART3"); + +#endif /* CONFIG_SERIAL_MULTI */ #endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */ diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index aefcdd1552..ae86002a8f 100644 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -329,12 +329,12 @@ cpu_init_crit: .macro irq_save_user_regs sub sp, sp, #S_FRAME_SIZE stmia sp, {r0 - r12} @ Calling r0-r12 - add r8, sp, #S_PC - stmdb r8, {sp, lr}^ @ Calling SP, LR - str lr, [r8, #0] @ Save calling PC + add r7, sp, #S_PC + stmdb r7, {sp, lr}^ @ Calling SP, LR + str lr, [r7, #0] @ Save calling PC mrs r6, spsr - str r6, [r8, #4] @ Save CPSR - str r0, [r8, #8] @ Save OLD_R0 + str r6, [r7, #4] @ Save CPSR + str r0, [r7, #8] @ Save OLD_R0 mov r0, sp .endm diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c index 6421a511e4..bed77acaa9 100644 --- a/cpu/mpc512x/cpu.c +++ b/cpu/mpc512x/cpu.c @@ -138,11 +138,11 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1); do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1); - do_fixup_by_path_u32(blob, cpu_path, "ref-frequency", CFG_MPC512X_CLKIN, 1); do_fixup_by_path_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1); do_fixup_by_path_u32(blob, "/" OF_SOC, "bus-frequency", bd->bi_ipsfreq, 1); - do_fixup_by_path_u32(blob, "/" OF_SOC, "ref-frequency", CFG_MPC512X_CLKIN, 1); - do_fixup_by_path(blob, eth_path, "address", bd->bi_enetaddr, 6, 0); do_fixup_by_path(blob, eth_path, "local-mac-address", bd->bi_enetaddr, 6, 0); + + /* this is so old kernels with old device trees will boot */ + do_fixup_by_path_u32(blob, "/" OF_SOC_OLD, "bus-frequency", bd->bi_ipsfreq, 0); } #endif diff --git a/cpu/mpc83xx/fdt.c b/cpu/mpc83xx/fdt.c index 909171fd4f..6f55932da2 100644 --- a/cpu/mpc83xx/fdt.c +++ b/cpu/mpc83xx/fdt.c @@ -30,6 +30,8 @@ #include <libfdt.h> #include <fdt_support.h> +extern void ft_qe_setup(void *blob); + DECLARE_GLOBAL_DATA_PTR; void ft_cpu_setup(void *blob, bd_t *bd) @@ -48,16 +50,7 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_prop_u32(blob, "device_type", "soc", 4, "bus-frequency", bd->bi_busfreq, 1); #ifdef CONFIG_QE - do_fixup_by_prop_u32(blob, "device_type", "qe", 4, - "bus-frequency", gd->qe_clk, 1); - do_fixup_by_prop_u32(blob, "device_type", "qe", 4, - "brg-frequency", gd->brg_clk, 1); - do_fixup_by_compat_u32(blob, "fsl,qe", - "clock-frequency", gd->qe_clk, 1); - do_fixup_by_compat_u32(blob, "fsl,qe", - "bus-frequency", gd->qe_clk, 1); - do_fixup_by_compat_u32(blob, "fsl,qe", - "brg-frequency", gd->brg_clk, 1); + ft_qe_setup(blob); #endif #ifdef CFG_NS16550 diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c index 0ce17e7f57..a6b014cec0 100644 --- a/cpu/mpc85xx/fdt.c +++ b/cpu/mpc85xx/fdt.c @@ -27,6 +27,8 @@ #include <libfdt.h> #include <fdt_support.h> +extern void ft_qe_setup(void *blob); + void ft_cpu_setup(void *blob, bd_t *bd) { #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\ @@ -43,11 +45,7 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_prop_u32(blob, "device_type", "soc", 4, "bus-frequency", bd->bi_busfreq, 1); #ifdef CONFIG_QE - do_fixup_by_prop_u32(blob, "device_type", "qe", 4, - "bus-frequency", bd->bi_busfreq, 1); - do_fixup_by_prop_u32(blob, "device_type", "qe", 4, - "brg-frequency", bd->bi_busfreq / 2, 1); - fdt_fixup_qe_firmware(blob); + ft_qe_setup(blob); #endif #ifdef CFG_NS16550 diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c index d76e0cdfe3..c0cfe65fb0 100644 --- a/cpu/pxa/mmc.c +++ b/cpu/pxa/mmc.c @@ -30,14 +30,13 @@ #ifdef CONFIG_MMC -extern int -fat_register_device(block_dev_desc_t *dev_desc, int part_no); +extern int fat_register_device(block_dev_desc_t * dev_desc, int part_no); static block_dev_desc_t mmc_dev; -block_dev_desc_t * mmc_get_dev(int dev) +block_dev_desc_t *mmc_get_dev(int dev) { - return (dev == 0) ? &mmc_dev : NULL; + return ((block_dev_desc_t *) & mmc_dev); } /* @@ -45,72 +44,59 @@ block_dev_desc_t * mmc_get_dev(int dev) * and other parameters */ static uchar mmc_buf[MMC_BLOCK_SIZE]; -static mmc_csd_t mmc_csd; +static uchar spec_ver; static int mmc_ready = 0; +static int wide = 0; - -static uchar * +static uint32_t * /****************************************************/ mmc_cmd(ushort cmd, ushort argh, ushort argl, ushort cmdat) /****************************************************/ { - static uchar resp[20]; + static uint32_t resp[4], a, b, c; ulong status; - int words, i; + int i; - debug("mmc_cmd %x %x %x %x\n", cmd, argh, argl, cmdat); + debug("mmc_cmd %u 0x%04x 0x%04x 0x%04x\n", cmd, argh, argl, + cmdat | wide); MMC_STRPCL = MMC_STRPCL_STOP_CLK; MMC_I_MASK = ~MMC_I_MASK_CLK_IS_OFF; - while (!(MMC_I_REG & MMC_I_REG_CLK_IS_OFF)); - MMC_CMD = cmd; - MMC_ARGH = argh; - MMC_ARGL = argl; - MMC_CMDAT = cmdat; + while (!(MMC_I_REG & MMC_I_REG_CLK_IS_OFF)) ; + MMC_CMD = cmd; + MMC_ARGH = argh; + MMC_ARGL = argl; + MMC_CMDAT = cmdat | wide; MMC_I_MASK = ~MMC_I_MASK_END_CMD_RES; MMC_STRPCL = MMC_STRPCL_START_CLK; - while (!(MMC_I_REG & MMC_I_REG_END_CMD_RES)); + while (!(MMC_I_REG & MMC_I_REG_END_CMD_RES)) ; status = MMC_STAT; - debug("MMC status %x\n", status); + debug("MMC status 0x%08x\n", status); if (status & MMC_STAT_TIME_OUT_RESPONSE) { return 0; } - switch (cmdat & 0x3) { - case MMC_CMDAT_R1: - case MMC_CMDAT_R3: - words = 3; - break; - - case MMC_CMDAT_R2: - words = 8; - break; - - default: - return 0; + /* Linux says: + * Did I mention this is Sick. We always need to + * discard the upper 8 bits of the first 16-bit word. + */ + a = (MMC_RES & 0xffff); + for (i = 0; i < 4; i++) { + b = (MMC_RES & 0xffff); + c = (MMC_RES & 0xffff); + resp[i] = (a << 24) | (b << 8) | (c >> 8); + a = c; + debug("MMC resp[%d] = %#08x\n", i, resp[i]); } - for (i = words-1; i >= 0; i--) { - ulong res_fifo = MMC_RES; - int offset = i << 1; - resp[offset] = ((uchar *)&res_fifo)[0]; - resp[offset+1] = ((uchar *)&res_fifo)[1]; - } -#ifdef MMC_DEBUG - for (i=0; i<words*2; i += 2) { - printf("MMC resp[%d] = %02x\n", i, resp[i]); - printf("MMC resp[%d] = %02x\n", i+1, resp[i+1]); - } -#endif return resp; } int /****************************************************/ -mmc_block_read(uchar *dst, ulong src, ulong len) +mmc_block_read(uchar * dst, ulong src, ulong len) /****************************************************/ { - uchar *resp; ushort argh, argl; ulong status; @@ -118,13 +104,13 @@ mmc_block_read(uchar *dst, ulong src, ulong len) return 0; } - debug("mmc_block_rd dst %lx src %lx len %d\n", (ulong)dst, src, len); + debug("mmc_block_rd dst %lx src %lx len %d\n", (ulong) dst, src, len); argh = len >> 16; argl = len & 0xffff; /* set block len */ - resp = mmc_cmd(MMC_CMD_SET_BLOCKLEN, argh, argl, MMC_CMDAT_R1); + mmc_cmd(MMC_CMD_SET_BLOCKLEN, argh, argl, MMC_CMDAT_R1); /* send read command */ argh = src >> 16; @@ -133,17 +119,17 @@ mmc_block_read(uchar *dst, ulong src, ulong len) MMC_RDTO = 0xffff; MMC_NOB = 1; MMC_BLKLEN = len; - resp = mmc_cmd(MMC_CMD_READ_BLOCK, argh, argl, - MMC_CMDAT_R1|MMC_CMDAT_READ|MMC_CMDAT_BLOCK|MMC_CMDAT_DATA_EN); - + mmc_cmd(MMC_CMD_READ_BLOCK, argh, argl, + MMC_CMDAT_R1 | MMC_CMDAT_READ | MMC_CMDAT_BLOCK | + MMC_CMDAT_DATA_EN); MMC_I_MASK = ~MMC_I_MASK_RXFIFO_RD_REQ; while (len) { if (MMC_I_REG & MMC_I_REG_RXFIFO_RD_REQ) { #ifdef CONFIG_PXA27X int i; - for (i=min(len,32); i; i--) { - *dst++ = * ((volatile uchar *) &MMC_RXFIFO); + for (i = min(len, 32); i; i--) { + *dst++ = *((volatile uchar *)&MMC_RXFIFO); len--; } #else @@ -158,7 +144,7 @@ mmc_block_read(uchar *dst, ulong src, ulong len) } } MMC_I_MASK = ~MMC_I_MASK_DATA_TRAN_DONE; - while (!(MMC_I_REG & MMC_I_REG_DATA_TRAN_DONE)); + while (!(MMC_I_REG & MMC_I_REG_DATA_TRAN_DONE)) ; status = MMC_STAT; if (status & MMC_STAT_ERRORS) { printf("MMC_STAT error %lx\n", status); @@ -169,10 +155,9 @@ mmc_block_read(uchar *dst, ulong src, ulong len) int /****************************************************/ -mmc_block_write(ulong dst, uchar *src, int len) +mmc_block_write(ulong dst, uchar * src, int len) /****************************************************/ { - uchar *resp; ushort argh, argl; ulong status; @@ -180,13 +165,13 @@ mmc_block_write(ulong dst, uchar *src, int len) return 0; } - debug("mmc_block_wr dst %lx src %lx len %d\n", dst, (ulong)src, len); + debug("mmc_block_wr dst %lx src %lx len %d\n", dst, (ulong) src, len); argh = len >> 16; argl = len & 0xffff; /* set block len */ - resp = mmc_cmd(MMC_CMD_SET_BLOCKLEN, argh, argl, MMC_CMDAT_R1); + mmc_cmd(MMC_CMD_SET_BLOCKLEN, argh, argl, MMC_CMDAT_R1); /* send write command */ argh = dst >> 16; @@ -194,15 +179,16 @@ mmc_block_write(ulong dst, uchar *src, int len) MMC_STRPCL = MMC_STRPCL_STOP_CLK; MMC_NOB = 1; MMC_BLKLEN = len; - resp = mmc_cmd(MMC_CMD_WRITE_BLOCK, argh, argl, - MMC_CMDAT_R1|MMC_CMDAT_WRITE|MMC_CMDAT_BLOCK|MMC_CMDAT_DATA_EN); + mmc_cmd(MMC_CMD_WRITE_BLOCK, argh, argl, + MMC_CMDAT_R1 | MMC_CMDAT_WRITE | MMC_CMDAT_BLOCK | + MMC_CMDAT_DATA_EN); MMC_I_MASK = ~MMC_I_MASK_TXFIFO_WR_REQ; while (len) { if (MMC_I_REG & MMC_I_REG_TXFIFO_WR_REQ) { - int i, bytes = min(32,len); + int i, bytes = min(32, len); - for (i=0; i<bytes; i++) { + for (i = 0; i < bytes; i++) { MMC_TXFIFO = *src++; } if (bytes < 32) { @@ -217,9 +203,9 @@ mmc_block_write(ulong dst, uchar *src, int len) } } MMC_I_MASK = ~MMC_I_MASK_DATA_TRAN_DONE; - while (!(MMC_I_REG & MMC_I_REG_DATA_TRAN_DONE)); + while (!(MMC_I_REG & MMC_I_REG_DATA_TRAN_DONE)) ; MMC_I_MASK = ~MMC_I_MASK_PRG_DONE; - while (!(MMC_I_REG & MMC_I_REG_PRG_DONE)); + while (!(MMC_I_REG & MMC_I_REG_PRG_DONE)) ; status = MMC_STAT; if (status & MMC_STAT_ERRORS) { printf("MMC_STAT error %lx\n", status); @@ -228,10 +214,9 @@ mmc_block_write(ulong dst, uchar *src, int len) return 0; } - int /****************************************************/ -mmc_read(ulong src, uchar *dst, int size) +mmc_read(ulong src, uchar * dst, int size) /****************************************************/ { ulong end, part_start, part_end, part_len, aligned_start, aligned_end; @@ -257,33 +242,46 @@ mmc_read(ulong src, uchar *dst, int size) aligned_end = mmc_block_address & end; /* all block aligned accesses */ - debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", - src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end); + debug + ("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", + src, (ulong) dst, end, part_start, part_end, aligned_start, + aligned_end); if (part_start) { part_len = mmc_block_size - part_start; - debug("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", - src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end); - if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < 0) { + debug + ("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", + src, (ulong) dst, end, part_start, part_end, aligned_start, + aligned_end); + if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < + 0) { return -1; } - memcpy(dst, mmc_buf+part_start, part_len); + memcpy(dst, mmc_buf + part_start, part_len); dst += part_len; src += part_len; } - debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", - src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end); + debug + ("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", + src, (ulong) dst, end, part_start, part_end, aligned_start, + aligned_end); for (; src < aligned_end; src += mmc_block_size, dst += mmc_block_size) { - debug("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", - src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end); - if ((mmc_block_read((uchar *)(dst), src, mmc_block_size)) < 0) { + debug + ("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", + src, (ulong) dst, end, part_start, part_end, aligned_start, + aligned_end); + if ((mmc_block_read((uchar *) (dst), src, mmc_block_size)) < 0) { return -1; } } - debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", - src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end); + debug + ("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", + src, (ulong) dst, end, part_start, part_end, aligned_start, + aligned_end); if (part_end && src < end) { - debug("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", - src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end); + debug + ("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", + src, (ulong) dst, end, part_start, part_end, aligned_start, + aligned_end); if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0) { return -1; } @@ -294,7 +292,7 @@ mmc_read(ulong src, uchar *dst, int size) int /****************************************************/ -mmc_write(uchar *src, ulong dst, int size) +mmc_write(uchar * src, ulong dst, int size) /****************************************************/ { ulong end, part_start, part_end, part_len, aligned_start, aligned_end; @@ -320,36 +318,50 @@ mmc_write(uchar *src, ulong dst, int size) aligned_end = mmc_block_address & end; /* all block aligned accesses */ - debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", - src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end); + debug + ("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", + src, (ulong) dst, end, part_start, part_end, aligned_start, + aligned_end); if (part_start) { part_len = mmc_block_size - part_start; - debug("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", - (ulong)src, dst, end, part_start, part_end, aligned_start, aligned_end); - if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < 0) { + debug + ("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", + (ulong) src, dst, end, part_start, part_end, aligned_start, + aligned_end); + if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < + 0) { return -1; } - memcpy(mmc_buf+part_start, src, part_len); - if ((mmc_block_write(aligned_start, mmc_buf, mmc_block_size)) < 0) { + memcpy(mmc_buf + part_start, src, part_len); + if ((mmc_block_write(aligned_start, mmc_buf, mmc_block_size)) < + 0) { return -1; } dst += part_len; src += part_len; } - debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", - src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end); + debug + ("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", + src, (ulong) dst, end, part_start, part_end, aligned_start, + aligned_end); for (; dst < aligned_end; src += mmc_block_size, dst += mmc_block_size) { - debug("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", - src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end); - if ((mmc_block_write(dst, (uchar *)src, mmc_block_size)) < 0) { + debug + ("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", + src, (ulong) dst, end, part_start, part_end, aligned_start, + aligned_end); + if ((mmc_block_write(dst, (uchar *) src, mmc_block_size)) < 0) { return -1; } } - debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", - src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end); + debug + ("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", + src, (ulong) dst, end, part_start, part_end, aligned_start, + aligned_end); if (part_end && dst < end) { - debug("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", - src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end); + debug + ("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n", + src, (ulong) dst, end, part_start, part_end, aligned_start, + aligned_end); if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0) { return -1; } @@ -363,127 +375,288 @@ mmc_write(uchar *src, ulong dst, int size) ulong /****************************************************/ -mmc_bread(int dev_num, ulong blknr, ulong blkcnt, void *dst) +mmc_bread(int dev_num, ulong blknr, ulong blkcnt, ulong * dst) /****************************************************/ { int mmc_block_size = MMC_BLOCK_SIZE; ulong src = blknr * mmc_block_size + CFG_MMC_BASE; - mmc_read(src, (uchar *)dst, blkcnt*mmc_block_size); + mmc_read(src, (uchar *) dst, blkcnt * mmc_block_size); return blkcnt; } +#ifdef __GNUC__ +#define likely(x) __builtin_expect(!!(x), 1) +#define unlikely(x) __builtin_expect(!!(x), 0) +#else +#define likely(x) (x) +#define unlikely(x) (x) +#endif + +#define UNSTUFF_BITS(resp,start,size) \ + ({ \ + const int __size = size; \ + const uint32_t __mask = (__size < 32 ? 1 << __size : 0) - 1; \ + const int32_t __off = 3 - ((start) / 32); \ + const int32_t __shft = (start) & 31; \ + uint32_t __res; \ + \ + __res = resp[__off] >> __shft; \ + if (__size + __shft > 32) \ + __res |= resp[__off-1] << ((32 - __shft) % 32); \ + __res & __mask; \ + }) + +/* + * Given the decoded CSD structure, decode the raw CID to our CID structure. + */ +static void mmc_decode_cid(uint32_t * resp) +{ + if (IF_TYPE_SD == mmc_dev.if_type) { + /* + * SD doesn't currently have a version field so we will + * have to assume we can parse this. + */ + sprintf((char *)mmc_dev.vendor, + "Man %02x OEM %c%c \"%c%c%c%c%c\" Date %02u/%04u", + UNSTUFF_BITS(resp, 120, 8), UNSTUFF_BITS(resp, 112, 8), + UNSTUFF_BITS(resp, 104, 8), UNSTUFF_BITS(resp, 96, 8), + UNSTUFF_BITS(resp, 88, 8), UNSTUFF_BITS(resp, 80, 8), + UNSTUFF_BITS(resp, 72, 8), UNSTUFF_BITS(resp, 64, 8), + UNSTUFF_BITS(resp, 8, 4), UNSTUFF_BITS(resp, 12, + 8) + 2000); + sprintf((char *)mmc_dev.revision, "%d.%d", + UNSTUFF_BITS(resp, 60, 4), UNSTUFF_BITS(resp, 56, 4)); + sprintf((char *)mmc_dev.product, "%u", + UNSTUFF_BITS(resp, 24, 32)); + } else { + /* + * The selection of the format here is based upon published + * specs from sandisk and from what people have reported. + */ + switch (spec_ver) { + case 0: /* MMC v1.0 - v1.2 */ + case 1: /* MMC v1.4 */ + sprintf((char *)mmc_dev.vendor, + "Man %02x%02x%02x \"%c%c%c%c%c%c%c\" Date %02u/%04u", + UNSTUFF_BITS(resp, 120, 8), UNSTUFF_BITS(resp, + 112, + 8), + UNSTUFF_BITS(resp, 104, 8), UNSTUFF_BITS(resp, + 96, 8), + UNSTUFF_BITS(resp, 88, 8), UNSTUFF_BITS(resp, + 80, 8), + UNSTUFF_BITS(resp, 72, 8), UNSTUFF_BITS(resp, + 64, 8), + UNSTUFF_BITS(resp, 56, 8), UNSTUFF_BITS(resp, + 48, 8), + UNSTUFF_BITS(resp, 12, 4), UNSTUFF_BITS(resp, 8, + 4) + + 1997); + sprintf((char *)mmc_dev.revision, "%d.%d", + UNSTUFF_BITS(resp, 44, 4), UNSTUFF_BITS(resp, + 40, 4)); + sprintf((char *)mmc_dev.product, "%u", + UNSTUFF_BITS(resp, 16, 24)); + break; + + case 2: /* MMC v2.0 - v2.2 */ + case 3: /* MMC v3.1 - v3.3 */ + case 4: /* MMC v4 */ + sprintf((char *)mmc_dev.vendor, + "Man %02x OEM %04x \"%c%c%c%c%c%c\" Date %02u/%04u", + UNSTUFF_BITS(resp, 120, 8), UNSTUFF_BITS(resp, + 104, + 16), + UNSTUFF_BITS(resp, 96, 8), UNSTUFF_BITS(resp, + 88, 8), + UNSTUFF_BITS(resp, 80, 8), UNSTUFF_BITS(resp, + 72, 8), + UNSTUFF_BITS(resp, 64, 8), UNSTUFF_BITS(resp, + 56, 8), + UNSTUFF_BITS(resp, 12, 4), UNSTUFF_BITS(resp, 8, + 4) + + 1997); + sprintf((char *)mmc_dev.product, "%u", + UNSTUFF_BITS(resp, 16, 32)); + sprintf((char *)mmc_dev.revision, "N/A"); + break; + + default: + printf("MMC card has unknown MMCA version %d\n", + spec_ver); + break; + } + } + printf("%s card.\nVendor: %s\nProduct: %s\nRevision: %s\n", + (IF_TYPE_SD == mmc_dev.if_type) ? "SD" : "MMC", mmc_dev.vendor, + mmc_dev.product, mmc_dev.revision); +} + +/* + * Given a 128-bit response, decode to our card CSD structure. + */ +static void mmc_decode_csd(uint32_t * resp) +{ + unsigned int mult, csd_struct; + + if (IF_TYPE_SD == mmc_dev.if_type) { + csd_struct = UNSTUFF_BITS(resp, 126, 2); + if (csd_struct != 0) { + printf("SD: unrecognised CSD structure version %d\n", + csd_struct); + return; + } + } else { + /* + * We only understand CSD structure v1.1 and v1.2. + * v1.2 has extra information in bits 15, 11 and 10. + */ + csd_struct = UNSTUFF_BITS(resp, 126, 2); + if (csd_struct != 1 && csd_struct != 2) { + printf("MMC: unrecognised CSD structure version %d\n", + csd_struct); + return; + } + + spec_ver = UNSTUFF_BITS(resp, 122, 4); + mmc_dev.if_type = IF_TYPE_MMC; + } + + mult = 1 << (UNSTUFF_BITS(resp, 47, 3) + 2); + mmc_dev.lba = (1 + UNSTUFF_BITS(resp, 62, 12)) * mult; + mmc_dev.blksz = 1 << UNSTUFF_BITS(resp, 80, 4); + + /* FIXME: The following just makes assumes that's the partition type -- should really read it */ + mmc_dev.part_type = PART_TYPE_DOS; + mmc_dev.dev = 0; + mmc_dev.lun = 0; + mmc_dev.type = DEV_TYPE_HARDDISK; + mmc_dev.removable = 0; + mmc_dev.block_read = mmc_bread; + + printf("Detected: %u blocks of %u bytes (%uMB) ", mmc_dev.lba, + mmc_dev.blksz, mmc_dev.lba * mmc_dev.blksz / (1024 * 1024)); +} + int /****************************************************/ mmc_init(int verbose) /****************************************************/ { - int retries, rc = -ENODEV; - uchar *resp; + int retries, rc = -ENODEV; + uint32_t cid_resp[4]; + uint32_t *resp; + uint16_t rca = 0; + + /* Reset device interface type */ + mmc_dev.if_type = IF_TYPE_UNKNOWN; -#ifdef CONFIG_LUBBOCK - set_GPIO_mode( GPIO6_MMCCLK_MD ); - set_GPIO_mode( GPIO8_MMCCS0_MD ); +#if defined (CONFIG_LUBBOCK) || (defined (CONFIG_GUMSTIX) && !defined(CONFIG_PXA27X)) + set_GPIO_mode(GPIO6_MMCCLK_MD); + set_GPIO_mode(GPIO8_MMCCS0_MD); #endif - CKEN |= CKEN12_MMC; /* enable MMC unit clock */ + CKEN |= CKEN12_MMC; /* enable MMC unit clock */ #if defined(CONFIG_ADSVIX) /* turn on the power */ GPCR(114) = GPIO_bit(114); udelay(1000); #endif - mmc_csd.c_size = 0; - - MMC_CLKRT = MMC_CLKRT_0_3125MHZ; - MMC_RESTO = MMC_RES_TO_MAX; - MMC_SPI = MMC_SPI_DISABLE; + MMC_CLKRT = MMC_CLKRT_0_3125MHZ; + MMC_RESTO = MMC_RES_TO_MAX; + MMC_SPI = MMC_SPI_DISABLE; /* reset */ - retries = 10; - resp = mmc_cmd(0, 0, 0, 0); - resp = mmc_cmd(1, 0x00ff, 0xc000, MMC_CMDAT_INIT|MMC_CMDAT_BUSY|MMC_CMDAT_R3); - while (retries-- && resp && !(resp[4] & 0x80)) { - debug("resp %x %x\n", resp[0], resp[1]); + mmc_cmd(MMC_CMD_RESET, 0, 0, MMC_CMDAT_INIT | MMC_CMDAT_R0); + udelay(200000); + retries = 3; + while (retries--) { + resp = mmc_cmd(MMC_CMD_APP_CMD, 0, 0, MMC_CMDAT_R1); + if (!(resp[0] & 0x00000020)) { /* Card does not support APP_CMD */ + debug("Card does not support APP_CMD\n"); + break; + } + + resp = mmc_cmd(SD_CMD_APP_OP_COND, 0x0020, 0, MMC_CMDAT_R3 | (retries < 2 ? 0 : MMC_CMDAT_INIT)); /* Select 3.2-3.3 and 3.3-3.4V */ + if (resp[0] & 0x80000000) { + mmc_dev.if_type = IF_TYPE_SD; + debug("Detected SD card\n"); + break; + } #ifdef CONFIG_PXA27X udelay(10000); #else - udelay(50); + udelay(200000); #endif - resp = mmc_cmd(1, 0x00ff, 0xff00, MMC_CMDAT_BUSY|MMC_CMDAT_R3); + } + + if (retries <= 0 || !(IF_TYPE_SD == mmc_dev.if_type)) { + debug("Failed to detect SD Card, trying MMC\n"); + resp = + mmc_cmd(MMC_CMD_SEND_OP_COND, 0x00ff, 0x8000, MMC_CMDAT_R3); + + retries = 10; + while (retries-- && resp && !(resp[0] & 0x80000000)) { +#ifdef CONFIG_PXA27X + udelay(10000); +#else + udelay(200000); +#endif + resp = + mmc_cmd(MMC_CMD_SEND_OP_COND, 0x00ff, 0x8000, + MMC_CMDAT_R3); + } } /* try to get card id */ - resp = mmc_cmd(2, 0, 0, MMC_CMDAT_R2); + resp = + mmc_cmd(MMC_CMD_ALL_SEND_CID, 0, 0, MMC_CMDAT_R2 | MMC_CMDAT_BUSY); if (resp) { - /* TODO configure mmc driver depending on card attributes */ - mmc_cid_t *cid = (mmc_cid_t *)resp; - if (verbose) { - printf("MMC found. Card desciption is:\n"); - printf("Manufacturer ID = %02x%02x%02x\n", - cid->id[0], cid->id[1], cid->id[2]); - printf("HW/FW Revision = %x %x\n",cid->hwrev, cid->fwrev); - cid->hwrev = cid->fwrev = 0; /* null terminate string */ - printf("Product Name = %s\n",cid->name); - printf("Serial Number = %02x%02x%02x\n", - cid->sn[0], cid->sn[1], cid->sn[2]); - printf("Month = %d\n",cid->month); - printf("Year = %d\n",1997 + cid->year); - } - /* fill in device description */ - mmc_dev.if_type = IF_TYPE_MMC; - mmc_dev.part_type = PART_TYPE_DOS; - mmc_dev.dev = 0; - mmc_dev.lun = 0; - mmc_dev.type = 0; - /* FIXME fill in the correct size (is set to 32MByte) */ - mmc_dev.blksz = 512; - mmc_dev.lba = 0x10000; - sprintf((char*)mmc_dev.vendor,"Man %02x%02x%02x Snr %02x%02x%02x", - cid->id[0], cid->id[1], cid->id[2], - cid->sn[0], cid->sn[1], cid->sn[2]); - sprintf((char*)mmc_dev.product,"%s",cid->name); - sprintf((char*)mmc_dev.revision,"%x %x",cid->hwrev, cid->fwrev); - mmc_dev.removable = 0; - mmc_dev.block_read = mmc_bread; + memcpy(cid_resp, resp, sizeof(cid_resp)); /* MMC exists, get CSD too */ - resp = mmc_cmd(MMC_CMD_SET_RCA, MMC_DEFAULT_RCA, 0, MMC_CMDAT_R1); - resp = mmc_cmd(MMC_CMD_SEND_CSD, MMC_DEFAULT_RCA, 0, MMC_CMDAT_R2); + resp = mmc_cmd(MMC_CMD_SET_RCA, 0, 0, MMC_CMDAT_R1); + if (IF_TYPE_SD == mmc_dev.if_type) + rca = ((resp[0] & 0xffff0000) >> 16); + resp = mmc_cmd(MMC_CMD_SEND_CSD, rca, 0, MMC_CMDAT_R2); if (resp) { - mmc_csd_t *csd = (mmc_csd_t *)resp; - memcpy(&mmc_csd, csd, sizeof(csd)); + mmc_decode_csd(resp); rc = 0; mmc_ready = 1; - /* FIXME add verbose printout for csd */ } + + mmc_decode_cid(cid_resp); } + MMC_CLKRT = 0; /* 20 MHz */ + resp = mmc_cmd(MMC_CMD_SELECT_CARD, rca, 0, MMC_CMDAT_R1); + #ifdef CONFIG_PXA27X - MMC_CLKRT = 1; /* 10 MHz - see Intel errata */ -#else - MMC_CLKRT = 0; /* 20 MHz */ + if (IF_TYPE_SD == mmc_dev.if_type) { + resp = mmc_cmd(MMC_CMD_APP_CMD, rca, 0, MMC_CMDAT_R1); + resp = mmc_cmd(SD_CMD_APP_SET_BUS_WIDTH, 0, 2, MMC_CMDAT_R1); + wide = MMC_CMDAT_SD_4DAT; + } #endif - resp = mmc_cmd(7, MMC_DEFAULT_RCA, 0, MMC_CMDAT_R1); - fat_register_device(&mmc_dev,1); /* partitions start counting with 1 */ + fat_register_device(&mmc_dev, 1); /* partitions start counting with 1 */ return rc; } -int -mmc_ident(block_dev_desc_t *dev) +int mmc_ident(block_dev_desc_t * dev) { return 0; } -int -mmc2info(ulong addr) +int mmc2info(ulong addr) { - /* FIXME hard codes to 32 MB device */ - if (addr >= CFG_MMC_BASE && addr < CFG_MMC_BASE + 0x02000000) { + if (addr >= CFG_MMC_BASE + && addr < CFG_MMC_BASE + (mmc_dev.lba * mmc_dev.blksz)) { return 1; } return 0; } -#endif /* CONFIG_MMC */ +#endif /* CONFIG_MMC */ diff --git a/drivers/qe/Makefile b/drivers/qe/Makefile index 4844181b8e..ec5aa738aa 100644 --- a/drivers/qe/Makefile +++ b/drivers/qe/Makefile @@ -24,7 +24,8 @@ include $(TOPDIR)/config.mk LIB := $(obj)qe.a -COBJS := qe.o uccf.o uec.o uec_phy.o +COBJS-$(CONFIG_OF_LIBFDT) += fdt.o +COBJS := qe.o uccf.o uec.o uec_phy.o $(COBJS-y) SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/drivers/qe/fdt.c b/drivers/qe/fdt.c new file mode 100644 index 0000000000..53074889c1 --- /dev/null +++ b/drivers/qe/fdt.c @@ -0,0 +1,90 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <libfdt.h> +#include <fdt_support.h> +#include "qe.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* + * If a QE firmware has been uploaded, then add the 'firmware' node under + * the 'qe' node. + */ +void fdt_fixup_qe_firmware(void *blob) +{ + struct qe_firmware_info *qe_fw_info; + int node, ret; + + qe_fw_info = qe_get_firmware_info(); + if (!qe_fw_info) + return; + + node = fdt_path_offset(blob, "/qe"); + if (node < 0) + return; + + /* We assume the node doesn't exist yet */ + node = fdt_add_subnode(blob, node, "firmware"); + if (node < 0) + return; + + ret = fdt_setprop(blob, node, "extended-modes", + &qe_fw_info->extended_modes, sizeof(u64)); + if (ret < 0) + goto error; + + ret = fdt_setprop_string(blob, node, "id", qe_fw_info->id); + if (ret < 0) + goto error; + + ret = fdt_setprop(blob, node, "virtual-traps", qe_fw_info->vtraps, + sizeof(qe_fw_info->vtraps)); + if (ret < 0) + goto error; + + return; + +error: + fdt_del_node(blob, node); +} + +void ft_qe_setup(void *blob) +{ +#ifdef CONFIG_QE + do_fixup_by_prop_u32(blob, "device_type", "qe", 4, + "bus-frequency", gd->qe_clk, 1); + do_fixup_by_prop_u32(blob, "device_type", "qe", 4, + "brg-frequency", gd->brg_clk, 1); + do_fixup_by_compat_u32(blob, "fsl,qe", + "clock-frequency", gd->qe_clk, 1); + do_fixup_by_compat_u32(blob, "fsl,qe", + "bus-frequency", gd->qe_clk, 1); + do_fixup_by_compat_u32(blob, "fsl,qe", + "brg-frequency", gd->brg_clk, 1); + fdt_fixup_qe_firmware(blob); +#endif +} diff --git a/drivers/qe/qe.h b/drivers/qe/qe.h index 4c96c67ff3..741ed7fa4a 100644 --- a/drivers/qe/qe.h +++ b/drivers/qe/qe.h @@ -289,5 +289,6 @@ int qe_set_brg(uint brg, uint rate); int qe_set_mii_clk_src(int ucc_num); int qe_upload_firmware(const struct qe_firmware *firmware); struct qe_firmware_info *qe_get_firmware_info(void); +void ft_qe_setup(void *blob); #endif /* __QE_H__ */ diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 2429464d89..6b3f60eb57 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -21,11 +21,15 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) com_port->mdr1 = 0x7; /* mode select reset TL16C750*/ #endif com_port->lcr = LCR_BKSE | LCRVAL; - com_port->dll = baud_divisor & 0xff; - com_port->dlm = (baud_divisor >> 8) & 0xff; + com_port->dll = 0; + com_port->dlm = 0; com_port->lcr = LCRVAL; com_port->mcr = MCRVAL; com_port->fcr = FCRVAL; + com_port->lcr = LCR_BKSE | LCRVAL; + com_port->dll = baud_divisor & 0xff; + com_port->dlm = (baud_divisor >> 8) & 0xff; + com_port->lcr = LCRVAL; #if defined(CONFIG_OMAP) #if defined(CONFIG_APTIX) com_port->mdr1 = 3; /* /13 mode so Aptix 6MHz can hit 115200 */ @@ -38,12 +42,16 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) void NS16550_reinit (NS16550_t com_port, int baud_divisor) { com_port->ier = 0x00; + com_port->lcr = LCR_BKSE | LCRVAL; + com_port->dll = 0; + com_port->dlm = 0; + com_port->lcr = LCRVAL; + com_port->mcr = MCRVAL; + com_port->fcr = FCRVAL; com_port->lcr = LCR_BKSE; com_port->dll = baud_divisor & 0xff; com_port->dlm = (baud_divisor >> 8) & 0xff; com_port->lcr = LCRVAL; - com_port->mcr = MCRVAL; - com_port->fcr = FCRVAL; } void NS16550_putc (NS16550_t com_port, char c) diff --git a/include/asm-arm/arch-pxa/mmc.h b/include/asm-arm/arch-pxa/mmc.h index a62679a1a1..b9304b1bdc 100644 --- a/include/asm-arm/arch-pxa/mmc.h +++ b/include/asm-arm/arch-pxa/mmc.h @@ -54,14 +54,17 @@ #define MMC_SPI_CRC_ON (0x01UL << 1) /* MMC_CMDAT */ +#define MMC_CMDAT_SD_4DAT (0x0001UL << 8) #define MMC_CMDAT_MMC_DMA_EN (0x0001UL << 7) #define MMC_CMDAT_INIT (0x0001UL << 6) #define MMC_CMDAT_BUSY (0x0001UL << 5) +#define MMC_CMDAT_BCR (0x0003UL << 5) #define MMC_CMDAT_STREAM (0x0001UL << 4) #define MMC_CMDAT_BLOCK (0x0000UL << 4) #define MMC_CMDAT_WRITE (0x0001UL << 3) #define MMC_CMDAT_READ (0x0000UL << 3) #define MMC_CMDAT_DATA_EN (0x0001UL << 2) +#define MMC_CMDAT_R0 (0) #define MMC_CMDAT_R1 (0x0001UL) #define MMC_CMDAT_R2 (0x0002UL) #define MMC_CMDAT_R3 (0x0003UL) @@ -111,6 +114,7 @@ #define MMC_CMD_SEND_OP_COND 1 #define MMC_CMD_ALL_SEND_CID 2 #define MMC_CMD_SET_RCA 3 +#define MMC_CMD_SELECT_CARD 7 #define MMC_CMD_SEND_CSD 9 #define MMC_CMD_SEND_CID 10 #define MMC_CMD_SEND_STATUS 13 @@ -118,6 +122,10 @@ #define MMC_CMD_READ_BLOCK 17 #define MMC_CMD_RD_BLK_MULTI 18 #define MMC_CMD_WRITE_BLOCK 24 +#define MMC_CMD_APP_CMD 55 + +#define SD_CMD_APP_SET_BUS_WIDTH 6 +#define SD_CMD_APP_OP_COND 41 #define MMC_MAX_BLOCK_SIZE 512 @@ -158,42 +166,41 @@ typedef struct mmc_cid typedef struct mmc_csd { - uchar ecc:2, - file_format:2, - tmp_write_protect:1, - perm_write_protect:1, - copy:1, - file_format_grp:1; - uint64_t content_prot_app:1, - rsvd3:4, - write_bl_partial:1, - write_bl_len:4, - r2w_factor:3, - default_ecc:2, - wp_grp_enable:1, - wp_grp_size:5, - erase_grp_mult:5, - erase_grp_size:5, - c_size_mult1:3, - vdd_w_curr_max:3, - vdd_w_curr_min:3, - vdd_r_curr_max:3, - vdd_r_curr_min:3, - c_size:12, - rsvd2:2, - dsr_imp:1, - read_blk_misalign:1, - write_blk_misalign:1, - read_bl_partial:1; - - ushort read_bl_len:4, - ccc:12; - uchar tran_speed; - uchar nsac; - uchar taac; - uchar rsvd1:2, - spec_vers:4, - csd_structure:2; + uint8_t csd_structure:2, + spec_ver:4, + rsvd1:2; + uint8_t taac; + uint8_t nsac; + uint8_t tran_speed; + uint16_t ccc:12, + read_bl_len:4; + uint64_t read_bl_partial:1, + write_blk_misalign:1, + read_blk_misalign:1, + dsr_imp:1, + rsvd2:2, + c_size:12, + vdd_r_curr_min:3, + vdd_r_curr_max:3, + vdd_w_curr_min:3, + vdd_w_curr_max:3, + c_size_mult:3, + erase_blk_en:1, + sector_size:7, + wp_grp_size:7, + wp_grp_enable:1, + default_ecc:2, + r2w_factor:3, + write_bl_len:4, + write_bl_partial:1, + rsvd3:4, + content_prot_app:1; + uint8_t file_format_grp:1, + copy:1, + perm_write_protect:1, + tmp_write_protect:1, + file_format:2, + ecc:2; } mmc_csd_t; diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 9b4da3ae94..e0145688eb 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1288,15 +1288,15 @@ typedef void (*ExcpHndlr) (void) ; #define _GEDR(x) __REG2(0x40E00048, ((x) & 0x60) >> 3) #define _GAFR(x) __REG2(0x40E00054, ((x) & 0x70) >> 2) -#define GPLR(x) __REG2(0x40E00000 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) -#define GPDR(x) __REG2(0x40E0000C + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) -#define GPSR(x) __REG2(0x40E00018 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) -#define GPCR(x) __REG2(0x40E00024 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) -#define GRER(x) __REG2(0x40E00030 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) -#define GFER(x) __REG2(0x40E0003C + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) -#define GEDR(x) __REG2(0x40E00048 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) -#define GAFR(x) __REG2((((x) & 0x7f) < 96) ? 0x40E00054 : \ - ((((x) & 0x7f) < 112) ? 0x40E0006C : 0x40E00070),((x) & 0x60) >> 3) +#define GPLR(x) (*((((x) & 0x7f) < 96) ? &_GPLR(x) : &GPLR3)) +#define GPDR(x) (*((((x) & 0x7f) < 96) ? &_GPDR(x) : &GPDR3)) +#define GPSR(x) (*((((x) & 0x7f) < 96) ? &_GPSR(x) : &GPSR3)) +#define GPCR(x) (*((((x) & 0x7f) < 96) ? &_GPCR(x) : &GPCR3)) +#define GRER(x) (*((((x) & 0x7f) < 96) ? &_GRER(x) : &GRER3)) +#define GFER(x) (*((((x) & 0x7f) < 96) ? &_GFER(x) : &GFER3)) +#define GEDR(x) (*((((x) & 0x7f) < 96) ? &_GEDR(x) : &GEDR3)) +#define GAFR(x) (*((((x) & 0x7f) < 96) ? &_GAFR(x) : \ + ((((x) & 0x7f) < 112) ? &GAFR3_L : &GAFR3_U))) #else #define GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3) diff --git a/include/common.h b/include/common.h index 54083f10c5..c4ee3e2df6 100644 --- a/include/common.h +++ b/include/common.h @@ -479,6 +479,8 @@ ulong get_OPB_freq (void); ulong get_PCI_freq (void); #endif #if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_LH7A40X) +void s3c2410_irq(void); +#define ARM920_IRQ_CALLBACK s3c2410_irq ulong get_FCLK (void); ulong get_HCLK (void); ulong get_PCLK (void); diff --git a/include/configs/AP1000.h b/include/configs/AP1000.h index d490b33bd4..baa9741039 100644 --- a/include/configs/AP1000.h +++ b/include/configs/AP1000.h @@ -22,8 +22,6 @@ * (easy to change) */ -#undef DEBUG - #define CONFIG_405 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ diff --git a/include/configs/BAB7xx.h b/include/configs/BAB7xx.h index c11e9c911d..8ec70aa639 100644 --- a/include/configs/BAB7xx.h +++ b/include/configs/BAB7xx.h @@ -28,7 +28,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG #define GTREGREAD(x) 0xffffffff /* needed for debug */ /* diff --git a/include/configs/EB+MCF-EV123.h b/include/configs/EB+MCF-EV123.h index dae5295dd1..ea49a5d939 100644 --- a/include/configs/EB+MCF-EV123.h +++ b/include/configs/EB+MCF-EV123.h @@ -27,9 +27,7 @@ #define CONFIG_EB_MCF_EV123 -#undef DEBUG #undef CFG_HALT_BEFOR_RAM_JUMP -#undef ET_DEBUG /* * High Level Configuration Options (easy to change) diff --git a/include/configs/ELPPC.h b/include/configs/ELPPC.h index bb77188724..c64537fbfa 100644 --- a/include/configs/ELPPC.h +++ b/include/configs/ELPPC.h @@ -28,7 +28,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG #define GTREGREAD(x) 0xffffffff /* needed for debug */ /* diff --git a/include/configs/IPHASE4539.h b/include/configs/IPHASE4539.h index 6fee4558de..bb2c96ac94 100644 --- a/include/configs/IPHASE4539.h +++ b/include/configs/IPHASE4539.h @@ -30,8 +30,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG /* General debug */ - /*----------------------------------------------------------------------- * High Level Configuration Options * (easy to change) diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index ab574d589b..a3d7bc4635 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -38,8 +38,6 @@ #define CONFIG_M52277 /* define processor type */ #define CONFIG_M52277EVB /* M52277EVB board */ -#undef DEBUG - #define CONFIG_MCFUART #define CFG_UART_PORT (0) #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 7f544c839f..3b4bff306a 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -37,8 +37,6 @@ #define CONFIG_MCF523x /* define processor family */ #define CONFIG_M5235 /* define processor type */ -#undef DEBUG - #define CONFIG_MCFUART #define CFG_UART_PORT (0) #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/M5271EVB.h b/include/configs/M5271EVB.h index 798ec0c7a4..47e1e038b1 100644 --- a/include/configs/M5271EVB.h +++ b/include/configs/M5271EVB.h @@ -31,8 +31,6 @@ #ifndef _M5271EVB_H #define _M5271EVB_H -#undef DEBUG - /* * High Level Configuration Options (easy to change) */ diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index e95673902a..1a15c77bda 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -37,8 +37,6 @@ #define CONFIG_MCF532x /* define processor family */ #define CONFIG_M5329 /* define processor type */ -#undef DEBUG - #define CONFIG_MCFUART #define CFG_UART_PORT (0) #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 6bfffa1085..da4156c747 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -37,8 +37,6 @@ #define CONFIG_MCF532x /* define processor family */ #define CONFIG_M5373 /* define processor type */ -#undef DEBUG - #define CONFIG_MCFUART #define CFG_UART_PORT (0) #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 581c794cd4..5f5576179e 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -38,8 +38,6 @@ #define CONFIG_M54455 /* define processor type */ #define CONFIG_M54455EVB /* M54455EVB board */ -#undef DEBUG - #define CONFIG_MCFUART #define CFG_UART_PORT (0) #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h index 84c2105d55..f0d42beb99 100644 --- a/include/configs/M5475EVB.h +++ b/include/configs/M5475EVB.h @@ -38,8 +38,6 @@ #define CONFIG_M547x /* define processor type */ #define CONFIG_M5475 /* define processor type */ -#undef DEBUG - #define CONFIG_MCFUART #define CFG_UART_PORT (0) #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h index e9e5ee91c9..88dd21976c 100644 --- a/include/configs/M5485EVB.h +++ b/include/configs/M5485EVB.h @@ -38,8 +38,6 @@ #define CONFIG_M548x /* define processor type */ #define CONFIG_M5485 /* define processor type */ -#undef DEBUG - #define CONFIG_MCFUART #define CFG_UART_PORT (0) #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index ad2305c3db..ff7101f249 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -25,8 +25,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 295e785f9c..bf5ef4b59a 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index 6c0e68ab97..702b073381 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -20,8 +20,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index bb90c2d0a7..331f4c93a2 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -29,8 +29,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index 168ca2aa72..eff9fbaaee 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -22,8 +22,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index 83a4b1efe1..27b037ad00 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -17,8 +17,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 2b84e9cd9c..61de084cc9 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -21,8 +21,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index bf64f27049..174215c2cc 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -240,8 +240,6 @@ #define INTEL_LXT971_PHY 1 #endif -#undef DEBUG - /* Environment */ #ifndef CFG_RAMBOOT #if defined(CONFIG_RAM_AS_FLASH) diff --git a/include/configs/MVBLUE.h b/include/configs/MVBLUE.h index 0defafec26..d799f54f6a 100644 --- a/include/configs/MVBLUE.h +++ b/include/configs/MVBLUE.h @@ -53,8 +53,6 @@ #define ERR_LED(code) #endif -#undef DEBUG - #define CONFIG_MPC824X 1 #define CONFIG_MPC8245 1 #define CONFIG_MVBLUE 1 diff --git a/include/configs/QS823.h b/include/configs/QS823.h index 3657feaf70..3dd84e8c57 100644 --- a/include/configs/QS823.h +++ b/include/configs/QS823.h @@ -38,7 +38,6 @@ #undef CFG_DEVICE_NULLDEV /* null device */ #undef CONFIG_SILENT_CONSOLE /* silent console */ #undef CFG_CONSOLE_INFO_QUIET /* silent console ? */ -#undef DEBUG /* debug output code */ #undef DEBUG_FLASH /* debug flash code */ #undef FLASH_DEBUG /* debug fash code */ #undef DEBUG_ENV /* debug environment code */ diff --git a/include/configs/QS850.h b/include/configs/QS850.h index 3db539fa90..7dd6eca9ca 100644 --- a/include/configs/QS850.h +++ b/include/configs/QS850.h @@ -38,7 +38,6 @@ #undef CFG_DEVICE_NULLDEV /* null device */ #undef CONFIG_SILENT_CONSOLE /* silent console */ #undef CFG_CONSOLE_INFO_QUIET /* silent console ? */ -#undef DEBUG /* debug output code */ #undef DEBUG_FLASH /* debug flash code */ #undef FLASH_DEBUG /* debug fash code */ #undef DEBUG_ENV /* debug environment code */ diff --git a/include/configs/QS860T.h b/include/configs/QS860T.h index b3442de362..62cf2a449c 100644 --- a/include/configs/QS860T.h +++ b/include/configs/QS860T.h @@ -38,7 +38,6 @@ #undef CFG_DEVICE_NULLDEV /* null device */ #undef CONFIG_SILENT_CONSOLE /* silent console */ #undef CFG_CONSOLE_INFO_QUIET /* silent console ? */ -#undef DEBUG /* debug output code */ #undef DEBUG_FLASH /* debug flash code */ #undef FLASH_DEBUG /* debug fash code */ #undef DEBUG_ENV /* debug environment code */ diff --git a/include/configs/Rattler.h b/include/configs/Rattler.h index d7652fa9ba..428c0c2b59 100644 --- a/include/configs/Rattler.h +++ b/include/configs/Rattler.h @@ -37,8 +37,6 @@ #define CONFIG_RATTLER /* Analogue&Micro Rattler board */ -#undef DEBUG - /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index ce458ae5b8..09c3140360 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -27,9 +27,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define DEBUG -#undef DEBUG - /* * Memory map for the ADS5121 board: * @@ -109,25 +106,22 @@ * [04:00] DRAM tRPA */ -#define CFG_MDDRC_SYS_CFG 0xF8604200 -#define CFG_MDDRC_SYS_CFG_RUN 0xE8604200 -#define CFG_MDDRC_SYS_CFG_EN 0x30000000 -#define CFG_MDDRC_TIME_CFG0 0x0000281E -#define CFG_MDDRC_TIME_CFG0_RUN 0x01F4281E +#define CFG_MDDRC_SYS_CFG 0xF8604A00 +#define CFG_MDDRC_SYS_CFG_RUN 0xE8604A00 +#define CFG_MDDRC_SYS_CFG_EN 0xF0000000 +#define CFG_MDDRC_TIME_CFG0 0x00003D2E +#define CFG_MDDRC_TIME_CFG0_RUN 0x06183D2E #define CFG_MDDRC_TIME_CFG1 0x54EC1168 #define CFG_MDDRC_TIME_CFG2 0x35210864 #define CFG_MICRON_NOP 0x01380000 #define CFG_MICRON_PCHG_ALL 0x01100400 -#define CFG_MICRON_MR 0x01000022 #define CFG_MICRON_EM2 0x01020000 #define CFG_MICRON_EM3 0x01030000 #define CFG_MICRON_EN_DLL 0x01010000 -#define CFG_MICRON_RST_DLL 0x01000932 #define CFG_MICRON_RFSH 0x01080000 -#define CFG_MICRON_INIT_DEV_OP 0x01000832 +#define CFG_MICRON_INIT_DEV_OP 0x01000432 #define CFG_MICRON_OCD_DEFAULT 0x01010780 -#define CFG_MICRON_OCD_EXIT 0x01010400 /* DDR Priority Manager Configuration */ #define CFG_MDDRCGRP_PM_CFG1 0x000777AA @@ -415,8 +409,9 @@ #define CONFIG_OF_BOARD_SETUP 1 #define OF_CPU "PowerPC,5121@0" -#define OF_SOC "soc5121@80000000" +#define OF_SOC "soc@80000000" +#define OF_SOC_OLD "soc5121@80000000" #define OF_TBCLK (bd->bi_busfreq / 4) -#define OF_STDOUT_PATH "/soc5121@80000000/serial@11300" +#define OF_STDOUT_PATH "/soc@80000000/serial@11300" #endif /* __CONFIG_H */ diff --git a/include/configs/assabet.h b/include/configs/assabet.h index 226ad54723..d10f092f98 100644 --- a/include/configs/assabet.h +++ b/include/configs/assabet.h @@ -29,8 +29,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options * (easy to change) diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index a65c5f3422..5b7212a68f 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -170,8 +170,8 @@ #define CONFIG_HAS_DATAFLASH 1 #define CFG_SPI_WRITE_TOUT (5*CFG_HZ) -#define CFG_MAX_DATAFLASH_BANKS 2 -#define CFG_MAX_DATAFLASH_PAGES 16384 +#define CFG_MAX_DATAFLASH_BANKS 2 +#define CFG_MAX_DATAFLASH_PAGES 16384 #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */ #define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */ @@ -192,11 +192,11 @@ #else #define CFG_ENV_IS_IN_FLASH 1 #ifdef CONFIG_SKIP_LOWLEVEL_INIT -#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */ -#define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */ -#else #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */ #define CFG_ENV_SIZE 0x2000 /* 0x8000 */ +#else +#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */ +#define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #endif /* CFG_ENV_IS_IN_DATAFLASH */ @@ -204,44 +204,25 @@ #define CFG_LOAD_ADDR 0x21000000 /* default load address */ #ifdef CONFIG_SKIP_LOWLEVEL_INIT -#define CFG_BOOT_SIZE 0x00 /* 0 KBytes */ -#define CFG_U_BOOT_BASE PHYS_FLASH_1 -#define CFG_U_BOOT_SIZE 0x60000 /* 384 KBytes */ -#else #define CFG_BOOT_SIZE 0x6000 /* 24 KBytes */ #define CFG_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000) #define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */ +#else +#define CFG_BOOT_SIZE 0x00 /* 0 KBytes */ +#define CFG_U_BOOT_BASE PHYS_FLASH_1 +#define CFG_U_BOOT_SIZE 0x60000 /* 384 KBytes */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } +#define CFG_BAUDRATE_TABLE { 115200, 19200, 38400, 57600, 9600 } #define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */ #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#ifndef __ASSEMBLY__ -/*----------------------------------------------------------------------- - * Board specific extension for bd_info - * - * This structure is embedded in the global bd_info (bd_t) structure - * and can be used by the board specific code (eg board/...) - */ - -struct bd_info_ext { - /* helper variable for board environment handling - * - * env_crc_valid == 0 => uninitialised - * env_crc_valid > 0 => environment crc in flash is valid - * env_crc_valid < 0 => environment crc in flash is invalid - */ - int env_crc_valid; -}; -#endif - #define CFG_HZ 1000 #define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */ - /* AT91C_TC_TIMER_DIV1_CLOCK */ + /* AT91C_TC_TIMER_DIV1_CLOCK */ #define CONFIG_STACKSIZE (32*1024) /* regular stack */ diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h index f32c8c2c66..d22d350579 100644 --- a/include/configs/cmc_pu2.h +++ b/include/configs/cmc_pu2.h @@ -148,7 +148,7 @@ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 -#define PHYS_SDRAM_SIZE 0x1000000 /* 16 megs */ +#define PHYS_SDRAM_SIZE 0x1000000 /* 16 megs */ #define CFG_MEMTEST_START PHYS_SDRAM #define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144 @@ -186,25 +186,6 @@ #define CFG_MAXARGS 32 /* max number of command args */ #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#ifndef __ASSEMBLY__ -/*----------------------------------------------------------------------- - * Board specific extension for bd_info - * - * This structure is embedded in the global bd_info (bd_t) structure - * and can be used by the board specific code (eg board/...) - */ - -struct bd_info_ext { - /* helper variable for board environment handling - * - * env_crc_valid == 0 => uninitialised - * env_crc_valid > 0 => environment crc in flash is valid - * env_crc_valid < 0 => environment crc in flash is invalid - */ - int env_crc_valid; -}; -#endif /* __ASSEMBLY__ */ - #define CFG_HZ 1000 #define CFG_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */ /* AT91C_TC_TIMER_DIV1_CLOCK */ diff --git a/include/configs/csb637.h b/include/configs/csb637.h index 976dae39f6..f93c3bcd6f 100644 --- a/include/configs/csb637.h +++ b/include/configs/csb637.h @@ -170,8 +170,8 @@ #undef CONFIG_HAS_DATAFLASH #define CFG_SPI_WRITE_TOUT (5*CFG_HZ) -#define CFG_MAX_DATAFLASH_BANKS 0 -#define CFG_MAX_DATAFLASH_PAGES 16384 +#define CFG_MAX_DATAFLASH_BANKS 0 +#define CFG_MAX_DATAFLASH_PAGES 16384 #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */ #define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */ @@ -209,35 +209,16 @@ #define CFG_LOAD_ADDR 0x21000000 /* default load address */ -#define CFG_BAUDRATE_TABLE {115200, 57600, 38400, 19200, 9600 } +#define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } #define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */ #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#ifndef __ASSEMBLY__ -/*----------------------------------------------------------------------- - * Board specific extension for bd_info - * - * This structure is embedded in the global bd_info (bd_t) structure - * and can be used by the board specific code (eg board/...) - */ - -struct bd_info_ext { - /* helper variable for board environment handling - * - * env_crc_valid == 0 => uninitialised - * env_crc_valid > 0 => environment crc in flash is valid - * env_crc_valid < 0 => environment crc in flash is invalid - */ - int env_crc_valid; -}; -#endif - #define CFG_HZ 1000 #define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */ - /* AT91C_TC_TIMER_DIV1_CLOCK */ + /* AT91C_TC_TIMER_DIV1_CLOCK */ #define CONFIG_STACKSIZE (32*1024) /* regular stack */ diff --git a/include/configs/ep8248.h b/include/configs/ep8248.h index 85ad70a0d5..cebe849f66 100644 --- a/include/configs/ep8248.h +++ b/include/configs/ep8248.h @@ -31,8 +31,6 @@ #define CONFIG_EP8248 /* Embedded Planet EP8248 board */ -#undef DEBUG - #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ diff --git a/include/configs/ep82xxm.h b/include/configs/ep82xxm.h index 4febd322a4..8e5d6e57c7 100644 --- a/include/configs/ep82xxm.h +++ b/include/configs/ep82xxm.h @@ -31,8 +31,6 @@ #define CONFIG_EP82XXM /* Embedded Planet EP82xxM H 1.0 board */ /* 256MB SDRAM / 64MB FLASH */ -#undef DEBUG - #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ /* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h index e11ce4c715..3b1b4ab950 100644 --- a/include/configs/gcplus.h +++ b/include/configs/gcplus.h @@ -29,8 +29,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * The ADS GCPlus Linux boot ROM loads U-Boot into RAM at 0xc0200000. * We don't actually init RAM in this case since we're using U-Boot as diff --git a/include/configs/gw8260.h b/include/configs/gw8260.h index ff5724082d..7c2c224060 100644 --- a/include/configs/gw8260.h +++ b/include/configs/gw8260.h @@ -51,7 +51,6 @@ #define __CONFIG_H /* Enable debug prints */ -#undef DEBUG /* General debug */ #undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ /* What is the oscillator's (UX2) frequency in Hz? */ diff --git a/include/configs/mgcoge.h b/include/configs/mgcoge.h index 3de24669fd..f4a1cc0eca 100644 --- a/include/configs/mgcoge.h +++ b/include/configs/mgcoge.h @@ -35,8 +35,6 @@ #define CONFIG_CPM2 1 /* Has a CPM2 */ -#undef DEBUG - /* * Select serial console configuration * diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h index ea5a44b1d1..294221f941 100644 --- a/include/configs/mp2usb.h +++ b/include/configs/mp2usb.h @@ -47,7 +47,7 @@ #define CFG_ATMEL_PLL_INIT_BUG 1 #ifndef CONFIG_SKIP_LOWLEVEL_INIT -#define CFG_USE_MAIN_OSCILLATOR 1 +#define CFG_USE_MAIN_OSCILLATOR 1 /* flash */ #define MC_PUIA_VAL 0x00000000 #define MC_PUP_VAL 0x00000000 @@ -216,25 +216,6 @@ #define CFG_DEVICE_DEREGISTER /* needs device_deregister */ #define LITTLEENDIAN 1 /* used by usb_ohci.c */ -#ifndef __ASSEMBLY__ -/*----------------------------------------------------------------------- - * Board specific extension for bd_info - * - * This structure is embedded in the global bd_info (bd_t) structure - * and can be used by the board specific code (eg board/...) - */ - -struct bd_info_ext { - /* helper variable for board environment handling - * - * env_crc_valid == 0 => uninitialised - * env_crc_valid > 0 => environment crc in flash is valid - * env_crc_valid < 0 => environment crc in flash is invalid - */ - int env_crc_valid; -}; -#endif /* __ASSEMBLY__ */ - #define CFG_HZ 1000 #define CFG_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */ /* AT91C_TC_TIMER_DIV1_CLOCK */ diff --git a/include/configs/mpc7448hpc2.h b/include/configs/mpc7448hpc2.h index bd3107ab23..c7216c97a4 100644 --- a/include/configs/mpc7448hpc2.h +++ b/include/configs/mpc7448hpc2.h @@ -33,8 +33,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* Board Configuration Definitions */ /* MPC7448HPC2 (High-Performance Computing II) (Taiga) board */ diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h index 7035002c4f..9c94c4e793 100644 --- a/include/configs/ms7720se.h +++ b/include/configs/ms7720se.h @@ -25,7 +25,6 @@ #ifndef __MS7720SE_H #define __MS7720SE_H -#undef DEBUG #define CONFIG_SH 1 #define CONFIG_SH3 1 #define CONFIG_CPU_SH7720 1 diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index ae0d018515..85380373da 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -25,7 +25,6 @@ #ifndef __MS7722SE_H #define __MS7722SE_H -#undef DEBUG #define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_CPU_SH7722 1 diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index 36681568f8..a25364dd38 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -25,7 +25,6 @@ #ifndef __MS7750SE_H #define __MS7750SE_H -#undef DEBUG #define CONFIG_SH 1 #define CONFIG_SH4 1 #define CONFIG_CPU_SH7750 1 diff --git a/include/configs/ppmc7xx.h b/include/configs/ppmc7xx.h index fe7de7bed0..1d2d38b36b 100644 --- a/include/configs/ppmc7xx.h +++ b/include/configs/ppmc7xx.h @@ -30,7 +30,6 @@ * do_bdinfo - Required to build with debug */ -#undef DEBUG #ifdef DEBUG #define GTREGREAD(x) 0xFFFFFFFF #define do_bdinfo(a,b,c,d) diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index 33c828337b..e1640195a5 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -32,8 +32,6 @@ #define CONFIG_QEMU_MIPS 1 #define CONFIG_MISC_INIT_R -#undef DEBUG - /*IP address is default used by Qemu*/ #define CONFIG_IPADDR 10.0.2.15 /* Our IP address */ #define CONFIG_SERVERIP 10.0.2.2 /* Server IP address*/ diff --git a/include/configs/sacsng.h b/include/configs/sacsng.h index c474acd70e..ec7d34aa9e 100644 --- a/include/configs/sacsng.h +++ b/include/configs/sacsng.h @@ -35,7 +35,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG /* General debug */ #undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ #undef CONFIG_LOGBUFFER /* External logbuffer support */ diff --git a/include/configs/sbc8260.h b/include/configs/sbc8260.h index b1d41a6d42..60633987f6 100644 --- a/include/configs/sbc8260.h +++ b/include/configs/sbc8260.h @@ -36,7 +36,6 @@ #define __CONFIG_H /* Enable debug prints */ -#undef DEBUG /* General debug */ #undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ /***************************************************************************** diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 4cc4ff1723..2498b3e650 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -31,8 +31,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#undef DEBUG - /* * High Level Configuration Options */ diff --git a/include/configs/voiceblue.h b/include/configs/voiceblue.h index 7cab31dee4..8c827af315 100644 --- a/include/configs/voiceblue.h +++ b/include/configs/voiceblue.h @@ -26,10 +26,6 @@ #include <configs/omap1510.h> -/* - * High Level Configuration Options - * (easy to change) - */ #define CONFIG_ARM925T 1 /* This is an arm925t CPU */ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP1510 1 /* which is in a 5910 */ @@ -54,10 +50,9 @@ */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE SZ_64M +#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024) #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_2 0x0c000000 #define CFG_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */ @@ -67,50 +62,34 @@ #define CFG_FLASH_CFI /* Flash is CFI conformant */ #define CFG_FLASH_CFI_DRIVER /* Use the common driver */ #define CFG_MAX_FLASH_BANKS 1 -#ifdef VOICEBLUE_SMALL_FLASH -#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_2 } -#else -#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1 } -#endif +#define CFG_FLASH_BASE PHYS_FLASH_1 /* FIXME: Does not work on AMD flash */ /* #define CFG_FLASH_USE_BUFFER_WRITE 1 */ /* use buffered writes (20x faster) */ #define CFG_MAX_FLASH_SECT 512 /* max # of sectors on one chip */ #define CFG_MONITOR_BASE PHYS_FLASH_1 -#define CFG_MONITOR_LEN SZ_128K +#define CFG_MONITOR_LEN (256 * 1024) /* * Environment settings */ -#ifdef VOICEBLUE_SMALL_FLASH -#define CFG_ENV_IS_NOWHERE -#define CFG_ENV_SIZE SZ_1K -#else #define CFG_ENV_IS_IN_FLASH #define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_MONITOR_LEN) -#define CFG_ENV_SIZE SZ_8K -#define CFG_ENV_SECT_SIZE SZ_64K +#define CFG_ENV_SIZE (8 * 1024) +#define CFG_ENV_SECT_SIZE (64 * 1024) #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE) #define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE #define CONFIG_ENV_OVERWRITE -#endif - /* * Size of malloc() pool and stack */ #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -#ifdef VOICEBLUE_SMALL_FLASH -#define CFG_MALLOC_LEN (SZ_64K - CFG_GBL_DATA_SIZE) -#define CONFIG_STACKSIZE SZ_8K -#define PHYS_SDRAM_1_RESERVED 0 -#else -#define CFG_MALLOC_LEN SZ_4M -#define CONFIG_STACKSIZE SZ_1M +#define CFG_MALLOC_LEN (4 * 1024 * 1024) +#define CONFIG_STACKSIZE (1 * 1024 * 1024) #define PHYS_SDRAM_1_RESERVED (CFG_MONITOR_LEN + CFG_MALLOC_LEN + CONFIG_STACKSIZE) -#endif /* * Hardware drivers @@ -118,6 +97,14 @@ #define CONFIG_DRIVER_SMC91111 #define CONFIG_SMC91111_BASE 0x08000300 +#define CONFIG_HARD_I2C +#define CFG_I2C_SPEED 100000 +#define CFG_I2C_SLAVE 1 +#define CONFIG_DRIVER_OMAP1510_I2C + +#define CONFIG_RTC_DS1307 +#define CFG_I2C_RTC_ADDR 0x68 + /* * NS16550 Configuration */ @@ -138,21 +125,18 @@ #include <config_cmd_default.h> #define CONFIG_CMD_BDI -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_IMI +#define CONFIG_CMD_BOOTD +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV #define CONFIG_CMD_FLASH +#define CONFIG_CMD_IMI +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_LOADB #define CONFIG_CMD_MEMORY #define CONFIG_CMD_NET -#define CONFIG_CMD_BOOTD -#define CONFIG_CMD_DHCP #define CONFIG_CMD_PING #define CONFIG_CMD_RUN -#if !defined(VOICEBLUE_SMALL_FLASH) - #define CONFIG_CMD_ENV - #define CONFIG_CMD_JFFS2 -#endif - /* * BOOTP options @@ -165,32 +149,20 @@ #define CONFIG_LOOPW -#ifdef VOICEBLUE_SMALL_FLASH -#define CONFIG_BOOTDELAY 0 -#undef CONFIG_BOOTARGS /* the preboot command will set bootargs*/ -#define CFG_AUTOLOAD "n" /* no autoload */ -#define CONFIG_PREBOOT "run setup" -#define CONFIG_EXTRA_ENV_SETTINGS \ - "setup=setenv bootargs console=ttyS0,${baudrate} " \ - "root=/dev/nfs ip=dhcp\0" \ - "update=erase c000000 c03ffff; " \ - "cp.b 10400000 c000000 ${filesize}\0" -#else #define CONFIG_BOOTDELAY 3 -#undef CONFIG_BOOTARGS /* boot command will set bootargs */ -#define CFG_AUTOLOAD "n" /* no autoload */ +#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */ +#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/ +#define CFG_AUTOLOAD "n" /* No autoload */ #define CONFIG_BOOTCOMMAND "run nboot" #define CONFIG_PREBOOT "run setup" #define CONFIG_EXTRA_ENV_SETTINGS \ "silent=1\0" \ "ospart=0\0" \ - "swapos=no\0" \ + "bootfile=/boot/uImage\0" \ "setpart=" \ - "if test $swapos = yes; then " \ - "if test $ospart -eq 0; then chpart 4; else chpart 3; fi; "\ - "setenv swapos no; saveenv; " \ - "else " \ - "if test $ospart -eq 0; then chpart 3; else chpart 4; fi; "\ + "if test -n $swapos; then " \ + "setenv swapos; saveenv; " \ + "if test $ospart -eq 0; then setenv ospart 1; else setenv ospart 0; fi; "\ "fi\0" \ "setup=setenv bootargs console=ttyS0,$baudrate " \ "mtdparts=$mtdparts\0" \ @@ -198,16 +170,14 @@ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \ "nfsroot=$rootpath root=/dev/nfs\0" \ "flashargs=run setpart; setenv bootargs $bootargs " \ - "root=/dev/mtdblock$partition ro " \ + "root=mtd:data$ospart ro " \ "rootfstype=jffs2\0" \ "initrdargs=setenv bootargs $bootargs " \ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \ - "fboot=run flashargs; fsload /boot/uImage; bootm\0" \ - "iboot=bootp; run initrdargs; tftp; bootm\0" \ + "fboot=run flashargs; chpart data$ospart; fsload; bootm\0" \ + "mboot=bootp; run initrdargs; tftp; bootm\0" \ "nboot=bootp; run nfsargs; tftp; bootm\0" -#endif -#ifndef VOICEBLUE_SMALL_FLASH #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */ #if 1 /* feel free to disable for development */ @@ -221,19 +191,15 @@ */ #define CONFIG_JFFS2_CMDLINE #define MTDIDS_DEFAULT "nor0=omapflash.0" -#define MTDPARTS_DEFAULT "mtdparts=omapflash.0:128k(uboot),64k(env),64k(r_env),16256k(data1),-(data2)" - -#endif /* VOICEBLUE_SMALL_FLASH */ +#define MTDPARTS_DEFAULT "mtdparts=omapflash.0:256k(u-boot),64k(env),64k(r_env),16192k(data0),-(data1)" /* * Miscellaneous configurable options */ -#ifndef VOICEBLUE_SMALL_FLASH #define CFG_HUSH_PARSER #define CFG_PROMPT_HUSH_PS2 "> " #define CONFIG_AUTO_COMPLETE -#endif #define CFG_LONGHELP /* undef to save memory */ #define CFG_PROMPT "# " /* Monitor Command Prompt */ #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h index 766617e075..d167e0174e 100644 --- a/include/configs/xsengine.h +++ b/include/configs/xsengine.h @@ -33,7 +33,7 @@ #define CONFIG_XSENGINE 1 #define CONFIG_MMC 1 #define CONFIG_DOS_PARTITION 1 -#define BOARD_POST_INIT 1 +#define OARD_LATE_INIT 1 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */ diff --git a/include/mpc512x.h b/include/mpc512x.h index d1c6fb29f6..b51cf78e6c 100644 --- a/include/mpc512x.h +++ b/include/mpc512x.h @@ -185,7 +185,7 @@ /* SCFR1 System Clock Frequency Register 1 */ -#define SCFR1_IPS_DIV 0x4 +#define SCFR1_IPS_DIV 0x3 #define SCFR1_IPS_DIV_MASK 0x03800000 #define SCFR1_IPS_DIV_SHIFT 23 diff --git a/include/part.h b/include/part.h index 37b2b6845b..8407aa05d2 100644 --- a/include/part.h +++ b/include/part.h @@ -59,6 +59,7 @@ typedef struct block_dev_desc { #define IF_TYPE_USB 4 #define IF_TYPE_DOC 5 #define IF_TYPE_MMC 6 +#define IF_TYPE_SD 7 /* Part types */ #define PART_TYPE_UNKNOWN 0x00 diff --git a/include/serial.h b/include/serial.h index e292f0cd90..2b99e539c1 100644 --- a/include/serial.h +++ b/include/serial.h @@ -36,6 +36,11 @@ extern struct serial_device eserial4_device; #endif +#if defined(CONFIG_S3C2410) +extern struct serial_device s3c24xx_serial0_device; +extern struct serial_device s3c24xx_serial1_device; +extern struct serial_device s3c24xx_serial2_device; +#endif extern struct serial_device serial_ffuart_device; extern struct serial_device serial_btuart_device; diff --git a/lib_arm/board.c b/lib_arm/board.c index 7e7a28271d..22d573a398 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -84,6 +84,11 @@ extern void cs8900_get_enetaddr (uchar * addr); extern void rtl8019_get_enetaddr (uchar * addr); #endif +#if defined(CONFIG_HARD_I2C) || \ + defined(CONFIG_SOFT_I2C) +#include <i2c.h> +#endif + /* * Begin and End of memory area for malloc(), and current "brk" */ @@ -209,6 +214,16 @@ static void display_flash_config (ulong size) } #endif /* CFG_NO_FLASH */ +#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) +static int init_func_i2c (void) +{ + puts ("I2C: "); + i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + puts ("ready\n"); + return (0); +} +#endif + /* * Breathe some life into the board... * @@ -251,6 +266,9 @@ init_fnc_t *init_sequence[] = { #if defined(CONFIG_DISPLAY_BOARDINFO) checkboard, /* display board info */ #endif +#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) + init_func_i2c, +#endif dram_init, /* configure available RAM banks */ display_dram_config, NULL, diff --git a/net/tftp.c b/net/tftp.c index 8b95bcfec4..3dd2b06aae 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -34,7 +34,7 @@ #define TFTP_ERROR 5 #define TFTP_OACK 6 - +static IPaddr_t TftpServerIP; static int TftpServerPort; /* The UDP port at their end */ static int TftpOurPort; /* The UDP port at our end */ static int TftpTimeoutCount; @@ -55,7 +55,14 @@ static int TftpState; #define DEFAULT_NAME_LEN (8 + 4 + 1) static char default_filename[DEFAULT_NAME_LEN]; -static char *tftp_filename; + +#ifndef CONFIG_TFTP_FILE_NAME_MAX_LEN +#define MAX_LEN 128 +#else +#define MAX_LEN CONFIG_TFTP_FILE_NAME_MAX_LEN +#endif + +static char tftp_filename[MAX_LEN]; #ifdef CFG_DIRECT_FLASH_TFTP extern flash_info_t flash_info[]; @@ -231,7 +238,7 @@ TftpSend (void) break; } - NetSendUDPPacket(NetServerEther, NetServerIP, TftpServerPort, TftpOurPort, len); + NetSendUDPPacket(NetServerEther, TftpServerIP, TftpServerPort, TftpOurPort, len); } @@ -372,7 +379,7 @@ TftpHandler (uchar * pkt, unsigned dest, unsigned src, unsigned len) #ifdef CONFIG_MCAST_TFTP /* if I am the MasterClient, actively calculate what my next * needed block is; else I'm passive; not ACKING - */ + */ if (Multicast) { if (len < TftpBlkSize) { TftpEndingBlock = TftpBlock; @@ -453,30 +460,43 @@ TftpStart (void) char *ep; /* Environment pointer */ #endif + TftpServerIP = NetServerIP; if (BootFile[0] == '\0') { sprintf(default_filename, "%02lX%02lX%02lX%02lX.img", NetOurIP & 0xFF, (NetOurIP >> 8) & 0xFF, (NetOurIP >> 16) & 0xFF, (NetOurIP >> 24) & 0xFF ); - tftp_filename = default_filename; + + strncpy(tftp_filename, default_filename, MAX_LEN); + tftp_filename[MAX_LEN-1] = 0; printf ("*** Warning: no boot file name; using '%s'\n", tftp_filename); } else { - tftp_filename = BootFile; + char *p = strchr (p, ':'); + + if (p == NULL) { + strncpy(tftp_filename, BootFile, MAX_LEN); + tftp_filename[MAX_LEN-1] = 0; + } else { + *p++ = '\0'; + TftpServerIP = string_to_ip (BootFile); + strncpy(tftp_filename, p, MAX_LEN); + tftp_filename[MAX_LEN-1] = 0; + } } #if defined(CONFIG_NET_MULTI) printf ("Using %s device\n", eth_get_name()); #endif - puts ("TFTP from server "); print_IPaddr (NetServerIP); + puts ("TFTP from server "); print_IPaddr (TftpServerIP); puts ("; our IP address is "); print_IPaddr (NetOurIP); /* Check if we need to send across this subnet */ if (NetOurGatewayIP && NetOurSubnetMask) { - IPaddr_t OurNet = NetOurIP & NetOurSubnetMask; - IPaddr_t ServerNet = NetServerIP & NetOurSubnetMask; + IPaddr_t OurNet = NetOurIP & NetOurSubnetMask; + IPaddr_t ServerNet = TftpServerIP & NetOurSubnetMask; if (OurNet != ServerNet) { puts ("; sending through gateway "); @@ -522,7 +542,7 @@ TftpStart (void) /* Revert TftpBlkSize to dflt */ TftpBlkSize = TFTP_BLOCK_SIZE; #ifdef CONFIG_MCAST_TFTP - mcast_cleanup(); + mcast_cleanup(); #endif TftpSend (); diff --git a/post/tests.c b/post/tests.c index 0c49e32447..698f85c98d 100644 --- a/post/tests.c +++ b/post/tests.c @@ -241,8 +241,8 @@ struct post_test post_list[] = { "ECC test", "ecc", - "This test checks ECC facility of memory.", - POST_ROM | POST_ALWAYS, + "This test checks the ECC facility of memory.", + POST_ROM | POST_ALWAYS | POST_PREREL, &ecc_post_test, NULL, NULL, |
