NET: Move MDIO regs out of TSEC Space

Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.

This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.

Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
platform specific files.

Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 23 insertions, 22 deletions

diff --git a/include/tsec.h b/include/tsec.h
index 0ac3034060..92bd028f0e 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -7,7 +7,7 @@
  *  terms of the GNU Public License, Version 2, incorporated
  *  herein by reference.
  *
- * Copyright 2004, 2007 Freescale Semiconductor, Inc.
+ * Copyright 2004, 2007, 2009  Freescale Semiconductor, Inc.
  * (C) Copyright 2003, Motorola, Inc.
  * maintained by Xianghua Xiao (x.xiao@motorola.com)
  * author Andy Fleming
@@ -20,22 +20,15 @@
 #include <net.h>
 #include <config.h>
 
-#ifndef CONFIG_SYS_TSEC1_OFFSET
-    #define CONFIG_SYS_TSEC1_OFFSET	(0x24000)
-#endif
-
-#define TSEC_SIZE	0x01000
-
-/* FIXME:  Should these be pushed back to 83xx and 85xx config files? */
-#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \
-	|| defined(CONFIG_MPC83xx)
-    #define TSEC_BASE_ADDR	(CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
-#endif
+#define TSEC_SIZE 		0x01000
+#define TSEC_MDIO_OFFSET	0x01000
 
 #define STD_TSEC_INFO(num) \
 {			\
 	.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)), \
-	.miiregs = (tsec_t *)TSEC_BASE_ADDR, \
+	.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR), \
+	.miiregs_sgmii = (tsec_mdio_t *)(MDIO_BASE_ADDR \
+					 + (num - 1) * TSEC_MDIO_OFFSET), \
 	.devname = CONFIG_TSEC##num##_NAME, \
 	.phyaddr = TSEC##num##_PHY_ADDR, \
 	.flags = TSEC##num##_FLAGS \
@@ -44,7 +37,9 @@
 #define SET_STD_TSEC_INFO(x, num) \
 {			\
 	x.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)); \
-	x.miiregs = (tsec_t *)TSEC_BASE_ADDR; \
+	x.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR); \
+	x.miiregs_sgmii = (tsec_mdio_t *)(MDIO_BASE_ADDR \
+					  + (num - 1) * TSEC_MDIO_OFFSET); \
 	x.devname = CONFIG_TSEC##num##_NAME; \
 	x.phyaddr = TSEC##num##_PHY_ADDR; \
 	x.flags = TSEC##num##_FLAGS;\
@@ -461,6 +456,15 @@ typedef struct tsec_hash_regs
 	uint	res2[24];
 } tsec_hash_t;
 
+typedef struct tsec_mdio {
+	uint	miimcfg;	/* MII Management: Configuration */
+	uint	miimcom;	/* MII Management: Command */
+	uint	miimadd;	/* MII Management: Address */
+	uint	miimcon;	/* MII Management: Control */
+	uint	miimstat;	/* MII Management: Status */
+	uint	miimind;	/* MII Management: Indicators */
+} tsec_mdio_t;
+
 typedef struct tsec
 {
 	/* General Control and Status Registers (0x2_n000) */
@@ -526,12 +530,7 @@ typedef struct tsec
 
 	uint	res51c;
 
-	uint	miimcfg;	/* MII Management: Configuration */
-	uint	miimcom;	/* MII Management: Command */
-	uint	miimadd;	/* MII Management: Address */
-	uint	miimcon;	/* MII Management: Control */
-	uint	miimstat;	/* MII Management: Status */
-	uint	miimind;	/* MII Management: Indicators */
+	uint	resmdio[6];
 
 	uint	res538;
 
@@ -571,7 +570,8 @@ typedef struct tsec
 
 struct tsec_private {
 	volatile tsec_t *regs;
-	volatile tsec_t *phyregs;
+	volatile tsec_mdio_t *phyregs;
+	volatile tsec_mdio_t *phyregs_sgmii;
 	struct phy_info *phyinfo;
 	uint phyaddr;
 	u32 flags;
@@ -630,7 +630,8 @@ struct phy_info {
 
 struct tsec_info_struct {
 	tsec_t *regs;
-	tsec_t *miiregs;
+	tsec_mdio_t *miiregs;
+	tsec_mdio_t *miiregs_sgmii;
 	char *devname;
 	unsigned int phyaddr;
 	u32 flags;