powerpc: mpc824x: remove MPC824X cpu support

All the MPC824X boards are still non-generic boards:
A3000, CPC45, CU824, eXalion, MVBLUE, MUSENKI, Sandpoint824x, utx8245

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Josef Wagner <Wagner@Microsys.de>
Cc: Torsten Demke <torsten.demke@fci.com>
Cc: Jim Thompson <jim@musenki.com>
Cc: Greg Allen <gallen@arlut.utexas.edu>

4 files changed, 0 insertions, 701 deletions

diff --git a/include/pcmcia/cirrus.h b/include/pcmcia/cirrus.h
deleted file mode 100644
index cd34dd8560..0000000000
--- a/include/pcmcia/cirrus.h
+++ /dev/null
@@ -1,180 +0,0 @@
-/*
- * cirrus.h 1.4 1999/10/25 20:03:34
- *
- * The contents of this file are subject to the Mozilla Public License
- * Version 1.1 (the "License"); you may not use this file except in
- * compliance with the License. You may obtain a copy of the License
- * at http://www.mozilla.org/MPL/
- *
- * Software distributed under the License is distributed on an "AS IS"
- * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
- * the License for the specific language governing rights and
- * limitations under the License.
- *
- * The initial developer of the original code is David A. Hinds
- * <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds
- * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.
- *
- * Alternatively, the contents of this file may be used under the
- * terms of the GNU General Public License version 2 (the "GPL"), in which
- * case the provisions of the GPL are applicable instead of the
- * above.  If you wish to allow the use of your version of this file
- * only under the terms of the GPL and not to allow others to use
- * your version of this file under the MPL, indicate your decision by
- * deleting the provisions above and replace them with the notice and
- * other provisions required by the GPL.  If you do not delete the
- * provisions above, a recipient may use your version of this file
- * under either the MPL or the GPL.
- */
-
-#ifndef _LINUX_CIRRUS_H
-#define _LINUX_CIRRUS_H
-
-#ifndef PCI_VENDOR_ID_CIRRUS
-#define PCI_VENDOR_ID_CIRRUS		0x1013
-#endif
-#ifndef PCI_DEVICE_ID_CIRRUS_6729
-#define PCI_DEVICE_ID_CIRRUS_6729	0x1100
-#endif
-#ifndef PCI_DEVICE_ID_CIRRUS_6832
-#define PCI_DEVICE_ID_CIRRUS_6832	0x1110
-#endif
-
-#define PD67_MISC_CTL_1		0x16	/* Misc control 1 */
-#define PD67_FIFO_CTL		0x17	/* FIFO control */
-#define PD67_MISC_CTL_2		0x1E	/* Misc control 2 */
-#define PD67_CHIP_INFO		0x1f	/* Chip information */
-#define PD67_ATA_CTL		0x026	/* 6730: ATA control */
-#define PD67_EXT_INDEX		0x2e	/* Extension index */
-#define PD67_EXT_DATA		0x2f	/* Extension data */
-
-/* PD6722 extension registers -- indexed in PD67_EXT_INDEX */
-#define PD67_DATA_MASK0		0x01	/* Data mask 0 */
-#define PD67_DATA_MASK1		0x02	/* Data mask 1 */
-#define PD67_DMA_CTL		0x03	/* DMA control */
-
-/* PD6730 extension registers -- indexed in PD67_EXT_INDEX */
-#define PD67_EXT_CTL_1		0x03	/* Extension control 1 */
-#define PD67_MEM_PAGE(n)	((n)+5)	/* PCI window bits 31:24 */
-#define PD67_EXTERN_DATA	0x0a
-#define PD67_MISC_CTL_3		0x25
-#define PD67_SMB_PWR_CTL	0x26
-
-/* I/O window address offset */
-#define PD67_IO_OFF(w)		(0x36+((w)<<1))
-
-/* Timing register sets */
-#define PD67_TIME_SETUP(n)	(0x3a + 3*(n))
-#define PD67_TIME_CMD(n)	(0x3b + 3*(n))
-#define PD67_TIME_RECOV(n)	(0x3c + 3*(n))
-
-/* Flags for PD67_MISC_CTL_1 */
-#define PD67_MC1_5V_DET		0x01	/* 5v detect */
-#define PD67_MC1_MEDIA_ENA	0x01	/* 6730: Multimedia enable */
-#define PD67_MC1_VCC_3V		0x02	/* 3.3v Vcc */
-#define PD67_MC1_PULSE_MGMT	0x04
-#define PD67_MC1_PULSE_IRQ	0x08
-#define PD67_MC1_SPKR_ENA	0x10
-#define PD67_MC1_INPACK_ENA	0x80
-
-/* Flags for PD67_FIFO_CTL */
-#define PD67_FIFO_EMPTY		0x80
-
-/* Flags for PD67_MISC_CTL_2 */
-#define PD67_MC2_FREQ_BYPASS	0x01
-#define PD67_MC2_DYNAMIC_MODE	0x02
-#define PD67_MC2_SUSPEND	0x04
-#define PD67_MC2_5V_CORE	0x08
-#define PD67_MC2_LED_ENA	0x10	/* IRQ 12 is LED enable */
-#define PD67_MC2_FAST_PCI	0x10	/* 6729: PCI bus > 25 MHz */
-#define PD67_MC2_3STATE_BIT7	0x20	/* Floppy change bit */
-#define PD67_MC2_DMA_MODE	0x40
-#define PD67_MC2_IRQ15_RI	0x80	/* IRQ 15 is ring enable */
-
-/* Flags for PD67_CHIP_INFO */
-#define PD67_INFO_SLOTS		0x20	/* 0 = 1 slot, 1 = 2 slots */
-#define PD67_INFO_CHIP_ID	0xc0
-#define PD67_INFO_REV		0x1c
-
-/* Fields in PD67_TIME_* registers */
-#define PD67_TIME_SCALE		0xc0
-#define PD67_TIME_SCALE_1	0x00
-#define PD67_TIME_SCALE_16	0x40
-#define PD67_TIME_SCALE_256	0x80
-#define PD67_TIME_SCALE_4096	0xc0
-#define PD67_TIME_MULT		0x3f
-
-/* Fields in PD67_DMA_CTL */
-#define PD67_DMA_MODE		0xc0
-#define PD67_DMA_OFF		0x00
-#define PD67_DMA_DREQ_INPACK	0x40
-#define PD67_DMA_DREQ_WP	0x80
-#define PD67_DMA_DREQ_BVD2	0xc0
-#define PD67_DMA_PULLUP		0x20	/* Disable socket pullups? */
-
-/* Fields in PD67_EXT_CTL_1 */
-#define PD67_EC1_VCC_PWR_LOCK	0x01
-#define PD67_EC1_AUTO_PWR_CLEAR	0x02
-#define PD67_EC1_LED_ENA	0x04
-#define PD67_EC1_INV_CARD_IRQ	0x08
-#define PD67_EC1_INV_MGMT_IRQ	0x10
-#define PD67_EC1_PULLUP_CTL	0x20
-
-/* Fields in PD67_MISC_CTL_3 */
-#define PD67_MC3_IRQ_MASK	0x03
-#define PD67_MC3_IRQ_PCPCI	0x00
-#define PD67_MC3_IRQ_EXTERN	0x01
-#define PD67_MC3_IRQ_PCIWAY	0x02
-#define PD67_MC3_IRQ_PCI	0x03
-#define PD67_MC3_PWR_MASK	0x0c
-#define PD67_MC3_PWR_SERIAL	0x00
-#define PD67_MC3_PWR_TI2202	0x08
-#define PD67_MC3_PWR_SMB	0x0c
-
-/* Register definitions for Cirrus PD6832 PCI-to-CardBus bridge */
-
-/* PD6832 extension registers -- indexed in PD67_EXT_INDEX */
-#define PD68_EXT_CTL_2			0x0b
-#define PD68_PCI_SPACE			0x22
-#define PD68_PCCARD_SPACE		0x23
-#define PD68_WINDOW_TYPE		0x24
-#define PD68_EXT_CSC			0x2e
-#define PD68_MISC_CTL_4			0x2f
-#define PD68_MISC_CTL_5			0x30
-#define PD68_MISC_CTL_6			0x31
-
-/* Extra flags in PD67_MISC_CTL_3 */
-#define PD68_MC3_HW_SUSP		0x10
-#define PD68_MC3_MM_EXPAND		0x40
-#define PD68_MC3_MM_ARM			0x80
-
-/* Bridge Control Register */
-#define  PD6832_BCR_MGMT_IRQ_ENA	0x0800
-
-/* Socket Number Register */
-#define PD6832_SOCKET_NUMBER		0x004c	/* 8 bit */
-
-
-typedef struct cirrus_state_t {
-    u_char		misc1, misc2;
-    u_char		timer[6];
-} cirrus_state_t;
-
-/* Cirrus options */
-static int has_dma = -1;
-static int has_led = -1;
-static int has_ring = -1;
-static int dynamic_mode = 0;
-static int freq_bypass = -1;
-#ifdef CONFIG_CPC45
-static int setup_time = 2;
-static int cmd_time = 6;
-static int recov_time = 1;
-#else
-static int setup_time = -1;
-static int cmd_time = -1;
-static int recov_time = -1;
-#endif
-
-
-#endif /* _LINUX_CIRRUS_H */
diff --git a/include/pcmcia/i82365.h b/include/pcmcia/i82365.h
deleted file mode 100644
index 0b432a80ba..0000000000
--- a/include/pcmcia/i82365.h
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * i82365.h 1.21 2001/08/24 12:15:33
- *
- * The contents of this file are subject to the Mozilla Public License
- * Version 1.1 (the "License"); you may not use this file except in
- * compliance with the License. You may obtain a copy of the License
- * at http://www.mozilla.org/MPL/
- *
- * Software distributed under the License is distributed on an "AS IS"
- * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
- * the License for the specific language governing rights and
- * limitations under the License.
- *
- * The initial developer of the original code is David A. Hinds
- * <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds
- * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.
- *
- * Alternatively, the contents of this file may be used under the
- * terms of the GNU General Public License version 2 (the "GPL"), in
- * which case the provisions of the GPL are applicable instead of the
- * above.  If you wish to allow the use of your version of this file
- * only under the terms of the GPL and not to allow others to use
- * your version of this file under the MPL, indicate your decision by
- * deleting the provisions above and replace them with the notice and
- * other provisions required by the GPL.  If you do not delete the
- * provisions above, a recipient may use your version of this file
- * under either the MPL or the GPL.
- */
-
-#ifndef _LINUX_I82365_H
-#define _LINUX_I82365_H
-
-/* register definitions for the Intel 82365SL PCMCIA controller */
-
-/* Offsets for PCIC registers */
-#define I365_IDENT	0x00	/* Identification and revision */
-#define I365_STATUS	0x01	/* Interface status */
-#define I365_POWER	0x02	/* Power and RESETDRV control */
-#define I365_INTCTL	0x03	/* Interrupt and general control */
-#define I365_CSC	0x04	/* Card status change */
-#define I365_CSCINT	0x05	/* Card status change interrupt control */
-#define I365_ADDRWIN	0x06	/* Address window enable */
-#define I365_IOCTL	0x07	/* I/O control */
-#define I365_GENCTL	0x16	/* Card detect and general control */
-#define I365_GBLCTL	0x1E	/* Global control register */
-
-/* Offsets for I/O and memory window registers */
-#define I365_IO(map)	(0x08+((map)<<2))
-#define I365_MEM(map)	(0x10+((map)<<3))
-#define I365_W_START	0
-#define I365_W_STOP	2
-#define I365_W_OFF	4
-
-/* Flags for I365_STATUS */
-#define I365_CS_BVD1	0x01
-#define I365_CS_STSCHG	0x01
-#define I365_CS_BVD2	0x02
-#define I365_CS_SPKR	0x02
-#define I365_CS_DETECT	0x0C
-#define I365_CS_WRPROT	0x10
-#define I365_CS_READY	0x20	/* Inverted */
-#define I365_CS_POWERON	0x40
-#define I365_CS_GPI	0x80
-
-/* Flags for I365_POWER */
-#define I365_PWR_OFF	0x00	/* Turn off the socket */
-#define I365_PWR_OUT	0x80	/* Output enable */
-#define I365_PWR_NORESET 0x40	/* Disable RESETDRV on resume */
-#define I365_PWR_AUTO	0x20	/* Auto pwr switch enable */
-#define I365_VCC_MASK	0x18	/* Mask for turning off Vcc */
-/* There are different layouts for B-step and DF-step chips: the B
-   step has independent Vpp1/Vpp2 control, and the DF step has only
-   Vpp1 control, plus 3V control */
-#define I365_VCC_5V	0x10	/* Vcc = 5.0v */
-#define I365_VCC_3V	0x18	/* Vcc = 3.3v */
-#define I365_VPP2_MASK	0x0c	/* Mask for turning off Vpp2 */
-#define I365_VPP2_5V	0x04	/* Vpp2 = 5.0v */
-#define I365_VPP2_12V	0x08	/* Vpp2 = 12.0v */
-#define I365_VPP1_MASK	0x03	/* Mask for turning off Vpp1 */
-#define I365_VPP1_5V	0x01	/* Vpp2 = 5.0v */
-#define I365_VPP1_12V	0x02	/* Vpp2 = 12.0v */
-
-/* Flags for I365_INTCTL */
-#define I365_RING_ENA	0x80
-#define I365_PC_RESET	0x40
-#define I365_PC_IOCARD	0x20
-#define I365_INTR_ENA	0x10
-#define I365_IRQ_MASK	0x0F
-
-/* Flags for I365_CSC and I365_CSCINT*/
-#define I365_CSC_BVD1	0x01
-#define I365_CSC_STSCHG	0x01
-#define I365_CSC_BVD2	0x02
-#define I365_CSC_READY	0x04
-#define I365_CSC_DETECT	0x08
-#define I365_CSC_ANY	0x0F
-#define I365_CSC_GPI	0x10
-
-/* Flags for I365_ADDRWIN */
-#define I365_ADDR_MEMCS16	0x20
-#define I365_ENA_IO(map)	(0x40 << (map))
-#define I365_ENA_MEM(map)	(0x01 << (map))
-
-/* Flags for I365_IOCTL */
-#define I365_IOCTL_MASK(map)	(0x0F << (map<<2))
-#define I365_IOCTL_WAIT(map)	(0x08 << (map<<2))
-#define I365_IOCTL_0WS(map)	(0x04 << (map<<2))
-#define I365_IOCTL_IOCS16(map)	(0x02 << (map<<2))
-#define I365_IOCTL_16BIT(map)	(0x01 << (map<<2))
-
-/* Flags for I365_GENCTL */
-#define I365_CTL_16DELAY	0x01
-#define I365_CTL_RESET		0x02
-#define I365_CTL_GPI_ENA	0x04
-#define I365_CTL_GPI_CTL	0x08
-#define I365_CTL_RESUME		0x10
-#define I365_CTL_SW_IRQ		0x20
-
-/* Flags for I365_GBLCTL */
-#define I365_GBL_PWRDOWN	0x01
-#define I365_GBL_CSC_LEV	0x02
-#define I365_GBL_WRBACK		0x04
-#define I365_GBL_IRQ_0_LEV	0x08
-#define I365_GBL_IRQ_1_LEV	0x10
-
-/* Flags for memory window registers */
-#define I365_MEM_16BIT	0x8000	/* In memory start high byte */
-#define I365_MEM_0WS	0x4000
-#define I365_MEM_WS1	0x8000	/* In memory stop high byte */
-#define I365_MEM_WS0	0x4000
-#define I365_MEM_WRPROT	0x8000	/* In offset high byte */
-#define I365_MEM_REG	0x4000
-
-#define I365_REG(slot, reg)	(((slot) << 6) | (reg))
-
-/* Default ISA interrupt mask */
-#define I365_ISA_IRQ_MASK	0xdeb8	/* irq's 3-5,7,9-12,14,15 */
-
-/* Device ID's for PCI-to-PCMCIA bridges */
-
-#ifndef PCI_VENDOR_ID_INTEL
-#define PCI_VENDOR_ID_INTEL		0x8086
-#endif
-#ifndef PCI_DEVICE_ID_INTEL_82092AA_0
-#define PCI_DEVICE_ID_INTEL_82092AA_0	0x1221
-#endif
-#ifndef PCI_VENDOR_ID_OMEGA
-#define PCI_VENDOR_ID_OMEGA		0x119b
-#endif
-#ifndef PCI_DEVICE_ID_OMEGA_82C092G
-#define PCI_DEVICE_ID_OMEGA_82C092G	0x1221
-#endif
-
-#endif /* _LINUX_I82365_H */
diff --git a/include/pcmcia/ss.h b/include/pcmcia/ss.h
deleted file mode 100644
index aafae8a547..0000000000
--- a/include/pcmcia/ss.h
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * ss.h 1.31 2001/08/24 12:16:13
- *
- * The contents of this file are subject to the Mozilla Public License
- * Version 1.1 (the "License"); you may not use this file except in
- * compliance with the License. You may obtain a copy of the License
- * at http://www.mozilla.org/MPL/
- *
- * Software distributed under the License is distributed on an "AS IS"
- * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
- * the License for the specific language governing rights and
- * limitations under the License.
- *
- * The initial developer of the original code is David A. Hinds
- * <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds
- * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.
- *
- * Alternatively, the contents of this file may be used under the
- * terms of the GNU General Public License version 2 (the "GPL"), in
- * which case the provisions of the GPL are applicable instead of the
- * above.  If you wish to allow the use of your version of this file
- * only under the terms of the GPL and not to allow others to use
- * your version of this file under the MPL, indicate your decision by
- * deleting the provisions above and replace them with the notice and
- * other provisions required by the GPL.  If you do not delete the
- * provisions above, a recipient may use your version of this file
- * under either the MPL or the GPL.
- */
-
-#ifndef _LINUX_SS_H
-#define _LINUX_SS_H
-
-/* For RegisterCallback */
-typedef struct ss_callback_t {
-    void	(*handler)(void *info, u_int events);
-    void	*info;
-} ss_callback_t;
-
-/* Definitions for card status flags for GetStatus */
-#define SS_WRPROT	0x0001
-#define SS_CARDLOCK	0x0002
-#define SS_EJECTION	0x0004
-#define SS_INSERTION	0x0008
-#define SS_BATDEAD	0x0010
-#define SS_BATWARN	0x0020
-#define SS_READY	0x0040
-#define SS_DETECT	0x0080
-#define SS_POWERON	0x0100
-#define SS_GPI		0x0200
-#define SS_STSCHG	0x0400
-#define SS_CARDBUS	0x0800
-#define SS_3VCARD	0x1000
-#define SS_XVCARD	0x2000
-#define SS_PENDING	0x4000
-
-/* for InquireSocket */
-typedef struct socket_cap_t {
-    u_int	features;
-    u_int	irq_mask;
-    u_int	map_size;
-    u_char	pci_irq;
-    u_char	cardbus;
-    struct pci_bus *cb_bus;
-    struct bus_operations *bus;
-} socket_cap_t;
-
-/* InquireSocket capabilities */
-#define SS_CAP_PAGE_REGS	0x0001
-#define SS_CAP_VIRTUAL_BUS	0x0002
-#define SS_CAP_MEM_ALIGN	0x0004
-#define SS_CAP_STATIC_MAP	0x0008
-#define SS_CAP_PCCARD		0x4000
-#define SS_CAP_CARDBUS		0x8000
-
-/* for GetSocket, SetSocket */
-typedef struct socket_state_t {
-    u_int	flags;
-    u_int	csc_mask;
-    u_char	Vcc, Vpp;
-    u_char	io_irq;
-} socket_state_t;
-
-/* Socket configuration flags */
-#define SS_PWR_AUTO	0x0010
-#define SS_IOCARD	0x0020
-#define SS_RESET	0x0040
-#define SS_DMA_MODE	0x0080
-#define SS_SPKR_ENA	0x0100
-#define SS_OUTPUT_ENA	0x0200
-#define SS_ZVCARD	0x0400
-
-/* Flags for I/O port and memory windows */
-#define MAP_ACTIVE	0x01
-#define MAP_16BIT	0x02
-#define MAP_AUTOSZ	0x04
-#define MAP_0WS		0x08
-#define MAP_WRPROT	0x10
-#define MAP_ATTRIB	0x20
-#define MAP_USE_WAIT	0x40
-#define MAP_PREFETCH	0x80
-
-/* Use this just for bridge windows */
-#define MAP_IOSPACE	0x20
-
-typedef struct pccard_io_map {
-    u_char	map;
-    u_char	flags;
-    u_short	speed;
-    u_short	start, stop;
-} pccard_io_map;
-
-typedef struct pccard_mem_map {
-    u_char	map;
-    u_char	flags;
-    u_short	speed;
-    u_long	sys_start, sys_stop;
-    u_int	card_start;
-} pccard_mem_map;
-
-typedef struct cb_bridge_map {
-    u_char	map;
-    u_char	flags;
-    u_int	start, stop;
-} cb_bridge_map;
-
-enum ss_service {
-    SS_RegisterCallback, SS_InquireSocket,
-    SS_GetStatus, SS_GetSocket, SS_SetSocket,
-    SS_GetIOMap, SS_SetIOMap, SS_GetMemMap, SS_SetMemMap,
-    SS_GetBridge, SS_SetBridge, SS_ProcSetup
-};
-
-#endif /* _LINUX_SS_H */
diff --git a/include/pcmcia/ti113x.h b/include/pcmcia/ti113x.h
deleted file mode 100644
index 5453588d0c..0000000000
--- a/include/pcmcia/ti113x.h
+++ /dev/null
@@ -1,234 +0,0 @@
-/*
- * ti113x.h 1.31 2002/05/12 18:19:47
- *
- * The contents of this file are subject to the Mozilla Public License
- * Version 1.1 (the "License"); you may not use this file except in
- * compliance with the License. You may obtain a copy of the License
- * at http://www.mozilla.org/MPL/
- *
- * Software distributed under the License is distributed on an "AS IS"
- * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
- * the License for the specific language governing rights and
- * limitations under the License.
- *
- * The initial developer of the original code is David A. Hinds
- * <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds
- * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.
- *
- * Alternatively, the contents of this file may be used under the
- * terms of the GNU General Public License version 2 (the "GPL"), in
- * which case the provisions of the GPL are applicable instead of the
- * above.  If you wish to allow the use of your version of this file
- * only under the terms of the GPL and not to allow others to use
- * your version of this file under the MPL, indicate your decision by
- * deleting the provisions above and replace them with the notice and
- * other provisions required by the GPL.  If you do not delete the
- * provisions above, a recipient may use your version of this file
- * under either the MPL or the GPL.
- */
-
-#ifndef _LINUX_TI113X_H
-#define _LINUX_TI113X_H
-
-#ifndef PCI_VENDOR_ID_TI
-#define PCI_VENDOR_ID_TI		0x104c
-#endif
-
-#ifndef PCI_DEVICE_ID_TI_1130
-#define PCI_DEVICE_ID_TI_1130		0xac12
-#endif
-#ifndef PCI_DEVICE_ID_TI_1031
-#define PCI_DEVICE_ID_TI_1031		0xac13
-#endif
-#ifndef PCI_DEVICE_ID_TI_1131
-#define PCI_DEVICE_ID_TI_1131		0xac15
-#endif
-#ifndef PCI_DEVICE_ID_TI_1210
-#define PCI_DEVICE_ID_TI_1210		0xac1a
-#endif
-#ifndef PCI_DEVICE_ID_TI_1211
-#define PCI_DEVICE_ID_TI_1211		0xac1e
-#endif
-#ifndef PCI_DEVICE_ID_TI_1220
-#define PCI_DEVICE_ID_TI_1220		0xac17
-#endif
-#ifndef PCI_DEVICE_ID_TI_1221
-#define PCI_DEVICE_ID_TI_1221		0xac19
-#endif
-#ifndef PCI_DEVICE_ID_TI_1250A
-#define PCI_DEVICE_ID_TI_1250A		0xac16
-#endif
-#ifndef PCI_DEVICE_ID_TI_1225
-#define PCI_DEVICE_ID_TI_1225		0xac1c
-#endif
-#ifndef PCI_DEVICE_ID_TI_1251A
-#define PCI_DEVICE_ID_TI_1251A		0xac1d
-#endif
-#ifndef PCI_DEVICE_ID_TI_1251B
-#define PCI_DEVICE_ID_TI_1251B		0xac1f
-#endif
-#ifndef PCI_DEVICE_ID_TI_1410
-#define PCI_DEVICE_ID_TI_1410		0xac50
-#endif
-#ifndef PCI_DEVICE_ID_TI_1420
-#define PCI_DEVICE_ID_TI_1420		0xac51
-#endif
-#ifndef PCI_DEVICE_ID_TI_1450
-#define PCI_DEVICE_ID_TI_1450		0xac1b
-#endif
-#ifndef PCI_DEVICE_ID_TI_1451
-#define PCI_DEVICE_ID_TI_1451		0xac52
-#endif
-#ifndef PCI_DEVICE_ID_TI_1510
-#define PCI_DEVICE_ID_TI_1510		0xac56
-#endif
-#ifndef PCI_DEVICE_ID_TI_4410
-#define PCI_DEVICE_ID_TI_4410		0xac41
-#endif
-#ifndef PCI_DEVICE_ID_TI_4450
-#define PCI_DEVICE_ID_TI_4450		0xac40
-#endif
-#ifndef PCI_DEVICE_ID_TI_4451
-#define PCI_DEVICE_ID_TI_4451		0xac42
-#endif
-
-/* Register definitions for TI 113X PCI-to-CardBus bridges */
-
-/* System Control Register */
-#define TI113X_SYSTEM_CONTROL		0x80	/* 32 bit */
-#define  TI113X_SCR_SMIROUTE		0x04000000
-#define  TI113X_SCR_SMISTATUS		0x02000000
-#define  TI113X_SCR_SMIENB		0x01000000
-#define  TI113X_SCR_VCCPROT		0x00200000
-#define  TI113X_SCR_REDUCEZV		0x00100000
-#define  TI113X_SCR_CDREQEN		0x00080000
-#define  TI113X_SCR_CDMACHAN		0x00070000
-#define  TI113X_SCR_SOCACTIVE		0x00002000
-#define  TI113X_SCR_PWRSTREAM		0x00000800
-#define  TI113X_SCR_DELAYUP		0x00000400
-#define  TI113X_SCR_DELAYDOWN		0x00000200
-#define  TI113X_SCR_INTERROGATE		0x00000100
-#define  TI113X_SCR_CLKRUN_SEL		0x00000080
-#define  TI113X_SCR_PWRSAVINGS		0x00000040
-#define  TI113X_SCR_SUBSYSRW		0x00000020
-#define  TI113X_SCR_CB_DPAR		0x00000010
-#define  TI113X_SCR_CDMA_EN		0x00000008
-#define  TI113X_SCR_ASYNC_IRQ		0x00000004
-#define  TI113X_SCR_KEEPCLK		0x00000002
-#define  TI113X_SCR_CLKRUN_ENA		0x00000001
-
-#define  TI122X_SCR_SER_STEP		0xc0000000
-#define  TI122X_SCR_INTRTIE		0x20000000
-#define  TI122X_SCR_P2CCLK		0x08000000
-#define  TI122X_SCR_CBRSVD		0x00400000
-#define  TI122X_SCR_MRBURSTDN		0x00008000
-#define  TI122X_SCR_MRBURSTUP		0x00004000
-#define  TI122X_SCR_RIMUX		0x00000001
-
-/* Multimedia Control Register */
-#define TI1250_MULTIMEDIA_CTL		0x84	/* 8 bit */
-#define  TI1250_MMC_ZVOUTEN		0x80
-#define  TI1250_MMC_PORTSEL		0x40
-#define  TI1250_MMC_ZVEN1		0x02
-#define  TI1250_MMC_ZVEN0		0x01
-
-#define TI1250_GENERAL_STATUS		0x85	/* 8 bit */
-#define TI1250_GPIO0_CONTROL		0x88	/* 8 bit */
-#define TI1250_GPIO1_CONTROL		0x89	/* 8 bit */
-#define TI1250_GPIO2_CONTROL		0x8a	/* 8 bit */
-#define TI1250_GPIO3_CONTROL		0x8b	/* 8 bit */
-#define TI12XX_IRQMUX			0x8c	/* 32 bit */
-
-/* Retry Status Register */
-#define TI113X_RETRY_STATUS		0x90	/* 8 bit */
-#define  TI113X_RSR_PCIRETRY		0x80
-#define  TI113X_RSR_CBRETRY		0x40
-#define  TI113X_RSR_TEXP_CBB		0x20
-#define  TI113X_RSR_MEXP_CBB		0x10
-#define  TI113X_RSR_TEXP_CBA		0x08
-#define  TI113X_RSR_MEXP_CBA		0x04
-#define  TI113X_RSR_TEXP_PCI		0x02
-#define  TI113X_RSR_MEXP_PCI		0x01
-
-/* Card Control Register */
-#define TI113X_CARD_CONTROL		0x91	/* 8 bit */
-#define  TI113X_CCR_RIENB		0x80
-#define  TI113X_CCR_ZVENABLE		0x40
-#define  TI113X_CCR_PCI_IRQ_ENA		0x20
-#define  TI113X_CCR_PCI_IREQ		0x10
-#define  TI113X_CCR_PCI_CSC		0x08
-#define  TI113X_CCR_SPKROUTEN		0x02
-#define  TI113X_CCR_IFG			0x01
-
-#define  TI1220_CCR_PORT_SEL		0x20
-#define  TI122X_CCR_AUD2MUX		0x04
-
-/* Device Control Register */
-#define TI113X_DEVICE_CONTROL		0x92	/* 8 bit */
-#define  TI113X_DCR_5V_FORCE		0x40
-#define  TI113X_DCR_3V_FORCE		0x20
-#define  TI113X_DCR_IMODE_MASK		0x06
-#define  TI113X_DCR_IMODE_ISA		0x02
-#define  TI113X_DCR_IMODE_SERIAL	0x04
-
-#define  TI12XX_DCR_IMODE_PCI_ONLY	0x00
-#define  TI12XX_DCR_IMODE_ALL_SERIAL	0x06
-
-/* Buffer Control Register */
-#define TI113X_BUFFER_CONTROL		0x93	/* 8 bit */
-#define  TI113X_BCR_CB_READ_DEPTH	0x08
-#define  TI113X_BCR_CB_WRITE_DEPTH	0x04
-#define  TI113X_BCR_PCI_READ_DEPTH	0x02
-#define  TI113X_BCR_PCI_WRITE_DEPTH	0x01
-
-/* Diagnostic Register */
-#define TI1250_DIAGNOSTIC		0x93	/* 8 bit */
-#define  TI1250_DIAG_TRUE_VALUE		0x80
-#define  TI1250_DIAG_PCI_IREQ		0x40
-#define  TI1250_DIAG_PCI_CSC		0x20
-#define  TI1250_DIAG_ASYNC_CSC		0x01
-
-/* DMA Registers */
-#define TI113X_DMA_0			0x94	/* 32 bit */
-#define TI113X_DMA_1			0x98	/* 32 bit */
-
-/* ExCA IO offset registers */
-#define TI113X_IO_OFFSET(map)		(0x36+((map)<<1))
-
-/* Data structure for tracking vendor-specific state */
-typedef struct ti113x_state_t {
-    u32			sysctl;		/* TI113X_SYSTEM_CONTROL */
-    u8			cardctl;	/* TI113X_CARD_CONTROL */
-    u8			devctl;		/* TI113X_DEVICE_CONTROL */
-    u8			diag;		/* TI1250_DIAGNOSTIC */
-    u32			irqmux;		/* TI12XX_IRQMUX */
-} ti113x_state_t;
-
-#define TI_PCIC_ID \
-    IS_TI1130, IS_TI1131, IS_TI1031, IS_TI1210, IS_TI1211,	\
-    IS_TI1220, IS_TI1221, IS_TI1225, IS_TI1250A, IS_TI1251A,	\
-    IS_TI1251B, IS_TI1410, IS_TI1420, IS_TI1450, IS_TI1451,	\
-    IS_TI1510, IS_TI4410, IS_TI4450, IS_TI4451
-
-#define TI_PCIC_INFO \
-    { "TI 1130",  IS_TI|IS_CARDBUS, ID(TI, 1130) }, \
-    { "TI 1131",  IS_TI|IS_CARDBUS, ID(TI, 1131) }, \
-    { "TI 1031",  IS_TI|IS_CARDBUS, ID(TI, 1031) }, \
-    { "TI 1210",  IS_TI|IS_CARDBUS, ID(TI, 1210) }, \
-    { "TI 1211",  IS_TI|IS_CARDBUS, ID(TI, 1211) }, \
-    { "TI 1220",  IS_TI|IS_CARDBUS, ID(TI, 1220) }, \
-    { "TI 1221",  IS_TI|IS_CARDBUS, ID(TI, 1221) }, \
-    { "TI 1225",  IS_TI|IS_CARDBUS, ID(TI, 1225) }, \
-    { "TI 1250A", IS_TI|IS_CARDBUS, ID(TI, 1250A) }, \
-    { "TI 1251A", IS_TI|IS_CARDBUS, ID(TI, 1251A) }, \
-    { "TI 1251B", IS_TI|IS_CARDBUS, ID(TI, 1251B) }, \
-    { "TI 1410",  IS_TI|IS_CARDBUS, ID(TI, 1410) }, \
-    { "TI 1420",  IS_TI|IS_CARDBUS, ID(TI, 1420) }, \
-    { "TI 1450",  IS_TI|IS_CARDBUS, ID(TI, 1450) }, \
-    { "TI 1451",  IS_TI|IS_CARDBUS, ID(TI, 1451) }, \
-    { "TI 1510",  IS_TI|IS_CARDBUS, ID(TI, 1510) }, \
-    { "TI 4410",  IS_TI|IS_CARDBUS, ID(TI, 4410) }, \
-    { "TI 4450",  IS_TI|IS_CARDBUS, ID(TI, 4450) }, \
-    { "TI 4451",  IS_TI|IS_CARDBUS, ID(TI, 4451) }
-
-#endif /* _LINUX_TI113X_H */