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| author | Wolfgang Denk <wd@denx.de> | 2007-06-22 23:59:00 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2007-06-22 23:59:00 +0200 |
| commit | 1636d1c8529c006d106287cfbc20cd0a246fe1cb (patch) | |
| tree | cd39e784361c2bcef43cfc38d39b1670ce22d539 /include/mpc8260.h | |
| parent | 2dc64451b4c08ffd619372abfdc2506a2e2363b9 (diff) | |
| download | blackbird-obmc-uboot-1636d1c8529c006d106287cfbc20cd0a246fe1cb.tar.gz blackbird-obmc-uboot-1636d1c8529c006d106287cfbc20cd0a246fe1cb.zip | |
Coding stylke cleanup; rebuild CHANGELOG
Diffstat (limited to 'include/mpc8260.h')
| -rw-r--r-- | include/mpc8260.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/include/mpc8260.h b/include/mpc8260.h index b61218ccc2..052529409a 100644 --- a/include/mpc8260.h +++ b/include/mpc8260.h @@ -664,7 +664,7 @@ #define PSDMR_CL_3 0x00000003 /* CAS Latency = 3 */ /*----------------------------------------------------------------------- - * LSDMR - Local Bus SDRAM Mode Register 10-24 + * LSDMR - Local Bus SDRAM Mode Register 10-24 */ /* @@ -707,23 +707,23 @@ /*----------------------------------------------------------------------- * TMR1-TMR4 - Timer Mode Registers 17-6 */ -#define TMRx_PS_MSK 0xff00 /* Prescaler Value */ +#define TMRx_PS_MSK 0xff00 /* Prescaler Value */ #define TMRx_CE_MSK 0x00c0 /* Capture Edge and Enable Interrupt*/ -#define TMRx_OM 0x0020 /* Output Mode */ +#define TMRx_OM 0x0020 /* Output Mode */ #define TMRx_ORI 0x0010 /* Output Reference Interrupt Enable*/ -#define TMRx_FRR 0x0008 /* Free Run/Restart */ +#define TMRx_FRR 0x0008 /* Free Run/Restart */ #define TMRx_ICLK_MSK 0x0006 /* Timer Input Clock Source mask */ -#define TMRx_GE 0x0001 /* Gate Enable */ +#define TMRx_GE 0x0001 /* Gate Enable */ #define TMRx_CE_INTR_DIS 0x0000 /* Disable Interrupt on capture event*/ #define TMRx_CE_RISING 0x0040 /* Capture on Rising TINx edge only */ #define TMRx_CE_FALLING 0x0080 /* Capture on Falling TINx edge only */ -#define TMRx_CE_ANY 0x00c0 /* Capture on any TINx edge */ +#define TMRx_CE_ANY 0x00c0 /* Capture on any TINx edge */ -#define TMRx_ICLK_IN_CAS 0x0000 /* Internally cascaded input */ +#define TMRx_ICLK_IN_CAS 0x0000 /* Internally cascaded input */ #define TMRx_ICLK_IN_GEN 0x0002 /* Internal General system clock*/ #define TMRx_ICLK_IN_GEN_DIV16 0x0004 /* Internal General system clk div 16*/ -#define TMRx_ICLK_TIN_PIN 0x0006 /* TINx pin */ +#define TMRx_ICLK_TIN_PIN 0x0006 /* TINx pin */ /*----------------------------------------------------------------------- |
