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authorDave Liu <daveliu@freescale.com>2009-03-14 12:48:30 +0800
committerKumar Gala <galak@kernel.crashing.org>2009-03-30 13:33:50 -0500
commitc360ceac0286159f94d9d1a9496fc9858c8d9bec (patch)
treefdd1868af478993fdb547171665c5c517ee6c071 /include/ddr_spd.h
parent6a8197836702991468cead5ead073f589e2623ad (diff)
downloadblackbird-obmc-uboot-c360ceac0286159f94d9d1a9496fc9858c8d9bec.tar.gz
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fsl-ddr: add the DDR3 SPD infrastructure
- support mirrored DIMMs, not support register DIMMs - test passed on P2020DS board with MT9JSF12872AY-1G1D1 - test passed on MPC8569MDS board with MT8JSF12864HY-1G1D1 Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com>
Diffstat (limited to 'include/ddr_spd.h')
-rw-r--r--include/ddr_spd.h13
1 files changed, 12 insertions, 1 deletions
diff --git a/include/ddr_spd.h b/include/ddr_spd.h
index 6fdcef0c0a..10402c5bbb 100644
--- a/include/ddr_spd.h
+++ b/include/ddr_spd.h
@@ -184,7 +184,7 @@ typedef struct ddr3_spd_eeprom_s {
unsigned char module_type; /* 3 Key Byte / Module Type */
unsigned char density_banks; /* 4 SDRAM Density and Banks */
unsigned char addressing; /* 5 SDRAM Addressing */
- unsigned char res_6; /* 6 Reserved */
+ unsigned char module_vdd; /* 6 Module nominal voltage, VDD */
unsigned char organization; /* 7 Module Organization */
unsigned char bus_width; /* 8 Module Memory Bus Width */
unsigned char ftb_div; /* 9 Fine Timebase (FTB)
@@ -273,6 +273,7 @@ extern unsigned int ddr1_spd_check(const ddr1_spd_eeprom_t *spd);
extern void ddr1_spd_dump(const ddr1_spd_eeprom_t *spd);
extern unsigned int ddr2_spd_check(const ddr2_spd_eeprom_t *spd);
extern void ddr2_spd_dump(const ddr2_spd_eeprom_t *spd);
+extern unsigned int ddr3_spd_check(const ddr3_spd_eeprom_t *spd);
/*
* Byte 2 Fundamental Memory Types.
@@ -289,4 +290,14 @@ extern void ddr2_spd_dump(const ddr2_spd_eeprom_t *spd);
#define SPD_MEMTYPE_DDR2_FBDIMM_PROBE (0x0A)
#define SPD_MEMTYPE_DDR3 (0x0B)
+/*
+ * Byte 3 Key Byte / Module Type for DDR3 SPD
+ */
+#define SPD_MODULETYPE_RDIMM (0x01)
+#define SPD_MODULETYPE_UDIMM (0x02)
+#define SPD_MODULETYPE_SODIMM (0x03)
+#define SPD_MODULETYPE_MICRODIMM (0x04)
+#define SPD_MODULETYPE_MINIRDIMM (0x05)
+#define SPD_MODULETYPE_MINIUDIMM (0x06)
+
#endif /* _DDR_SPD_H_ */
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