* Add support for Promess ATC board

* Patch by Keith Outwater, 28 Apr 2003:
  - Miscellaneous corrections and additions to GEN860T board specific code.
  - Added GEN860_SC variant to GEN860T.
  - Miscellaneous corrections to GEN860T documentation.
  - Correct duplicate entry in U-Boot CREDITS file.
  - Add GEN860T_SC entry in MAINTAINERS file.
  - Update CREDITS file with GEN860T_SC info.

* Update Smiths Aerospace addresses in MAINTAINERS file

* Fix error handling in hush's version of "run" command

1 files changed, 84 insertions, 35 deletions

diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h
index 29e4807ea2..47a87862c2 100644
--- a/include/configs/GEN860T.h
+++ b/include/configs/GEN860T.h
@@ -38,14 +38,22 @@
 /*
  * Identify the board
  */
-#define CONFIG_IDENT_STRING				" GEN860T"
+#if !defined(CONFIG_SC)
+#define CONFIG_IDENT_STRING				" B2"
+#else
+#define CONFIG_IDENT_STRING				" SC"
+#endif
 
 /*
  * Don't depend on the RTC clock to determine clock frequency -
  * the 860's internal rtc uses a 32.768 KHz clock which is
  * generated by the DS1337 - and the DS1337 clock can be turned off.
  */
-#define	CONFIG_8xx_GCLK_FREQ			66600000
+#if !defined(CONFIG_SC)
+#define	CONFIG_8xx_GCLK_FREQ			66600000 
+#else
+#define	CONFIG_8xx_GCLK_FREQ			48000000
+#endif
 
 /*
  * The RS-232 console port is on SMC1
@@ -143,7 +151,7 @@
  * environment so that we can autoscript the full default environment.
  */
 #define CONFIG_ETHADDR					9a:52:63:15:85:25
-#define CONFIG_SERVERIP					10.0.4.200
+#define CONFIG_SERVERIP					10.0.4.201
 #define CONFIG_IPADDR					10.0.4.111
 
 /*
@@ -156,17 +164,20 @@
 #define	CFG_I2C_EEPROM_ADDR_LEN			2		/* need 16 bit address	*/
 #define CFG_ENV_EEPROM_SIZE				(32 * 1024)
 
-#undef	CONFIG_HARD_I2C
-#define CONFIG_SOFT_I2C
-
 /*
- * Configure software I2C support (taken from IP860 BSP).
- * The I2C bus is connected to the GEN860T's 'dedicated' I2C
- * pins, i.e. PB26 and PB27
+ * Enable I2C and select the hardware/software driver
  */
+#define CONFIG_HARD_I2C		1				/* CPM based I2C			*/
+#undef	CONFIG_SOFT_I2C        				/* Bit-banged I2C			*/
+
+#ifdef CONFIG_HARD_I2C
+#define	CFG_I2C_SPEED		100000			/* clock speed in Hz		*/
+#define CFG_I2C_SLAVE		0xFE			/* I2C slave address		*/
+#endif
+
+#ifdef CONFIG_SOFT_I2C
 #define PB_SCL				0x00000020		/* PB 26					*/
 #define PB_SDA				0x00000010		/* PB 27 					*/
-
 #define I2C_INIT			(immr->im_cpm.cp_pbdir |=  PB_SCL)
 #define I2C_ACTIVE			(immr->im_cpm.cp_pbdir |=  PB_SDA)
 #define I2C_TRISTATE		(immr->im_cpm.cp_pbdir &= ~PB_SDA)
@@ -176,15 +187,14 @@
 #define I2C_SCL(bit)		if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \
 								else    immr->im_cpm.cp_pbdat &= ~PB_SCL
 #define I2C_DELAY			udelay(5)		/* 1/4 I2C clock duration	*/
-
-#define	CFG_I2C_SPEED		100000			/* clock speed in Hz		*/
-#define CFG_I2C_SLAVE		0xFE			/* I2C slave address		*/
+#endif
 
 /*
  * Allow environment overwrites by anyone
  */
 #define CONFIG_ENV_OVERWRITE
 
+#if !defined(CONFIG_SC)
 /*
  * The MPC860's internal RTC is horribly broken in rev D masks. Three
  * internal MPC860T circuit nodes were inadvertently left floating; this
@@ -193,35 +203,55 @@
  * reasonable battery can keep that kind RTC running during powerdown for any
  * length of time, so we use an external RTC on the I2C bus instead.
  */
-#undef	CONFIG_RTC_MPC8xx
 #define CONFIG_RTC_DS1337
-#define CFG_I2C_RTC_ADDR				0x68
+#define CFG_I2C_RTC_ADDR				0x68 
 
+#else
 /*
- * Allow partial commands to be matched to uniqueness.
+ * No external RTC on SC variant, so we're stuck with the internal one.
  */
-#define CFG_MATCH_PARTIAL_CMD
+#define	CONFIG_RTC_MPC8xx
+#endif
+
+/*
+ * Power On Self Test support
+ */
+#define CONFIG_POST			  ( CFG_POST_CACHE		| \
+								CFG_POST_MEMORY		| \
+								CFG_POST_CPU		| \
+								CFG_POST_UART		| \
+								CFG_POST_SPR )
+
+#ifdef CONFIG_POST
+#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
+#else
+#define CFG_CMD_POST_DIAG		0
+#endif
 
 /*
  * List of available monitor commands.  Use the system default list
  * plus add some of the "non-standard" commands back in.
  * See ./cmd_confdefs.h
  */
-#define CONFIG_COMMANDS	      ( CONFIG_CMD_DFL	| \
+#define BASE_CONFIG_COMMANDS	( CONFIG_CMD_DFL	| \
 								CFG_CMD_ASKENV	| \
 								CFG_CMD_DHCP	| \
 								CFG_CMD_I2C		| \
-								CFG_CMD_DOC		| \
 								CFG_CMD_EEPROM	| \
 								CFG_CMD_REGINFO	| \
 								CFG_CMD_IMMAP	| \
 								CFG_CMD_ELF		| \
 								CFG_CMD_DATE	| \
-								CFG_CMD_DATE	| \
 								CFG_CMD_FPGA	| \
 								CFG_CMD_MII 	| \
-								CFG_CMD_BEDBUG	\
-						      )
+								CFG_CMD_BEDBUG	| \
+								CFG_CMD_POST_DIAG )
+
+#if !defined(CONFIG_SC)
+#define	CONFIG_COMMANDS ( BASE_CONFIG_COMMANDS | CFG_CMD_DOC ) 
+#else
+#define CONFIG_COMMANDS	BASE_CONFIG_COMMANDS
+#endif
 
 /*
  * There is no IDE/PCMCIA hardware support on the board.
@@ -258,7 +288,12 @@
  * Verbose help from command monitor.
  */
 #define	CFG_LONGHELP
-#define	CFG_PROMPT			"gen860t> "
+#if !defined(CONFIG_SC)
+#define	CFG_PROMPT			"B2> "
+#else
+#define	CFG_PROMPT			"SC> "
+#endif
+
 
 /*
  * Use the "hush" command parser
@@ -393,15 +428,9 @@
 /*
  * Reserve memory for U-Boot.
  */
-#define CFG_MAX_U_BOOT_SECT	3
-
-#if defined(DEBUG)
-#define	CFG_MONITOR_LEN		(512 * 1024)
-#else
-#define	CFG_MONITOR_LEN		(256 * 1024)
-#endif
-
-#define CFG_MONITOR_BASE	CFG_FLASH_BASE
+#define CFG_MAX_UBOOT_SECTS		4
+#define	CFG_MONITOR_LEN			(CFG_MAX_UBOOT_SECTS * CFG_FLASH_SECT_SIZE)
+#define CFG_MONITOR_BASE		CFG_FLASH_BASE
 
 /*
  * Select environment placement.  NOTE that u-boot.lds must
@@ -414,8 +443,14 @@
 #define CFG_ENV_SIZE			(2 * 1024)
 #define CFG_ENV_OFFSET			(CFG_ENV_EEPROM_SIZE - (8 * 1024))
 #else
-#define CFG_ENV_SIZE			(4 * 1024)
-#define CFG_ENV_OFFSET			(CFG_MAX_U_BOOT_SECT * CFG_FLASH_SECT_SIZE)
+#define CFG_ENV_SIZE			0x1000
+#define CFG_ENV_SECT_SIZE		CFG_FLASH_SECT_SIZE
+
+/*
+ * This ultimately gets passed right into the linker script, so we have to
+ * use a number :(
+ */
+#define CFG_ENV_OFFSET			0x060000
 #endif
 
 /*
@@ -439,7 +474,7 @@
 #endif
 
 /*------------------------------------------------------------------------
- * SYPCR - System Protection Control				UM 11-9
+ * SYPCR - System Protection Control							UM 11-9
  * -----------------------------------------------------------------------
  * SYPCR can only be written once after reset!
  *
@@ -523,6 +558,7 @@
  */
 #define SCCR_MASK   SCCR_EBDF11
 
+#if !defined(CONFIG_SC)
 #define CFG_SCCR	( SCCR_TBS			| 	/* timebase = GCLK/2	*/ \
 					  SCCR_COM00   		| 	/* full strength CLKOUT	*/ \
 					  SCCR_DFSYNC00 	| 	/* SYNCLK / 1 (normal)	*/ \
@@ -530,6 +566,17 @@
 					  SCCR_DFNL000		| \
 					  SCCR_DFNH000		  \
 					)
+#else
+#define CFG_SCCR	( SCCR_TBS			| 	/* timebase = GCLK/2	*/ \
+					  SCCR_COM00   		| 	/* full strength CLKOUT	*/ \
+					  SCCR_DFSYNC00 	| 	/* SYNCLK / 1 (normal)	*/ \
+					  SCCR_DFBRG00		| 	/* BRGCLK / 1 (normal)	*/ \
+					  SCCR_DFNL000		| \
+					  SCCR_DFNH000		| \
+					  SCCR_RTDIV		| \
+					  SCCR_RTSEL		  \
+					)
+#endif
 
 /*-----------------------------------------------------------------------
  * DER - Debug Enable Register									UM 37-46
@@ -695,10 +742,12 @@
 /*
  * Disk On Chip (millenium) configuration
  */
+#if !defined(CONFIG_SC)
 #define CFG_MAX_DOC_DEVICE	1
 #undef	CFG_DOC_SUPPORT_2000
 #define CFG_DOC_SUPPORT_MILLENNIUM
 #undef	CFG_DOC_PASSIVE_PROBE
+#endif
 
 /*
  * FEC interrupt assignment