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| author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2014-02-04 17:24:24 +0900 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-02-19 11:07:50 -0500 |
| commit | 9e4140329ee9a787d0f96ac2829d618d47f7973f (patch) | |
| tree | 6a40432f6f6723ba9ac5309076af17aec3bc0a9b /examples/api/Makefile | |
| parent | d958002589cb724907e8d4360d546403d1e6b7d8 (diff) | |
| download | blackbird-obmc-uboot-9e4140329ee9a787d0f96ac2829d618d47f7973f.tar.gz blackbird-obmc-uboot-9e4140329ee9a787d0f96ac2829d618d47f7973f.zip | |
kbuild: change out-of-tree build
This commit changes the working directory
where the build process occurs.
Before this commit, build process occurred under the source
tree for both in-tree and out-of-tree build.
That's why we needed to add $(obj) prefix to all generated
files in makefiles like follows:
$(obj)u-boot.bin: $(obj)u-boot
Here, $(obj) is empty for in-tree build, whereas it points
to the output directory for out-of-tree build.
And our old build system changes the current working directory
with "make -C <sub-dir>" syntax when descending into the
sub-directories.
On the other hand, Kbuild uses a different idea
to handle out-of-tree build and directory descending.
The build process of Kbuild always occurs under the output tree.
When "O=dir/to/store/output/files" is given, the build system
changes the current working directory to that directory and
restarts the make.
Kbuild uses "make -f $(srctree)/scripts/Makefile.build obj=<sub-dir>"
syntax for descending into sub-directories.
(We can write it like "make $(obj)=<sub-dir>" with a shorthand.)
This means the current working directory is always the top
of the output directory.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Gerhard Sittig <gsi@denx.de>
Diffstat (limited to 'examples/api/Makefile')
| -rw-r--r-- | examples/api/Makefile | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/examples/api/Makefile b/examples/api/Makefile index ee3c487c13..db0bb34afe 100644 --- a/examples/api/Makefile +++ b/examples/api/Makefile @@ -40,23 +40,23 @@ SRCS += $(addprefix $(SRCTREE)/examples/api/,$(COBJ_FILES-y:.o=.c)) SRCS += $(addprefix $(SRCTREE)/examples/api/,$(SOBJ_FILES-y:.o=.S)) # Create a list of object files to be compiled -OBJS += $(addprefix $(obj),$(SOBJ_FILES-y)) -OBJS += $(addprefix $(obj),$(COBJ_FILES-y)) -OBJS += $(addprefix $(obj),$(notdir $(EXT_COBJ_FILES-y))) -OBJS += $(addprefix $(obj),$(notdir $(EXT_SOBJ_FILES-y))) +OBJS += $(addprefix $(obj)/,$(SOBJ_FILES-y)) +OBJS += $(addprefix $(obj)/,$(COBJ_FILES-y)) +OBJS += $(addprefix $(obj)/,$(notdir $(EXT_COBJ_FILES-y))) +OBJS += $(addprefix $(obj)/,$(notdir $(EXT_SOBJ_FILES-y))) ######################################################################### -$(obj)demo: $(OBJS) +$(obj)/demo: $(OBJS) $(LD) --gc-sections -Ttext $(LOAD_ADDR) -o $@ $^ $(PLATFORM_LIBS) -$(obj)demo.bin: $(obj)demo +$(obj)/demo.bin: $(obj)/demo $(OBJCOPY) -O binary $< $@ 2>/dev/null # Rule to build generic library C files -$(addprefix $(obj),$(notdir $(EXT_COBJ_FILES-y))): $(obj)%.o: $(SRCTREE)/lib/%.c +$(addprefix $(obj)/,$(notdir $(EXT_COBJ_FILES-y))): $(obj)/%.o: $(SRCTREE)/lib/%.c $(CC) -g $(CFLAGS) -c -o $@ $< # Rule to build architecture-specific library assembly files -$(addprefix $(obj),$(notdir $(EXT_SOBJ_FILES-y))): $(obj)%.o: $(SRCTREE)/arch/$(ARCH)/lib/%.S +$(addprefix $(obj)/,$(notdir $(EXT_SOBJ_FILES-y))): $(obj)/%.o: $(SRCTREE)/arch/$(ARCH)/lib/%.S $(CC) -g $(CFLAGS) -c -o $@ $< |
