diff options
| author | Simon Glass <sjg@chromium.org> | 2015-08-30 16:55:15 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-09-02 21:28:23 -0600 |
| commit | e3563f2ec768fb989149362ca0c6ca4a27513924 (patch) | |
| tree | 0465a7e400294775fd034079802fccd82a1942ff /drivers | |
| parent | 6a436c9182a90551739a5b7b3f44254234056915 (diff) | |
| download | blackbird-obmc-uboot-e3563f2ec768fb989149362ca0c6ca4a27513924.tar.gz blackbird-obmc-uboot-e3563f2ec768fb989149362ca0c6ca4a27513924.zip | |
mmc: Support bypass mode with the get_mmc_clk() method
Some SoCs want to adjust the input clock to the DWMMC block as a way of
controlling the MMC bus clock. Update the get_mmc_clk() method to support
this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mmc/dw_mmc.c | 2 | ||||
| -rw-r--r-- | drivers/mmc/exynos_dw_mmc.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 77b87e0365..1117fedefe 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -266,7 +266,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) * host->bus_hz should be set by user. */ if (host->get_mmc_clk) - sclk = host->get_mmc_clk(host); + sclk = host->get_mmc_clk(host, freq); else if (host->bus_hz) sclk = host->bus_hz; else { diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index cde2ba7118..863bbb3f64 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -39,7 +39,7 @@ static void exynos_dwmci_clksel(struct dwmci_host *host) dwmci_writel(host, DWMCI_CLKSEL, priv->sdr_timing); } -unsigned int exynos_dwmci_get_clk(struct dwmci_host *host) +unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) { unsigned long sclk; int8_t clk_div; |
