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| author | Andy Fleming <afleming@freescale.com> | 2007-04-23 02:54:25 -0500 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2007-05-02 15:50:02 -0500 |
| commit | 6743105988fc44d5b0d30388c790607835aae7a6 (patch) | |
| tree | 8019f750a917717ba0df89b9db6c746548cfa782 /cpu | |
| parent | af1c2b84bf27c8565baddc82d1abb93700d10e2e (diff) | |
| download | blackbird-obmc-uboot-6743105988fc44d5b0d30388c790607835aae7a6.tar.gz blackbird-obmc-uboot-6743105988fc44d5b0d30388c790607835aae7a6.zip | |
Add support for the 8568 MDS board
This included some changes to common files:
* Add 8568 processor SVR to various places
* Add support for setting the qe bus-frequency value in the dts
* Add the 8568MDS target to the Makefile
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/mpc85xx/cpu.c | 7 | ||||
| -rw-r--r-- | cpu/mpc85xx/cpu_init.c | 2 |
2 files changed, 7 insertions, 2 deletions
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index d5102dfddf..63176d2841 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -76,6 +76,9 @@ int checkcpu (void) case SVR_8544_E: puts("8544_E"); break; + case SVR_8568_E: + puts("8568_E"); + break; default: puts("Unknown"); break; @@ -265,6 +268,10 @@ ft_cpu_setup(void *blob, bd_t *bd) if (p != NULL) *p = cpu_to_be32(clock); + p = ft_get_prop(blob, "/qe@e0080000/" OF_CPU "/bus-frequency", &len); + if (p != NULL) + *p = cpu_to_be32(clock); + p = ft_get_prop(blob, "/" OF_SOC "/serial@4500/clock-frequency", &len); if (p != NULL) *p = cpu_to_be32(clock); diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c index 9f4d36c1ab..9517146ed2 100644 --- a/cpu/mpc85xx/cpu_init.c +++ b/cpu/mpc85xx/cpu_init.c @@ -143,12 +143,10 @@ void cpu_init_f (void) memctl->br1 = CFG_BR1_PRELIM; #endif -#if !defined(CONFIG_MPC85xx) #if defined(CFG_BR2_PRELIM) && defined(CFG_OR2_PRELIM) memctl->or2 = CFG_OR2_PRELIM; memctl->br2 = CFG_BR2_PRELIM; #endif -#endif #if defined(CFG_BR3_PRELIM) && defined(CFG_OR3_PRELIM) memctl->or3 = CFG_OR3_PRELIM; |
