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authorKim Phillips <kim.phillips@freescale.com>2008-03-28 10:19:07 -0500
committerKim Phillips <kim.phillips@freescale.com>2008-03-28 16:01:06 -0500
commite5c4ade4db1e16d3e5d4a7887f34e10e516ed3a9 (patch)
tree2c75761816373aa02a3e9a5e369f74a4fba4c911 /board
parent81fd52c6c8fd19f0b7856b98217ce37c46c521af (diff)
downloadblackbird-obmc-uboot-e5c4ade4db1e16d3e5d4a7887f34e10e516ed3a9.tar.gz
blackbird-obmc-uboot-e5c4ade4db1e16d3e5d4a7887f34e10e516ed3a9.zip
mpc83xx: cleanup System Part and Revision ID Register (SPRIDR) code
in the spirit of commit 1ced121600b2060ab2ff9f0fddd9421fd70a0dc6, 85xx's "Update SVR numbers to expand support", simplify SPRIDR processing and processor ID display. Add REVID_{MAJ,MIN}OR macros to make REVID dependent code simpler. Also added PARTID_NO_E and IS_E_PROCESSOR convenience macros. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/mpc8360emds/mpc8360emds.c11
-rw-r--r--board/freescale/mpc837xemds/mpc837xemds.c15
-rw-r--r--board/freescale/mpc837xerdb/mpc837xerdb.c15
3 files changed, 16 insertions, 25 deletions
diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c
index d90cdb3d3c..2119320da7 100644
--- a/board/freescale/mpc8360emds/mpc8360emds.c
+++ b/board/freescale/mpc8360emds/mpc8360emds.c
@@ -98,11 +98,8 @@ int board_early_init_f(void)
/* Enable flash write */
bcsr[0xa] &= ~0x04;
- /* Disable G1TXCLK, G2TXCLK h/w buffers (rev.2 h/w bug workaround) */
- if (immr->sysconf.spridr == SPR_8360_REV20 ||
- immr->sysconf.spridr == SPR_8360E_REV20 ||
- immr->sysconf.spridr == SPR_8360_REV21 ||
- immr->sysconf.spridr == SPR_8360E_REV21)
+ /* Disable G1TXCLK, G2TXCLK h/w buffers (rev.2.x h/w bug workaround) */
+ if (REVID_MAJOR(immr->sysconf.spridr) == 2)
bcsr[0xe] = 0x30;
/* Enable second UART */
@@ -308,8 +305,8 @@ void ft_board_setup(void *blob, bd_t *bd)
* if on mpc8360ea rev. 2.1,
* change both ucc phy-connection-types from rgmii-id to rgmii-rxid
*/
- if (immr->sysconf.spridr == SPR_8360_REV21 ||
- immr->sysconf.spridr == SPR_8360E_REV21) {
+ if ((REVID_MAJOR(immr->sysconf.spridr) == 2) &&
+ (REVID_MINOR(immr->sysconf.spridr) == 1)) {
int nodeoffset;
const char *prop;
int path;
diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c
index 6fbd0e0c31..f7cd5fe176 100644
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -36,24 +36,21 @@ int board_early_init_f(void)
u32 spridr = in_be32(&immr->sysconf.spridr);
/* we check only part num, and don't look for CPU revisions */
- switch (spridr >> 16) {
- case SPR_8379E_REV10 >> 16:
- case SPR_8379_REV10 >> 16:
+ switch (spridr) {
+ case SPR_8377:
fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
- fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA,
+ fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break;
- case SPR_8378E_REV10 >> 16:
- case SPR_8378_REV10 >> 16:
+ case SPR_8378:
fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break;
- case SPR_8377E_REV10 >> 16:
- case SPR_8377_REV10 >> 16:
+ case SPR_8379:
fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
- fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
+ fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA,
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break;
default:
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 83fb60da00..e054f4e44d 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -140,24 +140,21 @@ int board_early_init_f(void)
u32 spridr = in_be32(&immr->sysconf.spridr);
/* we check only part num, and don't look for CPU revisions */
- switch (spridr >> 16) {
- case SPR_8379E_REV10 >> 16:
- case SPR_8379_REV10 >> 16:
+ switch (PARTID_NO_E(spridr)) {
+ case SPR_8377:
fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
- fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA,
+ fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break;
- case SPR_8378E_REV10 >> 16:
- case SPR_8378_REV10 >> 16:
+ case SPR_8378:
fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break;
- case SPR_8377E_REV10 >> 16:
- case SPR_8377_REV10 >> 16:
+ case SPR_8379:
fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
- fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
+ fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA,
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break;
default:
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