diff options
| author | Minkyu Kang <mk7.kang@samsung.com> | 2015-10-23 16:12:28 +0900 |
|---|---|---|
| committer | Minkyu Kang <mk7.kang@samsung.com> | 2015-11-02 10:38:22 +0900 |
| commit | 9eae8441251188287ddd706196596a3117802449 (patch) | |
| tree | 052b496cd40193b9110c5273d376846a17b50166 /board/samsung/smdk2410 | |
| parent | 6b949ba8243342906a1f4a2e6f1f8c307de40ffd (diff) | |
| download | blackbird-obmc-uboot-9eae8441251188287ddd706196596a3117802449.tar.gz blackbird-obmc-uboot-9eae8441251188287ddd706196596a3117802449.zip | |
smdk2410: clean up checkpatch issues
This patch will fix these checkpatch issues.
ERROR: spaces required around that '==' (ctx:VxV)
+#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */
ERROR: spaces required around that '==' (ctx:VxV)
+#elif FCLK_SPEED==1 /* Fout = 202.8MHz */
ERROR: spaces required around that '==' (ctx:VxV)
+#if USB_CLOCK==0
ERROR: spaces required around that '==' (ctx:VxV)
+#elif USB_CLOCK==1
CHECK: spaces required around that ':' (ctx:VxV)
+ "bne 1b":"=r" (loops):"0" (loops));
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'board/samsung/smdk2410')
| -rw-r--r-- | board/samsung/smdk2410/smdk2410.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/board/samsung/smdk2410/smdk2410.c b/board/samsung/smdk2410/smdk2410.c index b75a0e34dd..6e678c744b 100644 --- a/board/samsung/smdk2410/smdk2410.c +++ b/board/samsung/smdk2410/smdk2410.c @@ -18,11 +18,11 @@ DECLARE_GLOBAL_DATA_PTR; #define FCLK_SPEED 1 -#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */ +#if (FCLK_SPEED == 0) /* Fout = 203MHz, Fin = 12MHz for Audio */ #define M_MDIV 0xC3 #define M_PDIV 0x4 #define M_SDIV 0x1 -#elif FCLK_SPEED==1 /* Fout = 202.8MHz */ +#elif (FCLK_SPEED == 1) /* Fout = 202.8MHz */ #define M_MDIV 0xA1 #define M_PDIV 0x3 #define M_SDIV 0x1 @@ -30,11 +30,11 @@ DECLARE_GLOBAL_DATA_PTR; #define USB_CLOCK 1 -#if USB_CLOCK==0 +#if (USB_CLOCK == 0) #define U_M_MDIV 0xA1 #define U_M_PDIV 0x3 #define U_M_SDIV 0x1 -#elif USB_CLOCK==1 +#elif (USB_CLOCK == 1) #define U_M_MDIV 0x48 #define U_M_PDIV 0x3 #define U_M_SDIV 0x2 @@ -44,7 +44,7 @@ static inline void pll_delay(unsigned long loops) { __asm__ volatile ("1:\n" "subs %0, %1, #1\n" - "bne 1b":"=r" (loops):"0" (loops)); + "bne 1b" : "=r" (loops) : "0" (loops)); } /* |
