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| author | Shengzhou Liu <Shengzhou.Liu@nxp.com> | 2016-05-04 10:20:22 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-06-03 14:06:57 -0700 |
| commit | e04f9d0c2f5dec275eb550317c6bad2d8bbfb209 (patch) | |
| tree | fe6ee40fd32a3abfe8f52b3cf797f5bc3172248b /board/freescale/t208xqds | |
| parent | d8e5163ad81a2810c66a9a98e5111769378f5f5f (diff) | |
| download | blackbird-obmc-uboot-e04f9d0c2f5dec275eb550317c6bad2d8bbfb209.tar.gz blackbird-obmc-uboot-e04f9d0c2f5dec275eb550317c6bad2d8bbfb209.zip | |
board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/t208xqds')
| -rw-r--r-- | board/freescale/t208xqds/ddr.h | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/board/freescale/t208xqds/ddr.h b/board/freescale/t208xqds/ddr.h index 9c26fdf3bd..255ab2c543 100644 --- a/board/freescale/t208xqds/ddr.h +++ b/board/freescale/t208xqds/ddr.h @@ -28,17 +28,17 @@ static const struct board_specific_parameters udimm0[] = { * num| hi| rank| clk| wrlvl | wrlvl | wrlvl | * ranks| mhz| GB |adjst| start | ctl2 | ctl3 | */ - {2, 1200, 0, 5, 7, 0x0708090a, 0x0b0c0d09}, - {2, 1400, 0, 5, 7, 0x08090a0c, 0x0d0e0f0a}, - {2, 1700, 0, 5, 8, 0x090a0b0c, 0x0e10110c}, - {2, 1900, 0, 5, 8, 0x090b0c0f, 0x1012130d}, - {2, 2140, 0, 5, 8, 0x090b0c0f, 0x1012130d}, - {1, 1200, 0, 5, 7, 0x0808090a, 0x0b0c0c0a}, - {1, 1500, 0, 5, 6, 0x07070809, 0x0a0b0b09}, - {1, 1600, 0, 5, 8, 0x090b0b0d, 0x0d0e0f0b}, - {1, 1700, 0, 4, 8, 0x080a0a0c, 0x0c0d0e0a}, - {1, 1900, 0, 5, 8, 0x090a0c0d, 0x0e0f110c}, - {1, 2140, 0, 4, 8, 0x090a0b0d, 0x0e0f110b}, + {2, 1200, 0, 10, 7, 0x0708090a, 0x0b0c0d09}, + {2, 1400, 0, 10, 7, 0x08090a0c, 0x0d0e0f0a}, + {2, 1700, 0, 10, 8, 0x090a0b0c, 0x0e10110c}, + {2, 1900, 0, 10, 8, 0x090b0c0f, 0x1012130d}, + {2, 2140, 0, 10, 8, 0x090b0c0f, 0x1012130d}, + {1, 1200, 0, 10, 7, 0x0808090a, 0x0b0c0c0a}, + {1, 1500, 0, 10, 6, 0x07070809, 0x0a0b0b09}, + {1, 1600, 0, 10, 8, 0x090b0b0d, 0x0d0e0f0b}, + {1, 1700, 0, 8, 8, 0x080a0a0c, 0x0c0d0e0a}, + {1, 1900, 0, 10, 8, 0x090a0c0d, 0x0e0f110c}, + {1, 2140, 0, 8, 8, 0x090a0b0d, 0x0e0f110b}, {} }; @@ -49,15 +49,15 @@ static const struct board_specific_parameters rdimm0[] = { * ranks| mhz| GB |adjst| start | ctl2 | ctl3 | */ /* TODO: need tuning these parameters if RDIMM is used */ - {4, 1350, 0, 5, 9, 0x08070605, 0x06070806}, - {4, 1666, 0, 5, 11, 0x0a080706, 0x07090906}, - {4, 2140, 0, 5, 12, 0x0b090807, 0x080a0b07}, - {2, 1350, 0, 5, 9, 0x08070605, 0x06070806}, - {2, 1666, 0, 5, 11, 0x0a090806, 0x08090a06}, - {2, 2140, 0, 5, 12, 0x0b090807, 0x080a0b07}, - {1, 1350, 0, 5, 9, 0x08070605, 0x06070806}, - {1, 1666, 0, 5, 11, 0x0a090806, 0x08090a06}, - {1, 2140, 0, 4, 12, 0x0b090807, 0x080a0b07}, + {4, 1350, 0, 10, 9, 0x08070605, 0x06070806}, + {4, 1666, 0, 10, 11, 0x0a080706, 0x07090906}, + {4, 2140, 0, 10, 12, 0x0b090807, 0x080a0b07}, + {2, 1350, 0, 10, 9, 0x08070605, 0x06070806}, + {2, 1666, 0, 10, 11, 0x0a090806, 0x08090a06}, + {2, 2140, 0, 10, 12, 0x0b090807, 0x080a0b07}, + {1, 1350, 0, 10, 9, 0x08070605, 0x06070806}, + {1, 1666, 0, 10, 11, 0x0a090806, 0x08090a06}, + {1, 2140, 0, 8, 12, 0x0b090807, 0x080a0b07}, {} }; |
