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authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>2012-10-01 08:36:25 +0000
committerStefano Babic <sbabic@denx.de>2012-10-16 12:35:10 +0200
commita2ac1b3a7d8e685e8fe3805b3169f3dac5c06cf8 (patch)
tree03120c255250a910bf8235366fa93c4adfa3f674 /board/freescale/mx6qarm2
parent6e3dc127545247f123de063a6a101960e3eb2ccd (diff)
downloadblackbird-obmc-uboot-a2ac1b3a7d8e685e8fe3805b3169f3dac5c06cf8.tar.gz
blackbird-obmc-uboot-a2ac1b3a7d8e685e8fe3805b3169f3dac5c06cf8.zip
mxc: Fix SDHC multi-instance clock
On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not suitable for the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). This patch fixes this issue by adding a configuration field for the SDHC input clock frequency. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Jason Liu <r64343@freescale.com> Cc: Matt Sealey <matt@genesi-usa.com> Cc: Andy Fleming <afleming@gmail.com>
Diffstat (limited to 'board/freescale/mx6qarm2')
-rw-r--r--board/freescale/mx6qarm2/mx6qarm2.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c b/board/freescale/mx6qarm2/mx6qarm2.c
index d43b3271b8..dad4b95576 100644
--- a/board/freescale/mx6qarm2/mx6qarm2.c
+++ b/board/freescale/mx6qarm2/mx6qarm2.c
@@ -24,6 +24,7 @@
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/mx6x_pins.h>
+#include <asm/arch/clock.h>
#include <asm/errno.h>
#include <asm/gpio.h>
#include <asm/imx-common/iomux-v3.h>
@@ -139,6 +140,9 @@ int board_mmc_init(bd_t *bis)
s32 status = 0;
u32 index = 0;
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+
for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
switch (index) {
case 0:
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