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authorchenhui zhao <chenhui.zhao@freescale.com>2011-09-15 14:52:34 +0800
committerKumar Gala <galak@kernel.crashing.org>2011-10-03 08:52:14 -0500
commit568336ecc7083afd0b8b16a6b8b4a796491c142f (patch)
tree09c9fbbaab4ee23b2f8d368fdf3c6b2bf886954d /board/freescale/mpc8555cds/mpc8555cds.c
parenta6d0bfa86f5af3bab7bd0d14653c80e4188e076c (diff)
downloadblackbird-obmc-uboot-568336ecc7083afd0b8b16a6b8b4a796491c142f.tar.gz
blackbird-obmc-uboot-568336ecc7083afd0b8b16a6b8b4a796491c142f.zip
powerpc/mpc85xxcds: Fix PCI speed
The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8555cds/mpc8555cds.c')
-rw-r--r--board/freescale/mpc8555cds/mpc8555cds.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c
index 60d1758afe..48ede9840f 100644
--- a/board/freescale/mpc8555cds/mpc8555cds.c
+++ b/board/freescale/mpc8555cds/mpc8555cds.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004, 2011 Freescale Semiconductor.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -198,6 +198,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
int checkboard (void)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ char buf[32];
/* PCI slot in USER bits CSR[6:7] by convention. */
uint pci_slot = get_pci_slot ();
@@ -220,8 +221,7 @@ int checkboard (void)
printf("PCI1: %d bit, %s MHz, %s\n",
(pci1_32) ? 32 : 64,
- (pci1_speed == 33000000) ? "33" :
- (pci1_speed == 66000000) ? "66" : "unknown",
+ strmhz(buf, pci1_speed),
pci1_clk_sel ? "sync" : "async");
if (pci_dual) {
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