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authorMasahiro Yamada <yamada.m@jp.panasonic.com>2014-02-05 11:28:26 +0900
committerTom Rini <trini@ti.com>2014-02-19 11:10:05 -0500
commit5ab502cb8900aee483dfba28700640672e0b060e (patch)
tree55cdefd0d3db1f47bbe0292cfbd571eed0dd76b1 /arch/arm/dts/tegra20-colibri_t20_iris.dts
parent6ab6b2afa091dbceb37719b8a81637a00834be19 (diff)
downloadblackbird-obmc-uboot-5ab502cb8900aee483dfba28700640672e0b060e.tar.gz
blackbird-obmc-uboot-5ab502cb8900aee483dfba28700640672e0b060e.zip
dts: move device tree sources to arch/$(ARCH)/dts/
Unlike Linux Kernel, U-Boot historically had *.dts files under board/$(VENDOR)/dts/ and *.dtsi files under arch/$(ARCH)/dts/. I think arch/$(ARCH)/dts dicretory is a better location to store both *.dts and *.dtsi files. For example, before this commit, board/xilinx/dts directory had both Microblaze dts (microblaze-generic.dts) and ARM dts (zynq-*.dts), which are totally unrelated. This commit moves *.dts to arch/$(ARCH)/dts/ directories, allowing us to describe nicely mutiple DTBs generation in the next commit. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'arch/arm/dts/tegra20-colibri_t20_iris.dts')
-rw-r--r--arch/arm/dts/tegra20-colibri_t20_iris.dts45
1 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/dts/tegra20-colibri_t20_iris.dts b/arch/arm/dts/tegra20-colibri_t20_iris.dts
new file mode 100644
index 0000000000..c0e54af886
--- /dev/null
+++ b/arch/arm/dts/tegra20-colibri_t20_iris.dts
@@ -0,0 +1,45 @@
+/dts-v1/;
+
+#include "tegra20.dtsi"
+
+/ {
+ model = "Toradex Colibri T20";
+ compatible = "toradex,t20", "nvidia,tegra20";
+
+ aliases {
+ usb0 = "/usb@c5008000";
+ usb1 = "/usb@c5000000";
+ usb2 = "/usb@c5004000";
+ sdhci0 = "/sdhci@c8000600";
+ };
+
+ usb@c5000000 {
+ dr_mode = "otg";
+ };
+
+ usb@c5004000 {
+ nvidia,phy-reset-gpio = <&gpio 169 0>; /* PV1 */
+ nvidia,vbus-gpio = <&gpio 217 0>; /* PBB1 */
+ };
+
+ usb@c5008000 {
+ nvidia,vbus-gpio = <&gpio 178 1>; /* PW2 low-active */
+ };
+
+ nand-controller@70008000 {
+ nvidia,wp-gpios = <&gpio 144 0>; /* PS0 */
+ nvidia,width = <8>;
+ nvidia,timing = <15 100 25 80 25 10 15 10 100>;
+
+ nand@0 {
+ reg = <0>;
+ compatible = "nand-flash";
+ };
+ };
+
+ sdhci@c8000600 {
+ status = "okay";
+ cd-gpios = <&gpio 23 1>; /* gpio PC7 */
+ bus-width = <4>;
+ };
+};
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