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authorTom Rini <trini@konsulko.com>2016-06-13 08:50:58 -0400
committerTom Rini <trini@konsulko.com>2016-06-13 08:50:58 -0400
commitfd9102dafea5c6959401d0dbc5293a56d2261878 (patch)
tree5aad4472b833800daab260c94062fbaed2468d39 /arch/arm/cpu
parenta52142855a1345c233af8bb76fb1ad4d3048e008 (diff)
parentc1631c8a04f53e694dd73bbb987b97eed5188517 (diff)
downloadblackbird-obmc-uboot-fd9102dafea5c6959401d0dbc5293a56d2261878.tar.gz
blackbird-obmc-uboot-fd9102dafea5c6959401d0dbc5293a56d2261878.zip
Merge branch 'master' of git://git.denx.de/u-boot-atmel
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/arm1136/start.S2
-rw-r--r--arch/arm/cpu/arm920t/start.S3
-rw-r--r--arch/arm/cpu/arm926ejs/start.S2
-rw-r--r--arch/arm/cpu/arm946es/start.S2
-rw-r--r--arch/arm/cpu/armv7/start.S5
-rw-r--r--arch/arm/cpu/sa1100/start.S2
6 files changed, 14 insertions, 2 deletions
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 3ebdfddc80..2f8fd6acc2 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -82,6 +82,7 @@ cpu_init_crit:
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
/*
* Jump to board specific initialization... The Mask ROM will have already initialized
* basic memory. Go here to bump up clock rate and handle wake up conditions.
@@ -89,5 +90,6 @@ cpu_init_crit:
mov ip, lr /* persevere link reg across call */
bl lowlevel_init /* go setup pll,mux,memory */
mov lr, ip /* restore link */
+#endif
mov pc, lr /* back to my caller */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 69cabebed9..3ada6d026f 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -135,6 +135,7 @@ cpu_init_crit:
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
@@ -143,7 +144,7 @@ cpu_init_crit:
mov ip, lr
bl lowlevel_init
-
mov lr, ip
+#endif
mov pc, lr
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index f05113da9d..959d1ed86d 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -101,11 +101,13 @@ flush_dcache:
#endif
mcr p15, 0, r0, c1, c0, 0
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
/*
* Go setup Memory and board specific bits prior to relocation.
*/
mov ip, lr /* perserve link reg across call */
bl lowlevel_init /* go setup pll,mux,memory */
mov lr, ip /* restore link */
+#endif
mov pc, lr /* back to my caller */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index 214cd8cbd9..51053c32dc 100644
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -90,11 +90,13 @@ cpu_init_crit:
orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
mcr p15, 0, r0, c1, c0, 0
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
/*
* Go setup Memory and board specific bits prior to relocation.
*/
mov ip, lr /* perserve link reg across call */
bl lowlevel_init /* go setup memory */
mov lr, ip /* restore link */
+#endif
mov pc, lr /* back to my caller */
#endif
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index b18094447b..691e5d3fe1 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -66,8 +66,10 @@ save_boot_params_ret:
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_cp15
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
bl cpu_init_crit
#endif
+#endif
bl _main
@@ -250,7 +252,8 @@ skip_errata_621766:
mov pc, r5 @ back to my caller
ENDPROC(cpu_init_cp15)
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
+ !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
/*************************************************************************
*
* CPU_init_critical registers
diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index 408b70dbc1..f5318c90d1 100644
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -96,6 +96,7 @@ cpu_init_crit:
ldr r1, cpuspeed
str r1, [r0, #PPCR]
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
@@ -104,6 +105,7 @@ cpu_init_crit:
mov ip, lr
bl lowlevel_init
mov lr, ip
+#endif
/*
* disable MMU stuff and enable I-cache
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