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| author | Lokesh Vutla <lokeshvutla@ti.com> | 2013-02-12 21:29:05 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-03-11 11:06:11 -0400 |
| commit | ea8eff1fe080bef7c5cdfea734d8ac4cdd957c4c (patch) | |
| tree | cd8c94874ac1a497b86528f009434e7dd80a206f /arch/arm/cpu/armv7/omap4 | |
| parent | d4e4129c31cf571824a1b34aa0b9210c876be718 (diff) | |
| download | blackbird-obmc-uboot-ea8eff1fe080bef7c5cdfea734d8ac4cdd957c4c.tar.gz blackbird-obmc-uboot-ea8eff1fe080bef7c5cdfea734d8ac4cdd957c4c.zip | |
arm: dra7xx: clock: Add the dplls data
A new DPLL DDR is added in DRA7XX socs. Now clocks to
EMIF CD is from DPLL DDR. So DPLL DDR should be locked
before initializing RAM.
Also adding other dpll data which are different from OMAP5 ES2.0.
SYS_CLK running at 20MHz is introduced in DRA7xx socs.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/omap4')
| -rw-r--r-- | arch/arm/cpu/armv7/omap4/hw_data.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv7/omap4/hw_data.c b/arch/arm/cpu/armv7/omap4/hw_data.c index 3b27bc110d..7551b9861e 100644 --- a/arch/arm/cpu/armv7/omap4/hw_data.c +++ b/arch/arm/cpu/armv7/omap4/hw_data.c @@ -182,7 +182,8 @@ struct dplls omap4430_dplls_es1 = { #else .abe = &abe_dpll_params_32k_196608khz, #endif - .usb = usb_dpll_params_1920mhz + .usb = usb_dpll_params_1920mhz, + .ddr = NULL }; struct dplls omap4430_dplls = { @@ -195,7 +196,8 @@ struct dplls omap4430_dplls = { #else .abe = &abe_dpll_params_32k_196608khz, #endif - .usb = usb_dpll_params_1920mhz + .usb = usb_dpll_params_1920mhz, + .ddr = NULL }; struct dplls omap4460_dplls = { @@ -208,7 +210,8 @@ struct dplls omap4460_dplls = { #else .abe = &abe_dpll_params_32k_196608khz, #endif - .usb = usb_dpll_params_1920mhz + .usb = usb_dpll_params_1920mhz, + .ddr = NULL }; struct pmic_data twl6030_4430es1 = { |
