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authorTom Rini <trini@ti.com>2012-08-08 14:35:55 -0700
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-09-01 14:58:19 +0200
commita4a99fffd8a006d99958e5bcded36d7e7218bd36 (patch)
tree66c7a842c1a7890688cd0d7b04fc503f106efb33
parent4c0620bf42172325ea0c6afa0fdd362bb264e31b (diff)
downloadblackbird-obmc-uboot-a4a99fffd8a006d99958e5bcded36d7e7218bd36.tar.gz
blackbird-obmc-uboot-a4a99fffd8a006d99958e5bcded36d7e7218bd36.zip
am335x evm: Enable support for spi0
Signed-off-by: Tom Rini <trini@ti.com>
-rw-r--r--board/ti/am335x/mux.c11
-rw-r--r--drivers/spi/omap3_spi.c10
-rw-r--r--include/configs/am335x_evm.h9
3 files changed, 30 insertions, 0 deletions
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 992f9ba78e..80becd5c7a 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -310,6 +310,16 @@ static struct module_pin_mux i2c1_pin_mux[] = {
{-1},
};
+static struct module_pin_mux spi0_pin_mux[] = {
+ {OFFSET(spi0_sclk), (MODE(0) | RXACTIVE | PULLUDEN)}, /* SPI0_SCLK */
+ {OFFSET(spi0_d0), (MODE(0) | RXACTIVE |
+ PULLUDEN | PULLUP_EN)}, /* SPI0_D0 */
+ {OFFSET(spi0_d1), (MODE(0) | RXACTIVE | PULLUDEN)}, /* SPI0_D1 */
+ {OFFSET(spi0_cs0), (MODE(0) | RXACTIVE |
+ PULLUDEN | PULLUP_EN)}, /* SPI0_CS0 */
+ {-1},
+};
+
static struct module_pin_mux gpio0_7_pin_mux[] = {
{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN)}, /* GPIO0_7 */
{-1},
@@ -430,6 +440,7 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header)
configure_module_pin_mux(i2c1_pin_mux);
else if (profile == PROFILE_2) {
configure_module_pin_mux(mmc1_pin_mux);
+ configure_module_pin_mux(spi0_pin_mux);
}
} else if (!strncmp(header->name, "A335X_SK", HDR_NAME_LEN)) {
/* Starter Kit EVM */
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index 47f9e56f42..e40a632caa 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -173,8 +173,18 @@ int spi_claim_bus(struct spi_slave *slave)
/* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS
* REVISIT: this controller could support SPI_3WIRE mode.
*/
+#ifdef CONFIG_AM33XX
+ /*
+ * The reference design on AM33xx has D0 and D1 wired up opposite
+ * of how it has been done on previous platforms. We assume that
+ * custom hardware will also follow this convention.
+ */
+ conf &= OMAP3_MCSPI_CHCONF_DPE0;
+ conf |= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1);
+#else
conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1);
conf |= OMAP3_MCSPI_CHCONF_DPE0;
+#endif
/* wordlength */
conf &= ~OMAP3_MCSPI_CHCONF_WL_MASK;
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index c827ebfce7..2bfe8c6dcd 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -134,6 +134,14 @@
#define CONFIG_CMD_FAT
#define CONFIG_CMD_EXT2
+#define CONFIG_SPI
+#define CONFIG_OMAP3_SPI
+#define CONFIG_MTD_DEVICE
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_WINBOND
+#define CONFIG_CMD_SF
+#define CONFIG_SF_DEFAULT_SPEED (24000000)
+
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
@@ -163,6 +171,7 @@
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_DRIVER_OMAP24XX_I2C
#define CONFIG_CMD_EEPROM
+#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_MULTI_EEPROMS
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