83xx: Replace CONFIG_ECC_INIT_VIA_DDRC references

Update 83xx architecture's CONFIG_ECC_INIT_VIA_DDRC references to
CONFIG_ECC_INIT_VIA_DDRCONTROLLER, which other Freescale architectures
use

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

6 files changed, 11 insertions, 11 deletions

diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c
index 85c0120f27..dc4dbd3c3a 100644
--- a/board/freescale/mpc8360emds/mpc8360emds.c
+++ b/board/freescale/mpc8360emds/mpc8360emds.c
@@ -116,7 +116,7 @@ int board_early_init_r(void)
 	return 0;
 }
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);
 #endif
 int fixed_sdram(void);
@@ -138,7 +138,7 @@ phys_size_t initdram(int board_type)
 	msize = fixed_sdram();
 #endif
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/*
 	 * Initialize DDR ECC byte
 	 */
diff --git a/board/freescale/mpc8360erdk/mpc8360erdk.c b/board/freescale/mpc8360erdk/mpc8360erdk.c
index af3b8ceae4..377187816a 100644
--- a/board/freescale/mpc8360erdk/mpc8360erdk.c
+++ b/board/freescale/mpc8360erdk/mpc8360erdk.c
@@ -268,7 +268,7 @@ int fixed_sdram(void)
 
 phys_size_t initdram(int board_type)
 {
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	extern void ddr_enable_ecc(unsigned int dram_size);
 #endif
 	volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
@@ -281,7 +281,7 @@ phys_size_t initdram(int board_type)
 	im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR;
 	msize = fixed_sdram();
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/*
 	 * Initialize DDR ECC byte
 	 */
diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c
index 062d762d2c..85068923b7 100644
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -199,7 +199,7 @@ int board_early_init_r(void)
 	return 0;
 }
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);
 #endif
 int fixed_sdram(void);
@@ -218,7 +218,7 @@ phys_size_t initdram(int board_type)
 	msize = fixed_sdram();
 #endif
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/* Initialize DDR ECC byte */
 	ddr_enable_ecc(msize * 1024 * 1024);
 #endif
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 318a3dce71..a4a1927df8 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -59,7 +59,7 @@ testdram(void)
 }
 #endif
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 void ddr_enable_ecc(unsigned int dram_size);
 #endif
 int fixed_sdram(void);
@@ -78,7 +78,7 @@ phys_size_t initdram(int board_type)
 	msize = fixed_sdram();
 #endif
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/* Initialize DDR ECC byte */
 	ddr_enable_ecc(msize * 1024 * 1024);
 #endif
diff --git a/board/keymile/kmeter1/kmeter1.c b/board/keymile/kmeter1/kmeter1.c
index 660d87b53b..3d1b941548 100644
--- a/board/keymile/kmeter1/kmeter1.c
+++ b/board/keymile/kmeter1/kmeter1.c
@@ -153,7 +153,7 @@ int fixed_sdram(void)
 
 phys_size_t initdram (int board_type)
 {
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	extern void ddr_enable_ecc (unsigned int dram_size);
 #endif
 	volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
@@ -166,7 +166,7 @@ phys_size_t initdram (int board_type)
 	im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR;
 	msize = fixed_sdram ();
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/*
 	 * Initialize DDR ECC byte
 	 */
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index 97ca7007fc..824396835a 100644
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -830,7 +830,7 @@ long int spd_sdram()
 }
 #endif /* CONFIG_SPD_EEPROM */
 
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 /*
  * Use timebase counter, get_timer() is not availabe
  * at this point of initialization yet.