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| author | Marek Vasut <marex@denx.de> | 2014-09-27 01:18:29 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2014-10-31 10:18:05 +0100 |
| commit | 8a78ca9ea57e019869ddac2ef10a15593f211997 (patch) | |
| tree | 5ebfb1a7ee12b761849c82e2ccf67a22c3c1e2a7 | |
| parent | ebcaf966ed64b94ff3cd384ca9b3906a6ae0713e (diff) | |
| download | blackbird-obmc-uboot-8a78ca9ea57e019869ddac2ef10a15593f211997.tar.gz blackbird-obmc-uboot-8a78ca9ea57e019869ddac2ef10a15593f211997.zip | |
arm: socfpga: Add example config entry for EPCS/EPCQ SPI
Add example config file entry for the Altera SPI controller. This SPI
controller can also, under special conditions, be used to operate the
EPCS/EPCQ SPI NOR.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| -rw-r--r-- | include/configs/socfpga_common.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f7b314d3ca..c213082be0 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -79,6 +79,25 @@ #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS /* + * EPCS/EPCQx1 Serial Flash Controller + */ +#ifdef CONFIG_ALTERA_SPI +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_SPEED 30000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_BAR +/* + * The base address is configurable in QSys, each board must specify the + * base address based on it's particular FPGA configuration. Please note + * that the address here is incremented by 0x400 from the Base address + * selected in QSys, since the SPI registers are at offset +0x400. + * #define CONFIG_SYS_SPI_BASE 0xff240400 + */ +#endif + +/* * Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) && !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) |
