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path: root/include/linux/clk-provider.h
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* clk: Remove CLK_IS_ROOT flagStephen Boyd2016-06-011-1/+1
| | | | | | | Now that we've gotten rid of all the users of this flag we can retire the number, leaving a slot open for a future flag user. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Merge branch 'clk-hw-register' (early part) into clk-nextStephen Boyd2016-04-211-0/+93
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'clk-hw-register' (early part): clk: fixed-rate: Add hw based registration APIs clk: gpio: Add hw based registration APIs clk: composite: Add hw based registration APIs clk: fractional-divider: Add hw based registration APIs clk: fixed-factor: Add hw based registration APIs clk: mux: Add hw based registration APIs clk: gate: Add hw based registration APIs clk: divider: Add hw based registration APIs clkdev: Add clk_hw based registration APIs clk: Add clk_hw OF clk providers clk: Add {devm_}clk_hw_{register,unregister}() APIs clkdev: Remove clk_register_clkdevs()
| * clk: fixed-rate: Add hw based registration APIsStephen Boyd2016-04-191-0/+7
| | | | | | | | | | | | | | | | | | Add registration APIs in the clk fixed-rate code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: gpio: Add hw based registration APIsStephen Boyd2016-04-191-0/+8
| | | | | | | | | | | | | | | | | | Add registration APIs in the clk gpio code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: composite: Add hw based registration APIsStephen Boyd2016-04-191-0/+7
| | | | | | | | | | | | | | | | | | Add registration APIs in the clk composite code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: fractional-divider: Add hw based registration APIsStephen Boyd2016-04-191-0/+5
| | | | | | | | | | | | | | | | | | Add registration APIs in the clk fractional divider code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: fixed-factor: Add hw based registration APIsStephen Boyd2016-04-191-0/+4
| | | | | | | | | | | | | | | | | | Add registration APIs in the clk fixed-factor code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: mux: Add hw based registration APIsStephen Boyd2016-04-191-0/+11
| | | | | | | | | | | | | | | | | | Add registration APIs in the clk mux code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: gate: Add hw based registration APIsStephen Boyd2016-04-191-0/+5
| | | | | | | | | | | | | | | | | | Add registration APIs in the clk gate code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: divider: Add hw based registration APIsStephen Boyd2016-04-191-0/+10
| | | | | | | | | | | | | | | | | | Add registration APIs in the clk divider code to return struct clk_hw pointers instead of struct clk pointers. This way we hide the struct clk pointer from providers unless they need to use consumer facing APIs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: Add clk_hw OF clk providersStephen Boyd2016-04-191-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have a clk registration API that doesn't return struct clks, we need to have some way to hand out struct clks via the clk_get() APIs that doesn't involve associating struct clk pointers with an OF node. Currently we ask the OF provider to give us a struct clk pointer for some clkspec, turn that struct clk into a struct clk_hw and then allocate a new struct clk to return to the caller. Let's add a clk_hw based OF provider hook that returns a struct clk_hw directly, so that we skip the intermediate step of converting from struct clk to struct clk_hw. Eventually when we've converted all OF clk providers to struct clk_hw based APIs we can remove the struct clk based ones. It should also be noted that we change the onecell provider to have a flex array instead of a pointer for the array of clk_hw pointers. This allows providers to allocate one structure of the correct length in one step instead of two. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: Add {devm_}clk_hw_{register,unregister}() APIsStephen Boyd2016-04-191-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We've largely split the clk consumer and provider APIs along struct clk and struct clk_hw, but clk_register() still returns a struct clk pointer for each struct clk_hw that's registered. Eventually we'd like to only allocate struct clks when there's a user, because struct clk is per-user now, so clk_register() needs to change. Let's add new APIs to register struct clk_hws, but this time we'll hide the struct clk from the caller by returning an int error code. Also add an unregistration API that takes the clk_hw structure that was passed to the registration API. This way provider drivers never have to deal with a struct clk pointer unless they're using the clk consumer APIs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | Merge branch 'clk-composite-unregister' into clk-nextStephen Boyd2016-04-211-0/+1
|\ \ | | | | | | | | | | | | * clk-composite-unregister: clk: composite: Add unregister function
| * | clk: composite: Add unregister functionMaxime Ripard2016-04-211-0/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | The composite clock didn't have any unregistration function, which forced us to use clk_unregister directly on it. While it was already not great from an API point of view, it also meant that we were leaking the clk_composite structure allocated in clk_register_composite. Add a clk_unregister_composite function to fix this. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | clk: Provide OF helper to mark clocks as CRITICALLee Jones2016-04-091-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This call matches clocks which have been marked as critical in DT and sets the appropriate flag. These flags can then be used to mark the clock core flags appropriately prior to registration. Legacy bindings requiring this feature must add the clock-critical property to their binding descriptions, as it is not a part of common-clock binding. Cc: devicetree@vger.kernel.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1455225554-13267-4-git-send-email-mturquette@baylibre.com
* | clk: Allow clocks to be marked as CRITICALLee Jones2016-04-091-0/+1
|/ | | | | | | | | | | Critical clocks are those which must not be gated, else undefined or catastrophic failure would occur. Here we have chosen to ensure the prepare/enable counts are correctly incremented, so as not to confuse users with enabled clocks with no visible users. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1455225554-13267-2-git-send-email-mturquette@baylibre.com
* clk: Make of_clk_get_parent_count() return unsigned intsStephen Boyd2016-02-261-1/+1
| | | | | | | | | | | | | | | | | | Russell King recently pointed out a bug in the clk-gpio code where it fails to register the clk if of_clk_get_parent_count() returns an error because the "clocks" property isn't present in the DT node. If we're trying to count parents from DT we'd like to know the count, not if there is a "clocks" property or not. Furthermore, some drivers are assigning the return value to their clk_init_data::num_parents member which is unsigned, leading to potentially large numbers of parents when the property isn't present. Let's change the API to return an unsigned int instead of an int. All the callers just want to know the count anyway, and this avoids the bug that was in the clk-gpio driver. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: provider: Remove of_gpio_{gate,mux}_clk_setup() prototypesStephen Boyd2016-02-061-4/+0
| | | | | | | | These functions either never existed or were only used in OF_CLK_DECLARE() macros. Remove the dead prototypes. Cc: Jyri Sarha <jsarha@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: Deprecate CLK_IS_ROOTStephen Boyd2016-02-061-1/+1
| | | | | | | | | | | We don't use CLK_IS_ROOT but in a few places in the common clk framework core. Let's replace those checks with a check for the number of parents a clk has instead of the flag, freeing up one flag for something else. We don't remove the flag yet so that things keep building, but we'll remove it once all drivers have removed their flag usage. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: add clk_unregister_fixed_rate()Masahiro Yamada2016-01-291-1/+1
| | | | | | | Allow to unregister fixed rate clock. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: add clk_unregister_fixed_factor()Masahiro Yamada2016-01-291-0/+1
| | | | | | | Allow to unregister fixed factor clock. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: move the common clock's to_clk_*(_hw) macros to clk-provider.hGeliang Tang2016-01-291-0/+18
| | | | | | | | | | to_clk_*(_hw) macros have been repeatedly defined in many places. This patch moves all the to_clk_*(_hw) definitions in the common clock framework to public header clk-provider.h, and drop the local definitions. Signed-off-by: Geliang Tang <geliangtang@163.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk-divider: make sure read-only dividers do not write to their registerHeiko Stuebner2016-01-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Commit e6d5e7d90be9 ("clk-divider: Fix READ_ONLY when divider > 1") removed the special ops struct for read-only clocks and instead opted to handle them inside the regular ops. On the rk3368 this results in breakage as aclkm now gets set a value. While it is the same divider value, the A53 core still doesn't like it, which can result in the cpu ending up in a hang. The reason being that "ACLKENMasserts one clock cycle before the rising edge of ACLKM" and the clock should only be touched when STANDBYWFIL2 is asserted. To fix this, reintroduce the read-only ops but do include the round_rate callback. That way no writes that may be unsafe are done to the divider register in any case. The Rockchip use of the clk_divider_ops is adapted to this split again, as is the nxp, lpc18xx-ccu driver that was included since the original commit. On lpc18xx-ccu the divider seems to always be read-only so only uses the new ops now. Fixes: e6d5e7d90be9 ("clk-divider: Fix READ_ONLY when divider > 1") Reported-by: Zhang Qing <zhangqing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Merge branch 'clk-rockchip' into clk-nextMichael Turquette2015-12-231-0/+1
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| * clk: add flag for clocks that need to be enabled on rate changesHeiko Stuebner2015-12-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Some clocks need to be enabled to accept rate changes. This patch adds a new flag CLK_SET_RATE_UNGATE that lets clk_change_rate enable the clock before trying to change the rate and disable it again afterwards. This of course doesn't effect clocks that are already running at that point, as their refcount will only temporarily increase. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
* | clk: Use static inline functions instead of macros for dummiesGeert Uytterhoeven2015-11-201-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | if CONFIG_OF=n: drivers/clk/clk-cs2000-cp.c: In function ‘cs2000_remove’: drivers/clk/clk-cs2000-cp.c:453:22: warning: unused variable ‘np’ [-Wunused-variable] struct device_node *np = dev->of_node; ^ Convert dummies of_clk_del_provider() and of_clk_init() from macros to static inline functions to kill such compiler warnings. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | clk: fix a typo in comment block of struct clk_rate_requestMasahiro Yamada2015-11-201-1/+1
|/ | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: Add clk_hw_is_enabled() for use by clk providersJoachim Eastwood2015-10-261-0/+1
| | | | | | | | | Add clk_hw_is_enabled() to the provider APIs so clk providers can use a struct clk_hw instead of a struct clk to check if a clk is enabled or not. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: Add stubs for of_clk_*() APIs when CONFIG_OF=nStephen Boyd2015-10-261-0/+9
| | | | | | | | | | | | | | | | | Compiling the versatile clock driver with COMPILE_TEST=y and CONFIG_OF=n leads to the following error: drivers/clk/versatile/clk-sp810.c: In function 'clk_sp810_of_setup': drivers/clk/versatile/clk-sp810.c:103:6: error: implicit declaration of function 'of_clk_parent_fill' [-Werror=implicit-function-declaration] Silence it by providing stubs APIs for of_clk_parent_fill(). Throw in a stub for of_clk_get_parent_count() too because we're in the area. Reported-by: kbuild test robot <fengguang.wu@intel.com> Cc: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: Remove clk_{register,unregister}_multiplier()Stephen Boyd2015-10-231-7/+0
| | | | | | | | | These APIs aren't used, so remove them. This can be reverted if we get a user at some point. Reviewed-by: Maxime Ripard <maxime.ripard@free-electrons.com> Suggested-by: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Merge tag 'sunxi-clocks-for-4.4' of ↵Stephen Boyd2015-10-211-0/+42
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next Pull Allwinner clock additions for 4.4 from Maxime Ripard: - Support for the Audio PLL and child clocks - Support for the A33 AHB gates - New clk-multiplier generic driver * tag 'sunxi-clocks-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: clk: sunxi: mod1 clock support clk: sunxi: codec clock support clk: sunxi: pll2: Add A13 support clk: sunxi: Add a driver for the PLL2 clk: Add a basic multiplier clock clk: sunxi: Add A33 gates support
| * clk: Add a basic multiplier clockMaxime Ripard2015-10-211-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some clocks are using a multiplier component, however, unlike their mux, gate or divider counterpart, these factors don't have a basic clock implementation. This leads to code duplication across platforms that want to use that kind of clocks, and the impossibility to use the composite clocks with such a clock without defining your own rate operations. Create such a driver in order to remove these issues, and hopefully factor the implementations, reducing code size across platforms and consolidating the various implementations. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
* | clk: Make clk input parameter of __clk_get_name() constGeert Uytterhoeven2015-10-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | When calling __clk_get_name() on a const clock: warning: passing argument 1 of '__clk_get_name' discards 'const' qualifier from pointer target type include/linux/clk-provider.h:613:13: note: expected 'struct clk *' but argument is of type 'const struct clk *' __clk_get_name() does not modify the passed clock, hence make it const. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | clk: fractional-divider: keep mwidth and nwidth internallyAndy Shevchenko2015-10-021-1/+2
|/ | | | | | | | | | The patch adds mwidth and nwidth fields to the struct clk_fractional_divider for further usage. While here, use GENMASK() instead of open coding this functionality. Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: Constify clk_hw argument to provider APIsStephen Boyd2015-08-241-7/+7
| | | | | | | We don't modify the clk_hw argument in these functions, so it's safe to mark it as const. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: Remove unused provider APIsStephen Boyd2015-08-241-6/+0
| | | | | | | Remove these APIs now that we've converted all users to the replacement struct clk_hw based versions. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: Add clk_hw_*() APIs for use by clk providersStephen Boyd2015-08-241-0/+9
| | | | | | | | clk providers shouldn't need to use the consumer APIs (clk.h). Add provider APIs to replace the __clk_*() APIs that take a struct clk_hw as their first argument instead of a struct clk. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: gpio: Mark parent_names array constStephen Boyd2015-07-281-1/+1
| | | | | | | | Let's encourage const arrays of parent names like other basic clock types. Cc: Sergej Sawazki <ce3a@gmx.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: allow a clk divider with max divisor when zeroJim Quinlan2015-07-281-0/+4
| | | | | | | | | | | | | | | | | This commit allows certain Broadcom STB clock dividers to be used with clk-divider.c. It allows for a clock whose field value is the equal to the divisor, execpt when the field value is zero, in which case the divisor is 2^width. For example, consider a divisor clock with a two bit field: value divisor 0 4 1 1 2 2 3 3 Signed-off-by: Jim Quinlan <jim2101024@gmail.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
* Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd2015-07-281-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * cleanup-clk-h-includes: (62 commits) clk: Remove clk.h from clk-provider.h clk: h8300: Remove clk.h and clkdev.h includes clk: at91: Include clk.h and slab.h clk: ti: Switch clk-provider.h include to clk.h clk: pistachio: Include clk.h clk: ingenic: Include clk.h clk: si570: Include clk.h clk: moxart: Include clk.h clk: cdce925: Include clk.h clk: Include clk.h in clk.c clk: zynq: Include clk.h clk: ti: Include clk.h clk: sunxi: Include clk.h and remove unused clkdev.h includes clk: st: Include clk.h clk: qcom: Include clk.h clk: highbank: Include clk.h clk: bcm: Include clk.h clk: versatile: Remove clk.h and clkdev.h includes clk: ux500: Remove clk.h and clkdev.h includes clk: tegra: Properly include clk.h ...
| * clk: Remove clk.h from clk-provider.hStephen Boyd2015-07-201-1/+1
| | | | | | | | | | | | | | | | | | Remove clk.h from clk-provider.h so that we can clearly split clk providers from clk consumers. This will allow us to quickly detect when clock providers are using the consumer APIs by looking at the includes. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | clk: Allow providers to configure min/max ratesStephen Boyd2015-07-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | clk providers are using the consumer APIs to set min/max rates on the clock they're providing. To encourage clk providers to move away from the consumer APIs, add a provider API to set the min/max rate of a clock. The assumption is that this is done before the clock can be requested via clk_get() and that the clock rate is already within the boundaries of the min/max that's configured. Tested-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | Merge branch 'clk-determine-rate-struct' into clk-nextStephen Boyd2015-07-281-20/+29
|\ \ | | | | | | | | | | | | | | | * clk-determine-rate-struct: clk: fix some determine_rate implementations clk: change clk_ops' ->determine_rate() prototype
| * | clk: change clk_ops' ->determine_rate() prototypeBoris Brezillon2015-07-271-20/+29
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clock rates are stored in an unsigned long field, but ->determine_rate() (which returns a rounded rate from a requested one) returns a long value (errors are reported using negative error codes), which can lead to long overflow if the clock rate exceed 2Ghz. Change ->determine_rate() prototype to return 0 or an error code, and pass a pointer to a clk_rate_request structure containing the expected target rate and the rate constraints imposed by clk users. The clk_rate_request structure might be extended in the future to contain other kind of constraints like the rounding policy, the maximum clock inaccuracy or other things that are not yet supported by the CCF (power consumption constraints ?). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Jonathan Corbet <corbet@lwn.net> CC: Tony Lindgren <tony@atomide.com> CC: Ralf Baechle <ralf@linux-mips.org> CC: "Emilio López" <emilio@elopez.com.ar> CC: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Tero Kristo <t-kristo@ti.com> CC: Peter De Schrijver <pdeschrijver@nvidia.com> CC: Prashant Gaikwad <pgaikwad@nvidia.com> CC: Stephen Warren <swarren@wwwdotorg.org> CC: Thierry Reding <thierry.reding@gmail.com> CC: Alexandre Courbot <gnurou@gmail.com> CC: linux-doc@vger.kernel.org CC: linux-kernel@vger.kernel.org CC: linux-arm-kernel@lists.infradead.org CC: linux-omap@vger.kernel.org CC: linux-mips@linux-mips.org CC: linux-tegra@vger.kernel.org [sboyd@codeaurora.org: Fix parent dereference problem in __clk_determine_rate()] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> [sboyd@codeaurora.org: Folded in fix from Heiko for fixed-rate clocks without parents or a rate determining op] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | clk: add gpio controlled clock multiplexerSergej Sawazki2015-07-061-0/+17
|/ | | | | | | | | | | | | Add a common clock driver for basic gpio controlled clock multiplexers. This driver can be used for devices like 5V41068A or 831721I from IDT or for discrete multiplexer circuits. The 'select' pin selects one of two parent clocks. Cc: Jyri Sarha <jsarha@ti.com> Signed-off-by: Sergej Sawazki <ce3a@gmx.de> [sboyd@codeaurora.org: Fix error paths to free memory and do it in the correct order] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Merge tag 'tegra-for-4.2-clk' of ↵Michael Turquette2015-06-201-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next clk: tegra: Changes for v4.2-rc1 This contains the EMC clock driver that's been exhaustively reviewed and tested. It also includes a change to the clock core that allows a clock provider to perform low-level reparenting of clocks. This is required by the EMC clock driver because the reparenting needs to be done at a very specific point in time during the EMC frequency switch.
| * clk: Expose clk_hw_reparent() to providersTomeu Vizoso2015-05-131-0/+1
| | | | | | | | | | | | | | | | To be used by clock implementations for switching to a new parent during rate change. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* | Merge branch 'clk-exynos-cpu-clk' into clk-nextMichael Turquette2015-06-201-0/+1
|\ \ | | | | | | | | | | | | Folded into this merge commit is a build error fix: s/clk/core in clk_change_rate due to the new struct clk_core
| * | clk: add CLK_RECALC_NEW_RATES clock flag for Exynos cpu clock supportBartlomiej Zolnierkiewicz2015-06-201-0/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This flag is needed to fix the issue with wrong dividers being setup by Common Clock Framework when using the new Exynos cpu clock support. The issue happens because clk_core_set_rate_nolock() calls clk_calc_new_rates(clk, rate) before both pre/post clock notifiers have a chance to run. In case of Exynos cpu clock support pre/post clock notifiers are registered for mout_apll clock which is a parent of armclk cpu clock and dividers are modified in both pre and post clock notifier. This results in wrong dividers values being later programmed by clk_change_rate(top). To workaround the problem CLK_RECALC_NEW_RATES flag is added and it is set for mout_apll clock later so the correct divider values are re-calculated after both pre and post clock notifiers had run. For example when using "performance" governor on Exynos4210 Origen board the cpufreq-dt driver requests to change the frequency from 1000MHz to 1200MHz and after the change state of the relevant clocks is following: Without use of CLK_GET_RATE_NOCACHE flag: fout_apll rate: 1200000000 fout_apll_div_2 rate: 600000000 mout_clkout_cpu rate: 600000000 div_clkout_cpu rate: 600000000 clkout_cpu rate: 600000000 mout_apll rate: 1200000000 armclk rate: 1200000000 mout_hpm rate: 1200000000 div_copy rate: 300000000 div_hpm rate: 300000000 mout_core rate: 1200000000 div_core rate: 1200000000 div_core2 rate: 1200000000 arm_clk_div_2 rate: 600000000 div_corem0 rate: 300000000 div_corem1 rate: 150000000 div_periph rate: 300000000 div_atb rate: 300000000 div_pclk_dbg rate: 150000000 sclk_apll rate: 1200000000 sclk_apll_div_2 rate: 600000000 With use of CLK_GET_RATE_NOCACHE flag: fout_apll rate: 1200000000 fout_apll_div_2 rate: 600000000 mout_clkout_cpu rate: 600000000 div_clkout_cpu rate: 600000000 clkout_cpu rate: 600000000 mout_apll rate: 1200000000 armclk rate: 1200000000 mout_hpm rate: 1200000000 div_copy rate: 200000000 div_hpm rate: 200000000 mout_core rate: 1200000000 div_core rate: 1200000000 div_core2 rate: 1200000000 arm_clk_div_2 rate: 600000000 div_corem0 rate: 300000000 div_corem1 rate: 150000000 div_periph rate: 300000000 div_atb rate: 240000000 div_pclk_dbg rate: 120000000 sclk_apll rate: 150000000 sclk_apll_div_2 rate: 75000000 Without this change cpufreq-dt driver showed ~10 mA larger energy consumption when compared to cpufreq-exynos one when "performance" cpufreq governor was used on Exynos4210 SoC based Origen board. This issue was probably meant to be workarounded by use of CLK_GET_RATE_NOCACHE and CLK_DIVIDER_READ_ONLY clock flags in the original Exynos cpu clock patchset (in "[PATCH v12 6/6] clk: samsung: remove unused clock aliases and update clock flags" patch) but usage of these flags is not sufficient to fix the issue observed. Cc: Thomas Abraham <thomas.ab@samsung.com> Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
* | clk: fixed: Add comment to clk_fixed_set_rateDaniel Thompson2015-06-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently it is not made explicit why clk_fixed_set_rate() can ignore its arguments and unconditionally return success. Add a comment to explain this. We also mark the clk_ops table const since it should never be modified at runtime. Suggested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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