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* net: dsa: bcm_sf2: Fix non static symbol warningWei Yongjun2016-09-161-1/+1
| | | | | | | | | | | Fixes the following sparse warning: drivers/net/dsa/bcm_sf2.c:963:19: warning: symbol 'bcm_sf2_io_ops' was not declared. Should it be static? Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: bcm_sf2: Get VLAN_PORT_MASK from b53_deviceFlorian Fainelli2016-09-112-3/+1
| | | | | | | | | | | While migrating the bcm_sf2 driver to use b53_common, we left a small piece untouched where we kept our local copy of the per-port port_vlan_ctl bitmask value. This value is now maintained by b53_device so we need to use it instead of our local (and now stale) copy of it. Fixes: f458995b9ad8 ("net: dsa: bcm_sf2: Utilize core B53 driver when possible") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: mv88e6xxx: make global2 code optionalVivien Didelot2016-09-064-1/+74
| | | | | | | | | | | | | Since not every chip has a Global2 set of registers, make its support optional, in which case the related functions will return -EOPNOTSUPP. This also allows to reduce the size of the mv88e6xxx driver for devices such as home routers embedding Ethernet chips without Global2 support. It is present on most recent chips, thus enable its support by default. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: mv88e6xxx: move Global2 codeVivien Didelot2016-09-065-450/+521
| | | | | | | | | | | | | | | | | | Marvell chips are composed of multiple SMI devices. One of them at address 0x1C is called Global2. It provides an extended set of registers, used for interrupt control, EEPROM access, indirect PHY access (to bypass the PHY Polling Unit) and cross-chip related setup. Most chips have it, but some others don't (older ones such as 6060). Now that its related code is isolated in mv88e6xxx_g2_* functions, move it to its own global2.c file, making most of its setup code static. Document each registers in the meantime. Its compilation can be later avoided for chips without such registers. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: mv88e6xxx: fix module namingVivien Didelot2016-09-061-1/+2
| | | | | | | | | Since the mv88e6xxx.c file has been renamed, the driver compiled as a module is called chip.ko instead of mv88e6xxx.ko. Fix this. Fixes: fad09c73c270 ("net: dsa: mv88e6xxx: rename single-chip support") Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: remove ds_to_privVivien Didelot2016-09-014-60/+60
| | | | | | | | Access the priv member of the dsa_switch structure directly, instead of having an unnecessary helper. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: mv88e6xxx: add MDB supportVivien Didelot2016-08-311-0/+65
| | | | | | | | Add support for the MDB operations. This consists of loading/purging/dumping multicast addresses for a given port in the ATU. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: mv88e6xxx: make switchdev DB ops genericVivien Didelot2016-08-311-43/+57
| | | | | | | | | | | | | The MDB support for the mv88e6xxx driver will be very similar to the FDB support, since it consists of loading/purging/dumping address to/from the Address Translation Unit (ATU). Prepare the support for MDB by making the FDB code accessing the ATU generic. The FDB operations now provide access to the unicast addresses while the MDB operations will provide access to the multicast addresses. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2016-08-302-3/+7
|\ | | | | | | | | | | | | All three conflicts were cases of simple overlapping changes. Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: dsa: bcm_sf2: Fix race condition while unmasking interruptsFlorian Fainelli2016-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We kept shadow copies of which interrupt sources we have enabled and disabled, but due to an order bug in how intrl2_mask_clear was defined, we could run into the following scenario: CPU0 CPU1 intrl2_1_mask_clear(..) sets INTRL2_CPU_MASK_CLEAR bcm_sf2_switch_1_isr read INTRL2_CPU_STATUS and masks with stale irq1_mask value updates irq1_mask value Which would make us loop again and again trying to process and interrupt we are not clearing since our copy of whether it was enabled before still indicates it was not. Fix this by updating the shadow copy first, and then unasking at the HW level. Fixes: 246d7f773c13 ("net: dsa: add Broadcom SF2 switch driver") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mv88e6xxx: Fix ingress rate removal for mv6131 chipsJamie Lentin2016-08-231-2/+6
| | | | | | | | | | | | | | | | | | | | The PORT_RATE_CONTROL register works differently on 88e6095/6095f/6131 in comparison to 6123/61/65, and 0x0 disables. The distinction was lost Linux 4.1 --> 4.2 Signed-off-by: Jamie Lentin <jm@lentin.co.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
| * dsa: mv88e6xxx: hide unused functionsArnd Bergmann2016-08-121-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_NET_DSA_HWMON is disabled, we get warnings about two unused functions whose only callers are all inside of an #ifdef: drivers/net/dsa/mv88e6xxx.c:3257:12: 'mv88e6xxx_mdio_page_write' defined but not used [-Werror=unused-function] drivers/net/dsa/mv88e6xxx.c:3244:12: 'mv88e6xxx_mdio_page_read' defined but not used [-Werror=unused-function] This adds another ifdef around the function definitions. The warnings appeared after the functions were marked 'static', but the problem was already there before that. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 57d3231057e9 ("net: dsa: mv88e6xxx: fix style issues") Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: bcm_sf2: Utilize mask clear/set helpers in bcm_sf2_intr_disableFlorian Fainelli2016-08-261-4/+2
| | | | | | | | | | | | | | | | And while at it, remove the unecessary writing of zeroes to the CPU_MASK_CLEAR register since it has no functional use. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: bcm_sf2: Remove duplicate codeFlorian Fainelli2016-08-263-950/+17
| | | | | | | | | | | | | | | | | | | | | | Now that we are using b53_common for most VLAN, FDB and bridge operations, delete all the redundant code that we had in bcm_sf2.c to keep only the integration specific logic that we have to deal with: power management, link management and the external interfaces (RGMII, MDIO). Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: bcm_sf2: Utilize core B53 driver when possibleFlorian Fainelli2016-08-263-47/+195
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Broadcom Starfighter2 is almost entirely register compatible with B53, yet for historical reasons came up first in the tree and is now being updated to utilize b53_common.c to the fullest extent possible. A few things need to be adjusted to allow that: - the switch "core" registers currently operate on a 32-bit address, whereas b53 passes a page + reg pair to offset from, so we need to convert that, thankfully there is a generic formula to do that - the link managemenent is not self contained with the B53/CORE register set, but instead is in the SWITCH_REG block which is part of the integration glue logic, so we keep that entirely custom here because this really is part of the existing bcm_sf2 implementation - there are additional power management constraints on the port's memories that make us keep the port_enable/disable callbacks custom for now, also, we support tagging whereas b53_common does not support that yet All the VLAN and bridge code is entirely identical though so, avoid duplicating it. Other things will be migrated in the future like EEE and possibly Wake-on-LAN. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: b53: Add JOIN_ALL_VLAN supportFlorian Fainelli2016-08-262-4/+29
| | | | | | | | | | | | | | | | | | | | | | In order to migrate the bcm_sf2 driver over to the b53 driver for most VLAN/FDB/bridge operations, we need to add support for the "join all VLANs" register and behavior which allows us to make a given port join all VLANs and avoid setting specific VLAN entries when it is leaving the bridge. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: b53: Define SF2 MIB layoutFlorian Fainelli2016-08-262-0/+69
| | | | | | | | | | | | | | | | | | The 58xx and 7445 chips use the Starfighter2 code, define its MIB layout and introduce a helper function: is58xx() which checks for both of these IDs for now. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: b53: Prepare to support 7445 switchFlorian Fainelli2016-08-262-0/+13
| | | | | | | | | | | | | | | | | | Allocate a device entry for the Broadcom BCM7445 integrated switch currently backed by bcm_sf2.c. Since this is the latest generation, it has 4 ARL entries, 4K VLANs and uses Port 8 for the CPU/IMP port. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: b53: Initialize ds->ops in b53_switch_allocFlorian Fainelli2016-08-261-2/+1
| | | | | | | | | | | | | | | | | | In order to allow drivers to override specific dsa_switch_driver callbacks, initialize ds->ops to b53_switch_ops earlier, which avoids having to expose this structure to glue drivers. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: rename switch operations structureVivien Didelot2016-08-244-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the dsa_switch_driver structure contains only function pointers as it is supposed to, rename it to the more appropriate dsa_switch_ops, uniformly to any other operations structure in the kernel. No functional changes here, basically just the result of something like: s/dsa_switch_driver *drv/dsa_switch_ops *ops/g However keep the {un,}register_switch_driver functions and their dsa_switch_drivers list as is, since they represent the -- likely to be deprecated soon -- legacy DSA registration framework. In the meantime, also fix the following checks from checkpatch.pl to make it happy with this patch: CHECK: Comparison to NULL could be written "!ops" #403: FILE: net/dsa/dsa.c:470: + if (ops == NULL) { CHECK: Comparison to NULL could be written "ds->ops->get_strings" #773: FILE: net/dsa/slave.c:697: + if (ds->ops->get_strings != NULL) CHECK: Comparison to NULL could be written "ds->ops->get_ethtool_stats" #824: FILE: net/dsa/slave.c:785: + if (ds->ops->get_ethtool_stats != NULL) CHECK: Comparison to NULL could be written "ds->ops->get_sset_count" #835: FILE: net/dsa/slave.c:798: + if (ds->ops->get_sset_count != NULL) total: 0 errors, 0 warnings, 4 checks, 784 lines checked Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: mv88e6xxx: Enable PORT_CONTROL_FORWARD_UNKNOWN for DSA-tagged CPU portsJamie Lentin2016-08-221-2/+2
| | | | | | | | | | | | | | | | | | Without it, a mv88e6131 switch will not forward incoming unicast packets to the CPU port. Signed-off-by: Jamie Lentin <jm@lentin.co.uk> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | dsa: mv88e6xxx: Delete ppu timer when removing moduleAndrew Lunn2016-08-221-0/+13
| | | | | | | | | | | | | | | | | | | | The PPU method of accessing PHYs makes use of a timer. Make sure this timer is deleted before unloading the driver. Reported-by: Jamie Lentin <jm@lentin.co.uk> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: mv88e6xxx: Fix support for DSA tagging for older switches.Andrew Lunn2016-08-223-27/+31
| | | | | | | | | | | | | | | | | | | | Older chips only support DSA tagging on the CPU port. New devices support both DSA and EDSA. The driver needs to tell the core the tag protocol to use, and configure the switch for what is available. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: Allow the DSA driver to indicate the tag protocolAndrew Lunn2016-08-224-4/+24
| | | | | | | | | | | | | | | | | | | | DSA drivers may drive different families of switches which need different tag protocol. Rather than hard code the tag protocol in the driver structure, have a callback for the DSA core to call. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: bcm_sf2: Remove probing through old DSA bindingFlorian Fainelli2016-08-191-15/+0
| | | | | | | | | | | | | | | | | | | | Remove our dsa_switch_driver::drv_probe callback to prevent probing through the old DSA binding, not that this could happen anymore now that we have moved the matching compatible string from net/dsa/dsa.c to drivers/net/dsa/bcm_sf2.c, so this is essentially dead code. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: bcm_sf2: Use device managed helpersFlorian Fainelli2016-08-191-23/+13
| | | | | | | | | | | | | | | | | | Now that we have converted the drivers into a proper platform device driver, we can use the device managed helper functions to simplify the error paths a bit wrt. register resources and IRQs. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: bcm_sf2: Make it a real platform device driverFlorian Fainelli2016-08-191-60/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | The Broadcom Starfighter 2 switch driver should be a proper platform driver, now that the DSA code has been updated to allow that, register a switch device, feed it with the proper configuration data coming from Device Tree and register our switch device with DSA. The bulk of the changes consist in moving what bcm_sf2_sw_setup() did into the platform driver probe function. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | dsa: mv88e6xxx: Make mv88e6xxx_wait() timeout verboseAndrew Lunn2016-08-191-0/+1
| | | | | | | | | | | | | | | | When mv88e6xxx_wait() returns a timeout, something bad has happened. Make sure it is noticed by logging an error. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* | dsa: mv88e6xxx: Use mv88e6xx_wait in mv88e6xxx_update()Andrew Lunn2016-08-191-12/+4
| | | | | | | | | | | | | | | | | | Now that mv88e6xx_wait() iterated on a counter than a fixed time interval, it implements the same mechanism as mv88e6xxx_update() uses. So use it in mv88e6xx_wait(). Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* | dsa: mv88e6xxx: Timeout based on iterations, not timeAndrew Lunn2016-08-191-9/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mv88e6xxx driver times out operations on the switch based on looping until an elapsed wall clock time is reached. However, if usleep_range() sleeps much longer than expected, it could timeout with an error without actually checking to see if the devices has completed the operation. So replace the elapsed time with a fixed upper bound on the number of loops. Testing on various switches has shown that switches takes either 0 or 1 iteration, so a maximum of 16 iterations is a safe limit. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: mv88e6xxx: use the new PHY APIVivien Didelot2016-08-151-135/+50
| | | | | | | | | | | | | | | | | | | | | | This commit replaces every MDIO direct or indirect access with the new generic mv88e6xxx_phy_* routines. This allows us to get rid of the mv88e6xxx_mdio_{read,write}_{,in}direct and {_,}mv88e6xxx_mdio_page_{read,write} functions. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: mv88e6xxx: describe PHY page and SerDesVivien Didelot2016-08-152-17/+105
| | | | | | | | | | | | | | | | Add mv88e6xxx_phy_page_{read,write} routines and use them to access the SerDes PHY device registers. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: mv88e6xxx: abstract PHY opsVivien Didelot2016-08-152-51/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | Old chips use a direct access to the PHY devices registers. Next chips have a PHY Polling Unit (PPU) which needs to be disabled before accessing PHY registers. Newer chips have an indirect access to the PHY devices so that disabling the PPU is not necessary. Introduce a new phy_ops structure in the chip to describe the required PHY access routines. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: mv88e6xxx: rework Global2 SMI PHY accessVivien Didelot2016-08-152-56/+90
| | | | | | | | | | | | | | | | | | | | | | | | Describe the presence of the Global2 SMI PHY registers, used to indirectly access the internal SMI devices registers on some chips. Also temporarily forward declare mv88e6xxx_g2_smi_phy_{read,write} to use them in mv88e6xxx_mdio_{read,write}_indirect, before getting rid of the later. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: mv88e6xxx: describe Multi-chip registersVivien Didelot2016-08-152-16/+26
| | | | | | | | | | | | | | | | | | Add flags to describe the presence of SMI Command and Data registers used to indirectly access internal SMI devices registers when the switch SMI address is not zero. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: mv88e6xxx: rename _mv88e6xxx_waitVivien Didelot2016-08-151-30/+33
| | | | | | | | | | | | | | | | Now that there is no locked version of the wait routine anymore, rename the _ prefixed version and make it use the new read API. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: b53: remove .owner and .bus fields for driverWei Yongjun2016-08-141-2/+0
| | | | | | | | | | | | | | | | | | | | Remove .owner and .bus fields since module_spi_driver() is used which set them automatically. Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: Wei Yongjun <weiyj.lk@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: dsa: b53: constify b53_io_ops structuresJulia Lawall2016-08-096-6/+8
|/ | | | | | | | | | The b53_io_ops structures are never modified, so declare them as const. Done with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: b53: Add missing ULL suffix for 64-bit constantGeert Uytterhoeven2016-08-061-1/+1
| | | | | | | | | | | On 32-bit (e.g. with m68k-linux-gnu-gcc-4.1): drivers/net/dsa/b53/b53_common.c: In function ‘b53_arl_read’: drivers/net/dsa/b53/b53_common.c:1072: warning: integer constant is too large for ‘long’ type Fixes: 1da6df85c6fbed8f ("net: dsa: b53: Implement ARL add/del/dump operations") Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* dsa: b53: remove redundant ifxypron.glpk@gmx.de2016-08-011-2/+1
| | | | | | | | For pdata == null the code leaves with an error. There is no need to check the condition again. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: bcm_sf2: Unwind errors in correct orderFlorian Fainelli2016-07-301-2/+3
| | | | | | | | | | | | | In case we cannot complete bcm_sf2_sw_setup() for any reason, and we go to the out_unmap label, but the MDIO bus has not been registered yet, we will hit the BUG condition in drivers/net/phy/mdio_bus.c about the bus not being registered. Fix this by dedicating a specific lable for when we fail after the MDIO bus has been successfully registered. Fixes: 461cd1b03e32 ("net: dsa: bcm_sf2: Register our slave MDIO bus") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: mv88e6xxx: kill last locked reg_readVivien Didelot2016-07-201-16/+19
| | | | | | | | | | Get rid of the last usage of the locked mv88e6xxx_reg_read function with a new mv88e6xxx_port_read helper, useful later for chips with different port registers base address. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: mv88e6xxx: rework EEPROM accessVivien Didelot2016-07-202-283/+239
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 6352 family of switches and compatibles provide a 8-bit address and 16-bit data access to an optional EEPROM. Newer chip such as the 6390 family slightly changed the access to 16-bit address and 8-bit data. This commit cleans up the EEPROM access code for 16-bit access and makes it easy to eventually introduce future support for 8-bit access. Here's a list of notable changes brought by this patch: - provide Global2 unlocked helpers for EEPROM commands - remove eeprom_mutex, only reg_lock is necessary for driver functions - eeprom_len is 0 for chip without EEPROM, so return it directly - the Running bit must be 0 before r/w, so wait for Busy *and* Running - remove now unused mv88e6xxx_wait and mv88e6xxx_reg_write - other than that, the logic (in _{get,set}_eeprom16) didn't change Chips with an 8-bit EEPROM access will require to implement the 8-suffixed variant of G2 helpers and the related flag: #define MV88E6XXX_FLAGS_EEPROM8 \ (MV88E6XXX_FLAG_G2_EEPROM_CMD | \ MV88E6XXX_FLAG_G2_EEPROM_ADDR) Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: mv88e6xxx: remove unused phy_mutexVivien Didelot2016-07-201-6/+0
| | | | | | | | Only reg_lock is necessary now and phy_mutex is dead. Remove it. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: mv88e6xxx: add support for DSA ageing timeVivien Didelot2016-07-191-0/+14
| | | | | | | | Implement the DSA driver function to configure the bridge ageing time. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: mv88e6xxx: add G1 helper for ageing timeVivien Didelot2016-07-192-5/+54
| | | | | | | | | | | | | | | | All Marvell switch chips from (88E6060 to 88E6390) have a ATU Control register containing bits 11:4 to configure an ATU Age Time quotient. However the coefficient used to calculate the ATU Age Time vary with the models. E.g. 88E6060, 88E6352 and 88E6390 use respectively 16, 15 and 3.75 seconds. Add a age_time_coeff to the info structure to handle this and a Global 1 helper to set the default age time of 5 minutes in the setup code. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: mv88e6xxx: add cap for IRLVivien Didelot2016-07-192-20/+53
| | | | | | | | | | | | | | Add capability flags to describe the presence of Ingress Rate Limit unit registers and an helper function to clear it. In the meantime, fix a few harmless issues: - 6185 and 6095 don't have such registers (reserved) - the previous code didn't wait for the IRL operation to complete Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: mv88e6xxx: add cap for Priority OverrideVivien Didelot2016-07-192-10/+33
| | | | | | | | | Add flags and helpers to describe the presence of Priority Override Table (POT) related registers and simplify the setup of Global 2. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: mv88e6xxx: add cap for PVTVivien Didelot2016-07-192-13/+31
| | | | | | | | | Add flags to describe the presence of Cross-chip Port VLAN Table (PVT) related registers and simplify the setup of Global 2. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: dsa: mv88e6xxx: rework Switch MAC setterVivien Didelot2016-07-192-75/+64
| | | | | | | | | | | | | | | | | Switches such as 88E6185 as 3 Switch MAC registers in Global 1. Newer chips such as 88E6352 have freed these registers in favor of an indirect access in a Switch MAC/WoL/WoF register in Global 2. Explicit this difference with G1 and G2 helpers and flags. Also, note that this indirect access is a single-register which doesn't require to wait for the operation to complete (like Switch MAC, Trunk Mapping, etc.), in contrary to multi-registers indirect accesses with several operations and a busy bit. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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