summaryrefslogtreecommitdiffstats
path: root/drivers/gpu
Commit message (Collapse)AuthorAgeFilesLines
* drm/amdgpu: add the interface of waiting multiple fences (v4)Junwei Zhang2016-11-094-1/+179
| | | | | | | | | | | | | | | | v2: agd: rebase and squash in all the previous optimizations and changes so everything compiles. v3: squash in Slava's 32bit build fix v4: rebase on drm-next (fence -> dma_fence), squash in Monk's ioctl update patch Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org> [sumits: fix checkpatch warnings] Link: http://patchwork.freedesktop.org/patch/msgid/1478290570-30982-2-git-send-email-alexander.deucher@amd.com
* drm: Add stackdepot include for DRM_DEBUG_MMChris Wilson2016-11-081-0/+2
| | | | | | | | | | | | | 0day found that stackdepot.h doesn't get automatically included on all architectures, so remember to add our #include. Reported-by: kbuild test robot <fengguang.wu@intel.com> Fixes: 5705670d0463 ("drm: Track drm_mm allocators and show leaks on shutdown") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Christian König <christian.koenig@amd.com>. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20161108115601.22873-1-chris@chris-wilson.co.uk
* drm/msm: use drm_atomic_set_fence_for_plane() to set the fenceGustavo Padovan2016-11-081-1/+2
| | | | | | | | | | | | drm_atomic_set_fence_for_plane() is smart and won't overwrite plane_state->fence if the user already set an explicit fence there. Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1478513013-3221-3-git-send-email-gustavo@padovan.org
* drm/imx: use drm_atomic_set_fence_for_plane() to set the fenceGustavo Padovan2016-11-081-2/+4
| | | | | | | | | | | | drm_atomic_set_fence_for_plane() is smart and won't overwrite plane_state->fence if the user already set an explicit fence there. Cc: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1478513013-3221-2-git-send-email-gustavo@padovan.org
* drm/atomic: add drm_atomic_set_fence_for_plane()Gustavo Padovan2016-11-081-0/+30
| | | | | | | | | | | This new function should be used by drivers when setting a implicit fence for the plane. It abstracts the fact that the user might have chosen explicit fencing instead. Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1478513013-3221-1-git-send-email-gustavo@padovan.org
* drm: don't override possible_crtcs for primary/cursor planesRob Clark2016-11-081-2/+2
| | | | | | | | | | | | | | | It is kind of a pointless restriction. If userspace does silly things like using crtcA's cursor plane on crtcB, and then setcursor on crtcA, it will end up with the overlay disabled on crtcB. But userspace is allowed to shoot itself like this. v2: don't WARN_ON() if caller did not set ->possible_crtcs. This keeps the existing behavior by default, if caller does not set the ->possible_crtcs. Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1478357521-26542-1-git-send-email-robdclark@gmail.com
* drm/edid: Add the missing "Hz" to VIC 58,59 commentVille Syrjälä2016-11-081-2/+2
| | | | | | | | | | | | All the VICs apart from 58 and 59 have the word "Hz" included in the comment. Include it for 59 and 59 as well. Cc: Shashank Sharma <shashank.sharma@intel.com> Cc: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1478177609-16762-1-git-send-email-ville.syrjala@linux.intel.com
* drm/gma500: remove unused ioctl declarationsJiang Biao2016-11-081-4/+0
| | | | | | | | | psb_gem_create_ioctl and psb_gem_mmap_ioctl are not used currently, their declarations are useless. Signed-off-by: Jiang Biao <jiang.biao2@zte.com.cn> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1477990879-13139-1-git-send-email-jiang.biao2@zte.com.cn
* drm/gma500: make function static to eliminate compiling warningJiang Biao2016-11-081-1/+1
| | | | | | | | | psb_gtt_remove is only used in this file, and make it static to eliminate missing-prototypes compiling warning. Signed-off-by: Jiang Biao <jiang.biao2@zte.com.cn> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1477972185-24826-1-git-send-email-jiang.biao2@zte.com.cn
* drm: update the documentation of drm_framebuffer_unregister_privateRongrong Zou2016-11-081-0/+5
| | | | | | | | | Add obvious description to drm_framebuffer_unregister_private() to explain it is deprecated. Signed-off-by: Rongrong Zou <zourongrong@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1477915196-100299-1-git-send-email-zourongrong@gmail.com
* drm/i915: Enable drm_mm debug when enabling DRM_I915_DEBUGChris Wilson2016-11-081-0/+1
| | | | | | | | | | A frequent issue that arises on shutdown is the drm_mm range manager complaining of a leak. To aide debugging those, drm can now track the allocation callsite and print those for the leaks. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20161029184214.17329-2-chris@chris-wilson.co.uk
* drm: Track drm_mm allocators and show leaks on shutdownChris Wilson2016-11-082-3/+84
| | | | | | | | | | | | | | We can use the kernel's stack tracer and depot to record the allocation site of every drm_mm user. Then on shutdown, as well as warning that allocated nodes still reside with the drm_mm range manager, we can display who allocated them to aide tracking down the leak. v2: Move Kconfig around so it lies underneath the DRM options submenu. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20161031090806.20073-1-chris@chris-wilson.co.uk
* drm: define drm_compat_ioctl NULL on CONFIG_COMPAT=n and reduce #ifdefsJani Nikula2016-11-0234-71/+8
| | | | | | | | | | If we define drm_compat_ioctl NULL on CONFIG_COMPAT=n, we don't have to check for the config everywhere. Reviewed-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1478014844-27454-1-git-send-email-jani.nikula@intel.com
* drm/gma500: Add compat ioctlPatrik Jakobsson2016-11-021-0/+3
| | | | | | | | | | | Hook up drm_compat_ioctl to support 32-bit userspace on 64-bit kernels. It turns out that N2600 and N2800 comes with 64-bit enabled. We previously assumed there where no such systems out there. Cc: stable@vger.kernel.org Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20161101144315.2955-1-patrik.r.jakobsson@gmail.com
* Merge branch 'linux-4.9' of git://github.com/skeggsb/linux into drm-nextDave Airlie2016-10-2844-207/+904
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Karol's work which greatly improves volt/clock changes on a heap of boards, nothing too exciting beyond a random collection of fixes. * 'linux-4.9' of git://github.com/skeggsb/linux: (33 commits) drm/nouveau/fb/nv50: defer DMA mapping of scratch page to oneinit() hook drm/nouveau/fb/gf100: defer DMA mapping of scratch page to oneinit() hook drm/nouveau/pci: set streaming DMA mask early drm/nouveau/kms: add Maxwell to backlight initialization drm/nouveau/bar/nv50: fix bar2 vm size drm/nouveau/disp: remove unused function in sorg94.c drm/nouveau/volt: use kernel's 64-bit signed division function drm/nouveau/core: add missing header dependencies drm/nouveau/gr/nv3x: add 0x0597 kelvin 3d class support drm/nouveau/drm/nouveau: add a LED driver for the NVIDIA logo drm/nouveau/fb/ram: Use Kepler implementation on Maxwell drm/nouveau/volt: Make use of cvb coefficients drm/nouveau/volt/gf100-: Add speedo drm/nouveau/volt: Add implementation for gf100 drm/nouveau/bios/vmap: unk0 field is the mode drm/nouveau/volt: Don't require perfect fit drm/nouveau/clk: Allow boosting only when NvBoost is set drm/nouveau/bios: Add parsing of VPSTATE table drm/nouveau/clk: Respect voltage limits in nvkm_cstate_prog drm/nouveau/clk: Fixup cstate selection ...
| * drm/nouveau/fb/nv50: defer DMA mapping of scratch page to oneinit() hookArd Biesheuvel2016-10-121-10/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | The 100c08 scratch page is mapped using dma_map_page() before the TTM layer has had a chance to set the DMA mask. This means we are still running with the default of 32 when this code executes, and this causes problems for platforms with no memory below 4 GB (such as AMD Seattle) So move the dma_map_page() to the .oneinit hook, which executes after the DMA mask has been set. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/fb/gf100: defer DMA mapping of scratch page to oneinit() hookArd Biesheuvel2016-10-121-12/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | The 100c10 scratch page is mapped using dma_map_page() before the TTM layer has had a chance to set the DMA mask. This means we are still running with the default of 32 when this code executes, and this causes problems for platforms with no memory below 4 GB (such as AMD Seattle) So move the dma_map_page() to the .oneinit hook, which executes after the DMA mask has been set. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/pci: set streaming DMA mask earlyArd Biesheuvel2016-10-121-10/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some subdevices (i.e., fb/nv50.c and fb/gf100.c) map a scratch page using dma_map_page() way before the TTM layer has had a chance to set the DMA mask. This may prevent the driver from loading at all on platforms whose system memory is not covered by the default DMA mask of 32-bit (i.e., when all RAM is above 4 GB). So set a preliminary DMA mask right after constructing the PCI device, and base it on the .dma_bits member of the MMU subdevice, which is what the TTM layer will base the DMA mask on as well. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/kms: add Maxwell to backlight initializationFaris Alsalama2016-10-121-0/+1
| | | | | | | | | | | | Signed-off-by: Faris Alsalama <farisbenbrahem@gmail.com> Acked-by: Acked-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/bar/nv50: fix bar2 vm sizeBen Skeggs2016-10-121-2/+2
| | | | | | | | | | | | The BAR2 page table was being made WAY too big - oops. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/disp: remove unused function in sorg94.cBaoyou Xie2016-10-121-8/+0
| | | | | | | | | | | | | | | | | | | | | | We get 1 warning when building kernel with W=1: drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c:49:1: warning: no previous prototype for 'g94_sor_output_new' [-Wmissing-prototypes] In fact, this function is called by no one and not exported, so this patch removes it. Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/volt: use kernel's 64-bit signed division functionAlexandre Courbot2016-10-121-3/+3
| | | | | | | | | | | | | | | | | | | | Doing direct 64 bit divisions in kernel code leads to references to undefined symbols on 32 bit architectures. Replace such divisions with calls to div64_s64 to make the module usable on 32 bit archs. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/core: add missing header dependenciesBaoyou Xie2016-10-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | We get 2 warnings when building kernel with W=1: drivers/gpu/drm/nouveau/nvkm/core/firmware.c:34:1: warning: no previous prototype for 'nvkm_firmware_get' [-Wmissing-prototypes] drivers/gpu/drm/nouveau/nvkm/core/firmware.c:58:1: warning: no previous prototype for 'nvkm_firmware_put' [-Wmissing-prototypes] In fact, both functions are declared in drivers/gpu/drm/nouveau/include/nvkm/core/firmware.h, so this patch adds missing header dependencies. Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/gr/nv3x: add 0x0597 kelvin 3d class supportIlia Mirkin2016-10-123-0/+3
| | | | | | | | | | | | | | | | | | Tested on a NV34. There are reports of this also working on the other nv3x chips. Largely useful for testing software written for NV2x without having the actual hardware available. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/drm/nouveau: add a LED driver for the NVIDIA logoMartin Peres2016-10-126-0/+208
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We received a donation of a Titan which has this useless feature allowing users to control the brightness of the LED behind the logo of NVIDIA. In the true spirit of open source, let's expose that to the users of very expensive cards! This patch hooks up this LED/PWM to the LED subsystem which allows blinking it in sync with cpu/disk/network/whatever activity (heartbeat is quite nice!). Users may also implement some breathing effect or morse code support in the userspace if they feel like it. v2: - surround the use of the LED framework with ifdef CONFIG_LEDS_CLASS v3: - avoid using ifdefs everywhere, follow the recommendations of /doc/Documentation/CodingStyle. Suggested by Emil Velikov. v4 (Ben): - squashed series of fixes from ml Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/fb/ram: Use Kepler implementation on MaxwellKarol Herbst2016-10-123-12/+9
| | | | | | | | | | | | | | | | This enables memory reclocking on Maxwell. Sadly without a PMU firmware it is useless for gm20x gpus. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/volt: Make use of cvb coefficientsKarol Herbst2016-10-121-2/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I'm quite sure that those coefficients are real close, because while testing the biggest error compared to nvidia was around -1.5% (biggest error with right coefficients is 12.5mV / 600mV = 2%). These coefficients were REed by modifing the voltage map entries and by calculating the set voltage back until I was able to forecast which voltage nvidia sets for a given voltage map entry. With these formulars I am able to precisely predict at which exact temperature Nvidia down- or upvolts due to a changed therm reading. That's why I am quite sure these are right, or at least really really close. v4: Use better coefficients and speedo. v5: Add error message when speedo is missing. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/volt/gf100-: Add speedoKarol Herbst2016-10-125-0/+77
| | | | | | | | | | | | | | | | v5: Squashed speedo related commits. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/volt: Add implementation for gf100Karol Herbst2016-10-124-8/+55
| | | | | | | | | | | | | | | | Since gf100 we need a speedo value for calculating the voltage. The readout will be added in a later patch. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/bios/vmap: unk0 field is the modeKarol Herbst2016-10-122-2/+2
| | | | | | | | | | | | | | | | | | Depending on the value a different formular is used to calculated the voltage for this entry. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/volt: Don't require perfect fitKarol Herbst2016-10-121-5/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | If we calculate the voltage in the table right, we get all kinds of values, which never fit the hardware steps, so we use the closest higher value the hardware can do. v3: Simplify the implementation. v5: Initialize best_err with volt->max_uv. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/clk: Allow boosting only when NvBoost is setKarol Herbst2016-10-124-4/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 0: base clock from the vbios is max clock (default) 1: boost only to boost clock from the vbios 2: boost to max clock available v2: Moved into nvkm_cstate_valid. v4: Check the existence of the clocks before limiting. v5: Default to boost level 0. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/bios: Add parsing of VPSTATE tableKarol Herbst2016-10-123-0/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This table contains three important clocks: base clock: This is the non boosted max clock. tdp clock: The clock at wich the vbios guarentees the TDP won't ever be exceeded at max load (seems to be always the same as the base clock, but behaves differently). boost clock: The avg clock the gpu will stay boosted to. It doesn't seem to affect the behaviour of the nvidia driver at all though. v2: Make clear that base/boost/tdp fields are ids. v5: Rename Base clock to vpstate. Make vbios pointers 32bit. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/clk: Respect voltage limits in nvkm_cstate_progKarol Herbst2016-10-123-1/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We should never allow to select a cstate which current voltage (depending on the temperature) is higher than 1. the max volt entries in the voltage map table. 2. what tha gpu actually can volt to. v3: Use find_best for all cstates before actually trying. Add nvkm_cstate_get function to get cstate by index. v5: Cstates with voltages lower then min_uv are valid. Move nvkm_cstate_get into the previous commit. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/clk: Fixup cstate selectionKarol Herbst2016-10-122-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | Now the cstatei parameter can be used of the nvkm_cstate_prog function to select a specific cstate. v5: Make a constant for the magic value. Use list_last_entry. Add nvkm_cstate_get here instead of in the next commit. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/volt: Add temperature parameter to nvkm_volt_mapKarol Herbst2016-10-123-8/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | The voltage entries actually may map to a different voltage depending on the current temperature. v2: Only read the temperature when actually needed. v5: Be smarter about using max(). Don't read the temperature anymore. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/clk: Let nvkm_clk_tstate take a temperature valueKarol Herbst2016-10-122-12/+11
| | | | | | | | | | | | | | | | | | | | This way other subdevs can notify the clk subdev about temperature changes without the need of clk to poll that value. Also make this function safe to be called from an interrupt handler. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/clk: Add index field to nvkm_cstateKarol Herbst2016-10-122-0/+2
| | | | | | | | | | | | | | | | | | | | | | It is better to read out the id out of the cstate struct directly instead of iterating over the list of cstates over and over again. Especially when we start saving pointers to a nvkm_cstate struct, it makes things easier. v5: Rename field to id. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/volt: Add min_id parameter to nvkm_volt_set_idKarol Herbst2016-10-123-4/+9
| | | | | | | | | | | | | | | | | | | | | | Each pstate has its own voltage map entry like each cstate has. The voltages of those entries act as a floor value for the currently selected pstate and nvidia never sets a voltage below them. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/volt: Parse the max voltage map entriesKarol Herbst2016-10-124-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are at least three "max" entries, which specify the max voltage. Because they are actually normal voltage map entries, they can also be affected by the temperature. Nvidia respects those entries and if they get changed, nvidia uses the lower voltage from all three. We shouldn't exceed those voltages at any given time. v2: State what those entries do in the source. v3: Add the third max entry. v5: Better describe the entries. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/clk: Don't create cstates with voltages higher than what the gpu ↵Karol Herbst2016-10-123-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | can do nvkm_volt_map_min is a copy of nvkm_volt_map, which always returns the lowest possible voltage for a cstate. nvkm_volt_map will get a temperature parameter there later and also fix the voltage calculation, so that this functions will be completly different later. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/volt: Properly detect entry based voltage tablesKarol Herbst2016-10-123-7/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | There is a field in the voltage table which tells us if the VIDs are taken from the entries or calculated through the header. v2: Don't break older versions. v5: Reverse flag name. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/bios/volt: Handle voltage table version 0x50 with zeroed headerKarol Herbst2016-10-121-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Fermi+ GPUs specify VID information via voltage table entries, rather than describing them as a range in the header. The mask may be bigger than 0x1fffff, but this value is already >2V, so it will be fine for now. This patch fixes volting issues on those cards enabling them to switch cstates. v6: rework message Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/fb/ramgk104: Touch 0x62c000 only when there is a display engineKarol Herbst2016-10-121-4/+12
| | | | | | | | | | | | Signed-off-by: Karol Herbst <karolherbst@gmail.com> Tested-by: Aidan Epstein <aidan@jmad.org> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/clk: Fix potential NULL pointer access when there is no fb subdevKarol Herbst2016-10-121-2/+3
| | | | | | | | | | Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/iccsense: Parse the resistors and config the right wayKarol Herbst2016-10-124-92/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously we parsed that table a bit wrong: 1. The entry layout depends on the sensor type used. 2. We have all resitors in one entry for the INA3221. 3. The config is already included in the vbios. This commit addresses that issue and with that we should be able to read out the right power consumption for every GPU with a INA209, INA219 and INA3221. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/nouveau: bios pointers may be unaligned, use proper accessorsIlia Mirkin2016-10-122-6/+4
| | | | | | | | | | | | | | | | | | | | This can show up on SPARC or other architectures that don't handle unaligned accesses. The kernel normally fixes these up, but it shouldn't have to. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96836 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/ibus/gk20a: use udelay() in interrupt contextAlexandre Courbot2016-10-121-1/+1
| | | | | | | | | | | | | | | | | | gk20a_ibus_init_ibus_ring() can be called from gk20a_ibus_intr(), in non-interruptible context. Replace use of usleep_range() with udelay(). Reported-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | Merge tag 'topic/drm-misc-2016-10-27' of ↵Dave Airlie2016-10-28112-777/+3947
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/git/drm-intel into drm-next Pull request already again to get the s/fence/dma_fence/ stuff in and allow everyone to resync. Otherwise really just misc stuff all over, and a new bridge driver. * tag 'topic/drm-misc-2016-10-27' of git://anongit.freedesktop.org/git/drm-intel: drm/bridge: fix platform_no_drv_owner.cocci warnings drm/bridge: fix semicolon.cocci warnings drm: Print some debug/error info during DP dual mode detect drm: mark drm_of_component_match_add dummy inline drm/bridge: add Silicon Image SiI8620 driver dt-bindings: add Silicon Image SiI8620 bridge bindings video: add header file for Mobile High-Definition Link (MHL) interface drm: convert DT component matching to component_match_add_release() dma-buf: Rename struct fence to dma_fence dma-buf/fence: add an lockdep_assert_held() drm/dp: Factor out helper to distinguish between branch and sink devices drm/edid: Only print the bad edid when aborting drm/msm: add missing header dependencies drm/msm/adreno: move function declarations to header file drm/i2c/tda998x: mark symbol static where possible doc: add missing docbook parameter for fence-array drm: RIP mode_config->rotation_property drm/msm/mdp5: Advertize 180 degree rotation drm/msm/mdp5: Use per-plane rotation property
| * | drm/bridge: fix platform_no_drv_owner.cocci warningskbuild test robot2016-10-271-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/gpu/drm/bridge/sil-sii8620.c:1556:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci CC: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Archit Taneja <architt@codeaurora.org> Link: http://patchwork.freedesktop.org/patch/msgid/20161026165836.GA98766@lkp-sb04.lkp.intel.com
OpenPOWER on IntegriCloud